[all-commits] [llvm/llvm-project] a51712: [PowerPC][LLC] Utilize PPC::getNormalizedPPCTarget...
zhijian lin via All-commits
all-commits at lists.llvm.org
Mon Nov 4 06:41:15 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: a51712751c184ebe056718c938d2526693a31564
https://github.com/llvm/llvm-project/commit/a51712751c184ebe056718c938d2526693a31564
Author: zhijian lin <zhijian at ca.ibm.com>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/PowerPC/PPCSubtarget.cpp
M llvm/test/Analysis/LoopCacheAnalysis/PowerPC/compute-cost-m32.ll
M llvm/test/CodeGen/PowerPC/2007-11-16-landingpad-split.ll
M llvm/test/CodeGen/PowerPC/Frames-dyn-alloca.ll
M llvm/test/CodeGen/PowerPC/Frames-large.ll
M llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll
M llvm/test/CodeGen/PowerPC/aix-cc-abi-mir.ll
M llvm/test/CodeGen/PowerPC/aix-dwarf.ll
M llvm/test/CodeGen/PowerPC/aix-static-init-non-default-priority.ll
M llvm/test/CodeGen/PowerPC/aix-weak-reloc.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section-debug.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-exception-section.ll
M llvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
M llvm/test/CodeGen/PowerPC/aix32-cc-abi-vaarg.ll
M llvm/test/CodeGen/PowerPC/aix64-cc-abi-vaarg.ll
M llvm/test/CodeGen/PowerPC/aix64-csr-alloc.mir
M llvm/test/CodeGen/PowerPC/alloca-oversized.ll
M llvm/test/CodeGen/PowerPC/atomic-float.ll
M llvm/test/CodeGen/PowerPC/atomicrmw-cond-sub-clamp.ll
M llvm/test/CodeGen/PowerPC/atomicrmw-uinc-udec-wrap.ll
M llvm/test/CodeGen/PowerPC/atomics-indexed.ll
M llvm/test/CodeGen/PowerPC/atomics.ll
M llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-math.ll
M llvm/test/CodeGen/PowerPC/fma-assoc.ll
M llvm/test/CodeGen/PowerPC/fptoui-be-crash.ll
M llvm/test/CodeGen/PowerPC/frounds.ll
M llvm/test/CodeGen/PowerPC/ftrunc-legalize.ll
M llvm/test/CodeGen/PowerPC/hoist-logic.ll
M llvm/test/CodeGen/PowerPC/huge-frame-call.ll
M llvm/test/CodeGen/PowerPC/inc-of-add.ll
M llvm/test/CodeGen/PowerPC/kill_flag_verification.ll
M llvm/test/CodeGen/PowerPC/ldst-16-byte.mir
M llvm/test/CodeGen/PowerPC/legalize-vaarg.ll
M llvm/test/CodeGen/PowerPC/licm-tocReg.ll
A llvm/test/CodeGen/PowerPC/llc_default_cpu.ll
M llvm/test/CodeGen/PowerPC/lower-intrinsics-afn-mass_notail.ll
M llvm/test/CodeGen/PowerPC/lower-intrinsics-fast-mass_notail.ll
M llvm/test/CodeGen/PowerPC/noredzone.ll
M llvm/test/CodeGen/PowerPC/peephole-mma-phi-liveness.ll
M llvm/test/CodeGen/PowerPC/popcnt-zext.ll
M llvm/test/CodeGen/PowerPC/pow-025-075-intrinsic-scalar-mass-fast.ll
M llvm/test/CodeGen/PowerPC/ppc64-nest.ll
M llvm/test/CodeGen/PowerPC/ppc64-stackmap-nops.ll
M llvm/test/CodeGen/PowerPC/ppc64-varargs.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/ppcsoftops.ll
M llvm/test/CodeGen/PowerPC/pr43976.ll
M llvm/test/CodeGen/PowerPC/pr47660.ll
M llvm/test/CodeGen/PowerPC/pr74951.ll
M llvm/test/CodeGen/PowerPC/stack-clash-dynamic-alloca.ll
M llvm/test/CodeGen/PowerPC/stack-clash-prologue.ll
M llvm/test/CodeGen/PowerPC/stack-restore-with-setjmp.ll
M llvm/test/CodeGen/PowerPC/store-forward-be32.ll
M llvm/test/CodeGen/PowerPC/store-forward-be64.ll
M llvm/test/CodeGen/PowerPC/sub-of-not.ll
M llvm/test/CodeGen/PowerPC/toc-data-common.ll
M llvm/test/CodeGen/PowerPC/toc-data-const.ll
M llvm/test/CodeGen/PowerPC/toc-data.ll
M llvm/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
M llvm/test/CodeGen/PowerPC/vec-trunc2.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
M llvm/test/DebugInfo/XCOFF/empty.ll
M llvm/test/DebugInfo/XCOFF/explicit-section.ll
M llvm/test/DebugInfo/XCOFF/function-sections.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/massv-calls.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.generated.expected
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/ppc_generated_funcs.ll.nogenerated.expected
M llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands.ll
M llvm/test/tools/llvm-objdump/XCOFF/disassemble-symbolize-operands2.ll
Log Message:
-----------
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
Utilize common API in PPCTargetParser
(https://github.com/llvm/llvm-project/pull/97541) to set default CPU
with same interfaces for LLC.
This will update AIX default CPU to pwr7 and LoP powerppc64 default CPU
to ppc64.
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