[all-commits] [llvm/llvm-project] ac1869: [CostModel][X86] Add initial costs for non-lane-cr...
Simon Pilgrim via All-commits
all-commits at lists.llvm.org
Mon Nov 4 02:19:24 PST 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: ac1869aa70a8cb0e22679fd6eabbb30c101d22bc
https://github.com/llvm/llvm-project/commit/ac1869aa70a8cb0e22679fd6eabbb30c101d22bc
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-11-04 (Mon, 04 Nov 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/reduction.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-non-pow-2.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-codesize.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-latency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose-sizelatency.ll
M llvm/test/Analysis/CostModel/X86/shuffle-transpose.ll
M llvm/test/Transforms/PhaseOrdering/X86/horiz-math-inseltpoison.ll
M llvm/test/Transforms/PhaseOrdering/X86/horiz-math.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/alternate-calls.ll
Log Message:
-----------
[CostModel][X86] Add initial costs for non-lane-crossing one/two input shuffles (#114680)
Most of the x86 shuffle instructions operate within each 128-bit subvector lane, but our shuffle costs struggle to handle this and have to fallback to worst case shuffles that reference elements from any lane.
This patch detects shuffle masks that we know are "inlane" and enable us to assume a cheaper shuffle cost.
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