[all-commits] [llvm/llvm-project] 7f498a: [CostModel][LoopVectorize] Move some loop vectoris...
David Sherwood via All-commits
all-commits at lists.llvm.org
Wed Oct 30 06:50:25 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 7f498a865fd946bb92e592b31b41509073306ab3
https://github.com/llvm/llvm-project/commit/7f498a865fd946bb92e592b31b41509073306ab3
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-10-30 (Wed, 30 Oct 2024)
Changed paths:
R llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll
R llvm/test/Analysis/CostModel/X86/gather-i16-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/gather-i32-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/gather-i64-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/gather-i8-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/handle-iptr-with-data-layout-to-not-assert.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-half.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2-indices-0u.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-01u.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3-indices-0uu.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-012u.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-01uu.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4-indices-0uuu.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-8.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-3.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-4.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-5.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-6.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-7.ll
R llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-8.ll
R llvm/test/Analysis/CostModel/X86/masked-gather-i32-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/masked-gather-i64-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/masked-interleaved-load-i16.ll
R llvm/test/Analysis/CostModel/X86/masked-interleaved-store-i16.ll
R llvm/test/Analysis/CostModel/X86/masked-load-i16.ll
R llvm/test/Analysis/CostModel/X86/masked-load-i32.ll
R llvm/test/Analysis/CostModel/X86/masked-load-i64.ll
R llvm/test/Analysis/CostModel/X86/masked-load-i8.ll
R llvm/test/Analysis/CostModel/X86/masked-scatter-i32-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/masked-scatter-i64-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/masked-store-i16.ll
R llvm/test/Analysis/CostModel/X86/masked-store-i32.ll
R llvm/test/Analysis/CostModel/X86/masked-store-i64.ll
R llvm/test/Analysis/CostModel/X86/masked-store-i8.ll
R llvm/test/Analysis/CostModel/X86/scatter-i16-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/scatter-i32-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/scatter-i64-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/scatter-i8-with-i8-index.ll
R llvm/test/Analysis/CostModel/X86/strided-load-i16.ll
R llvm/test/Analysis/CostModel/X86/strided-load-i32.ll
R llvm/test/Analysis/CostModel/X86/strided-load-i64.ll
R llvm/test/Analysis/CostModel/X86/strided-load-i8.ll
A llvm/test/Transforms/LoopVectorize/AArch64/arith-fp-frem-costs.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i16-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i32-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i64-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i8-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f64-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-half.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i16-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2-indices-0u.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-01u.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3-indices-0uu.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-012u.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-01uu.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4-indices-0uuu.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i32-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i64-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-i8-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f32-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-f64-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i16-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i32-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i64-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-2.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-3.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-4.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-5.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-6.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-7.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-store-i8-stride-8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-gather-i32-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-gather-i64-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-load-i16.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-interleaved-store-i16.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i16.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i32.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i64.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i32-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-scatter-i64-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i16-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i32-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i64-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/scatter-i8-with-i8-index.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i16.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i32.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i64.ll
A llvm/test/Transforms/LoopVectorize/X86/CostModel/strided-load-i8.ll
Log Message:
-----------
[CostModel][LoopVectorize] Move some loop vectoriser tests (#113702)
Many tests that were in test/Analysis/CostModel were actually
loop vectoriser tests. I've moved them as follows:
Analysis/CostModel/X86 -> Transforms/LoopVectorize/X86/CostModel
Analysis/CostModel/AArch64/arith-fp-frem.ll ->
Transforms/LoopVectorize/AArch64/arith-fp-frem-costs.ll
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