[all-commits] [llvm/llvm-project] e33aec: [MLIR][NVVM] Update the elect.sync Op to use intri...
Fangrui Song via All-commits
all-commits at lists.llvm.org
Tue Oct 29 19:38:57 PDT 2024
Branch: refs/heads/users/MaskRay/spr/llvm-objdump-fix-coloring-with-nested-withmarkup
Home: https://github.com/llvm/llvm-project
Commit: e33aec89ef1378d80e8df2e965ac5e6e6aa2e3de
https://github.com/llvm/llvm-project/commit/e33aec89ef1378d80e8df2e965ac5e6e6aa2e3de
Author: Durgadoss R <durgadossr at nvidia.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[MLIR][NVVM] Update the elect.sync Op to use intrinsics (#113757)
Recently, we added an intrinsic for the elect.sync PTX instruction (PR
104780). This patch updates the corresponding Op in NVVM Dialect
to lower to the intrinsic instead of inline-ptx.
The existing test under Conversion/ is migrated to check for the new
pattern. A separate test is added to verify the lowered intrinsic under
the Target/ directory.
Signed-off-by: Durgadoss R <durgadossr at nvidia.com>
Commit: eef3766ae5a39fea6f7f81ac444f878969743d85
https://github.com/llvm/llvm-project/commit/eef3766ae5a39fea6f7f81ac444f878969743d85
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/default-none.f90
Log Message:
-----------
Assumed-size arrays are shared and cannot be privatized (#112963)
Do not error out if default(none) is specified and the region has an
assumed-size array.
Fixes #110442
Commit: 5621929f7f4878c318deecb592cd03f5ecbb83ba
https://github.com/llvm/llvm-project/commit/5621929f7f4878c318deecb592cd03f5ecbb83ba
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Parser/OpenMP/taskloop.f90
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
[Flang][OpenMP] Add parser support for grainsize and num_tasks clause (#113136)
These clauses are applicable only for the taskloop directive. Since the
directive has a TODO error, skipping the addition of TODOs for these
clauses.
Commit: 7b3da7b3b2b0e2f322dddf1f343571cc7fd09b09
https://github.com/llvm/llvm-project/commit/7b3da7b3b2b0e2f322dddf1f343571cc7fd09b09
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/lib/Target/AArch64/AArch64GenRegisterBankInfo.def
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/GlobalISel/sve-integer.ll
Log Message:
-----------
[GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR for SVE (#110561)
Credits: https://github.com/llvm/llvm-project/pull/72976
LLVM ERROR: cannot select: %3:zpr(<vscale x 2 x s64>) = G_MUL %0:fpr,
%1:fpr (in function: xmulnxv2i64)
;; mul
define void @xmulnxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b,
ptr %p) {
entry:
%c = mul <vscale x 2 x i64> %a, %b
store <vscale x 2 x i64> %c, ptr %p, align 16
ret void
}
define void @mulnxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b,
ptr %p) {
entry:
%c = mul <vscale x 4 x i32> %a, %b
store <vscale x 4 x i32> %c, ptr %p, align 16
ret void
}
define void @mulnxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b,
ptr %p) {
entry:
%c = mul <vscale x 8 x i16> %a, %b
store <vscale x 8 x i16> %c, ptr %p, align 16
ret void
}
define void @mulnxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b,
ptr %p) {
entry:
%c = mul <vscale x 16 x i8> %a, %b
store <vscale x 16 x i8> %c, ptr %p, align 16
ret void
}
Commit: fb33af08e4c105a05855f8beeb972d493410e72f
https://github.com/llvm/llvm-project/commit/fb33af08e4c105a05855f8beeb972d493410e72f
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/builtins-nvptx-native-half-type-native.c
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
Log Message:
-----------
[NVPTX] Remove nvvm.ldg.global.* intrinsics (#112834)
Remove these intrinsics which can be better represented by load
instructions with `!invariant.load` metadata:
- llvm.nvvm.ldg.global.i
- llvm.nvvm.ldg.global.f
- llvm.nvvm.ldg.global.p
Commit: 1fe8e7838bb5118b9e48fa15fa21a4638bae8ae1
https://github.com/llvm/llvm-project/commit/1fe8e7838bb5118b9e48fa15fa21a4638bae8ae1
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-27 (Sun, 27 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
Log Message:
-----------
[X86] Rename the x86-asm-syntax variable. NFC
Follow-up to #109360. x86-asm-syntax is for input instead of output.
Commit: 40fffba9b29141d598bf36cdc4bb886e97143d06
https://github.com/llvm/llvm-project/commit/40fffba9b29141d598bf36cdc4bb886e97143d06
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
Log Message:
-----------
[X86][AVX10.2] Fix wrong predicates for BF16 feature (#113800)
Since AVX10.2, we need to enable 128/256-bit vector by default and check
for 512 feature for 512-bit vector.
Commit: 7ad63c0e44ef277591497a176991e7723165611e
https://github.com/llvm/llvm-project/commit/7ad63c0e44ef277591497a176991e7723165611e
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/test/Conversion/MathToFuncs/ctlz.mlir
M mlir/test/Conversion/MathToFuncs/ipowi.mlir
Log Message:
-----------
[mlir][MathToFuncs] `MathToFuncs` only support integer type (#113693)
This PR fixes a bug in `MathToFuncs` where it incorrectly converts index
type for `math.ctlz` and `math.ipowi`, leading to a crash. Fixes
#108150.
Commit: 39ac64c1c0fc61a476aa22c53e6977608ead03cf
https://github.com/llvm/llvm-project/commit/39ac64c1c0fc61a476aa22c53e6977608ead03cf
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ValueBoundsOpInterfaceImpl.cpp
Log Message:
-----------
[mlir][Arith] ValueBoundsInterface: speedup arith.select (#113531)
When calculating value bounds in the arith.select op , the compare
function is invoked to compare trueValue and falseValue. This function
rebuilds constraints, resulting in repeated computations of value
bounds.
In large-scale programs, this redundancy significantly impacts
compilation time.
Commit: 5aa1275d03b679f45f47f29f206292f663afed83
https://github.com/llvm/llvm-project/commit/5aa1275d03b679f45f47f29f206292f663afed83
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/immintrin.h
A clang/lib/Headers/sm4evexintrin.h
A clang/test/CodeGen/X86/sm4-evex-builtins.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/X86InstrAVX10.td
A llvm/test/CodeGen/X86/sm4-evex-intrinsics.ll
A llvm/test/MC/Disassembler/X86/sm4-evex-32.txt
A llvm/test/MC/Disassembler/X86/sm4-evex-64.txt
A llvm/test/MC/X86/sm4-evex-32-att.s
A llvm/test/MC/X86/sm4-evex-32-intel.s
A llvm/test/MC/X86/sm4-evex-64-att.s
A llvm/test/MC/X86/sm4-evex-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86] Support SM4 EVEX version intrinsics/instructions. (#113402)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: a1d31caa8c53082d12f580122dcf2b2ff8285e78
https://github.com/llvm/llvm-project/commit/a1d31caa8c53082d12f580122dcf2b2ff8285e78
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.c
Log Message:
-----------
[clang-tidy] fix false positive for implicit conversion of comparison result in C23 (#113639)
Fixed #111013
bool will be builtin type in C23 but comparison result in C is still
int.
It is no need to change this kind of implicit cast to explicit cast.
Commit: c876d719ef5b10128eca6d8677068248b4831017
https://github.com/llvm/llvm-project/commit/c876d719ef5b10128eca6d8677068248b4831017
Author: antangelo <contact at antangelo.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Sema/SemaInternal.h
Log Message:
-----------
[clang][NFC] Accept const NamedDecl pointer for getDepthAndIndex (#113857)
Commit: 99b2feadcc770ea52f71dda6cf027373a6931c6c
https://github.com/llvm/llvm-project/commit/99b2feadcc770ea52f71dda6cf027373a6931c6c
Author: ZhangYin <zhangyin2018 at iscas.ac.cn>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
Log Message:
-----------
[libc++] <experimental/simd> temporarily mark XFAIL for the armv7-unknown-linux-gnueabihf with simd unary test to pass the CI (#113641)
Commit: d3f70db51cbc0876937d404e96fbda04df793bd4
https://github.com/llvm/llvm-project/commit/d3f70db51cbc0876937d404e96fbda04df793bd4
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/X86/X86InstrSystem.td
A llvm/test/MC/Disassembler/X86/apx/msr-imm.txt
A llvm/test/MC/Disassembler/X86/msrimm-64.txt
A llvm/test/MC/X86/apx/msrimm-att.s
A llvm/test/MC/X86/apx/msrimm-intel.s
A llvm/test/MC/X86/msrimm-64-att.s
A llvm/test/MC/X86/msrimm-64-intel.s
Log Message:
-----------
[X86][MC] Support instructions of MSR_IMM (#113524)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/671368
Commit: 5d4a0d54b5269bad1410e6db957836fe98634069
https://github.com/llvm/llvm-project/commit/5d4a0d54b5269bad1410e6db957836fe98634069
Author: David Majnemer <david.majnemer at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/shift.ll
Log Message:
-----------
[InstCombine] Teach takeLog2 about right shifts, truncation and bitwise-and
We left some easy opportunities for further simplifications.
log2(trunc(x)) is simply trunc(log2(x)). This is safe if we know that
trunc is NUW because it means that the truncation didn't drop any bits.
It is also safe if the caller is OK with zero as a possible answer.
log2(x >>u y) is simply `log2(x) - y`.
log2(x & y) is a funny one. It comes up when doing something like:
```
unsigned int f(unsigned int x, unsigned int y) {
unsigned char a = 1u << x;
return y / a;
}
```
LLVM would canonicalize this to:
```
%shl = shl nuw i32 1, %x
%conv1 = and i32 %shl, 255
%div = udiv i32 %y, %conv1
```
In cases like these, we can ignore the mask entirely.
This is equivalent to `y >> x`.
Commit: 819abe412dd554303cb932d6ec2200b9b9ebdd78
https://github.com/llvm/llvm-project/commit/819abe412dd554303cb932d6ec2200b9b9ebdd78
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/cvt-fp-int-fp.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-fp16.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics.ll
M llvm/test/CodeGen/ARM/fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/X86/bfloat-constrained.ll
M llvm/test/CodeGen/X86/float-strict-powi-convert.ll
M llvm/test/Transforms/EarlyCSE/defaultfp-strictfp.ll
M llvm/test/Transforms/EarlyCSE/ebstrict-strictfp.ll
M llvm/test/Transforms/EarlyCSE/mixed-strictfp.ll
M llvm/test/Transforms/EarlyCSE/nonmixed-strictfp.ll
M llvm/test/Transforms/SCCP/strictfp-phis-fcmp.ll
M llvm/test/Transforms/SCCP/strictfp-phis-fcmps.ll
Log Message:
-----------
[Test] Fix usage of constrained intrinsics (#113523)
Some tests contain errors in constrained intrinsic usage, such as missed
or extra type parameters, wrong type parameters order and some other.
---------
Co-authored-by: Andy Kaylor <andy_kaylor at yahoo.com>
Commit: 5155c38ceef019f3225c5eaeba6b986e2430752f
https://github.com/llvm/llvm-project/commit/5155c38ceef019f3225c5eaeba6b986e2430752f
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
A llvm/test/Transforms/InstCombine/pr105510.ll
Log Message:
-----------
[InstCombine] Don't check uses of constant exprs (#113684)
This patch skips constant expressions to avoid iterating over uses on
other functions.
Fix crash reported in
https://github.com/llvm/llvm-project/pull/105510#issuecomment-2437521147.
Commit: fd85761208b4fe0569e3fde0d11297f7dcd0e48e
https://github.com/llvm/llvm-project/commit/fd85761208b4fe0569e3fde0d11297f7dcd0e48e
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avxneconvert-intrinsics.ll
Log Message:
-----------
[X86][BF16] Customize VSELECT for BF16 under AVX-NECONVERT (#113322)
Fixes: https://godbolt.org/z/9abGnE8zs
Commit: e7f422d5c2ea05704eaab2cdd67a8b1ebc55e95b
https://github.com/llvm/llvm-project/commit/e7f422d5c2ea05704eaab2cdd67a8b1ebc55e95b
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/ADT/ArrayRef.h
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
Add clang::lifetimebound annotation to ArrayRef constructors. (#113547)
This enables clang to detect more dangling issues.
```
ArrayRef<int> func() {
constexpr int array[] = {...}; // oops, missing the static
return array; // return a dangling reference, bomb.
}
```
See #113533.
Commit: 35f6cc6af09f48f9038fce632815a2ad6ffe8689
https://github.com/llvm/llvm-project/commit/35f6cc6af09f48f9038fce632815a2ad6ffe8689
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Add the Sha extension (#113820)
This was introduced in the now-ratified RVA23 profile (and also added to
the RVA22 text) as a simple way of referring to H plus the set of
supervisor extensions required by RVA23.
https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc
This patch simply defines the extension. The next patch will adjust the
RVA23 profile to use it, and at that point I think we will be ready to
mark RVA23 as non-experimental.
Note that I haven't made it so if you enable all extensions that
constitute Sha, Sha is implied. Per #76893 (adding 'B'), the concern is
making this implication might break older external assemblers. Perhaps
this is less of a concern given the relative frequency of
`-march=${foo}_zba_zbb_zbs` vs the collection of H extensions. If we did
want to add that implication, we'd probably want to add it in a separate
patch so it can be easily reverted if found to cause problems.
Commit: a4fd3dba6e285734bc635b0651a30dfeffedeada
https://github.com/llvm/llvm-project/commit/a4fd3dba6e285734bc635b0651a30dfeffedeada
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
A llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
Log Message:
-----------
[AMDGPU] Use wider loop lowering type for LowerMemIntrinsics (#112332)
When llvm.memcpy or llvm.memmove intrinsics are lowered as a loop in
LowerMemIntrinsics.cpp, the loop consists of a single load/store pair
per iteration. We can improve performance in some cases by emitting
multiple load/store pairs per iteration. This patch achieves that by
increasing the width of the loop lowering type in the GCN target and
letting legalization split the resulting too-wide access pairs into
multiple legal access pairs.
This change only affects lowered memcpys and memmoves with large (>=
1024 bytes) constant lengths. Smaller constant lengths are handled by
ISel directly; non-constant lengths would be slowed down by this change
if the dynamic length was smaller or slightly larger than what an
unrolled iteration copies.
The chosen default unroll factor is the result of microbenchmarks on
gfx1030. This change leads to speedups of 15-38% for global memory and
1.9-5.8x for scratch in these microbenchmarks.
Part of SWDEV-455845.
Commit: 86f76c3b171f95fd0560339f2ad0f4449277cf8d
https://github.com/llvm/llvm-project/commit/86f76c3b171f95fd0560339f2ad0f4449277cf8d
Author: Jack Styles <jack.styles at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M libunwind/src/DwarfInstructions.hpp
M libunwind/src/DwarfParser.hpp
M libunwind/src/dwarf2.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
M llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
M llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir
M llvm/test/MC/AArch64/directives-case_insensitive.s
A llvm/test/MC/AArch64/negate_ra_state_with_pc.s
M llvm/unittests/DebugInfo/DWARF/DWARFDebugFrameTest.cpp
Log Message:
-----------
[AArch64][Libunwind] Add Support for FEAT_PAuthLR DWARF Instruction (#112171)
As part of FEAT_PAuthLR, a new DWARF Frame Instruction was introduced,
`DW_CFA_AARCH64_negate_ra_state_with_pc`. This instructs Libunwind that
the PC has been used with the signing instruction. This change includes
three commits
- Libunwind support for the newly introduced DWARF Instruction
- CodeGen Support for the DWARF Instructions
- Reversing the changes made in #96377. Due to
`DW_CFA_AARCH64_negate_ra_state_with_pc`'s requirements to be placed
immediately after the signing instruction, this would mean the CFI
Instruction location was not consistent with the generated location when
not using FEAT_PAuthLR. The commit reverses the changes and makes the
location consistent across the different branch protection options.
While this does have a code size effect, this is a negligible one.
For the ABI information, see here:
https://github.com/ARM-software/abi-aa/blob/853286c7ab66048e4b819682ce17f567b77a0291/aadwarf64/aadwarf64.rst#id23
Commit: d7ca703eab7997814de425eaa4fd888563d78831
https://github.com/llvm/llvm-project/commit/d7ca703eab7997814de425eaa4fd888563d78831
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M compiler-rt/include/profile/InstrProfData.inc
M llvm/include/llvm/ProfileData/InstrProfData.inc
Log Message:
-----------
Add explicit symbol visibility macros to InstrProfData.inc (#110732)
Add explicit symbol visibility macros to InstrProfData.inc
Annotating these symbols will fix missing symbols for InstrProfTest when
using shared library builds on windows with explicit visibility macros
enabled.
Add a empty fallback definition for LLVM_ABI macro so the code works in
compiler-rt.
This is part of the work to enable LLVM_BUILD_LLVM_DYLIB and plugins on
window.
```
llvm\lld-link : error : undefined symbol: public: void ValueProfData::deserializeTo(InstrProfRecord&, InstrProfSymtab*)
>>> referenced by unittests\ProfileData\InstrProfTest.cpp:1372 void ValueProfileReadWriteTest_value_prof_data_read_write_Test::TestBody()
```
Commit: 14171b0b13534e10ac57d13d072970616e17391b
https://github.com/llvm/llvm-project/commit/14171b0b13534e10ac57d13d072970616e17391b
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/Remarks/HotnessThresholdParser.h
Log Message:
-----------
[Remarks] Fix missing include in HotnessThresholdParser for Expected (#113755)
The use of Expected<> requires llvm/Support/Error.h to be included.
Commit: 3d6923dbac16741736a841abee05f35bf7b0379a
https://github.com/llvm/llvm-project/commit/3d6923dbac16741736a841abee05f35bf7b0379a
Author: vabridgers <58314289+vabridgers at users.noreply.github.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.h
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/nondeterministic-pointer-iteration-order.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_algorithm
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_c++config.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_initializer_list
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_iterator_base
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_map
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_set
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_stl_pair
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_type_traits
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_unordered_map
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_unordered_set
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_vector
A clang-tools-extra/test/clang-tidy/checkers/bugprone/nondeterministic-pointer-iteration-order.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
R clang/lib/StaticAnalyzer/Checkers/PointerIterationChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/PointerSortingChecker.cpp
R clang/test/Analysis/ptr-iter.cpp
R clang/test/Analysis/ptr-sort.cpp
Log Message:
-----------
RFC: [clang-tidy] [analyzer] Move nondeterministic pointer usage check to tidy (#110471)
This change moves the `alpha.nondeterministic.PointerSorting` and
`alpha.nondeterministic.PointerIteration` static analyzer checkers to a
single `clang-tidy` check. Those checkers were implemented as simple
`clang-tidy` check-like code, wrapped in the static analyzer framework.
The documentation was updated to describe what the checks can and cannot
do, and testing was completed on a broad set of open-source projects.
Co-authored-by: Vince Bridgers <vince.a.bridgers at ericsson.com>
Commit: f6b513a7857cbcdb7df93079916e6bb8a00bd0b8
https://github.com/llvm/llvm-project/commit/f6b513a7857cbcdb7df93079916e6bb8a00bd0b8
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M compiler-rt/include/profile/InstrProfData.inc
M llvm/include/llvm/ProfileData/InstrProfData.inc
Log Message:
-----------
Revert "Add explicit symbol visibility macros to InstrProfData.inc (#110732)"
This reverts commit d7ca703eab7997814de425eaa4fd888563d78831 in llvm/llvm-project#110732
Commit: dff114b3565e4c981fcb40f24f72a0cb426294fe
https://github.com/llvm/llvm-project/commit/dff114b3565e4c981fcb40f24f72a0cb426294fe
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/test/CodeGen/Thumb2/bti-pac-replace-2.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-basic.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-frame-chain.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-indirect-tail-call.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-outliner-4.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-overalign.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-stack-arg.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-varargs-1.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-varargs-2.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-vla.ll
Log Message:
-----------
[ARM] Optimise non-ABI frame pointers (#110286)
With -fomit-frame-pointer, even if we set up a frame pointer for other
reasons (e.g. variable-sized or over-aligned stack allocations), we
don't need to create an ABI-compliant frame record. This means that we
can save all of the general-purpose registers in one push, instead of
splitting it to ensure that the frame pointer and link register are
adjacent on the stack, saving two instructions per function.
Commit: 933a56674e75ed372e000758378b7981e5b4d387
https://github.com/llvm/llvm-project/commit/933a56674e75ed372e000758378b7981e5b4d387
Author: Jack Styles <jack.styles at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/MachineOperand.cpp
Log Message:
-----------
[PAuthLR] Add Missing Break Statement for MachineOperand Switch Statement (#113883)
There was a missing break, which led to an unannotated fallthrough when
merging #112171. This has caused sanitizer builds to fail.
This adds the missing break in the switch statement to ensure that the
fallthrough does not occur.
Commit: 43a5719d9f54fb482d523a6e313d9b9b9af82379
https://github.com/llvm/llvm-project/commit/43a5719d9f54fb482d523a6e313d9b9b9af82379
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/test/CodeGen/RISCV/attributes.ll
Log Message:
-----------
[RISCV] Use Sha extension in RVA23S64 profile (#113823)
In the ratified version of the RVA23S64 definition, the Sha extension is
now used to group together the set of hypervisor related extensions.
<https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc>
Commit: 96f5c683500eb2d7f7c3984e3a056315c50c4662
https://github.com/llvm/llvm-project/commit/96f5c683500eb2d7f7c3984e3a056315c50c4662
Author: Luke Lau <luke at igalia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compress-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-compress.ll
Log Message:
-----------
[RISCV] Lower @llvm.experimental.vector.compress for zvfhmin/zvfbfmin (#113770)
This is a follow up to #113291 and handles f16/bf16 with zvfhmin and
zvfbmin.
Commit: fa4790e404843cff4370cf259b93e51e8341469d
https://github.com/llvm/llvm-project/commit/fa4790e404843cff4370cf259b93e51e8341469d
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
Log Message:
-----------
[AMDGPU][MC] Fix disassembler for VIMAGE when non-first vaddr is v0 (#113569)
For disassembler tables we use *V1_V4* variants for VIMAGE and then
remove unused vaddr fields. *V1_V1* variant, which has every vaddr
field other than vaddr0 set to 0, was also enabled and caused confusion
when decoding cases which used v0 (whose encoded value is 0)
Commit: f78610af3feb88f0e1edb2482dc77490fb4cad77
https://github.com/llvm/llvm-project/commit/f78610af3feb88f0e1edb2482dc77490fb4cad77
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Analysis/ValueTracking/numsignbits-from-assume.ll
M llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/constant-fold-iteration.ll
M llvm/test/Transforms/InstCombine/icmp-or.ll
M llvm/test/Transforms/InstCombine/pr55228.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sink_instruction.ll
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
M llvm/test/Transforms/PGOProfile/chr.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
Log Message:
-----------
[InstCombine] Add function attribute `instcombine-no-verify-fixpoint` (#113822)
This patch introduces a function attribute
`instcombine-no-verify-fixpoint` to avoids disabling fix-point
verification for unrelated tests in the same file.
Address comment
https://github.com/llvm/llvm-project/pull/112642#discussion_r1804714387.
Commit: 09c258ef6a2fcca2161488b214d53ef39891fa22
https://github.com/llvm/llvm-project/commit/09c258ef6a2fcca2161488b214d53ef39891fa22
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M lldb/tools/lldb-dap/Breakpoint.cpp
M lldb/tools/lldb-dap/Breakpoint.h
M lldb/tools/lldb-dap/BreakpointBase.cpp
M lldb/tools/lldb-dap/BreakpointBase.h
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/FifoFiles.cpp
M lldb/tools/lldb-dap/FifoFiles.h
M lldb/tools/lldb-dap/FunctionBreakpoint.cpp
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/InstructionBreakpoint.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[NFC][lldb-dap] Clean-up includes (#113839)
This commit cleans up the includes in the `lldb-dap` subfolder. The main
motivation was that I got annoyed by `clangd` always complaining about
unused includes while working on lldb-dap.
Commit: e6fcf349eff5be326e1923567646edf99f69d297
https://github.com/llvm/llvm-project/commit/e6fcf349eff5be326e1923567646edf99f69d297
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.cpp
Log Message:
-----------
[clang-tidy] Remove unused variable (NFC)
/llvm-project/clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.cpp:60:29:
error: unused variable 'AlgoName' [-Werror,-Wunused-variable]
const llvm::StringRef AlgoName = ClassTemplate->getName();
^
1 error generated.
Commit: f5d8a485e216996b076369b4d66c41a70fe34ea4
https://github.com/llvm/llvm-project/commit/f5d8a485e216996b076369b4d66c41a70fe34ea4
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/docs/UserGuides.rst
Log Message:
-----------
[RISCV] Fix typo in UserGuides.rst. NFC (#113861)
Commit: 09160a98218e7f1038e06c5d8e704a826ed0ae13
https://github.com/llvm/llvm-project/commit/09160a98218e7f1038e06c5d8e704a826ed0ae13
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Log Message:
-----------
[SystemZ] Silence compiler warning (#113894)
Use SystemZ::NoRegister instead of 0 in
SystemZTargetLowering::getRegisterByName().
Commit: 64148944c56f50a50383c79d5b6d074d8608f2a4
https://github.com/llvm/llvm-project/commit/64148944c56f50a50383c79d5b6d074d8608f2a4
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/MC/AArch64/SVE2/sqabs-diagnostics.s
M llvm/test/MC/AArch64/SVE2/sqneg-diagnostics.s
M llvm/test/MC/AArch64/SVE2/urecpe-diagnostics.s
M llvm/test/MC/AArch64/SVE2/ursqrte-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/sqabs_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/sqabs_z.s
A llvm/test/MC/AArch64/SVE2p2/sqneg_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/sqneg_z.s
A llvm/test/MC/AArch64/SVE2p2/urecpe_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/urecpe_z.s
A llvm/test/MC/AArch64/SVE2p2/ursqrte_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/ursqrte_z.s
Log Message:
-----------
[AArch64] Add assembly/disassembly for zeroing SVE2 integer instructions (#113473)
This patch adds assembly/disassembly for the following SVE2.2
instructions
- SQABS (zeroing)
- SQNEG (zeroing)
- URECPE (zeroing)
- USQRTE (zeroing)
- Refactor the existing merging forms to remove the now redundant bit 17
argument.
- In accordance with:
https://developer.arm.com/documentation/ddi0602/latest/
Commit: f5ff3a560fe247206814792a7f8efef8215f7689
https://github.com/llvm/llvm-project/commit/f5ff3a560fe247206814792a7f8efef8215f7689
Author: Discookie <viktor.cseh at ericsson.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.c
Log Message:
-----------
[clang-tidy] Do not emit file path for anonymous enums in `readability-enum-initial-value` check (#112496)
Previously the name of anonymous enums in the check were `enum 'enum
(unnamed at /full/path/to/file.c:1:1)'`, which breaks reproducibility of
clang-tidy reports when the analyzed project is in a different folder.
Commit: 1df5c943439b050dbc34e7a1c88c4d8ec90d26b5
https://github.com/llvm/llvm-project/commit/1df5c943439b050dbc34e7a1c88c4d8ec90d26b5
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
A clang/test/CodeGen/aarch64-fpm-helpers.c
M clang/utils/TableGen/NeonEmitter.cpp
Log Message:
-----------
[AArch64] Implement FP8 floating-point mode helper intrinsics (#100608)
Implement FP8 mode helper intrinsics (as inline functions) as
specified in ACLE 2024Q3 "14.2 Helper intrinsics"
https://github.com/ARM-software/acle/releases/download/r2024Q3/acle-2024Q3.pdf
Commit: 0cbccb13d6757b0ea7f2a7f29bb598e1935bcf37
https://github.com/llvm/llvm-project/commit/0cbccb13d6757b0ea7f2a7f29bb598e1935bcf37
Author: Luke Lau <luke at igalia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/rvv/remat.ll
Log Message:
-----------
[RISCV] Remove support for pre-RA vsetvli insertion (#110796)
Now that LLVM 19.1.0 has been out for a while with post-vector-RA
vsetvli insertion enabled by default, this proposes to remove the flag
that restores the old pre-RA behaviour so we only have one configuration
going forward.
That flag was mainly meant as a fallback in case users ran into issues,
but I haven't seen anything reported so far.
Commit: d6d4569dd90261bc8cdb3d1c3c2204cde1fe566f
https://github.com/llvm/llvm-project/commit/d6d4569dd90261bc8cdb3d1c3c2204cde1fe566f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
Fix MSVC "signed/unsigned mismatch" warnings. NFC.
Commit: 056cf936a730a72db7ad9da8b475814c6bbe03b7
https://github.com/llvm/llvm-project/commit/056cf936a730a72db7ad9da8b475814c6bbe03b7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/andnot-patterns.ll
Log Message:
-----------
[DAG] Fold (and X, (bswap/bitreverse (not Y))) -> (and X, (not (bswap/bitreverse Y))) (#112547)
On ANDNOT capable targets we can always do this profitably, without ANDNOT we only attempt this if we don't introduce an additional NOT
Fixes #112425
Commit: 75c75fc16e8a202668cfa71404724117b22336b9
https://github.com/llvm/llvm-project/commit/75c75fc16e8a202668cfa71404724117b22336b9
Author: dong-miao <601183878 at qq.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV]Add svvptc extension (#113882)
Commit: 233e64d8e4211e6c3c94a986c28f9993da2b8de0
https://github.com/llvm/llvm-project/commit/233e64d8e4211e6c3c94a986c28f9993da2b8de0
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 0be1883c36fc
Commit: cbaecb5d299c48ea23319704445c1ee8405f4c04
https://github.com/llvm/llvm-project/commit/cbaecb5d299c48ea23319704445c1ee8405f4c04
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Log Message:
-----------
[gn build] Port 3d6923dbac16
Commit: 595ec4e4be7de4258dd346e606b4a03a5eb0ce8a
https://github.com/llvm/llvm-project/commit/595ec4e4be7de4258dd346e606b4a03a5eb0ce8a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 5aa1275d03b6
Commit: 2a4bab3fac64833321287d9ba17dcad5255d0ab4
https://github.com/llvm/llvm-project/commit/2a4bab3fac64833321287d9ba17dcad5255d0ab4
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port cfde4fbccf5d
Commit: 1164bd774783f33419e56cf10fdb87fbeab2b185
https://github.com/llvm/llvm-project/commit/1164bd774783f33419e56cf10fdb87fbeab2b185
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port e146c1867e8d
Commit: ba7555e640ea7fe341e19e0c1fffe5960b7c0d5b
https://github.com/llvm/llvm-project/commit/ba7555e640ea7fe341e19e0c1fffe5960b7c0d5b
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-profiles.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Mark the RVA23S64 and RVA23U64 profiles as non-experimental (#113826)
All of the extensions used by these profile are themselves
non-experimental, and RVA23 was just ratified
<https://riscv.org/announcements/2024/10/risc-v-announces-ratification-of-the-rva23-profile-standard/>.
<https://github.com/riscv/riscv-profiles/blob/main/src/rva23-profile.adoc>
We lack a way of expressing `Ss1p13` (supervisor architecture 1.13), but
this is a problem we have for RVA22 (Ss1p12) and RVA20 (Ss1p11) so I
don't feel it's a blocker.
Commit: ddd463be7edc3f3d03a6e88917fff66ef84210e9
https://github.com/llvm/llvm-project/commit/ddd463be7edc3f3d03a6e88917fff66ef84210e9
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
Log Message:
-----------
[AArch64] Add getStreamingHazardSize() to AArch64Subtarget (#113679)
This is defined by the `-aarch64-streaming-hazard-size` option or its
alias `-aarch64-stack-hazard-size` (the original name). It has been
renamed to be more general as this option will (for the time being) be
used to detect if the current target has streaming mode memory hazards.
---------
Co-authored-by: Hari Limaye <hari.limaye at arm.com>
Commit: 9090430d4176fa260b8da46b7b983b3760d452be
https://github.com/llvm/llvm-project/commit/9090430d4176fa260b8da46b7b983b3760d452be
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
Log Message:
-----------
Add clang::lifetimebound annotation to StringRef constructors. (#113878)
Adding the lifetimebound annotation to the ArrayRef's array constructor
can enable us to detect the following use-after-free issues:
```
llvm::StringRef TestZoneName() {
char test[] = "foo"; // oops, missing static
return test; // use-after-free.
}
```
See #113533
Commit: b1ede8fcb45d91092f5afe6c88d7a548f14ed848
https://github.com/llvm/llvm-project/commit/b1ede8fcb45d91092f5afe6c88d7a548f14ed848
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
[reland][libc][bazel] Enable software prefetching for memcpy (#113886)
This will affect only Bazel configuration for now.
This is a reland of #108939 which has been reverted because of codegen
issues fixed by https://github.com/llvm/llvm-project/pull/113161.
Commit: ce0368eb8417f2d369499bb98b1f0ccbe2219598
https://github.com/llvm/llvm-project/commit/ce0368eb8417f2d369499bb98b1f0ccbe2219598
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/MC/AArch64/SVE2p1/pmlal-diagnostics.s
A llvm/test/MC/AArch64/SVE2p1/pmlal.s
A llvm/test/MC/AArch64/SVE2p1/pmull-diagnostics.s
A llvm/test/MC/AArch64/SVE2p1/pmull.s
Log Message:
-----------
[AArch64] Add assembly/disassembly for PMLAL/PMULL instructions (#113564)
This patch adds assembly/disassembly for the following SVE_AES2
instructions
- PMLAL
- PMULL
- In accordance with:
https://developer.arm.com/documentation/ddi0602/latest/
Commit: 7152bf3bc805b8d9b1873058ab0a084d7b6079d6
https://github.com/llvm/llvm-project/commit/7152bf3bc805b8d9b1873058ab0a084d7b6079d6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/full-overlap-non-schedulable.ll
Log Message:
-----------
[SLP]Do not create new vector node if scalars fully overlap with the existing one
If the list of scalars vectorized as the part of the same vector node,
no need to generate vector node again, it will be handled as part of
overlapping matching.
Fixes #113810
Commit: d4c41804175e9cb37266c410cafe9caaac1819ca
https://github.com/llvm/llvm-project/commit/d4c41804175e9cb37266c410cafe9caaac1819ca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/cuda-cross-compiling.c
Log Message:
-----------
[Clang] Add a flag to include GPU startup files (#112025)
Summary:
The C library for GPUs provides the ability to target regular C/C++
programs by providing the C library and a file containing kernels that
call the `main` function. This is mostly used for unit tests, this patch
provides a quick way to add them without needing to know the paths. I
currently do this explicitly, but according to the libc++ contributors
we don't want to need to specify these paths manually. See the
discussion in https://github.com/llvm/llvm-project/pull/104515.
I just default to `lib/` if the target-specific one isn't found because
the linker will handle giving a reasonable error message if it's not
found. Basically the use-case looks like this.
```console
$ clang test.c --target=amdgcn-amd-amdhsa -mcpu=native -startfiles -stdlib
$ amdhsa-loader a.out
PASS!
```
Commit: 42eb54b7743df421af10ebe14b67bb79b46ecabb
https://github.com/llvm/llvm-project/commit/42eb54b7743df421af10ebe14b67bb79b46ecabb
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/test/CodeGenCUDA/offloading-entries.cu
M llvm/lib/Frontend/Offloading/Utility.cpp
Log Message:
-----------
[Clang] Put offloading globals in the `.llvm.rodata.offloading` section (#111890)
Summary:
For our offloading entries, we currently store all the string names of
kernels that the runtime will need to load from the target executable.
These are available via pointer in the `__tgt_offload_entry` struct,
however this makes it difficult to obtain from the object itself. This
patch simply puts the strings in a named section so they can be easily
queried.
The motivation behind this is that when the linker wrapper is doing
linking, it wants to know which kernels the host executable is calling.
We *could* get this already via the `.relaomp_offloading_entires`
section and trawling through the string table, but that's quite annoying
and not portable. The follow-up to this should be to make the linker
wrapper get a list of all used symbols the device link job should count
as "needed" so we can handle static linking more directly.
Commit: bd6ab32e6eb642f2b0b15be8c7c2a668192f07d8
https://github.com/llvm/llvm-project/commit/bd6ab32e6eb642f2b0b15be8c7c2a668192f07d8
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/test/Driver/frontend-forwarding.f90
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/loop01.fir
M flang/test/Fir/loop02.fir
M flang/test/Lower/HLFIR/goto-do-body.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-derived-assignments.f90
M flang/test/Lower/array-derived.f90
M flang/test/Lower/array-elemental-calls-char-byval.f90
M flang/test/Lower/array-elemental-calls-char.f90
M flang/test/Lower/array-expression-assumed-size.f90
M flang/test/Lower/array-expression-slice-1.f90
M flang/test/Lower/array-substring.f90
M flang/test/Lower/array-temp.f90
M flang/test/Lower/components.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/goto-do-body.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/vector-subscript-io.f90
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
Revert "[flang] Integrate the option -flang-experimental-integer-overflow into -fno-wrapv" (#113901)
Reverts llvm/llvm-project#110063 due to the performance regression on
503.bwaves_r in SPEC2017.
Commit: 1f6741c1645954b1f4b2fbca470a20081f5e75af
https://github.com/llvm/llvm-project/commit/1f6741c1645954b1f4b2fbca470a20081f5e75af
Author: Jan Voung <jvoung at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang][dataflow] Don't clear cached field state if field is const (#113698)
... in the unchecked optional access model.
Commit: d83485a080341688cbb9d5c07a3839bd97f9001e
https://github.com/llvm/llvm-project/commit/d83485a080341688cbb9d5c07a3839bd97f9001e
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
A clang/test/CXX/drs/cwg1884.cpp
M clang/test/CXX/drs/cwg18xx.cpp
A clang/test/CXX/drs/cwg279.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Add test for CWG issues about linkage in cross-TU context (#113736)
[CWG279](https://cplusplus.github.io/CWG/issues/279.html) Correspondence
of "names for linkage purposes"
====================
[P1787R6](https://wg21.link/p1787r6):
> CWG1884, CWG279, and CWG338 are resolved by defining entity identity
explicitly.
In both cases discussed in the issue, declaration matching succeeds per
[[basic.link]/8](https://eel.is/c++draft/basic.link#8), thanks to the
> considering declarations of unnamed types to introduce their names for
linkage purposes, if any ([dcl.typedef], [dcl.enum])
and
> they both declare names with external linkage
parts. Which means that both pairs of declarations of `S` and `S2`
declare the same entity.
[[basic.link]/11](https://eel.is/c++draft/basic.link#11) is also
satisfied, because in all cases type is declared.
Then cases diverge. `S` is a pair of a forward declaration and a
definition, which means it's not a subject to
[[basic.def.odr]/15](https://eel.is/c++draft/basic.def.odr#15), hence
it's well-formed. Whereas `S2` is a pair of two definitions, so they are
subjects to
[[basic.def.odr]/15](https://eel.is/c++draft/basic.def.odr#15), which
they do not satisfy due to the violation of the following requirement:
> — Each such definition shall consist of the same sequence of tokens,
<...>
Because per [[class.pre/2]](https://eel.is/c++draft/class#pre-2), class
definition is class-specifier, which includes class-head, but class-head
is different between definitions.
[CWG338](https://cplusplus.github.io/CWG/issues/338.html) Enumerator
name with linkage used as class name in other translation unit
====================
[P1787R6](https://wg21.link/p1787r6):
> CWG1884, CWG279, and CWG338 are resolved by defining entity identity
explicitly.
I believe this CWG issue points to the same underlying issue with old
[basic.link]/9 as CWG1884 (see below), so I'm calling it a duplicate of
CWG1884. Cases described there are a part of an extensive CWG1884 test.
Also worth noting that enumerators don't have linkage these days.
[CWG1884](https://cplusplus.github.io/CWG/issues/1898.html) Unclear
requirements for same-named external-linkage entities
====================
[P1787R6](https://wg21.link/p1787r6):
> CWG1884, CWG279, and CWG338 are resolved by defining entity identity
explicitly.
[basic.link]/9 quoted in the issue is now split into several pieces.
> Two names that are the same (6.1 [basic.pre])
I believe this is corresponding declarations now, defined in
[[basic.scope.scope]/4](https://eel.is/c++draft/basic.scope#scope-4).
> and that are declared in different scopes shall denote the same
variable, function, type, enumerator, template or namespace if
This is covered by
[[basic.link]/11](https://eel.is/c++draft/basic.link#11) after it's
determined by [[basic.link]/8](https://eel.is/c++draft/basic.link#8)
that two declarations declare the same entity.
> — both names have external linkage or else both names have internal
linkage and are declared in the same translation unit; and
> — both names refer to members of the same namespace or to members, not
by inheritance, of the same class; and
Most of this is covered by
[[basic.link]/8](https://eel.is/c++draft/basic.link#8).
> — when both names denote functions, the parameter-type-lists of the
functions (9.3.4.6 [dcl.fct]) are identical; and
> — when both names denote function templates, the signatures (13.7.7.2
[temp.over.link]) are the same.
This is corresponding overloads now, defined in
[[basic.scope.scope]/4](https://eel.is/c++draft/basic.scope#scope-4).
> Among other things, it should be clarified that "declared in" refers
to the namespace of which the name is a member, not the lexical scope in
which the declaration appears (which affects friend declarations,
block-scope extern declarations, and elaborated-type-specifiers).
This is addressed by "have the same target scope" part of
[[basic.link]/8](https://eel.is/c++draft/basic.link#8).
The tests basically test
[[basic.link]/11](https://eel.is/c++draft/basic.link#11) from the
following standpoint:
> The intent is that this rule prevents declaring a name with extenal
linkage to be, for instance, a type in one translation unit and a
namespace in a different translation unit.
See the comment in the beginning of the test for details on testing
approach. Reviewers are advised to check compiler output for any
surprises, but if they are in a hurry, they can search for `FIXME`,
`OK`, and `#cwg1884` to see the most of irregularities in Clang behavior
across the test (not all of them are incorrect behavior, though).
Commit: 40363d506db8ab3382339dc4463372dcfcf931b7
https://github.com/llvm/llvm-project/commit/40363d506db8ab3382339dc4463372dcfcf931b7
Author: Luke Lau <luke at igalia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/fround.ll
Log Message:
-----------
[RISCV] Add cost model tests for fp rounding ops for bf16. NFC
Commit: c9f01f699cc55929b18befc0fa34d70630fc9074
https://github.com/llvm/llvm-project/commit/c9f01f699cc55929b18befc0fa34d70630fc9074
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
Log Message:
-----------
[SLP][AArch64][NFC] Add more tests for SLP vectorization of div (#113876)
Currently, we dont have much tests that show SLP outcome for integer
divisions. This patch adds tests for same.
In certain scenarios, for Neon, vectorization is profitable. An attempt
would be made in future to improve the cost-model for the same.
Commit: 3ac75ee8ecbe3bb1d1907adf48731bb6dc2c9918
https://github.com/llvm/llvm-project/commit/3ac75ee8ecbe3bb1d1907adf48731bb6dc2c9918
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/test/hwasan/lit.cfg.py
M compiler-rt/test/lit.common.configured.in
M runtimes/CMakeLists.txt
Log Message:
-----------
Revert "[runtimes] Allow building against an installed LLVM tree" (#113920)
Reverts llvm/llvm-project#86209
This patch breaks running tests locally, which is extremely disruptive
to libc++ development.
Commit: 7d1e98c7d34e2f4be1812a2f00f1d0464f29e542
https://github.com/llvm/llvm-project/commit/7d1e98c7d34e2f4be1812a2f00f1d0464f29e542
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/test/DebugInfo/Generic/debug-names-accel-table-types.ll
Log Message:
-----------
[AIX][SystemZ][z/OS] Disable test for AIX, z/OS due to missing DWARF sections (#113910)
This patch disables the testcase for AIX and z/OS due to incomplete
DWARF support.
Commit: 53f7f8eccabd6e3383edfeec312bf8671a89bc66
https://github.com/llvm/llvm-project/commit/53f7f8eccabd6e3383edfeec312bf8671a89bc66
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
A clang/test/CodeGen/aarch64-pure-scalable-args-empty-union.c
A clang/test/CodeGen/aarch64-pure-scalable-args.c
Log Message:
-----------
[Clang][AArch64] Fix Pure Scalables Types argument passing and return (#112747)
Pure Scalable Types are defined in AAPCS64 here:
https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#pure-scalable-types-psts
And should be passed according to Rule C.7 here:
https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#682parameter-passing-rules
This part of the ABI is completely unimplemented in Clang, instead it
treats PSTs sometimes as HFAs/HVAs, sometime as general composite types.
This patch implements the rules for passing PSTs by employing the
`CoerceAndExpand` method and extending it to:
* allow array types in the `coerceToType`; Now only `[N x i8]` are
considered padding.
* allow mismatch between the elements of the `coerceToType` and the
elements of the `unpaddedCoerceToType`; AArch64 uses this to map
fixed-length vector types to SVE vector types.
Corectly passing a PST argument needs a decision in Clang about whether
to pass it in memory or registers or, equivalently, whether to use the
`Indirect` or `Expand/CoerceAndExpand` method. It was considered
relatively harder (or not practically possible) to make that decision in
the AArch64 backend.
Hence this patch implements the register counting from AAPCS64 (cf.
`NSRN`, `NPRN`) to guide the Clang's decision.
Commit: b27acebe63b128feb3bb9c3c62d77f235d2e6a6e
https://github.com/llvm/llvm-project/commit/b27acebe63b128feb3bb9c3c62d77f235d2e6a6e
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
A llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
A llvm/test/MC/AMDGPU/gfx12_asm_vop3c-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][test] update VOPC/VOPCX test for true16/fake16 (#112829)
This is a non-functional change
update GFX11/GFX12 VOPC/VOPCX asm/dasm test for true16/fake16:
1. duplicate files to be true16/fake16 by adding
"-mattr=+real-true16/-mattr=-real-true16" while true16 test file will be
updated to true16 format when the true16 instructions are supported
2. sort "*t16_err.s" and "*t16_promote.s" tests to alphabetic order.
tests to alphabetic order. This is for the upcoming true16 mc changes,
and mainly trying to help repo maintainer to resolve conflicts in the
tests quickly. A script is proposed to help for the sorting
https://github.com/llvm/llvm-project/pull/111769. Since these two files
are t16 only, it should not create conflicts in downstream branches
3. add `-filetype=null` to seperate stdout and stderr to avoid
disordered output from llvm-mc
Commit: 670512b5c32217e37796fd8d42101ac24cdb4a8d
https://github.com/llvm/llvm-project/commit/670512b5c32217e37796fd8d42101ac24cdb4a8d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/srem-lkk.ll
Log Message:
-----------
[AArch64] Regenerate srem-lkk.ll to add missing asm comments
Reduces diff in #112588
Commit: 5ac3f3c45cd4d2934d36565eae7e33a629ff7b22
https://github.com/llvm/llvm-project/commit/5ac3f3c45cd4d2934d36565eae7e33a629ff7b22
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
Log Message:
-----------
[RISCV] Add DestEEW = EEW1 to VMADC. (#113013)
It was present on VMSBC but not VMADC. Reorder the instructions to avoid
duplicate 'let' statements.
Commit: eb53d08bce52d4503cf38e26bedfcbd0fed9cd3a
https://github.com/llvm/llvm-project/commit/eb53d08bce52d4503cf38e26bedfcbd0fed9cd3a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/X86PfmCounters.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
Log Message:
-----------
[llvm-exegesis] Add Pfm Counters for SapphireRapids (#113847)
This patch adds the appropriate hookups in X86PfmCounters.td for
SapphireRapids. This is mostly to fix errors when some of my jobs that
only really need dummy counters get scheduled on sapphire rapids
machines, but figured I might as well do it properly while here. I do
not have hardware access to test this currently, but this matches
exactly with what is in the libpfm source code.
Commit: 80f38fbdcfa96316908bb4ac3481d9eac6abf60e
https://github.com/llvm/llvm-project/commit/80f38fbdcfa96316908bb4ac3481d9eac6abf60e
Author: Boaz Brickner <brickner at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/ADT/StringMapEntry.h
Log Message:
-----------
[clang] [NFC] Deduplicate the logic between StringMapEntry.first() and StringMapEntry.getKey() (#113735)
Commit: 7a710110fcb2ad5d903ec41ba6a63193cf03edc0
https://github.com/llvm/llvm-project/commit/7a710110fcb2ad5d903ec41ba6a63193cf03edc0
Author: Petr Kurapov <petr.a.kurapov at intel.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
Log Message:
-----------
[MLIR][Vector] Remove unused and unimplemented Vector_WarpExecuteOnLa… (#112338)
…ne0Op builder
Removing the declaration instead of implementing the builder as
discussed in #110106
Commit: 106259510f6a7a3824dd34f78a77ead150dd2154
https://github.com/llvm/llvm-project/commit/106259510f6a7a3824dd34f78a77ead150dd2154
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/MC/AArch64/FP8/fmmla-diagnostics.s
A llvm/test/MC/AArch64/FP8/fmmla.s
A llvm/test/MC/AArch64/armv9.6a-cvtf.s
A llvm/test/MC/AArch64/armv9.6a-fcvt.s
M llvm/test/MC/AArch64/directive-arch-negative.s
M llvm/test/MC/AArch64/directive-arch.s
M llvm/test/MC/AArch64/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/directive-arch_extension.s
M llvm/test/MC/AArch64/directive-cpu.s
M llvm/test/MC/AArch64/neon-diagnostics.s
Log Message:
-----------
[AArch64]Add convert and multiply-add SIMD&FP assembly/disassembly in… (#113296)
…structions
This patch adds the following instructions:
Conversion between floating-point and integer:
FCVT{AS, AU, MS, MU, NS, NU, PS, PU, ZS, ZU}
{S,U}CVTF
Advanced SIMD three-register extension:
FMMLA
According to https://developer.arm.com/documentation/ddi0602
Co-authored-by: Marian Lukac marian.lukac at arm.com
Co-authored-by: Spencer Abson spencer.abson at arm.com
Commit: ab5d3c9d359d84e454d54e8d91b5c834c42c5a47
https://github.com/llvm/llvm-project/commit/ab5d3c9d359d84e454d54e8d91b5c834c42c5a47
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
Log Message:
-----------
[RISCV] Assign different scheduling classes for VMADC/VMSBC (#113009)
Split the scheduling classes of VMADC/VMSBC away from that of VADC/VSBC.
Because the former are technically mask-producing instructions rather
than normal vector arithmetics, which might have different performance
characteristics on some processors.
This is effectively NFC.
Commit: 92412c106f5275b4b385f7c2d882008181de2854
https://github.com/llvm/llvm-project/commit/92412c106f5275b4b385f7c2d882008181de2854
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
A llvm/test/tools/llvm-objdump/MachO/AArch64/aliases.s
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
Log Message:
-----------
[llvm-objdump] Handle -M for --macho
--macho -d uses the `parseInputMachO` code path, which does not handle
-M. Add -M handling for --macho as well.
Close #61019
Pull Request: https://github.com/llvm/llvm-project/pull/113795
Commit: 6ab26eab4f1e06f2da7b3183c55666ad57f8866e
https://github.com/llvm/llvm-project/commit/6ab26eab4f1e06f2da7b3183c55666ad57f8866e
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandMemCmp.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineSizeOpts.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/X86/X86FixupBWInsts.cpp
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86PadShortFunction.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/SizeOpts.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
Log Message:
-----------
Check hasOptSize() in shouldOptimizeForSize() (#112626)
Commit: 6827a00d4dfe1fa7d479337b6192602744055686
https://github.com/llvm/llvm-project/commit/6827a00d4dfe1fa7d479337b6192602744055686
Author: SharonXSharon <xiaoranxu.nju at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M lld/MachO/BPSectionOrderer.cpp
Log Message:
-----------
[lld][InstrProf] Do not use cstring offset hashes in function order for compression (#113606)
Commit: af7c58b7ea853ef34462ce97739203e2da3c5894
https://github.com/llvm/llvm-project/commit/af7c58b7ea853ef34462ce97739203e2da3c5894
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangStandard.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/Types.def
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/LangStandards.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/ABIInfoImpl.h
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/ARM.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
R clang/test/CodeGen/debug-info-renderscript-tag.rs
M clang/test/CodeGen/fp16-ops.c
R clang/test/CodeGen/renderscript.c
R clang/test/Driver/renderscript.rs
M clang/test/Driver/unknown-std.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Preprocessor/predefined-macros-no-warnings.c
R clang/test/Sema/renderscript.rs
M clang/www/index.html
Log Message:
-----------
Remove support for RenderScript (#112916)
See
https://discourse.llvm.org/t/rfc-deprecate-and-eventually-remove-renderscript-support/81284
for the RFC
Commit: f14743794587db102c6d1b20f9c87a1ac20decfd
https://github.com/llvm/llvm-project/commit/f14743794587db102c6d1b20f9c87a1ac20decfd
Author: jimingham <jingham at apple.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/BreakpointSite.h
M lldb/include/lldb/Core/Declaration.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/ThreadPlanStepInRange.h
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointResolver.cpp
M lldb/source/Breakpoint/BreakpointSite.cpp
M lldb/source/Core/Declaration.cpp
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/CompileUnit.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/test/API/functionalities/inline-stepping/TestInlineStepping.py
M lldb/test/API/functionalities/inline-stepping/calling.cpp
Log Message:
-----------
Add the ability to break on call-site locations, improve inline stepping (#112939)
Previously lldb didn't support setting breakpoints on call site
locations. This patch adds that ability.
It would be very slow if we did this by searching all the debug
information for every inlined subroutine record looking for a call-site
match, so I added one restriction to the call-site support. This change
will find all call sites for functions that also supply at least one
line to the regular line table. That way we can use the fact that the
line table search will move the location to that subsequent line (but
only within the same function). When we find an actually moved source
line match, we can search in the function that contained that line table
entry for the call-site, and set the breakpoint location back to that.
When I started writing tests for this new ability, it quickly became
obvious that our support for virtual inline stepping was pretty buggy.
We didn't print the right file & line number for the breakpoint, and we
didn't set the position in the "virtual inlined stack" correctly when we
hit the breakpoint. We also didn't step through the inlined frames
correctly. There was code to try to detect the right inlined stack
position, but it had been refactored a while back with the comment that
it was super confusing and the refactor was supposed to make it clearer,
but the refactor didn't work either.
That code was made much clearer by abstracting the job of "handling the
stack readjustment" to the various StopInfo's. Previously, there was a
big (and buggy) switch over stop info's. Moving the responsibility to
the stop info made this code much easier to reason about.
We also had no tests for virtual inlined stepping (our inlined stepping
test was actually written specifically to avoid the formation of a
virtual inlined stack... So I also added tests for that along with the
tests for setting the call-site breakpoints.
Commit: e517cfc531886bf6ed64b4e7109bb3141ac7f430
https://github.com/llvm/llvm-project/commit/e517cfc531886bf6ed64b4e7109bb3141ac7f430
Author: Lei Wang <wlei at fb.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/CodeGen/pgo-cold-function-coverage.c
A clang/test/Driver/fprofile-generate-cold-function-coverage.c
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
A llvm/test/Transforms/PGOProfile/instr-gen-cold-function.ll
Log Message:
-----------
[InstrPGO] Support cold function coverage instrumentation (#109837)
This patch adds support for cold function coverage instrumentation based
on sampling PGO counts. The major motivation is to detect dead functions
for the services that are optimized with sampling PGO. If a function is
covered by sampling profile count (e.g., those with an entry count > 0),
we choose to skip instrumenting those functions, which significantly
reduces the instrumentation overhead.
More details about the implementation and flags:
- Added a flag `--pgo-instrument-cold-function-only` in
`PGOInstrumentation.cpp` as the main switch to control skipping the
instrumentation.
- Built the extra instrumentation passes(a bundle of passes in
`addPGOInstrPasses`) under sampling PGO pipeline. This is controlled by
`--instrument-cold-function-only-path` flag.
- Added a driver flag `-fprofile-generate-cold-function-coverage`:
- 1) Config the flags in one place, i,e. adding
`--instrument-cold-function-only-path=<...>` and
`--pgo-function-entry-coverage`. Note that the instrumentation file path
is passed through `--instrument-sample-cold-function-path`, because we
cannot use the `PGOOptions.ProfileFile` as it's already used by
`-fprofile-sample-use=<...>`.
- 2) makes linker to link `compiler_rt.profile` lib(see
[ToolChain.cpp#L1125-L1131](https://github.com/llvm/llvm-project/blob/main/clang/lib/Driver/ToolChain.cpp#L1125-L1131)
).
- Added a flag(`--pgo-cold-instrument-entry-threshold`) to config entry
count to determine cold function.
Overall, the full command is like:
```
clang++ -O2 -fprofile-generate-cold-function-coverage=<...> -fprofile-sample-use=<...> code.cc -o code
```
Commit: 98e3075df992636fa42aafde96748d1d5c834688
https://github.com/llvm/llvm-project/commit/98e3075df992636fa42aafde96748d1d5c834688
Author: Steven Perron <stevenperron at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
A clang/test/CodeGenHLSL/convergence/entry.point.hlsl
Log Message:
-----------
[HLSL][SPIRV] Add convergence tokens to entry point wrapper (#112757)
Inlining currently assumes that either all function use controled
convergence or none of them do. This is why we need to have the entry
point wrapper use controled convergence.
https://github.com/llvm/llvm-project/blob/c85611e8583e6392d56075ebdfa60893b6284813/llvm/lib/Transforms/Utils/InlineFunction.cpp#L2431-L2439
Commit: 97fb21ac1d6bc528b61a555356457ff2129dfde1
https://github.com/llvm/llvm-project/commit/97fb21ac1d6bc528b61a555356457ff2129dfde1
Author: Chris Apple <cja-private at pm.me>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
[rtsan] Intercept aligned_alloc on all versions of OSX if available on build machine (#112780)
Commit: 31a6dbe941b25aadd6cbf3829d1a96973968bf11
https://github.com/llvm/llvm-project/commit/31a6dbe941b25aadd6cbf3829d1a96973968bf11
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M lld/COFF/Chunks.cpp
A lld/test/COFF/autoimport-arm64ec-data.test
Log Message:
-----------
[LLD][COFF] Add Support for ARM64EC pseudo relocations (#113832)
Commit: 4cf128512be5d7e41d8b8b5a12eec47a64af36ea
https://github.com/llvm/llvm-project/commit/4cf128512be5d7e41d8b8b5a12eec47a64af36ea
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[NFC][AMDGPU] Use C++17 structured bindings as much as possible (#113939)
This only changes `llvm/lib/Target/AMDGPU/SIISelLowering.cpp`.
There are five uses of `std::tie` remaining because they can't be
replaced with
C++17 structured bindings.
Commit: f23bdbbaff5b89b1c102a155d062fc32f99d4a92
https://github.com/llvm/llvm-project/commit/f23bdbbaff5b89b1c102a155d062fc32f99d4a92
Author: tf2spi <misomosispi at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm-c/DebugInfo.h
M llvm/lib/IR/DebugInfo.cpp
M llvm/test/Bindings/llvm-c/debug_info_new_format.ll
M llvm/tools/llvm-c-test/debuginfo.c
Log Message:
-----------
Add DILabel functions for LLVM-C (#112840)
Addresses #112799
Commit: 19c0a74ad6baa9eb38dbe0a20af7c67999c41821
https://github.com/llvm/llvm-project/commit/19c0a74ad6baa9eb38dbe0a20af7c67999c41821
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M lldb/tools/lldb-dap/JSONUtils.cpp
Log Message:
-----------
[lldb] Fix lldb windows build breakage from https://github.com/llvm/llvm-project/pull/113839.
Commit: da1a16ae10177494c7cae929bec987e90a160403
https://github.com/llvm/llvm-project/commit/da1a16ae10177494c7cae929bec987e90a160403
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/ClangScanDeps/link-libraries.c
Log Message:
-----------
[clang][modules] Preserve the module map that allowed inferring (#113389)
With inferred modules, the dependency scanner takes care to replace the
fake "__inferred_module.map" path with the file that allowed the module
to be inferred. However, this only worked when such a module was
imported directly in the TU. Whenever such module got loaded
transitively, the scanner would fail to perform the replacement. This is
caused by the fact that PCM files are lossy and drop this information.
This patch makes sure that PCMs include this file for each submodule (in
the `SUBMODULE_DEFINITION` record), fixes one existing test with an
incorrect assertion, and does a little drive-by refactoring of
`ModuleMap`.
Commit: cafd3e10c39a2bfc81eac33ee56a706476e676a9
https://github.com/llvm/llvm-project/commit/cafd3e10c39a2bfc81eac33ee56a706476e676a9
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M bolt/test/X86/pre-aggregated-perf.test
Log Message:
-----------
[BOLT][test] Fix NFC check with pre-aggregated-perf.test (#113944)
NFC checks have been failing starting with
https://lab.llvm.org/buildbot/#/builders/92/builds/8567.
NFC testing wrapper (llvm-bolt-wrapper) replaces the call of `perf2bolt`
with `llvm-bolt --aggregate-only --ignore-build-id`.
`show-density` is automatically enabled for perf2bolt only but not for
`llvm-bolt --aggregate-only`. Add the flag to the test to work around
the issue.
Test Plan:
```
cd build
../llvm-project/bolt/utils/nfc-check-setup.py --switch-back --verbose
bin/llvm-lit -a tools/bolt/test/X86/pre-aggregated-perf.test
```
Commit: e0a02fdb459f3126fbc40cf376f4a3871652ae49
https://github.com/llvm/llvm-project/commit/e0a02fdb459f3126fbc40cf376f4a3871652ae49
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/utils/TableGen/ClangAttrEmitter.cpp
Log Message:
-----------
[NFC][Clang][TableGen] Use StringRef in FlattenedSpelling (#113809)
- Change FlattenedSpelling to use StringRef instead of std::String.
- Use range for loops and enumerate().
- Use ArrayRef<> instead of std::vector reference as function arguments.
- Use {} for all if/else branch bodies if one of them uses it.
Commit: 6c6351ee350589c8e6bcd69c3255374a714d87d0
https://github.com/llvm/llvm-project/commit/6c6351ee350589c8e6bcd69c3255374a714d87d0
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Basic/Module.h
M clang/include/clang/Lex/ModuleMap.h
M clang/lib/Basic/Module.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
[clang][modules] Optimize construction and usage of the submodule index (#113391)
This patch avoids eagerly populating the submodule index on `Module`
construction. The `StringMap` allocation shows up in my profiles of
`clang-scan-deps`, while the index is not necessary most of the time. We
still construct it on-demand.
Moreover, this patch avoids performing qualified submodule lookup in
`ASTReader` whenever we're serializing a module graph whose top-level
module is unknown. This is pointless, since that's guaranteed to never
find any existing submodules anyway.
This speeds up `clang-scan-deps` by ~0.5% on my workload.
Commit: 5a5b78a84e7214796410265139ecf0266b1fd216
https://github.com/llvm/llvm-project/commit/5a5b78a84e7214796410265139ecf0266b1fd216
Author: David Green <david.green at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
Log Message:
-----------
[AArch64][GlobalISel] Lower aarch64.neon.smull/umull intrinsics.
As with other nodes, we can convert these into G_UMULL and G_SMULL aarch64
instructions.
Commit: b54bc104ea87e301816b450ee117d2d864c7d82d
https://github.com/llvm/llvm-project/commit/b54bc104ea87e301816b450ee117d2d864c7d82d
Author: jimingham <jingham at apple.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/BreakpointSite.h
M lldb/include/lldb/Core/Declaration.h
M lldb/include/lldb/Target/StopInfo.h
M lldb/include/lldb/Target/ThreadPlanStepInRange.h
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Breakpoint/BreakpointResolver.cpp
M lldb/source/Breakpoint/BreakpointSite.cpp
M lldb/source/Core/Declaration.cpp
M lldb/source/Symbol/Block.cpp
M lldb/source/Symbol/CompileUnit.cpp
M lldb/source/Target/StackFrameList.cpp
M lldb/source/Target/StopInfo.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Target/ThreadPlanStepInRange.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/test/API/functionalities/inline-stepping/TestInlineStepping.py
M lldb/test/API/functionalities/inline-stepping/calling.cpp
Log Message:
-----------
Revert "Add the ability to break on call-site locations, improve inli… (#113947)
…ne stepping (#112939)"
This was breaking some gdb-remote packet counting tests on the bots. I
can't see how this patch could cause that breakage, but I'm reverting to
figure that out.
This reverts commit f14743794587db102c6d1b20f9c87a1ac20decfd.
Commit: 8274be509ed9e07188a8a64d95907a46cbe8e657
https://github.com/llvm/llvm-project/commit/8274be509ed9e07188a8a64d95907a46cbe8e657
Author: David Green <david.green at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
Log Message:
-----------
[AArch64] Remove header dependencies of AArch64ISelLowering.h. NFC
This patch aims to reduce the include used by AArch64ISelLowering, allowing it
to be included by unittests so that they can reference the AArch64ISD nodes.
It:
- Moves the inclusion of AArch64SMEAttributes.h to the uses.
- Moves LowerPtrAuthGlobalAddressStatically to a static function, so that
AArch64PACKey is not required in the header.
- Moves the definitions of getExceptionPointerRegister to the cpp file, to
remove the reference of AArch64::X0.
Commit: 66bbbf2e951a486f972a5a54378e6791193ade60
https://github.com/llvm/llvm-project/commit/66bbbf2e951a486f972a5a54378e6791193ade60
Author: Jan Voung <jvoung at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang][dataflow] Cache accessors returning pointers in bugprone-unchecked-optional-access (#113922)
Previously, we covered returning refs, or copies of optional, and bools.
Now cover returning pointers (to any type).
This is useful for cases like operator-> of smart pointers.
Addresses more of issue llvm#58510
Commit: 0d0abb351b5fcf49ccc46eba8b7f2a1f353a05a6
https://github.com/llvm/llvm-project/commit/0d0abb351b5fcf49ccc46eba8b7f2a1f353a05a6
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
Log Message:
-----------
[VPlan] Use ResumePhi to create reduction resume phis. (#110004)
Use VPInstruction::ResumePhi to create phi nodes for reduction resume
values in the scalar preheader, similar to how ResumePhis are used for
first-order recurrence resume values after 9a5a8731e77.
This allows simplifying createAndCollectMergePhiForReduction to only
collect reduction resume phis when vectorizing epilogue loops and adding
extra incoming edges from the main vector loop. Updating phis for the
epilogue vector loops requires special attention, because additional
incoming values from the bypass blocks need to be added.
PR: https://github.com/llvm/llvm-project/pull/110004
Commit: ad5b9441f949716570e89fcb27b76e9bfb4b7f70
https://github.com/llvm/llvm-project/commit/ad5b9441f949716570e89fcb27b76e9bfb4b7f70
Author: Chris Apple <cja-private at pm.me>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/docs/AddressSanitizer.rst
M clang/docs/RealtimeSanitizer.rst
Log Message:
-----------
[rtsan][asan] NFC Fix hyperlink to CMake doc (#113931)
Commit: 19131c7f36e047898ea954ee5a187ac62f2ab09b
https://github.com/llvm/llvm-project/commit/19131c7f36e047898ea954ee5a187ac62f2ab09b
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Lex/ModuleMap.h
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
[clang][modules][lldb] Fix build after #113391
Instead of changing the return type of `ModuleMap::findOrCreateModule`, this patch adds a counterpart that only returns `Module *` and thus has the same signature as `createModule()`, which is important in `ASTReader`.
Commit: 67bcce21415c7f687c28eb727c40b27924335f5a
https://github.com/llvm/llvm-project/commit/67bcce21415c7f687c28eb727c40b27924335f5a
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
A llvm/test/Transforms/LowerTypeTests/cfi-icall-alias.ll
Log Message:
-----------
[CFI][LowerTypeTests] Fix indirect call with alias (#106185)
Motivation example:
```
> cat test.cpp
extern "C" [[gnu::weak]] void f() {}
void alias() __attribute__((alias("f")));
int main() { auto p = alias; p(); }
> clang test.cpp -fsanitize=cfi-icall -flto=thin -fuse-ld=lld
> ./a.out
[1] 1868 illegal hardware instruction ./a.out
```
If the address of a function was only taken through its alias, the
function was not considered exported and therefore was not included
in the CFI jumptable. This resulted in `@llvm.type.test()` being lowered
to `false`, and consequently the indirect call to the function was
eventually optimized to `ubsantrap()`.
Commit: 7bd8a165f95123e390f9cbb0a6a5e60d835a4461
https://github.com/llvm/llvm-project/commit/7bd8a165f95123e390f9cbb0a6a5e60d835a4461
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/lib/Basic/Targets/X86.cpp
M clang/test/Sema/asm.c
Log Message:
-----------
[X86] Don't allow '+f' as an inline asm constraint. (#113871)
f cannot be used as an output constraint. We already errored for '=f'
but not '+f'.
Fixes #113692.
Commit: 481bce018ea8872277f79102842eaf8a55f634a2
https://github.com/llvm/llvm-project/commit/481bce018ea8872277f79102842eaf8a55f634a2
Author: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
M clang/test/SemaHLSL/BuiltIns/asuint-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/splitdouble-errors.hlsl
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
R llvm/test/CodeGen/DirectX/split-double.ll
A llvm/test/CodeGen/DirectX/splitdouble.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/splitdouble.ll
Log Message:
-----------
Adding splitdouble HLSL function (#109331)
- Adding hlsl `splitdouble` intrinsics
- Adding DXIL lowering
- Adding SPIRV lowering
- Adding test
Fixes: #108901
---------
Co-authored-by: Joao Saffran <jderezende at microsoft.com>
Commit: abc49cc19463970d5523d7d3332e4c1f83bc2ef7
https://github.com/llvm/llvm-project/commit/abc49cc19463970d5523d7d3332e4c1f83bc2ef7
Author: Job Henandez Lara <jobhdezlara93 at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M libc/hdr/CMakeLists.txt
M libc/hdr/fcntl_macros.h
A libc/hdr/fcntl_overlay.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/mode_t.h
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/fcntl/creat.h
M libc/src/fcntl/linux/CMakeLists.txt
M libc/src/fcntl/linux/creat.cpp
M libc/src/fcntl/linux/open.cpp
M libc/src/fcntl/linux/openat.cpp
M libc/src/fcntl/open.h
M libc/src/fcntl/openat.h
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/chmod.cpp
M libc/src/sys/stat/linux/fchmod.cpp
M libc/src/sys/stat/linux/fstat.cpp
M libc/src/sys/stat/linux/lstat.cpp
M libc/src/sys/stat/linux/mkdir.cpp
M libc/src/sys/stat/linux/stat.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/access.cpp
M libc/src/unistd/linux/dup2.cpp
M libc/src/unistd/linux/link.cpp
M libc/src/unistd/linux/linkat.cpp
M libc/src/unistd/linux/readlink.cpp
M libc/src/unistd/linux/readlinkat.cpp
M libc/src/unistd/linux/rmdir.cpp
M libc/src/unistd/linux/symlink.cpp
M libc/src/unistd/linux/symlinkat.cpp
M libc/src/unistd/linux/unlink.cpp
M libc/src/unistd/linux/unlinkat.cpp
M libc/test/src/fcntl/CMakeLists.txt
M libc/test/src/fcntl/openat_test.cpp
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/sendfile/sendfile_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/chmod_test.cpp
M libc/test/src/sys/stat/fchmod_test.cpp
M libc/test/src/sys/stat/fchmodat_test.cpp
M libc/test/src/sys/stat/fstat_test.cpp
M libc/test/src/sys/stat/lstat_test.cpp
M libc/test/src/sys/stat/mkdirat_test.cpp
M libc/test/src/sys/stat/stat_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/chdir_test.cpp
M libc/test/src/unistd/fchdir_test.cpp
M libc/test/src/unistd/readlinkat_test.cpp
M libc/test/src/unistd/rmdir_test.cpp
M libc/test/src/unistd/syscall_test.cpp
Log Message:
-----------
[libc] remove #include <fcntl.h> and add proxy or type (#113836)
Commit: 9d9b1ba951cb2c30a192aa1157ef1c022d6d145b
https://github.com/llvm/llvm-project/commit/9d9b1ba951cb2c30a192aa1157ef1c022d6d145b
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
Log Message:
-----------
[ORC] Fix JITLinkRedirectableSymbolManager construction to avoid crash (#113492)
Check `AnonymousPtrCreator` and `PtrJumpStubCreator` before creating the
JITLinkRedirectableSymbolManager object. This simplifies construction, and
avoids premature registration as a resource manager in the failure case.
Commit: 70d61f6de71bfe5ee870efc9b3e98db37273f17d
https://github.com/llvm/llvm-project/commit/70d61f6de71bfe5ee870efc9b3e98db37273f17d
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/registration.h
M flang/runtime/CUDA/registration.cpp
Log Message:
-----------
[flang][cuda] Adding runtime call to CUFRegisterVariable (#113952)
Commit: 71315698c91d0cda054b903da0594ca6f072c350
https://github.com/llvm/llvm-project/commit/71315698c91d0cda054b903da0594ca6f072c350
Author: serge-sans-paille <sguelton at mozilla.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/constexpr-string.cpp
A clang/test/SemaCXX/warn-memaccess.cpp
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/test/std/utilities/expected/types.h
M libcxx/test/support/min_allocator.h
Log Message:
-----------
[clang] Warn about memset/memcpy to NonTriviallyCopyable types (#111434)
This implements a warning that's similar to what GCC does in that
context: both memcpy and memset require their first and second operand
to be trivially copyable, let's warn if that's not the case.
Commit: 03dcefe08ecb68a3fedb7e9de6277df77371e9fc
https://github.com/llvm/llvm-project/commit/03dcefe08ecb68a3fedb7e9de6277df77371e9fc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M libc/src/math/cbrt.h
M libc/src/stdio/gpu/fprintf.cpp
M libc/src/stdio/gpu/printf.cpp
M libc/src/stdio/gpu/vfprintf.cpp
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdio/gpu/vprintf.cpp
M libc/src/stdio/vsscanf.h
Log Message:
-----------
[libc] Fix leftover `LIBC_NAMESPACE` after porting it (#113960)
Summary:
There are a few of these leftover, they should all use the
`LIBC_NAMESPACE_DECL` version because that implies visibility.
Commit: 39303e24b6f628f3c080f1b54bd12383a55b9b3a
https://github.com/llvm/llvm-project/commit/39303e24b6f628f3c080f1b54bd12383a55b9b3a
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/test/ClangScanDeps/print-timing.c
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
Log Message:
-----------
[clang][deps] Improve timing output (#113726)
This patch adds the number of executed instructions into the timing
output, which provides more stable results compared to wall or process
time.
The format itself is also tweaked so that it's more amenable for direct
import into a spreadsheet editor.
Commit: 5ea694816b569e010854a861ad58502c056d5a39
https://github.com/llvm/llvm-project/commit/5ea694816b569e010854a861ad58502c056d5a39
Author: vporpo <vporpodas at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/CMakeLists.txt
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
A llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Check opcodes and types (#113741)
Commit: 09a4bcf1a549eea738bda74b2b7dc0f5c8309310
https://github.com/llvm/llvm-project/commit/09a4bcf1a549eea738bda74b2b7dc0f5c8309310
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/depend04.f90
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
Log Message:
-----------
[flang][OpenMP] Update handling of DEPEND clause (#113620)
Parse the locator list in OmpDependClause as an OmpObjectList (instead
of a list of Designators). When a common block appears in the locator
list, show an informative message.
Implement resolving symbols in DependSinkVec in a dedicated visitor
instead of having a visitor for OmpDependClause.
Resolve unresolved names common blocks in OmpObjectList.
Minor changes to the code organization:
- rename OmpDependenceType to OmpTaskDependenceType (to follow 5.2
terminology),
- rename Depend::WithLocators to Depend::DepType,
- add comments with more detailed spec references to parse-tree.h.
---------
Co-authored-by: Kiran Chandramohan <kiran.chandramohan at arm.com>
Commit: c5edecbb4bfe08997819ff84712e3e22ddd04490
https://github.com/llvm/llvm-project/commit/c5edecbb4bfe08997819ff84712e3e22ddd04490
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/test/CodeGen/X86/scmp.ll
M llvm/test/CodeGen/X86/ucmp.ll
Log Message:
-----------
[X86] Regenerate scmp/ucmp test checks with vpternlog comments
Commit: 7b663bd9179a205d5a65a34e447fbeffcb43c194
https://github.com/llvm/llvm-project/commit/7b663bd9179a205d5a65a34e447fbeffcb43c194
Author: Job Henandez Lara <jobhdezlara93 at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/rename.cpp
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_open.cpp
M libc/src/sys/mman/shm_open.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/chmod.cpp
M libc/src/sys/stat/linux/mkdir.cpp
M libc/test/src/sys/statvfs/linux/fstatvfs_test.cpp
Log Message:
-----------
[libc] Fix the remaining fcntl.h proxy header includes. (#113961)
Commit: 82cb22e735be24acf5aac594e519935fc43f0aec
https://github.com/llvm/llvm-project/commit/82cb22e735be24acf5aac594e519935fc43f0aec
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M mlir/lib/Conversion/MathToLibm/CMakeLists.txt
Log Message:
-----------
[MLIR] Add missing MLIRLLVMDialect dep to MLIRMathToLibm (#113563)
This fixes the following failure when doing a clean build (in particular
no .ninja* lying around) of lib/libMLIRMathToLibm.a only:
```
In file included from llvm/include/llvm/IR/Module.h:22,
from mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h:37,
from mlir/lib/Conversion/MathToLibm/MathToLibm.cpp:13
llvm/include/llvm/IR/Attributes.h:90:14: fatal error: llvm/IR/Attributes.inc: No such file or directory
```
Commit: 7db4cacfd72b64de8460509d07a22b9142df85f6
https://github.com/llvm/llvm-project/commit/7db4cacfd72b64de8460509d07a22b9142df85f6
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M mlir/lib/Conversion/LinalgToStandard/CMakeLists.txt
Log Message:
-----------
[MLIR] Add missing MLIRLLVMDialect dep to MLIRLinalgToStandard (#113561)
This fixes the following failure when doing a clean build (in particular
no .ninja* lying around) of lib/libMLIRLinalgToStandard.a only:
```
In file included from llvm/include/llvm/IR/Module.h:22,
from mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h:37,
from mlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp:13:
llvm/include/llvm/IR/Attributes.h:90:14: fatal error: llvm/IR/Attributes.inc: No such file or directory
```
Commit: 474234a09655e57b7a4270150f0926db77e864b4
https://github.com/llvm/llvm-project/commit/474234a09655e57b7a4270150f0926db77e864b4
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M lldb/tools/debugserver/source/MacOSX/MachVMRegion.cpp
Log Message:
-----------
[debugserver] Mark ASAN memory regions as "heap" (#113968)
This memory type is currently not handled, but it makes sense to mark it
as a heap allocation in requests asking for memory region info.
Commit: 9f69da35e2e5438d0c042f76277fff397f6a1505
https://github.com/llvm/llvm-project/commit/9f69da35e2e5438d0c042f76277fff397f6a1505
Author: Prabhuk <prabhukr at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
Log Message:
-----------
[NFC][compiler-rt] Add missing header include (#113951)
Include `cstdlib` which was originally included transitively but the
changes to `vector` in libcpp breaks new builds due to missing cstdlib
header for `abort()` function call.
Commit: bf4b31ad54f6bf298210c201a0afe50469ebe98e
https://github.com/llvm/llvm-project/commit/bf4b31ad54f6bf298210c201a0afe50469ebe98e
Author: vporpo <vporpodas at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Check Fastmath flags (#113967)
Commit: e873b415a2bfbbc2e5e2e70d77b61b7883cbf949
https://github.com/llvm/llvm-project/commit/e873b415a2bfbbc2e5e2e70d77b61b7883cbf949
Author: Job Henandez Lara <jobhdezlara93 at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M libc/src/fcntl/linux/CMakeLists.txt
M libc/src/fcntl/linux/open.cpp
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
Log Message:
-----------
[libc] add the rest of the hdr/fcntl_macro.h headers (#113972)
Commit: 0eb5c9d2ef8d932eef84d4db8aef3dd512f80277
https://github.com/llvm/llvm-project/commit/0eb5c9d2ef8d932eef84d4db8aef3dd512f80277
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
A flang/test/Fir/CUDA/cuda-device-global.f90
Log Message:
-----------
[flang][cuda] Copying device globals in the gpu module (#113955)
Commit: 36c119490630846c1fa0f427cc60837fd7b40a28
https://github.com/llvm/llvm-project/commit/36c119490630846c1fa0f427cc60837fd7b40a28
Author: Matthias Braun <matze at braunis.de>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/test/CodeGen/X86/avx-cmp-builtins.c
M clang/test/CodeGen/X86/avx-shuffle-builtins.c
M clang/test/CodeGen/X86/sse.c
Log Message:
-----------
Remove optimization flags from clang codegen tests (#113714)
- Remove an -O3 flag from a couple of clang x86 codegen tests so the
tests do not need to be updated when optimizations in LLVM change.
- Change the tests to use utils/update_cc_test_checks.sh
- Change from apple/darwin triples to generic x86_64-- and
i386-- because it was not relevant to the test but
`update_cc_test_checks` seems to be unable to handle platforms that
prepend `_` to function names.
Commit: 5903c6af44256e0bba77b7a69d608aa3ccc6a0dd
https://github.com/llvm/llvm-project/commit/5903c6af44256e0bba77b7a69d608aa3ccc6a0dd
Author: Matthias Braun <matze at braunis.de>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
Log Message:
-----------
InstCombine: Fold shufflevector(select) and shufflevector(phi) (#113746)
- Transform `shufflevector(select(c, x, y), C)` to
`select(c, shufflevector(x, C), shufflevector(y, C))` by re-using
the `FoldOpIntoSelect` helper.
- Transform `shufflevector(phi(x, y), C)` to
`phi(shufflevector(x, C), shufflevector(y, C))` by re-using the
`foldOpInotPhi` helper.
Commit: 034cae42b130760587770b6a001b70c2a01bdfe9
https://github.com/llvm/llvm-project/commit/034cae42b130760587770b6a001b70c2a01bdfe9
Author: Doug Wyatt <doug at sonosphere.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
A clang/docs/FunctionEffectAnalysis.rst
M clang/docs/index.rst
Log Message:
-----------
[clang] Add clang/docs/FunctionEffectAnalysis.rst. (#109855)
Follow-on from #99656, which introduces 2nd pass caller/callee analysis
for function effects.
Wrote a new documentation page, derived directly from the RFC posted to
LLVM Discourse earlier this year.
---------
Co-authored-by: Doug Wyatt <dwyatt at apple.com>
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Commit: 902acde34198bb11cc758dcf3aee00eb1cb09ceb
https://github.com/llvm/llvm-project/commit/902acde34198bb11cc758dcf3aee00eb1cb09ceb
Author: David Majnemer <david.majnemer at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/and-compare.ll
Log Message:
-----------
[InstCombine] Optimize away certain additions using modular arithmetic
We can turn:
```
%add = add i8 %arg, C1
%and = and i8 %add, C2
%cmp = icmp eq i1 %and, C3
```
into:
```
%and = and i8 %arg, C2
%cmp = icmp eq i1 %and, (C3 - C1) & C2
```
This is only worth doing if the sequence is the sole user of the addition
operation.
Commit: 757d0e4764fffcd4e60338147c5f5456e2534395
https://github.com/llvm/llvm-project/commit/757d0e4764fffcd4e60338147c5f5456e2534395
Author: Igor Kudrin <ikudrin at accesssoftek.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
R llvm/test/Transforms/LowerTypeTests/cfi-icall-alias.ll
Log Message:
-----------
Revert "[CFI][LowerTypeTests] Fix indirect call with alias" (#113978)
Reverts llvm/llvm-project#106185
This is breaking Sanitizer bots:
https://lab.llvm.org/buildbot/#/builders/66/builds/5449/steps/8/logs/stdio
Commit: 8e6856e27859c90c5337a8328848b0959fe409fe
https://github.com/llvm/llvm-project/commit/8e6856e27859c90c5337a8328848b0959fe409fe
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
Log Message:
-----------
[Clang][TableGen] Use StringRef::str() instead of std::string() cast (#113645)
Use `StringRef::str()` instead of std::string(StringRef) to cast from
StringRef to std::string.
Commit: 7c554265ce0b94059f216dcab643055e98c8f439
https://github.com/llvm/llvm-project/commit/7c554265ce0b94059f216dcab643055e98c8f439
Author: Chris Apple <cja-private at pm.me>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
Log Message:
-----------
Revert "[rtsan] Intercept aligned_alloc on all versions of OSX if available on build machine (#112780)" (#113982)
This reverts commit 97fb21ac1d6bc528b61a555356457ff2129dfde1.
Due to issue brought up in #112780
> Unfortunately this breaks the build on our (automerger) bots, which
have -mmacosx-version-min=10.13 and also
-Werror=unguarded-availability-new . I was thinking about patching it
via wrapping in __builtin_available check (which I believe is the right
one to use, as it should match the -mmacosx-version-min ) - but can't
actually think of a quick fix, due to interceptors being defined via C
macros.
>
llvm-project/compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp:475:21:
error: 'aligned_alloc' is only available on macOS 10.15 or newer
[-Werror,-Wunguarded-availability-new] 475 | INTERCEPTOR(void *,
aligned_alloc, SIZE_T alignment, SIZE_T size) {
Commit: b46a0482f9e4c0ee82b38da794b20f8f1a76f044
https://github.com/llvm/llvm-project/commit/b46a0482f9e4c0ee82b38da794b20f8f1a76f044
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/Sema/arithmetic-fence-builtin.c
Log Message:
-----------
[clang][bytecode] Implement __builtin_arithmetic_fence (#113937)
Commit: 1549a0c183ee337a6de4c3933e10828808c6a094
https://github.com/llvm/llvm-project/commit/1549a0c183ee337a6de4c3933e10828808c6a094
Author: Matthias Springer <me at m-sp.org>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/docs/Bufferization.md
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.h
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
R mlir/lib/Dialect/SCF/Transforms/Bufferize.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
M mlir/test/Dialect/SCF/bufferize.mlir
Log Message:
-----------
[mlir][SCF] Remove `scf-bufferize` pass (#113840)
The dialect conversion-based bufferization passes have been migrated to
One-Shot Bufferize about two years ago. To clean up the code base, this
commit removes the `scf-bufferize` pass, one of the few remaining parts
of the old infrastructure. Most bufferization passes have already been
removed.
Note for LLVM integration: If you depend on this pass, migrate to
One-Shot Bufferize or copy the pass to your codebase.
Commit: 6233346895abfb57782511cddc263d439fdd537b
https://github.com/llvm/llvm-project/commit/6233346895abfb57782511cddc263d439fdd537b
Author: Chengjun <chengjunp at Nvidia.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
Log Message:
-----------
[GenericCycle] Add a Cache for getExitBlocks in GenericCycle (#112290)
In `UniformityAnalysis`, we need to get the exit blocks of cycles in the
`DivergencePropagator` and currently, we have to do a search for the
exit blocks every time. In this change, we add a cache of the results in
the `GenericCycle` so that it can save the compile time. By testing, for
some large cases, this can save about 60% compile time in the
`UniformityAnalysis`.
Commit: 61353cc1f65f02477eedeebcb08e9193cbd53305
https://github.com/llvm/llvm-project/commit/61353cc1f65f02477eedeebcb08e9193cbd53305
Author: Eisuke Kawashima <e.kawaschima+github at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M compiler-rt/lib/asan/scripts/asan_symbolize.py
M compiler-rt/lib/hwasan/scripts/hwasan_symbolize
Log Message:
-----------
[compiler-rt] Fix invalid escape sequences in python files (#94030)
\d, \( and \) are not valid escape sequences; since python 3.12
they give SyntaxWarning, and will raise SyntaxError in future.
https://docs.python.org/3.12/whatsnew/3.12.html#other-language-changes
r"\(\d\)" and "\\(\\d\\)" are equivalent but the former is the shorter.
Co-authored-by: Eisuke Kawashima <e-kwsm at users.noreply.github.com>
Commit: 1ceccbb0dd9d8539fec2213566fe6cc2a05b7993
https://github.com/llvm/llvm-project/commit/1ceccbb0dd9d8539fec2213566fe6cc2a05b7993
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
A llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir
A llvm/test/CodeGen/AMDGPU/issue98474-need-live-out-undef-subregister-def.ll
A llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
A llvm/test/MachineVerifier/AMDGPU/issue98474-missing-def-liveout-physical-subregister.mir
Log Message:
-----------
VirtRegRewriter: Add implicit register defs for live out undef lanes (#112679)
If an undef subregister def is live into another block, we need to
maintain a physreg def to track the liveness of those lanes. This
would manifest a verifier error after branch folding, when the cloned
tail block use no longer had a def.
We need to detect interference with other assigned intervals to avoid
clobbering the undef lanes defined in other intervals, since the undef
def didn't count as interference. This is pretty ugly and adds a new
dependency on LiveRegMatrix, keeping it live for one more pass. It also
adds a lot of implicit operand spam (we really should have a better
representation for this).
There is a missing verifier check for this situation. Added an xfailed
test that demonstrates this. We may also be able to revert the changes
in 47d3cbcf842a036c20c3f1c74255cdfc213f41c2.
It might be better to insert an IMPLICIT_DEF before the instruction
rather than using the implicit-def operand.
Fixes #98474
Commit: a461869db3bdc372203c9a7b8326d66a626f80d9
https://github.com/llvm/llvm-project/commit/a461869db3bdc372203c9a7b8326d66a626f80d9
Author: vporpo <vporpodas at google.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/SandboxIR/PassManager.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/NullPass.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromMetadata.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/SandboxIR/PassManager.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromMetadata.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/unittests/SandboxIR/PassTest.cpp
Log Message:
-----------
[SandboxIR][Pass] Implement Analyses class (#113962)
The Analyses class provides a way to pass around commonly used Analyses
to SandboxIR passes throught `runOnFunction()` and `runOnRegion()`
functions.
Commit: 6128ff6630762310f6ae4eb61adda02cb4ad5260
https://github.com/llvm/llvm-project/commit/6128ff6630762310f6ae4eb61adda02cb4ad5260
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/MachO.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/MachOObjectFormat.h
M llvm/lib/ExecutionEngine/Orc/Shared/MachOObjectFormat.cpp
M llvm/unittests/ExecutionEngine/JITLink/CMakeLists.txt
R llvm/unittests/ExecutionEngine/JITLink/JITLinkMocks.cpp
R llvm/unittests/ExecutionEngine/JITLink/JITLinkMocks.h
A llvm/unittests/ExecutionEngine/JITLink/JITLinkTestUtils.cpp
A llvm/unittests/ExecutionEngine/JITLink/JITLinkTestUtils.h
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
A llvm/unittests/ExecutionEngine/JITLink/MachOLinkGraphTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/MemoryManagerErrorTests.cpp
Log Message:
-----------
[JITLink][MachO] Add convenience functions for default text/data sections.
The getMachODefaultTextSection and getMachODefaultRWDataSection functions
return the "__TEXT,__text" and "__DATA,__data" sections respectively, creating
empty sections if the default sections are not already present in the graph.
These functions can be used by utilities that want to add code or data to these
standard sections (e.g. these functions can be used to supply the section
argument to the createAnonymousPointerJumpStub and
createPointerJumpStubBlock functions in the various targets).
Commit: 0c1c37bfbed08c9d4e414a10f46cbed9a3e4c870
https://github.com/llvm/llvm-project/commit/0c1c37bfbed08c9d4e414a10f46cbed9a3e4c870
Author: c8ef <c8ef at outlook.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add support for the `tgamma` libcall. (#113791)
This patch adds the `tgamma` libcall.
Commit: 18311093abe6481388a0d963d58438d743b47569
https://github.com/llvm/llvm-project/commit/18311093abe6481388a0d963d58438d743b47569
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
Log Message:
-----------
[InstCombine] Do not fold `shufflevector(select)` if the select condition is a vector (#113993)
Since `shufflevector` is not element-wise, we cannot do fold it into
select when the select condition is a vector.
For shufflevector that doesn't change the length, it doesn't crash, but
it is still a miscompilation: https://alive2.llvm.org/ce/z/s8saCx
Fixes https://github.com/llvm/llvm-project/issues/113986.
Commit: 635c344dfb3227f80c76dfbee9d6bf44ef742675
https://github.com/llvm/llvm-project/commit/635c344dfb3227f80c76dfbee9d6bf44ef742675
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/CodeGen/X86/vector-compress.ll
Log Message:
-----------
[X86] Add vector_compress patterns with a zero vector passthru. (#113970)
We can use the kz form to automatically zero the extra elements.
Fixes #113263.
Commit: 00ca2071e08f3a82171e564618981906a15e8dca
https://github.com/llvm/llvm-project/commit/00ca2071e08f3a82171e564618981906a15e8dca
Author: Jerry Sun <105613447+jerryyiransun at users.noreply.github.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/utils/TableGen/Attributes.cpp
M llvm/utils/TableGen/CTagsEmitter.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M llvm/utils/TableGen/VTEmitter.cpp
Log Message:
-----------
[TableGen] [NFC] Remove unused includes in TableGen BE (#113725)
split PR as requested from
https://github.com/llvm/llvm-project/pull/113318.
Removes unused imports in TableGen BE
Commit: 6588073724d3241d90663e45154d806a28bce95a
https://github.com/llvm/llvm-project/commit/6588073724d3241d90663e45154d806a28bce95a
Author: Matthias Springer <me at m-sp.org>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
Log Message:
-----------
[mlir][func] Fix incorrect API usage in `FuncOpConversion` (#113977)
This commit fixes a case of incorrect dialect conversion API usage
during `FuncOpConversion`. `replaceAllUsesExcept` (same as
`replaceAllUsesWith`) is currently not supported in a dialect
conversion. `replaceUsesOfBlockArgument` should be used instead. It
sometimes works anyway (like in this case), but that's just because of
the way we insert materializations.
This commit is in preparation of merging the 1:1 and 1:N dialect
conversion drivers. (At that point, the current use of
`replaceAllUsesExcept` will no longer work.)
Commit: 828467a54e156cbb04820ae47df32c45fbc75fc0
https://github.com/llvm/llvm-project/commit/828467a54e156cbb04820ae47df32c45fbc75fc0
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M lld/ELF/Symbols.h
M llvm/include/llvm/Support/Endian.h
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
Log Message:
-----------
Fix warnings introduced in #111434 [-Wnontrivial-memaccess]
Commit: d3b98559be72682da45df73522173cb315912f6f
https://github.com/llvm/llvm-project/commit/d3b98559be72682da45df73522173cb315912f6f
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M libcxx/include/__vector/vector.h
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
Log Message:
-----------
Add exception guard for constructor vector(n, x, a) (#113086)
Added exception guard to the `vector(n, x, a)` constructor to enhance
exception safety. This change ensures that the `vector(n, x, a)`
constructor is consistent with other constructors, such as `vector(n)`,
`vector(n, x)`, `vector(n, a)`, in terms of exception safety.
Commit: 3f4468faaa9525ad615118675c3c68938f4a8d5f
https://github.com/llvm/llvm-project/commit/3f4468faaa9525ad615118675c3c68938f4a8d5f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-28 (Mon, 28 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
Log Message:
-----------
[RISCV] Teach expandRV32ZdinxStore to handle memoperand not being present. (#113981)
I received a report that the outliner drops memoperands and causes this
code to crash. Handle this by only copying the memoperand if it exists.
Similar for expandRV32ZdinxLoad
Commit: 48adfaf3b290d97260eabb53254de9ada313cd0e
https://github.com/llvm/llvm-project/commit/48adfaf3b290d97260eabb53254de9ada313cd0e
Author: Sylvestre Ledru <sylvestre at debian.org>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/docs/FunctionEffectAnalysis.rst
Log Message:
-----------
doc: remove trailing whitespaces
Commit: 59085e9c3f522b59e512f1651058a9f98c739088
https://github.com/llvm/llvm-project/commit/59085e9c3f522b59e512f1651058a9f98c739088
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SymbolTable.cpp
Log Message:
-----------
Fix more lld warnings introduced in #111434 [-Wnontrivial-memaccess]
Commit: 66fc81cb430c724dc8b4b8d2d029101cc1d6808a
https://github.com/llvm/llvm-project/commit/66fc81cb430c724dc8b4b8d2d029101cc1d6808a
Author: Takuto Ikuta <tikuta at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
Log Message:
-----------
fix missing include for `abort` in `FuzzedDataProvider.h` (#113872)
This is to fix build with newer libc++ in chromium.
ref: https://crbug.com/375980422
Commit: 335e68d8bce5ad3f5d6471c0ec1423211c71c0f0
https://github.com/llvm/llvm-project/commit/335e68d8bce5ad3f5d6471c0ec1423211c71c0f0
Author: Jesse Huang <jesse.huang at sifive.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/Targets/RISCV.cpp
A clang/test/CodeGen/RISCV/attr-hw-shadow-stack.c
Log Message:
-----------
[Clang][RISCV] Support -fcf-protection=return for RISC-V (#112477)
Enables the support of `-fcf-protection=return` on RISC-V, which
requires Zicfiss. It also adds a string attribute "hw-shadow-stack"
to every function if the option is set on RISC-V
Commit: 7544d3af0e285ecd2fa28698621dd3125f749b2d
https://github.com/llvm/llvm-project/commit/7544d3af0e285ecd2fa28698621dd3125f749b2d
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-profiles.c
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Mark RVB23U64 and RVB23S64 as non-experimental (#113918)
The specification was recently ratified
<https://github.com/riscv/riscv-profiles/blob/main/src/rvb23-profile.adoc>.
Commit: d4197f3ac1bbdd0665599bf3843e865d13af18ab
https://github.com/llvm/llvm-project/commit/d4197f3ac1bbdd0665599bf3843e865d13af18ab
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/SMEInstrFormats.td
A llvm/test/MC/AArch64/SME2/bfmul-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmul.s
A llvm/test/MC/AArch64/SME2p2/fmul-diagnostics.s
A llvm/test/MC/AArch64/SME2p2/fmul.s
Log Message:
-----------
[LLVM][AArch64] Add assembly/disassembly for MUL/BFMUL SME instructions (#113535)
According to https://developer.arm.com/documentation/ddi0602
Co-authored-by: Momchil-Velikov Momchil.Velikov at arm.com
Commit: 8d38fbf2f027c72332c8ba03ff0ff0f83b4dcf02
https://github.com/llvm/llvm-project/commit/8d38fbf2f027c72332c8ba03ff0ff0f83b4dcf02
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/MC/AArch64/SVE2p2/unary_arithmetic_predicated_z-diagnotics.s
A llvm/test/MC/AArch64/SVE2p2/unary_arithmetic_predicated_z.s
Log Message:
-----------
[LLVM][AArch64] Add assembly/disassembly for SVE Integer Unary Arithm… (#113670)
…etic Predicated instructions
This patch adds the following instructions:
SVE bitwise unary operations (predicated)
CLS, CLZ, CNT, CNOT, FABS, FNEG, NOT
SVE integer unary operations (predicated)
SXT{B,H,W}, UXT{B,H,W}, ABS ,NEG
SVE2 integer unary operations (predicated)
URECPE, URSQRTE, SQABS, SQNEG
According to https://developer.arm.com/documentation/ddi0602
Co-authored-by: Spencer Abson Spencer.Abson at arm.com
Commit: 05b6c2e4b933e7a3606899c72067c92b6077287b
https://github.com/llvm/llvm-project/commit/05b6c2e4b933e7a3606899c72067c92b6077287b
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaChecking.cpp
M clang/test/SemaCXX/conditional-expr.cpp
Log Message:
-----------
[Clang] fix range calculation for conditionals with throw expressions (#112081)
Fixes #111854
---
The issue arises when `GetExprRange` encounters a `ConditionalOperator`
with a `CXXThrowExpr`
```md
ConditionalOperator 0x1108658e0 'int'
|-CXXBoolLiteralExpr 0x110865878 '_Bool' true
|-CXXThrowExpr 0x1108658a8 'void'
| `-IntegerLiteral 0x110865888 'int' 0
`-IntegerLiteral 0x1108658c0 'int' 0
```
https://github.com/llvm/llvm-project/blob/ed3d05178274890fb804f43ae1bcdfd33b5fd8f0/clang/lib/Sema/SemaChecking.cpp#L9628-L9631
The current behavior causes the `GetExprRange` to proceed with the throw
expression (`CO->getTrueExpr()`/`void` type)
Commit: dfb60bb9193d78d0980193e1ade715cffbb55af8
https://github.com/llvm/llvm-project/commit/dfb60bb9193d78d0980193e1ade715cffbb55af8
Author: Rohit Aggarwal <44664450+rohitaggarwal007 at users.noreply.github.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/Util/add-TLI-mappings.ll
Log Message:
-----------
Adding more vector calls for -fveclib=AMDLIBM (#109662)
AMD has it's own implementation of vector calls.
New vector calls are introduced in the library for exp10, log10, sincos and finite asin/acos
Please refer [https://github.com/amd/aocl-libm-ose]
---------
Co-authored-by: Rohit Aggarwal <Rohit.Aggarwal at amd.com>
Commit: a393c92f5df141d464bb17cc82f2344866cea1de
https://github.com/llvm/llvm-project/commit/a393c92f5df141d464bb17cc82f2344866cea1de
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps5-linker.c
Log Message:
-----------
[PS5][Driver] Update default linking options when `-r` omitted. (#113595)
Until now, these options have been hardcoded as downstream patches in
lld. Add them to the driver so that the private patches can be removed.
PS5 only. On PS4, the proprietary linker will continue to perform the
equivalent behaviours itself.
SIE tracker: TOOLCHAIN-16704
Commit: a8398bd81770a2801ec083fd2cd8a19140fe92a9
https://github.com/llvm/llvm-project/commit/a8398bd81770a2801ec083fd2cd8a19140fe92a9
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/docs/CommandGuide/lit.rst
Log Message:
-----------
[llvm][docs] Update list of llvm-lit options
Fixes #62899
In this commit I have updated the list of options
to include any missing options and re-rordered
some of them to match the order in lit's --help.
Where there was a larger description in this document
I've used that instead of the --help description.
This *does not* include --use-unique-output-file-name
as this was only added recently and we are still
debating whether it will be kept.
Commit: 7395ef5419a6438f0c48685bf00b7f151178743d
https://github.com/llvm/llvm-project/commit/7395ef5419a6438f0c48685bf00b7f151178743d
Author: wldfngrs <wldfngrs at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/newhdrgen/yaml/math.yaml
M libc/src/math/CMakeLists.txt
A libc/src/math/cospif16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/cospif16.cpp
A libc/src/math/generic/sincosf16_utils.h
M libc/src/math/generic/sinpif16.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/cospif16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/cospif16_test.cpp
M libc/utils/MPFRWrapper/MPFRUtils.cpp
Log Message:
-----------
[libc][math][c23] Add cospif16 function (#113001)
Implementation of `cos` for half precision floating point inputs scaled
by pi (i.e., `cospi`), correctly rounded for all rounding modes.
---------
Co-authored-by: OverMighty <its.overmighty at gmail.com>
Commit: c3260c65e86ac363aa3a39f084db66a8a1d1af7d
https://github.com/llvm/llvm-project/commit/c3260c65e86ac363aa3a39f084db66a8a1d1af7d
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/LangRef.rst
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sincos.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/llvm.frexp.ll
A llvm/test/CodeGen/AArch64/llvm.sincos-fmf.ll
A llvm/test/CodeGen/AArch64/llvm.sincos.ll
A llvm/test/CodeGen/ARM/llvm.sincos.ll
Log Message:
-----------
[IR] Add `llvm.sincos` intrinsic (#109825)
This adds the `llvm.sincos` intrinsic, legalization, and lowering.
The `llvm.sincos` intrinsic takes a floating-point value and returns
both the sine and cosine (as a struct).
```
declare { float, float } @llvm.sincos.f32(float %Val)
declare { double, double } @llvm.sincos.f64(double %Val)
declare { x86_fp80, x86_fp80 } @llvm.sincos.f80(x86_fp80 %Val)
declare { fp128, fp128 } @llvm.sincos.f128(fp128 %Val)
declare { ppc_fp128, ppc_fp128 } @llvm.sincos.ppcf128(ppc_fp128 %Val)
declare { <4 x float>, <4 x float> } @llvm.sincos.v4f32(<4 x float> %Val)
```
The lowering is built on top of the existing FSINCOS ISD node, with
additional type legalization to allow for f16, f128, and vector values.
Commit: 32aa782ea297b3e0ec090cf8fc0055d00c99d24b
https://github.com/llvm/llvm-project/commit/32aa782ea297b3e0ec090cf8fc0055d00c99d24b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/test/CodeGen/PowerPC/copysignl.ll
Log Message:
-----------
[PowerPC] copysignl.ll - regenerate to reduce the diff in #111269
Commit: f537792f3f4977c8bc887b17ffc25e93833e7d0d
https://github.com/llvm/llvm-project/commit/f537792f3f4977c8bc887b17ffc25e93833e7d0d
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
A clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse3-builtins.c
Log Message:
-----------
[X86] Refactor the SSE intrinsics constexpr tests to simplify future expansion (#112578)
I'm hoping to make a large proportion of the SSE/AVX intrinsics usable in constant expressions - eventually anything that doesn't touch memory or system settings - making it much easier to utilize SSE/AVX intrinsics in various math libraries etc.
My initial implementation placed the tests at the end of the test file, similar to how smaller files already handle their tests.
However, what I'm finding is that this approach doesn't scale when trying to track coverage of so many intrinsics - many keep getting missed, and it gets messy; so what I'm proposing is to instead keep each intrinsic's generic IR test and its constexpr tests together to make them easier to track together, wrapping the static_assert inside a macro to disable on C and pre-C++11 tests.
I'm open to alternative suggestions before I invest too much time getting this work done :)
Commit: 98c8d643539194321f3dba8698e95999165b1024
https://github.com/llvm/llvm-project/commit/98c8d643539194321f3dba8698e95999165b1024
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/SMEInstrFormats.td
A llvm/test/MC/AArch64/SME2/bfscale-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfscale.s
Log Message:
-----------
[AArch64] Add assembly/dissasembly for BFSCALE instructions (#113538)
This patch adds assembly/disassembly for following instructions:
BFSCALE (multiple and single vector)
BFSCALE (multiple vectors)
As specified in https://developer.arm.com/documentation/ddi0602/2024-09
Co-authored-by: Momchil Velikov
[momchil.velikov at arm.com](mailto:momchil.velikov at arm.com)
Commit: 06664fdc7680f7f9fa9b0a414a8fb8df2f913d48
https://github.com/llvm/llvm-project/commit/06664fdc7680f7f9fa9b0a414a8fb8df2f913d48
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/test/DebugInfo/Generic/ipsccp-remap-assign-id.ll
M llvm/test/Transforms/FunctionSpecialization/compiler-crash-58759.ll
M llvm/test/Transforms/FunctionSpecialization/function-specialization-constant-expression.ll
M llvm/test/Transforms/FunctionSpecialization/function-specialization2.ll
M llvm/test/Transforms/FunctionSpecialization/function-specialization4.ll
M llvm/test/Transforms/FunctionSpecialization/get-possible-constants.ll
M llvm/test/Transforms/FunctionSpecialization/global-rank.ll
M llvm/test/Transforms/FunctionSpecialization/identical-specializations.ll
M llvm/test/Transforms/FunctionSpecialization/literal-const.ll
M llvm/test/Transforms/FunctionSpecialization/specialize-multiple-arguments.ll
A llvm/test/Transforms/FunctionSpecialization/track-ptr-return.ll
Log Message:
-----------
[FuncSpec] Enable SpecializeLiteralConstant by default (#113442)
Enable specialization on literal constant arguments by default in
Function Specialization.
---------
Co-authored-by: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Commit: 46944d1f950d042695197038ab3f1bf25ace261b
https://github.com/llvm/llvm-project/commit/46944d1f950d042695197038ab3f1bf25ace261b
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
Log Message:
-----------
[flang][OpenMP] Extract OMP version hint into helper functions, NFC (#113621)
Commit: 2443549b853908352a3b7b9bd6c07616492814a1
https://github.com/llvm/llvm-project/commit/2443549b853908352a3b7b9bd6c07616492814a1
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
Log Message:
-----------
[IR] Remove some uses of StructType::setBody. NFC. (#113685)
It is simple to create the struct body up front, now that we have
transitioned to opaque pointers.
Commit: ec427df2b9c04cb3323babcf680dad8dcefaf228
https://github.com/llvm/llvm-project/commit/ec427df2b9c04cb3323babcf680dad8dcefaf228
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/SMEInstrFormats.td
A llvm/test/MC/AArch64/SME2p2/fmop4as-fp16-non-widening-diagnostics.s
A llvm/test/MC/AArch64/SME2p2/fmop4as-fp16-non-widening.s
Log Message:
-----------
[AArch64] Add assembly/disassembly for FMOP4{A,S} (non-widening) half-precision instructions (#113343)
The new instructions are described in
https://developer.arm.com/documentation/ddi0602/2024-09/SME-Instructions
Commit: e19a5fc6d306a81d181a9597a8b25c444c08d722
https://github.com/llvm/llvm-project/commit/e19a5fc6d306a81d181a9597a8b25c444c08d722
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
A llvm/test/Transforms/FunctionSpecialization/maxgrowth.ll
Log Message:
-----------
[FuncSpec] Improve accounting of specialization codesize growth (#113448)
Only accumulate the codesize increase of functions that are actually
specialized, rather than for every candidate specialization that we
analyse.
This fixes a subtle bug where prior analysis of candidate
specializations that were deemed unprofitable could prevent subsequent
profitable candidates from being recognised.
Commit: c0cba25cdd06d700bdc15e9ae48c1fcadd0963bd
https://github.com/llvm/llvm-project/commit/c0cba25cdd06d700bdc15e9ae48c1fcadd0963bd
Author: Matthias Springer <me at m-sp.org>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Hardening `replaceOp` (#109540)
This commit adds extra checks/assertions to the
`ConversionPatternRewriterImpl::notifyOpReplaced` to improve its
robustness.
1. Replacing an `unrealized_conversion_cast` op that was created by the
driver is now forbidden and caught early during `replaceOp`. It may work
in some cases, but it is generally dangerous because the conversion
driver keeps track of these ops and performs some extra legalization
steps during the "finalize" phase. (Erasing is them is fine.)
2. `null` replacement values are no longer registered in the
`ConversionValueMapping`. This was an oversight in #106760. There is no
benefit in having `null` values in the `ConversionValueMapping`. (It may
even cause problems.)
This change is in preparation of merging the 1:1 and 1:N dialect
conversion drivers.
Commit: 8239ea3918828ab9c5ea8be1f4100d464f0bf3c0
https://github.com/llvm/llvm-project/commit/8239ea3918828ab9c5ea8be1f4100d464f0bf3c0
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
A flang/test/Transforms/debug-index-type.fir
Log Message:
-----------
[flang][debug] Support IndexType. (#113921)
Commit: d48c849ea94efb56d484393816e147afcec28d65
https://github.com/llvm/llvm-project/commit/d48c849ea94efb56d484393816e147afcec28d65
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/check-omp-structure.cpp
A flang/test/Lower/OpenMP/Todo/depend-clause.f90
A flang/test/Semantics/OpenMP/depend05.f90
Log Message:
-----------
[flang][OpenMP] Parsing support for iterator in DEPEND clause (#113622)
Warn about use of iterators OpenMP versions that didn't have them
(support added in 5.0). Emit a TODO error in lowering.
Commit: 3c2d77185e315d4558368ccab92e7a86c74a9a83
https://github.com/llvm/llvm-project/commit/3c2d77185e315d4558368ccab92e7a86c74a9a83
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/MC/AArch64/SVE/matrix-multiply-fp-diagnostics.s
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu.s
A llvm/test/MC/AArch64/SVE2/fmmla-f16f32mm-diagnostics.s
A llvm/test/MC/AArch64/SVE2/fmmla-f16f32mm.s
A llvm/test/MC/AArch64/SVE2/fmmla-f8f16mm-diagnostics.s
A llvm/test/MC/AArch64/SVE2/fmmla-f8f16mm.s
A llvm/test/MC/AArch64/SVE2/fmmla-f8f32mm-diagnostics.s
A llvm/test/MC/AArch64/SVE2/fmmla-f8f32mm.s
Log Message:
-----------
[AARCH64] Add assembly/disassembly for FMMLA instructions (#113313)
This patch adds assembly/disassembly for the following instructions:
FMMLA (widening, FP16 to FP32)
FMMLA (widening, FP8 to FP16)
FMMLA (widening, FP8 to FP32)
According to [1]
[1]https://developer.arm.com/documentation/ddi0602
Commit: f7adacf57901ca65977f2af3502f434747cdd183
https://github.com/llvm/llvm-project/commit/f7adacf57901ca65977f2af3502f434747cdd183
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Nominate Vlad Serebrennikov for C++ DRs (#114040)
Vlad has been improving our C++ DR conformance testing story for many
months at this point and writing these kinds of test is sometimes non-
trivial, so having a maintainer specific for this is helpful.
Commit: 88e23eb2cfadbf92b109b0aec999378f0c2a1062
https://github.com/llvm/llvm-project/commit/88e23eb2cfadbf92b109b0aec999378f0c2a1062
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
Log Message:
-----------
DAG: Fix legalization of vector addrspacecasts (#113964)
Commit: 183b38eb2261164fdfd6b7deac002edf27a39fe7
https://github.com/llvm/llvm-project/commit/183b38eb2261164fdfd6b7deac002edf27a39fe7
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M libclc/CMakeLists.txt
M libclc/cmake/modules/AddLibclc.cmake
Log Message:
-----------
[libclc] Split off library build system into helpers
This splits off several key parts of the build system into utility
methods. This will be used in upcoming patches to help provide
additional sets of target-specific builtin libraries.
Running llvm-diff on the resulting LLVM bytecode binaries, and regular
diff on SPIR-V binaries, shows no differences before and after this
patch.
Commit: b2bdd8bd39e90bfe3c66f6d5600468570a77ede6
https://github.com/llvm/llvm-project/commit/b2bdd8bd39e90bfe3c66f6d5600468570a77ede6
Author: Fraser Cormack <fraser at codeplay.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M libclc/CMakeLists.txt
A libclc/clc/include/clc/clcfunc.h
A libclc/clc/include/clc/clctypes.h
A libclc/clc/include/clc/geometric/clc_dot.h
A libclc/clc/include/clc/geometric/clc_dot.inc
A libclc/clc/include/clc/internal/clc.h
A libclc/clc/lib/clspv/SOURCES
A libclc/clc/lib/clspv/dummy.cl
A libclc/clc/lib/clspv64
A libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/geometric/clc_dot.cl
A libclc/clc/lib/spirv/SOURCES
A libclc/clc/lib/spirv64/SOURCES
M libclc/cmake/modules/AddLibclc.cmake
R libclc/generic/include/clc/clcfunc.h
R libclc/generic/include/clc/clctypes.h
M libclc/generic/lib/geometric/dot.cl
Log Message:
-----------
[libclc] Create an internal 'clc' builtins library
Some libclc builtins currently use internal builtins prefixed with
'__clc_' for various reasons, e.g., to avoid naming clashes.
This commit formalizes this concept by starting to isolate the
definitions of these internal clc builtins into a separate
self-contained bytecode library, which is linked into each target's
libclc OpenCL builtins before optimization takes place.
The goal of this step is to allow additional libraries of builtins
that provide entry points (or bindings) that are not written in OpenCL C
but still wish to expose OpenCL-compatible builtins. By moving the
implementations into a separate self-contained library, entry points can
share as much code as possible without going through OpenCL C.
The overall structure of the internal clc library is similar to the
current OpenCL structure, with SOURCES files and targets being able to
override the definitions of builtins as needed. The idea is that the
OpenCL builtins will begin to need fewer target-specific overrides, as
those will slowly move over to the clc builtins instead.
Another advantage of having a separate bytecode library with the CLC
implementations is that we can internalize the symbols when linking it
(separately), whereas currently the CLC symbols make it into the final
builtins library (and perhaps even the final compiled binary).
This patch starts of with 'dot' as it's relatively self-contained, as
opposed to most of the maths builtins which tend to pull in other
builtins.
We can also start to clang-format the builtins as we go, which should
help to modernize the codebase.
Commit: 667deb640870cbdaac941f30d189ef3fe926141c
https://github.com/llvm/llvm-project/commit/667deb640870cbdaac941f30d189ef3fe926141c
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
Log Message:
-----------
[PS4/PS5][Driver] Apply clang-format to PS4CPU.cpp (NFC) (#114038)
Commit: d732c0b13c55259177f2936516b6087d634078e0
https://github.com/llvm/llvm-project/commit/d732c0b13c55259177f2936516b6087d634078e0
Author: neildhickey <nhickey at nvidia.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
A clang/test/Driver/Inputs/cpunative/cortex-a57
A clang/test/Driver/Inputs/cpunative/cortex-a72
A clang/test/Driver/Inputs/cpunative/cortex-a76
A clang/test/Driver/Inputs/cpunative/neoverse-n1
A clang/test/Driver/Inputs/cpunative/neoverse-v2
A clang/test/Driver/aarch64-mcpu-native.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[clang][AArch64] Add getHostCPUFeatures to query for enabled features in cpu info (#97749)
Add getHostCPUFeatures into the AArch64 Target Parser to query the
cpuinfo for the device in the case where we are compiling with
-mcpu=native.
Add LLVM_CPUINFO environment variable to test mock /proc/cpuinfo
files for -mcpu=native
Co-authored-by: Elvina Yakubova <eyakubova at nvidia.com>
Commit: 4b44639a4320f980b3c9fa3b96e911e0741f179c
https://github.com/llvm/llvm-project/commit/4b44639a4320f980b3c9fa3b96e911e0741f179c
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Nominate Erich Keane for OpenACC (#114041)
Erich is the driving force behind the OpenACC implementation work that
has recently begun in Clang. Given his expertise on the topic and that
he's already aware of maintainer expectations (he maintains templates
and attributes currently), we should recognize that he's also the one
maintaining OpenACC.
Commit: ec871cfcdf3a46ca1be9842035e4271524644ed1
https://github.com/llvm/llvm-project/commit/ec871cfcdf3a46ca1be9842035e4271524644ed1
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode][NFC] Remove Pointer::elem() (#114046)
Unused.
Commit: c370869cd6f66e3c2ab33528e44959279311e499
https://github.com/llvm/llvm-project/commit/c370869cd6f66e3c2ab33528e44959279311e499
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/lib/Pass/PassRegistry.cpp
Log Message:
-----------
[mlir][NFC] Avoid a warning (#114052)
gcc 14.1 warning: template-id not allowed for destructor in C++20
[-Wtemplate-id-cdtor]
Commit: f490697cb9ad3db101ced7f4844002ffa0c73da8
https://github.com/llvm/llvm-project/commit/f490697cb9ad3db101ced7f4844002ffa0c73da8
Author: Boaz Brickner <brickner at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
[clang] [NFC] Fix a couple of typos: assuments and assingment
Commit: 87b6ec3be6b80f8e35d2eaea468e6bca79e79c2e
https://github.com/llvm/llvm-project/commit/87b6ec3be6b80f8e35d2eaea468e6bca79e79c2e
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Diagnose placement-new construction to inactive field (#114047)
We can reuse CheckActive() for this.
Commit: b9376915cf897e79a852497c60f18ddacb1830ae
https://github.com/llvm/llvm-project/commit/b9376915cf897e79a852497c60f18ddacb1830ae
Author: Boaz Brickner <brickner at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/test/CodeGenOpenCLCXX/local_addrspace_init.clcpp
Log Message:
-----------
[clang] [NFC] Fix assingments typo
Commit: 340cd4e631d72d02cd79f9aad74d2a354abc977e
https://github.com/llvm/llvm-project/commit/340cd4e631d72d02cd79f9aad74d2a354abc977e
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] fix for abc49cc19463970d5523d7d3332e4c1f83bc2ef7
Commit: f257e9bdbbb790e4fe0a5e2538c92d7edd85a2e5
https://github.com/llvm/llvm-project/commit/f257e9bdbbb790e4fe0a5e2538c92d7edd85a2e5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/builtin_test_helpers.h
Log Message:
-----------
[clang][x86] Update AVX/AVX512 setzero constexpr tests to use the TEST_CONSTEXPR macro
Commit: e281d96a81bca896692da4a07ca1423ee6dc1f53
https://github.com/llvm/llvm-project/commit/e281d96a81bca896692da4a07ca1423ee6dc1f53
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for _mm_add_epi32/64 and _mm_sub_epi32/64
Commit: 872981bd236530b160bf788aafd1cbde7b2bfb30
https://github.com/llvm/llvm-project/commit/872981bd236530b160bf788aafd1cbde7b2bfb30
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fix layering for libc
Commit: b6a84e77b696b0d91b7cbed116d6454b6b1cc62b
https://github.com/llvm/llvm-project/commit/b6a84e77b696b0d91b7cbed116d6454b6b1cc62b
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/SMEInstrFormats.td
A llvm/test/MC/AArch64/SME2p2/fmop4a-fp8-fp32-widening-diagnostics.s
A llvm/test/MC/AArch64/SME2p2/fmop4a-fp8-fp32-widening.s
Log Message:
-----------
[AArch64] Add assembly/disassembly for FMOP4A (widening, 4-way) instructions (#113347)
The new instructions are described in
https://developer.arm.com/documentation/ddi0602/2024-09/SME-Instructions
Commit: a388df712700f38ad9a51d49a657a28e739f5eb4
https://github.com/llvm/llvm-project/commit/a388df712700f38ad9a51d49a657a28e739f5eb4
Author: Sebastian Kreutzer <SebastianKreutzer at gmx.net>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/test/Driver/XRay/xray-shared.cpp
M compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
Log Message:
-----------
[XRay] Remove reliance on default PIC behavior in DSO tests (#113892)
Compiling with `-fxray-shared` requires position-independent code
(introduced in #113548).
Some tests do not explicitly specify this, thus falling back to the
compiler default.
If, for example, Clang is compiled with
`-DCLANG_DEFAULT_PIE_ON_LINUX=OFF`, these checks fail.
This patch addresses this issue in two tests:
- Removing a check in `xray-shared.cpp` that only tests default PIC
behavior
- Adding `-fPIC` explicitly in `clang-xray-shared.cpp`
Commit: 2e612f8d868b3fb88a44964a3d4efd61ee63e06a
https://github.com/llvm/llvm-project/commit/2e612f8d868b3fb88a44964a3d4efd61ee63e06a
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/test/Dialect/Arith/int-range-interface.mlir
Log Message:
-----------
[MLIR][Arith] Improve accuracy of `inferDivU` (#113789)
1) We can always bound the maximum with the numerator.
- https://alive2.llvm.org/ce/z/PqHvuT
2) Even if denominator min can be zero, we can still bound the minimum
result with `lhs.umin u/ rhs.umax`.
This is similar to https://github.com/llvm/llvm-project/pull/110169
Commit: 80a09735ac8bd6e31c824b41f7ee35952e440662
https://github.com/llvm/llvm-project/commit/80a09735ac8bd6e31c824b41f7ee35952e440662
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Arch/AArch64.cpp
R clang/test/Driver/Inputs/cpunative/cortex-a57
R clang/test/Driver/Inputs/cpunative/cortex-a72
R clang/test/Driver/Inputs/cpunative/cortex-a76
R clang/test/Driver/Inputs/cpunative/neoverse-n1
R clang/test/Driver/Inputs/cpunative/neoverse-v2
R clang/test/Driver/aarch64-mcpu-native.c
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
Revert "[clang][AArch64] Add getHostCPUFeatures to query for enabled … (#114066)
…features in cpu info (#97749)"
This reverts commit d732c0b13c55259177f2936516b6087d634078e0.
This is breaking buildbots
https://lab.llvm.org/buildbot/#/builders/190/builds/8413,
https://lab.llvm.org/buildbot/#/builders/56/builds/10880 and a few
others.
Commit: c9d9dc9c24039d85fdf3036368c9fba3d68722fa
https://github.com/llvm/llvm-project/commit/c9d9dc9c24039d85fdf3036368c9fba3d68722fa
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M libcxx/CMakeLists.txt
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/include/__config
R libcxx/test/libcxx/assertions/modes/enabling_assertions_enables_extensive_mode.pass.cpp
Log Message:
-----------
[libc++] Remove _LIBCPP_ENABLE_ASSERTIONS, which had been deprecated (#113592)
Commit: e268398fa89c9cc7901ea9b7386fc693023be203
https://github.com/llvm/llvm-project/commit/e268398fa89c9cc7901ea9b7386fc693023be203
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
Log Message:
-----------
[NFC][AMDGPU] Use `!foreach` to replace explicit list of registers (#114005)
Commit: 75e7ba8c0b7efe75632d328a80391b9086ba8740
https://github.com/llvm/llvm-project/commit/75e7ba8c0b7efe75632d328a80391b9086ba8740
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/countbits.hlsl
M clang/test/SemaHLSL/BuiltIns/countbits-errors.hlsl
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/countbits.ll
Log Message:
-----------
[HLSL] Re-implement countbits with the correct return type (#113189)
Restricts hlsl countbits to always return a uint32.
Implements a lowering from llvm.ctpop which has an overloaded return
type to dxil cbits op which always returns uint32.
Closes #112779
Commit: a156362e93eba9513611dc0989d516e9946cae48
https://github.com/llvm/llvm-project/commit/a156362e93eba9513611dc0989d516e9946cae48
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
A llvm/test/CodeGen/AMDGPU/fold-omod-crash.mir
Log Message:
-----------
[AMDGPU] Fix machine verification failure after SIFoldOperandsImpl::tryFoldOMod (#113544)
Fixes #54201
Commit: 1e991b1021c1d7694e1a0dfe9e261fb27555f05f
https://github.com/llvm/llvm-project/commit/1e991b1021c1d7694e1a0dfe9e261fb27555f05f
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Nominate Corentin Jabot for lambdas (#114043)
Corentin has largely been handling reviews touching lambdas for the past
year or two, so he has significant understanding of the various moving
parts of this fairly substantial C++ feature. Given that work on lambdas
tends to be somewhat specialized, I think it makes sense for it to have
dedicated oversight.
Commit: d43e4ce77d0a314139655c9cf7c3b533b5b72440
https://github.com/llvm/llvm-project/commit/d43e4ce77d0a314139655c9cf7c3b533b5b72440
Author: Nico Weber <thakis at chromium.org>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
Log Message:
-----------
Revert "[gn] port b1be21394e9c"
b1be21394e9c was reverted in 3ac75ee8ec.
This reverts commit 18f4b7e4a862c11816e62cc72fb2a4ca8fac1987, as well
as follow-ups a69d2a18d207947a25838dd01d2116bee384b75b and
4a6b56960f445d111adc9aef799acad8c6ca41f0.
Commit: f906d765baa0a17519b6d3310ba32e1b51b88c6d
https://github.com/llvm/llvm-project/commit/f906d765baa0a17519b6d3310ba32e1b51b88c6d
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/SandboxVectorizer/BUILD.gn
Log Message:
-----------
[gn build] Port 5ea694816b56
Commit: af44976cad04d8470f205f557eaf172ee1eff0df
https://github.com/llvm/llvm-project/commit/af44976cad04d8470f205f557eaf172ee1eff0df
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/JITLink/BUILD.gn
Log Message:
-----------
[gn build] Port 6128ff663076
Commit: bf6c483e4714841b1511ea3666f05a468bd988fe
https://github.com/llvm/llvm-project/commit/bf6c483e4714841b1511ea3666f05a468bd988fe
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/lib/Headers/emmintrin.h
M clang/test/CodeGen/X86/builtin_test_helpers.h
M clang/test/CodeGen/X86/sse2-builtins.c
Log Message:
-----------
[clang][x86] Add constexpr support for SSE2 _mm_set*_epi* intrinsics
Commit: a9c417c28a25c153aa0fdbe2eb5453a93820a3b1
https://github.com/llvm/llvm-project/commit/a9c417c28a25c153aa0fdbe2eb5453a93820a3b1
Author: Hugo Trachino <hugo.trachino at huawei.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
Log Message:
-----------
[MLIR][SCF] Fix LoopPeelOp documentation (NFC) (#113179)
As an example, I added annotations to the peel_front unit test.
```
func.func @loop_peel_first_iter_op() {
// CHECK: %[[C0:.+]] = arith.constant 0
// CHECK: %[[C41:.+]] = arith.constant 41
// CHECK: %[[C5:.+]] = arith.constant 5
// CHECK: %[[C5_0:.+]] = arith.constant 5
// CHECK: scf.for %{{.+}} = %[[C0]] to %[[C5_0]] step %[[C5]]
// CHECK: arith.addi
// CHECK: scf.for %{{.+}} = %[[C5_0]] to %[[C41]] step %[[C5]]
// CHECK: arith.addi
%0 = arith.constant 0 : index
%1 = arith.constant 41 : index
%2 = arith.constant 5 : index
scf.for %i = %0 to %1 step %2 {
arith.addi %i, %i : index
}
return
}
module attributes {transform.with_named_sequence} {
transform.named_sequence @__transform_main(%arg1: !transform.any_op {transform.readonly}) {
%0 = transform.structured.match ops{["arith.addi"]} in %arg1 : (!transform.any_op) -> !transform.any_op
%1 = transform.get_parent_op %0 {op_name = "scf.for"} : (!transform.any_op) -> !transform.op<"scf.for">
%main_loop, %remainder = transform.loop.peel %1 {peel_front = true} : (!transform.op<"scf.for">) -> (!transform.op<"scf.for">, !transform.op<"scf.for">)
transform.annotate %main_loop "main_loop" : !transform.op<"scf.for">
transform.annotate %remainder "remainder" : !transform.op<"scf.for">
transform.yield
}
}
```
Gives :
```
func.func @loop_peel_first_iter_op() {
%c0 = arith.constant 0 : index
%c41 = arith.constant 41 : index
%c5 = arith.constant 5 : index
%c5_0 = arith.constant 5 : index
scf.for %arg0 = %c0 to %c5_0 step %c5 {
%0 = arith.addi %arg0, %arg0 : index
} {remainder} // The first iteration loop (second result) has been annotated remainder
scf.for %arg0 = %c5_0 to %c41 step %c5 {
%0 = arith.addi %arg0, %arg0 : index
} {main_loop} // The main loop (first result) has been annotated main_loop
return
}
```
---------
Co-authored-by: Andrzej Warzyński <andrzej.warzynski at gmail.com>
Commit: 4df71ab78e9aa729959432bc0f8502760c90235b
https://github.com/llvm/llvm-project/commit/4df71ab78e9aa729959432bc0f8502760c90235b
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/lib/SandboxIR/Context.cpp
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Add callbacks for instruction insert/remove/move ops (#112965)
Commit: 318bdd0aeb721c8e9bd67101ac6641e5f9d990f2
https://github.com/llvm/llvm-project/commit/318bdd0aeb721c8e9bd67101ac6641e5f9d990f2
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/test/Analysis/StackSafetyAnalysis/local.ll
Log Message:
-----------
[StackSafetyAnalysis] Bail out when calling ifunc
An assertion failure arises when a call instruction calls a GlobalIFunc.
Since we cannot reason about the underlying function, just bail out.
Fix #87923
Pull Request: https://github.com/llvm/llvm-project/pull/113841
Commit: 2ab98dfe19ac384f0cfac1a1fafc56b9dd7ad9b7
https://github.com/llvm/llvm-project/commit/2ab98dfe19ac384f0cfac1a1fafc56b9dd7ad9b7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M lldb/docs/resources/test.rst
Log Message:
-----------
[lldb] Update link to GreenDragon in the docs
Commit: 2a9dd8af5ad9783d8ecba6bf93521de64bab6f81
https://github.com/llvm/llvm-project/commit/2a9dd8af5ad9783d8ecba6bf93521de64bab6f81
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/MC/AArch64/SVE/bfcvt-diagnostics.s
M llvm/test/MC/AArch64/SVE2/fcvtx-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/bfcvt_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/bfcvt_z.s
A llvm/test/MC/AArch64/SVE2p2/fcvt_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/fcvt_z.s
A llvm/test/MC/AArch64/SVE2p2/fcvtx_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/fcvtx_z.s
Log Message:
-----------
[AArch64] Add assembly/disassembly for zeroing SVE FCVT{X} and BFCVT (#113916)
This patch adds assembly/disassembly support for the following SVE2.2
instructions
- FCVT (zeroing)
- FCVTX (zeroing)
- BFCVT (zeroing)
In accordance with:
https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions
Commit: 39ad84e4d173b43dcd13209dc7c62de7a0476c80
https://github.com/llvm/llvm-project/commit/39ad84e4d173b43dcd13209dc7c62de7a0476c80
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/vectorization-pad-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
M mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir
Log Message:
-----------
[mlir][linalg] Split GenericPadOpVectorizationPattern into two patterns (#111349)
At the moment, `GenericPadOpVectorizationPattern` implements two
orthogonal transformations:
1. Rewrites `tensor::PadOp` into a sequence of `tensor::EmptyOp`,
`linalg::FillOp` and `tensor::InsertSliceOp`.
2. Vectorizes (where possible) `tensor::InsertSliceOp` (see
`tryVectorizeCopy`).
This patch splits `GenericPadOpVectorizationPattern` into two separate
patterns:
1. `GeneralizePadOpPattern` for the first transformation (note that
currently `GenericPadOpVectorizationPattern` inherits from
`GeneralizePadOpPattern`).
2. `InsertSliceVectorizePattern` to vectorize `tensor::InsertSliceOp`.
With this change, we gain the following:
* a clear separation between pre-processing and vectorization
transformations/stages,
* a path to support masked vectorisation for `tensor.insert_slice`
(with a dedicated pattern for vectorization, it is much easier to
specify the input vector sizes used in masking),
* more opportunities to vectorize `tensor.insert_slice`.
Note for downstream users:
--------------------------
If you were using `populatePadOpVectorizationPatterns`, following this
change you will also have to add
`populateInsertSliceVectorizationPatterns`.
Finer implementation details:
-----------------------------
1. The majority of changes in this patch are copy & paste + some edits.
1.1. The only functional change is that the vectorization of
`tensor.insert_slice` is now broadly available (as opposed to being
constrained to the pad vectorization pattern:
`GenericPadOpVectorizationPattern`).
1.2. Following-on from the above, `@pad_and_insert_slice_dest` is
updated. As expected, the input `tensor.insert_slice` Op is no
longer "preserved" and instead gets vectorized successfully.
2. The `linalg.fill` case in `getConstantPadVal` works under the
assumption that only _scalar_ source values can be used. That's
consistent with the definition of the Op, but it's not tested at the
moment. Hence a test case in Linalg/invalid.mlir is added.
3. The behaviour of the two TD vectorization Ops,
`transform.structured.vectorize_children_and_apply_patterns` and
`transform.structured.vectorize` is preserved.
Commit: 12a8f504cfe25afab97e288a44e1d5b1925d24cf
https://github.com/llvm/llvm-project/commit/12a8f504cfe25afab97e288a44e1d5b1925d24cf
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Use the proper gmock public header in unit tests.
This should fix the BuildKite bazel build.
Commit: 0b700f23335e9206e1e460a477df2103ce3c186d
https://github.com/llvm/llvm-project/commit/0b700f23335e9206e1e460a477df2103ce3c186d
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/runtime/CUDA/kernel.cpp
Log Message:
-----------
[flang][cuda] Add entry point to launch global function with cluster_dims (#113958)
Commit: b05fec97d59898a63a3e303122bbc7fc5e29ced8
https://github.com/llvm/llvm-project/commit/b05fec97d59898a63a3e303122bbc7fc5e29ced8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
Log Message:
-----------
[flang][cuda] Convert gpu.launch_func to CUFLaunchClusterKernel when cluster dims are present (#113959)
Kernel launch in CUF are converted to `gpu.launch_func`. When the kernel
has `cluster_dims` specified these get carried over to the
`gpu.launch_func` operation. This patch updates the special conversion
of `gpu.launch_func` when cluster dims are present to the newly added
entry point.
Commit: a1f2fb6078bbed8034ce28eafc3518268e25f2ff
https://github.com/llvm/llvm-project/commit/a1f2fb6078bbed8034ce28eafc3518268e25f2ff
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-reduction.mlir
Log Message:
-----------
[MLIR][OpenMP] Prevent composite omp.simd related crashes (#113680)
This patch updates the translation of `omp.wsloop` with a nested
`omp.simd` to prevent uses of block arguments defined by the latter from
triggering null pointer dereferences.
This happens because the inner `omp.simd` operation representing
composite `do simd` constructs is currently skipped and not translated,
but this results in block arguments defined by it not being mapped to an
LLVM value. The proposed solution is to map these block arguments to the
LLVM value associated to the corresponding operand, which is defined
above.
Commit: f53889ffcad28bbc0faf671626cc90eb4e7da5a8
https://github.com/llvm/llvm-project/commit/f53889ffcad28bbc0faf671626cc90eb4e7da5a8
Author: Jubilee <workingjubilee at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Allow crypto features to imply dependents (#112659)
This relationship is a logical dependency.
Note Zvbc and Zvknhb. They are explicitly called out in the spec as
requiring 64 bits:
-
https://github.com/riscv/riscv-crypto/blob/56ed7952d13eb5bdff92e2b522404668952f416d/doc/vector/riscv-crypto-spec-vector.adoc
Commit: b1d0fe095ba93df47b5db20a3bd55f9ff857836e
https://github.com/llvm/llvm-project/commit/b1d0fe095ba93df47b5db20a3bd55f9ff857836e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFeatures.td
Log Message:
-----------
[RISCV] Remove trailing whitespace. NFC
Commit: f964514490ecf6d57dc9f53ebda913a6fe1e3abd
https://github.com/llvm/llvm-project/commit/f964514490ecf6d57dc9f53ebda913a6fe1e3abd
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Nominate Shafik Yaghmour and Vlad Serebrennikov for C++ conformance (#114071)
Shafik and Vlad are both members of WG21 and both have familiarity with
reasoning about the C++ standard. They've both volunteered to help
answer conformance related questions, and this is an area where we get
quite a bit of questions so having a larger stable of maintainers is
quite useful.
Commit: 9a5b3a1bbca6790602ec3291da850fc4485cc807
https://github.com/llvm/llvm-project/commit/9a5b3a1bbca6790602ec3291da850fc4485cc807
Author: Adam Yang <hanbyang at microsoft.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
A llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
M llvm/utils/TableGen/DXILEmitter.cpp
Log Message:
-----------
[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (#111884)
fixes #112974
partially fixes #70103
### Changes
- Added new tablegen based way of lowering dx intrinsics to DXIL ops.
- Added int_dx_group_memory_barrier_with_group_sync intrinsic in
IntrinsicsDirectX.td
- Added expansion for int_dx_group_memory_barrier_with_group_sync in
DXILIntrinsicExpansion.cpp`
- Added DXIL backend test case
### Related PRs
* [[clang][HLSL] Add GroupMemoryBarrierWithGroupSync intrinsic
#111883](https://github.com/llvm/llvm-project/pull/111883)
* [[SPIRV] Add GroupMemoryBarrierWithGroupSync intrinsic
#111888](https://github.com/llvm/llvm-project/pull/111888)
Commit: d661aea4c5668fc9b06f4b26d9fb072b1a6d7ff4
https://github.com/llvm/llvm-project/commit/d661aea4c5668fc9b06f4b26d9fb072b1a6d7ff4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
Log Message:
-----------
[OpenMP] Add support for custom callback in AMDGPUStream (#112785)
Summary:
We have the ability to schedule callbacks after certain events complete.
Currently we can register an arbitrary callback in CUDA, but can't in
AMDGPU. I am planning on using this support to move the RPC handling to
a separate thread, then using these callbacks to suspend / resume it
when no kernels are running. This is a preliminary patch to keep this
noise out of that one.
Commit: 4e1b9d34f922d3b8b04a65f29681cd95dc9ce75f
https://github.com/llvm/llvm-project/commit/4e1b9d34f922d3b8b04a65f29681cd95dc9ce75f
Author: Afanasyev Ivan <ivafanas at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/MachineStripDebug.cpp
A llvm/test/CodeGen/Generic/MIRStripDebug/bundles.mir
Log Message:
-----------
[mir-strip-debug] Fix debug location info strip for bundled instructions (#113676)
Fix bug that `mir-strip-debug` pass does not remove debug location from
bundled instructions.
Problem arises during testing that debug info does not affect
optimization passes output (`llvm-lit` with ` -Dllc="llc
-debugify-and-strip-all-safe"`), when pass operates on MIR with bundled
instructions + memory operands.
Let mir test check looks like:
```
CHECK-NEXT: BUNDLE {
CHECK-NEXT: $r3 = LD $r1, $r2 :: (load (s64) from %ir.a, !tbaa !2)
CHECK-NEXT: }
```
So as `mir-strip-debug` pass does not process bundled instructions,
running `llc -debugify-and-strip-all-safe` on the test will produce the
following output:
```
BUNDLE {
$r3 = LD $r1, $r2, debug-location !DILocation(line: 3, column: 1, scope: <0x608cb2b99b10>) :: (load (s64) from %ir.a, !tbaa !2)
}
```
And test will fail, but it shouldn't.
Seems like the root cause is that `mir-strip-debug` pass should remove
debug location from bundled instructions.
Commit: b510cdb895b9188e5819c4c85a6dab22a4d14385
https://github.com/llvm/llvm-project/commit/b510cdb895b9188e5819c4c85a6dab22a4d14385
Author: Steven Wu <stevenwu at apple.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
A llvm/include/llvm/ADT/TrieHashIndexGenerator.h
A llvm/include/llvm/ADT/TrieRawHashMap.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/TrieRawHashMap.cpp
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/TrieRawHashMapTest.cpp
Log Message:
-----------
[ADT] Add TrieRawHashMap (#69528)
Implement TrieRawHashMap can be used to store object with its associated
hash. User needs to supply a strong hashing function to guarantee the
uniqueness of the hash of the objects to be inserted. A hash collision
is not supported and will lead to error or failed to insert.
TrieRawHashMap is thread-safe and lock-free and can be used as
foundation data structure to implement a content addressible storage.
TrieRawHashMap owns the data stored in it and is designed to be:
* Fast to lookup.
* Fast to "insert" if the data has already been inserted.
* Can be used without lock and doesn't require any knowledge of the
participating threads or extra coordination between threads.
It is not currently designed to be used to insert unique new data with
high contention, due to the limitation on the memory allocator.
Commit: 950ee75909d94c582ecac4d3d559c364ed88244f
https://github.com/llvm/llvm-project/commit/950ee75909d94c582ecac4d3d559c364ed88244f
Author: Harald van Dijk <harald.vandijk at codeplay.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
Log Message:
-----------
[RISC-V] Fix check of minimum vlen. (#114055)
If we have a minimum vlen, we were adjusting StackSize to change the
unit from vscale to bytes, and then calculating the required padding
size for alignment in bytes. However, we then used that padding size as
an offset in vscale units, resulting in misplaced stack objects.
While it would be possible to adjust the object offsets by dividing
AlignmentPadding by ST.getRealMinVLen() / RISCV::RVVBitsPerBlock, we can
simplify the calculation a bit if instead we adjust the alignment to be
in vscale units.
@topperc This fixes a bug I am seeing after #110312, but I am not 100%
certain I am understanding the code correctly, could you please see if
this makes sense to you?
Commit: 4abc35740760b626d3fcabd001593d46c4b595af
https://github.com/llvm/llvm-project/commit/4abc35740760b626d3fcabd001593d46c4b595af
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Nominate Sirraide for AST visitors and Sema (#114092)
Sirraide has been actively reviewing Sema code for a while now and
definitely has the expertise to help maintain that section of the
compiler. Further, he has been refactoring AST visitors to try to reduce
the compile time overhead associated with them and would be a good
resource for keeping an eye on that part of the code base too.
Commit: 639a7ac648f1e50ccd2556e17d401c04f9cce625
https://github.com/llvm/llvm-project/commit/639a7ac648f1e50ccd2556e17d401c04f9cce625
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclTemplate.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
Log Message:
-----------
[Clang][AST] Store injected template arguments in TemplateParameterList (#113579)
Currently, we store injected template arguments in
`RedeclarableTemplateDecl::CommonBase`. This approach has a couple
problems:
1. We can only access the injected template arguments of
`RedeclarableTemplateDecl` derived types, but other `Decl` kinds still
make use of the injected arguments (e.g.
`ClassTemplatePartialSpecializationDecl`,
`VarTemplatePartialSpecializationDecl`, and `TemplateTemplateParmDecl`).
2. Accessing the injected template arguments requires the common data
structure to be allocated. This may occur before we determine whether a
previous declaration exists (e.g. when comparing constraints), so if the
template _is_ a redeclaration, we end up discarding the common data
structure.
This patch moves the storage and access of injected template arguments
from `RedeclarableTemplateDecl` to `TemplateParameterList`.
Commit: 449523fa0f957db0fff1c0cd9ec5f59e858ece0b
https://github.com/llvm/llvm-project/commit/449523fa0f957db0fff1c0cd9ec5f59e858ece0b
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/Maintainers.rst
Log Message:
-----------
Nominate Vassil Vassilev for Modules and Plugins (#114058)
Vassil has significant experience helping users with the plugin
interface in Clang, especially around the new efforts to bring plugin
support to Windows. He also is knowledgeable about modules support.
Commit: 528e975ac4081c7d84c5664c7ca9a18a916db4c7
https://github.com/llvm/llvm-project/commit/528e975ac4081c7d84c5664c7ca9a18a916db4c7
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm.s.expected
M llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_err.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_sort.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_sort.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_sort_with_comment.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_sort_with_comment.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_unique.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_unique.s.expected
M llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm.txt.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm_unique.txt
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm_unique.txt.expected
M llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_multirun_dasm.txt.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/amdgpu-sort.test
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/amdgpu-unique.test
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/update_mc_test_checks.py
Log Message:
-----------
[AMDGPU][test]added unique and sort options for update_mc_test_check script (#111769)
add a unique and a sort option to the update_mc_test_check script.
These mc asm/dasm files are usually large in number of lines, and these
lines are mostly similar to each other. These options can be useful when
maintainer is merging or resolving conflicts by making the file
identifical
Also fixed a small issue in asm/dasm such that the auto generated header
line is
1. asm using ";" instead of "//" as comment marker
2. dasm using ";" instead of "#" as comment marker
Commit: ba65710908137fe68e7c039f1e2829c3d37480f3
https://github.com/llvm/llvm-project/commit/ba65710908137fe68e7c039f1e2829c3d37480f3
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
Log Message:
-----------
[RISCV] Avoid redundant SchedRead on _TIED VPseudos (#113940)
_TIED and _MASK_TIED pseudos have one less operand compared to other
pseudos, thus we shouldn't attach the same number of SchedRead for these
instructions.
I don't think we have a way to (explicitly) check scheduling classes. So
I only test this patch with existing tests.
Commit: 6f66530fd17a2333939e6b5a46d378ac7379f7ca
https://github.com/llvm/llvm-project/commit/6f66530fd17a2333939e6b5a46d378ac7379f7ca
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/lib/Pass/PassRegistry.cpp
Log Message:
-----------
[mlir] Fix a warning
This patch fixes:
mlir/lib/Pass/PassRegistry.cpp:425:37: error: ISO C++ requires the
name after '::~' to be found in the same scope as the name before
'::~' [-Werror,-Wdtor-name]
Commit: b0dd368d5741b1ad117848e33148d95406b33241
https://github.com/llvm/llvm-project/commit/b0dd368d5741b1ad117848e33148d95406b33241
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
Log Message:
-----------
[gn build] Port b510cdb895b9
Commit: 6563ed3162d16e7f067dda554e96d0c9d476f207
https://github.com/llvm/llvm-project/commit/6563ed3162d16e7f067dda554e96d0c9d476f207
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M libcxx/include/module.modulemap
Log Message:
-----------
[libc++][NFC] Remove trailing whitespace in the modulemap
Commit: cdacc9b5c7ec020bad24dbdcbeba96ac1d2713e5
https://github.com/llvm/llvm-project/commit/cdacc9b5c7ec020bad24dbdcbeba96ac1d2713e5
Author: Jerry Sun <105613447+jerryyiransun at users.noreply.github.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/TableGen/CodeEmitterGen.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/DAGISelEmitter.cpp
M llvm/utils/TableGen/DFAPacketizerEmitter.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/DirectiveEmitter.cpp
M llvm/utils/TableGen/DisassemblerEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/TableGen/OptionRSTEmitter.cpp
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/TableGen/TableGen.cpp
M llvm/utils/TableGen/VTEmitter.cpp
Log Message:
-----------
[TableGen] [NFC] Refine TableGen code to comply with `clang-tidy` checks (#113318)
Code cleanups for TableGen files, changes includes function names,
variable names and unused imports.
---------
Co-authored-by: Matt Arsenault <Matthew.Arsenault at amd.com>
Commit: f22c9ddb36dca84547212e087de3319dcc6bea49
https://github.com/llvm/llvm-project/commit/f22c9ddb36dca84547212e087de3319dcc6bea49
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
Log Message:
-----------
[ORC] Single-symbol convenience method does not need to be virtual.
This convenience method just calls the general case which is already virtual.
Commit: 9e37cbb469c0ec2fdbf4e3e7b0d9a2938ac30b01
https://github.com/llvm/llvm-project/commit/9e37cbb469c0ec2fdbf4e3e7b0d9a2938ac30b01
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
Log Message:
-----------
[ORC] Add some missing FIXMEs, move a temporary Error into an if condition.
Commit: 8e14c6c172b122203f46a9ad114d51c74535cbb7
https://github.com/llvm/llvm-project/commit/8e14c6c172b122203f46a9ad114d51c74535cbb7
Author: Kelvin Li <kkwli at users.noreply.github.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M flang/include/flang/Frontend/TargetOptions.h
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/mabi.f90
Log Message:
-----------
[flang] Support -mabi=vec-extabi and -mabi=vec-default on AIX (#113215)
This option is to enable the AIX extended and default vector ABIs.
Commit: efc6d33be9f4b4d0f0e8d3d5f198f2616b75792b
https://github.com/llvm/llvm-project/commit/efc6d33be9f4b4d0f0e8d3d5f198f2616b75792b
Author: Wanyi <kusmour at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M lldb/source/Host/common/FileAction.cpp
M lldb/test/API/commands/settings/TestSettings.py
M lldb/test/API/python_api/process/io/TestProcessIO.py
M lldb/unittests/Host/FileActionTest.cpp
M llvm/docs/ReleaseNotes.md
Log Message:
-----------
[lldb] Fix write only file action to truncate the file (#112657)
When `FileAction` opens file with write access, it doesn't clear the
file nor append to the end of the file if it already exists. Instead, it
writes from cursor index 0.
For example, by using the settings `target.output-path` and
`target.error-path`, lldb will redirect process stdout/stderr to files.
It then calls this function to write to the files which the above
symptoms appear.
## Test
- Added unit test checking the file flags
- Added 2 api tests checking
- File content overwritten if the file path already exists
- Stdout and stderr redirection to the same file doesn't change its
behavior
Commit: b4e1af0096fd05ed4bddf11b48b604d75a7103d0
https://github.com/llvm/llvm-project/commit/b4e1af0096fd05ed4bddf11b48b604d75a7103d0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
Log Message:
-----------
[lldb-dap] Always pass disableASLR to the DAP executable (#113891)
More context can be found in
https://github.com/llvm/llvm-project/pull/110303
For DAP tests running in constrained environments (e.g., Docker
containers), disabling ASLR isn't allowed. So we set `disableASLR=False`
(since https://github.com/llvm/llvm-project/pull/113593).
However, the `dap_server.py` will currently only forward the value
of `disableASLR` to the DAP executable if it's set to `True`. If the
DAP executable wasn't provided a `disableASLR` field it defaults to
`true` too:
https://github.com/llvm/llvm-project/blob/f14743794587db102c6d1b20f9c87a1ac20decfd/lldb/tools/lldb-dap/lldb-dap.cpp#L2103-L2104
This means that passing `disableASLR=False` from the tests is currently
not possible.
This is also true for many of the other boolean arguments of
`request_launch`. But this patch only addresses `disableASLR` for now
since it's blocking a libc++ patch.
Commit: b9978f8c7792a8bfdbef8912b3db7617bc5fddff
https://github.com/llvm/llvm-project/commit/b9978f8c7792a8bfdbef8912b3db7617bc5fddff
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
A flang/test/Fir/CUDA/cuda-constructor-2.f90
Log Message:
-----------
[flang][cuda] Adding variable registration in constructor (#113976)
1) Adding variable registration in constructor
2) Applying feedback from PR
https://github.com/llvm/llvm-project/pull/112989
Commit: c79827cd15ad31b77702e63e5050c1a8b0b44825
https://github.com/llvm/llvm-project/commit/c79827cd15ad31b77702e63e5050c1a8b0b44825
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/SandboxIR/Context.cpp
Log Message:
-----------
[SandboxIR] Fix a warning
This patch fixes:
llvm/lib/SandboxIR/Context.cpp:684:22: error: unused variable
'MaxRegisteredCallbacks' [-Werror,-Wunused-const-variable]
Commit: 9cc5a4bf667ffcd2765a6a00a311fb4ec8559b37
https://github.com/llvm/llvm-project/commit/9cc5a4bf667ffcd2765a6a00a311fb4ec8559b37
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
Log Message:
-----------
Remove llvm::shouldOptForSize() from Utils.h (#112630)
Remove `llvm::shouldOptForSize()` from `Utils.h` since we can use
`llvm::shouldOptimizeForSize()` from `SizeOpts.h` instead.
Depends on https://github.com/llvm/llvm-project/pull/112626
Commit: a18af41c20ac9ca22e3c95da3d71475f9f6c31b5
https://github.com/llvm/llvm-project/commit/a18af41c20ac9ca22e3c95da3d71475f9f6c31b5
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/test/Assembler/invalid-inttype.ll
M llvm/test/Assembler/invalid-name.ll
M llvm/test/Assembler/invalid-name2.ll
M llvm/test/TableGen/64-bit-int.td
M llvm/test/TableGen/invalid-macro-name-command-line.td
M llvm/test/TableGen/prep-diag1.td
M llvm/test/TableGen/prep-diag10.td
M llvm/test/TableGen/prep-diag11.td
M llvm/test/TableGen/prep-diag12.td
M llvm/test/TableGen/prep-diag13.td
M llvm/test/TableGen/prep-diag14.td
M llvm/test/TableGen/prep-diag2.td
M llvm/test/TableGen/prep-diag3.td
M llvm/test/TableGen/prep-diag4.td
M llvm/test/TableGen/prep-diag6.td
M llvm/test/TableGen/prep-diag8.td
M llvm/test/TableGen/prep-diag9.td
M llvm/test/TableGen/prep-ifndef-diag-1.td
M llvm/test/TableGen/prep-ifndef-diag-2.td
M llvm/test/TableGen/unterminated-c-comment.td
M llvm/test/TableGen/unterminated-code-block.td
Log Message:
-----------
[LLVM] Change error messages to start with lower case (#113748)
Change LLVM Asm and TableGen Lexer/Parser error messages to begin with
lower case.
Commit: 3754fc1e9af38951aa00181c0e8110174d3f94fd
https://github.com/llvm/llvm-project/commit/3754fc1e9af38951aa00181c0e8110174d3f94fd
Author: Thurston Dang <thurston at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M compiler-rt/test/hwasan/TestCases/many-threads-uaf.c
M compiler-rt/test/hwasan/TestCases/mem-intrinsics.c
M compiler-rt/test/hwasan/TestCases/use-after-free.c
Log Message:
-----------
[hwasan] Flush stderr/stdout in tests (#114083)
The x86_64_lam_qemu buildbots started failing
(https://lab.llvm.org/buildbot/#/builders/139/builds/5462/steps/2/logs/stdio).
Based on the logs, it appears the HWASan check is correct but it did not
match the stderr/stdout output. This patch attempts to fix the issue by
flushing stderr/stdout as appropriate.
Commit: 3a1228a543bc85e225809b1f3033fac744f1f122
https://github.com/llvm/llvm-project/commit/3a1228a543bc85e225809b1f3033fac744f1f122
Author: Adam Yang <hanbyang at microsoft.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll
Log Message:
-----------
[SPIRV] Add GroupMemoryBarrierWithGroupSync intrinsic (#111888)
partially fixes #70103
### Changes
* Added int_spv_group_memory_barrier_with_group_sync intrinsic in
IntrinsicsSPIRV.td
* Added lowering for int_spv_group_memory_barrier_with_group_sync in
SPIRVInstructionSelector.cpp
* Added SPIRV backend test case
### Related PRs
* [[clang][HLSL] Add GroupMemoryBarrierWithGroupSync intrinsic
#111883](https://github.com/llvm/llvm-project/pull/111883)
* [[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic
#111884](https://github.com/llvm/llvm-project/pull/111884)
Commit: e205929399d9ee4782b2d8ef1b659f918bdfe7c2
https://github.com/llvm/llvm-project/commit/e205929399d9ee4782b2d8ef1b659f918bdfe7c2
Author: Thurston Dang <thurston at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Posix/ignore_free_hook.cpp
Log Message:
-----------
[asan] Flush stderr in test (#114084)
This is the ASan equivalent of
https://github.com/llvm/llvm-project/pull/114083.
The x86_64_lam_qemu buildbots started failing
(https://lab.llvm.org/buildbot/#/builders/139/builds/5462/steps/2/logs/stdio).
Based on the logs, it appears the ASan check is correct but it did not
match the stderr/stdout output. This patch attempts to fix the issue by
flushing stderr as appropriate.
Commit: 8a0cb9ac869334fd6c6bd6aad8408623a7ccd7f6
https://github.com/llvm/llvm-project/commit/8a0cb9ac869334fd6c6bd6aad8408623a7ccd7f6
Author: Maryam Moghadas <maryammo at ca.ibm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
Log Message:
-----------
[PowerPC] Add custom lowering for ssubo (#111748)
This patch is to improve the codegen for ssubo node for i32 in 64-bit
mode by custom lowering.
Commit: 27ef549af2c2f60d05f38db1ecc7a8ad7294351d
https://github.com/llvm/llvm-project/commit/27ef549af2c2f60d05f38db1ecc7a8ad7294351d
Author: z1nke <iamczn.cpp at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
Log Message:
-----------
[clang-tidy] Fix crash in modernize-use-designated-initializers check (#113688)
Fix #113652.
When calling `Node.isAggregate()` and `Node.isPOD()`, if `Node` is declared but
not defined, it will result in null pointer dereference (and if assertions are
enabled, it will cause an assertion failure).
Commit: 5c12434906d85dde4d44036cfb564fd366d9a1a4
https://github.com/llvm/llvm-project/commit/5c12434906d85dde4d44036cfb564fd366d9a1a4
Author: David Majnemer <david.majnemer at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx512dq-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512dq-intrinsics.ll
M llvm/test/CodeGen/X86/avx512dqvl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
Log Message:
-----------
[X86] Emit comments explaining the immediate in vfpclass
This makes the assembly a lot more readable at a glance.
As an example:
```
vfpclasspd $4, %zmm0, %k0 # k0 = isNegativeZero(zmm0)
```
Commit: ba8d9ce8d4f0665f29bb4bb43ce16d02acaed751
https://github.com/llvm/llvm-project/commit/ba8d9ce8d4f0665f29bb4bb43ce16d02acaed751
Author: Steven Wu <stevenwu at apple.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Support/TrieRawHashMap.cpp
Log Message:
-----------
[ADT] Fix unused variable from #69528 (#114114)
Remove unused variable to fix build failures from bot.
Commit: ccd73eeab34b31c7c38e9aca05ca4192fb0913b0
https://github.com/llvm/llvm-project/commit/ccd73eeab34b31c7c38e9aca05ca4192fb0913b0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[LinkerWrapper] Remove in-house handling of LTO (#113715)
Summary:
This should be the linker's job if the user creates any bitcode files,
then passing `-flto` to the linker for the toolchain should be able to
handle it. Right now this path is only used in the case where someone
does LTO w/ ld.gold targeting a CPU so I think we are safe here as that
will still be forwarded, for bfd it'll be an error as it would on the
host. I think I talked the SYCL team out of using this as well so I
should be good to delete it.
Commit: 70af40ba74cf62fdaa3ae1d7db972c138655049f
https://github.com/llvm/llvm-project/commit/70af40ba74cf62fdaa3ae1d7db972c138655049f
Author: Thurston Dang <thurston at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M compiler-rt/test/hwasan/TestCases/use-after-free.c
Log Message:
-----------
[hwasan] Fix forward '[hwasan] Flush stderr/stdout in tests (#114083)'
3754fc1e9af38951aa00181c0e8110174d3f94fd broke the build because subsequent checks depend on the line numbers
https://lab.llvm.org/buildbot/#/builders/174/builds/7534/steps/6/logs/FAIL__HWAddressSanitizer-x86_64__use-after-free_c
Commit: 8193832fb988e3df1e8e726634783805dca8d9b6
https://github.com/llvm/llvm-project/commit/8193832fb988e3df1e8e726634783805dca8d9b6
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M lldb/source/Core/SourceManager.cpp
Log Message:
-----------
[lldb] Search main function with lldb::eFunctionNameTypeFull when getting default file and line. (#113980)
This is to work around the fact that
`SymbolFileNativePDB::FindFunctions` only support
`lldb::eFunctionNameTypeFull` and `lldb::eFunctionNameTypeMethod` now.
Since `main`'s full name is the same as base name (`main`), it's okay to
search with `lldb::eFunctionNameTypeFull` when trying to get the default
file and line. With this, `lldb/test/Shell/Driver/TestSingleQuote.test`
passes on Windows with NativePDB plugin.
Commit: a78861fc55d18046989ff4d624a037e9181da170
https://github.com/llvm/llvm-project/commit/a78861fc55d18046989ff4d624a037e9181da170
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/test/Driver/nvlink-wrapper.c
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
M clang/tools/clang-nvlink-wrapper/NVLinkOpts.td
Log Message:
-----------
[NvlinkWrapper] Add support for `--undefined` (#113934)
Summary:
This flag is pretty canonical in ELF linkers, it allows us to force the
link job to extract a library if it defines a specific symbol. This is
mostly useful for letting us forcibly extract things that don't fit the
normal model (i.e. kernels) from static libraries.
Commit: 41baa69a7e2ab3df13334565aa6ccdae1b0113ad
https://github.com/llvm/llvm-project/commit/41baa69a7e2ab3df13334565aa6ccdae1b0113ad
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
Log Message:
-----------
[BOLT] Fix warnings (#114116)
This patch fixes:
bolt/lib/Core/BinaryFunction.cpp:2537:13: error: enumeration value
'OpNegateRAStateWithPC' not handled in switch [-Werror,-Wswitch]
bolt/lib/Core/BinaryFunction.cpp:2661:13: error: enumeration value
'OpNegateRAStateWithPC' not handled in switch [-Werror,-Wswitch]
bolt/lib/Core/BinaryFunction.cpp:2805:13: error: enumeration value
'OpNegateRAStateWithPC' not handled in switch [-Werror,-Wswitch]
Commit: 94e7d9c0bfe517507ea08b00fb00c32fb2837a82
https://github.com/llvm/llvm-project/commit/94e7d9c0bfe517507ea08b00fb00c32fb2837a82
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/TargetParser/RISCVISAInfo.cpp
Log Message:
-----------
[RISCV] Remove Zvk* dependency checks from RISCVISAInfo::checkDependency.
The Zvk* extensions now imply Zve32x or Zve64x so it shouldn't be
possible to fail these dependency checks.
Commit: 83ae171722bea2722afa4efb0558a6d8b8844305
https://github.com/llvm/llvm-project/commit/83ae171722bea2722afa4efb0558a6d8b8844305
Author: David Green <david.green at arm.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
M llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[AArch64] Add ComputeNumSignBits for VASHR. (#113957)
As with a normal ISD::SRA node, they take the number of sign bits of the
incoming value and increase it by the shifted amount.
Commit: 680901ed8010319843cd81275b845d682f77e27f
https://github.com/llvm/llvm-project/commit/680901ed8010319843cd81275b845d682f77e27f
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Implement VPHeaderPHIRecipe::computeCost.
Fill out computeCost implementations for various header PHI recipes,
matching the legacy cost model for now.
Commit: 4a96081224b6c0f166760eab0c42ef3dfadd5ed1
https://github.com/llvm/llvm-project/commit/4a96081224b6c0f166760eab0c42ef3dfadd5ed1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[clang-linker-wrapper] Fix a warning
This patch fixes:
clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp:642:6:
error: unused function 'diagnosticHandler'
[-Werror,-Wunused-function]
Commit: a325c5359310316e393e7e446373fca645002ecb
https://github.com/llvm/llvm-project/commit/a325c5359310316e393e7e446373fca645002ecb
Author: Zequan Wu <zequanwu at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M lldb/unittests/Host/FileActionTest.cpp
Log Message:
-----------
[lldb] Fix lldb windows build breakage from https://github.com/llvm/llvm-project/pull/112657.
LLDB windows build failure: https://lab.llvm.org/buildbot/#/builders/141/builds/3462
Commit: 5cfb07a5d067f7729a1578c7272fb314a89c8596
https://github.com/llvm/llvm-project/commit/5cfb07a5d067f7729a1578c7272fb314a89c8596
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/ADT/StringRef.h
Log Message:
-----------
Revert "[ADT] Use std::string_view inside StringRef (#113775)" (#114133)
This patch reverts commit 89b5d88fb81362b4fb2f833790aa40b7eaa186da.
Some sanitizer failures have been reported, indicating that StringRef
and std::string_view handle data == nulptr differently. Also, they
support different values for the max size (size_t v.s. ptrdiff_t).
Thanks goes to Jorge Gorbe Moya for reporting these.
Commit: 8b55162e195783dd27e1c69fb4d97971ef76725b
https://github.com/llvm/llvm-project/commit/8b55162e195783dd27e1c69fb4d97971ef76725b
Author: Luke Lau <luke at igalia.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fmul.ll
Log Message:
-----------
[RISCV] Add cost model tests for scalable FP reductions. NFC
There are already some in reduce-scalable-fp.ll but this makes it a
bit easier to see the difference alongside their fixed-length
counterparts.
Commit: ca998b071eba1c92bf8535964183c7c4c3b258c3
https://github.com/llvm/llvm-project/commit/ca998b071eba1c92bf8535964183c7c4c3b258c3
Author: vporpo <vporpodas at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Check wrap flags (#113975)
Commit: 2c5eea0e88a6ef6bf932d90c67aaec2bcc59d340
https://github.com/llvm/llvm-project/commit/2c5eea0e88a6ef6bf932d90c67aaec2bcc59d340
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/test/Dialect/Vector/canonicalize.mlir
Log Message:
-----------
[mlir][Vector] Fix vector.insert folder for scalar to 0-d inserts (#113828)
The current vector.insert folder tries to replace a scalar with a 0-rank
vector. This patch fixes this crash by not folding unless they types of
the result and replacement are same.
Commit: d90a0d1d986e12c4a6ff2eeffe29cedc34e6e2ab
https://github.com/llvm/llvm-project/commit/d90a0d1d986e12c4a6ff2eeffe29cedc34e6e2ab
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M libc/test/src/math/exhaustive/sinpif_test.cpp
Log Message:
-----------
Remove spurious includes from sinpif_test.cpp
MPFR functionality is provided by the MPFRWrapper instead, and the direct "mpfr.h" inclusion is not needed - this test doesn't rely on it (similar to its sibling libc/test/src/math/exhaustive/cospif_test.cpp that doesn't have it).
Commit: f71ea0e72e2419691e3c67bdbbe338d314ee77c0
https://github.com/llvm/llvm-project/commit/f71ea0e72e2419691e3c67bdbbe338d314ee77c0
Author: A. Jiang <de34 at live.cn>
Date: 2024-10-30 (Wed, 30 Oct 2024)
Changed paths:
M libcxx/test/std/strings/basic.string/string.capacity/deallocate_size.pass.cpp
Log Message:
-----------
[libc++][test] Augment `test_alloc` in `deallocate_size.pass.cpp` (#113638)
Making it meet the requirements for allocator since C++11. Fixes
#113609.
This PR doesn't make it meet the C++03 allocator requirements, because
that would make the type too verbose and libc++ has backported many
C++11 features to the C++03 mode.
Drive-by: Removes the `TEST_CONSTEXPR_CXX14` on `allocate`/`dealocate`
which is never in effect (and causes IFNDR-ness before C++23), since
these functions modify the namespace-scoped variable `allocated_`.
Commit: 0f8dbb2fac532e37a9859d52982f0e8994305a11
https://github.com/llvm/llvm-project/commit/0f8dbb2fac532e37a9859d52982f0e8994305a11
Author: A. Jiang <de34 at live.cn>
Date: 2024-10-30 (Wed, 30 Oct 2024)
Changed paths:
M libcxx/include/complex
A libcxx/test/libcxx/numerics/complex.number/cmplx.over.pow.pass.cpp
Log Message:
-----------
[libc++] Constrain additional overloads of `pow` for `complex` harder (#110235)
Fixes #109858.
The changes in #81379 broke some 3rd party library code that expected
usability of `std::complex<NonFloatingPoint>`. Although such code isn't
portable per [complex.numbers.general]/2, it might be better to make
these additional overloads not to interfere overload resolution too
much.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 75b37c3191254d0c418058cb94c3a7922b7ba71e
https://github.com/llvm/llvm-project/commit/75b37c3191254d0c418058cb94c3a7922b7ba71e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M llvm/include/llvm/BinaryFormat/Dwarf.def
Log Message:
-----------
[DWARF] Fix arity of DW_OP_bra (#114136)
Found by my proof-of-concept DWARF expression evaluator fuzzer.
Commit: 50dd9225f8b33a924970039772faeac03e0a5716
https://github.com/llvm/llvm-project/commit/50dd9225f8b33a924970039772faeac03e0a5716
Author: Thurston Dang <thurston at google.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Posix/ignore_free_hook.cpp
Log Message:
-----------
Revert "[asan] Flush stderr in test (#114084)"
This reverts commit e205929399d9ee4782b2d8ef1b659f918bdfe7c2.
Reason: did not solve the QEMU bot issues (https://lab.llvm.org/buildbot/#/builders/139/builds/5552/steps/30/logs/stdio) and it shouldn't have been necessary anyway (https://github.com/llvm/llvm-project/pull/114084#issuecomment-2445513320)
Commit: 0fa2fb3ed0bc726e5dcf8258bf764aacd1c2e6dc
https://github.com/llvm/llvm-project/commit/0fa2fb3ed0bc726e5dcf8258bf764aacd1c2e6dc
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
A flang/test/Fir/CUDA/cuda-launch.fir
Log Message:
-----------
[flang][cuda] Add conversion pattern for cuf.kernel_launch op (#114129)
Commit: 255e441613e39a391e9f85d6a605cc9e46dcf273
https://github.com/llvm/llvm-project/commit/255e441613e39a391e9f85d6a605cc9e46dcf273
Author: Matthias Braun <matze at braunis.de>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Transforms/SLPVectorizer/X86/conversion-fp16.ll
Log Message:
-----------
X86: Do not return invalid cost for fp16 conversion (#114128)
Returning invalid instruction costs when converting from/to fp16 in
`X86TTIImpl::getCastInstrCost` when there is no hardware support
available was triggering asserts. This changes the code to return a
large (arbitrary) number to model the fact that libcalls are used to
implement the conversion.
This also simplifies the code by only reporting costs for the scalar
fp16 conversion; vectorized costs being left to the fallback assuming
scalarization.
This is a follow-up to assertion issues reported for the changes in
#113195
Commit: 13a3c4f97cf33279d597148ec48c71337aa16e9a
https://github.com/llvm/llvm-project/commit/13a3c4f97cf33279d597148ec48c71337aa16e9a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
Log Message:
-----------
[RISCV] Add OperandType to frmarg and rtzarg. (#114142)
Teach RISCVInstrInfo::verifyInstruction to validate them.
This is partially extracted from #89047, but that did not include the
verification.
Commit: d9268289c3858c4ae877ff3bb90f28c160a977c8
https://github.com/llvm/llvm-project/commit/d9268289c3858c4ae877ff3bb90f28c160a977c8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M clang/test/Driver/riscv-profiles.c
Log Message:
-----------
[RISCV] Add sha and supm to checks in riscv-profiles.c (#114123)
Commit: 8800b739bfe3ddc0bd32c158a016ffd0eee1e352
https://github.com/llvm/llvm-project/commit/8800b739bfe3ddc0bd32c158a016ffd0eee1e352
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-10-30 (Wed, 30 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
Log Message:
-----------
[RISCV] Refactor FP, SP and RA in RISCVFrameLowering.cpp. NFC (#113818)
Those registers are too fragmented in terms of usage, some are hard
coded and some are retrieved by calling function. Also some have
comments for alias name, some don't.
Commit: 63eb40eeb1b7aac57a181f6b5f9170ea94cef738
https://github.com/llvm/llvm-project/commit/63eb40eeb1b7aac57a181f6b5f9170ea94cef738
Author: A. Jiang <de34 at live.cn>
Date: 2024-10-30 (Wed, 30 Oct 2024)
Changed paths:
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/ccomplex
M libcxx/include/ciso646
M libcxx/include/complex.h
A libcxx/include/cstdalign
M libcxx/include/cstdbool
M libcxx/include/ctgmath
M libcxx/include/module.modulemap
M libcxx/include/tgmath.h
M libcxx/test/libcxx/clang_modules_include.gen.py
M libcxx/test/libcxx/double_include.gen.py
M libcxx/test/libcxx/header_inclusions.gen.py
M libcxx/test/libcxx/include_as_c.sh.cpp
M libcxx/test/libcxx/libcpp_version.gen.py
M libcxx/test/libcxx/no_assert_include.gen.py
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/depr/depr.c.headers/ciso646.compile.pass.cpp
A libcxx/test/std/depr/depr.c.headers/stdalign_h.compile.pass.cpp
A libcxx/test/std/depr/depr.cpp.headers/ccomplex.verify.cpp
A libcxx/test/std/depr/depr.cpp.headers/ciso646.verify.cpp
A libcxx/test/std/depr/depr.cpp.headers/cstdalign.verify.cpp
A libcxx/test/std/depr/depr.cpp.headers/cstdbool.verify.cpp
A libcxx/test/std/depr/depr.cpp.headers/ctgmath.verify.cpp
A libcxx/test/std/language.support/support.runtime/cstdalign.compile.pass.cpp
M libcxx/test/std/language.support/support.runtime/cstdbool.pass.cpp
M libcxx/test/std/numerics/c.math/ctgmath.pass.cpp
M libcxx/test/std/numerics/complex.number/ccmplx/ccomplex.pass.cpp
M libcxx/utils/libcxx/header_information.py
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[libc++] Deprecate and remove meaningless `<cxxx>` headers (#111615)
This PR deprecates `<ccomplex>`, `<cstdbool>`, `<ctgmath>`, and
`<ciso646>` in C++17 and "removes" them in C++20 by special deprecation
warnings.
`<cstdalign>` is previously missing. This PR also tries to add them, and
then deprecates and "removes" `<cstdalign>`.
Papers:
- https://wg21.link/P0063R3
- https://wg21.link/P0619R4
Closes #99985.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: facdae62b7be4fe177c8a130c68aef0305dc6eb3
https://github.com/llvm/llvm-project/commit/facdae62b7be4fe177c8a130c68aef0305dc6eb3
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M llvm/include/llvm/MC/MCInstPrinter.h
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/lib/MC/MCInstPrinter.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.h
M llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
M llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
Log Message:
-----------
[MCInstPrinter] Make printRegName non-const
Similar to printInst. printRegName may change states (e.g. #113834).
Commit: ec8a7013e1d0cbdad21d483614f699b2a8b6360d
https://github.com/llvm/llvm-project/commit/ec8a7013e1d0cbdad21d483614f699b2a8b6360d
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-29 (Tue, 29 Oct 2024)
Changed paths:
M bolt/lib/Core/BinaryFunction.cpp
M bolt/test/X86/pre-aggregated-perf.test
M clang-tools-extra/clang-tidy/bugprone/BugproneTidyModule.cpp
M clang-tools-extra/clang-tidy/bugprone/CMakeLists.txt
A clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.cpp
A clang-tools-extra/clang-tidy/bugprone/NondeterministicPointerIterationOrderCheck.h
M clang-tools-extra/clang-tidy/modernize/UseDesignatedInitializersCheck.cpp
M clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp
M clang-tools-extra/clang-tidy/readability/ImplicitBoolConversionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/checks/bugprone/nondeterministic-pointer-iteration-order.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_algorithm
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_c++config.h
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_initializer_list
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_iterator_base
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_map
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_set
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_stl_pair
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_type_traits
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_unordered_map
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_unordered_set
A clang-tools-extra/test/clang-tidy/checkers/bugprone/Inputs/system-header-simulator/sim_vector
A clang-tools-extra/test/clang-tidy/checkers/bugprone/nondeterministic-pointer-iteration-order.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-designated-initializers.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.c
M clang-tools-extra/test/clang-tidy/checkers/readability/implicit-bool-conversion.c
M clang/Maintainers.rst
M clang/docs/AddressSanitizer.rst
A clang/docs/FunctionEffectAnalysis.rst
M clang/docs/RealtimeSanitizer.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/docs/index.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/LangStandard.h
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/CodeGen/CGFunctionInfo.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/Types.def
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Sema/SemaInternal.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Basic/LangOptions.cpp
M clang/lib/Basic/LangStandards.cpp
M clang/lib/Basic/Module.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AArch64.h
M clang/lib/Basic/Targets/ARM.cpp
M clang/lib/Basic/Targets/ARM.h
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/ABIInfoImpl.cpp
M clang/lib/CodeGen/ABIInfoImpl.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/Targets/AArch64.cpp
M clang/lib/CodeGen/Targets/ARM.cpp
M clang/lib/CodeGen/Targets/RISCV.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/Flang.h
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/ExtractAPI/Serialization/SymbolGraphSerializer.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/emmintrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
A clang/lib/Headers/sm4evexintrin.h
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
R clang/lib/StaticAnalyzer/Checkers/PointerIterationChecker.cpp
R clang/lib/StaticAnalyzer/Checkers/PointerSortingChecker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/placement-new.cpp
R clang/test/Analysis/ptr-iter.cpp
R clang/test/Analysis/ptr-sort.cpp
A clang/test/CXX/drs/cwg1884.cpp
M clang/test/CXX/drs/cwg18xx.cpp
A clang/test/CXX/drs/cwg279.cpp
M clang/test/CXX/drs/cwg2xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/test/ClangScanDeps/link-libraries.c
M clang/test/ClangScanDeps/print-timing.c
A clang/test/CodeGen/RISCV/attr-hw-shadow-stack.c
M clang/test/CodeGen/X86/avx-builtins.c
M clang/test/CodeGen/X86/avx-cmp-builtins.c
M clang/test/CodeGen/X86/avx-shuffle-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
A clang/test/CodeGen/X86/builtin_test_helpers.h
A clang/test/CodeGen/X86/sm4-evex-builtins.c
M clang/test/CodeGen/X86/sse-builtins.c
M clang/test/CodeGen/X86/sse.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/X86/sse3-builtins.c
A clang/test/CodeGen/aarch64-fpm-helpers.c
A clang/test/CodeGen/aarch64-pure-scalable-args-empty-union.c
A clang/test/CodeGen/aarch64-pure-scalable-args.c
M clang/test/CodeGen/builtins-nvptx-native-half-type-native.c
M clang/test/CodeGen/builtins-nvptx-native-half-type.c
M clang/test/CodeGen/builtins-nvptx.c
R clang/test/CodeGen/debug-info-renderscript-tag.rs
M clang/test/CodeGen/fp16-ops.c
A clang/test/CodeGen/pgo-cold-function-coverage.c
R clang/test/CodeGen/renderscript.c
M clang/test/CodeGenCUDA/offloading-entries.cu
M clang/test/CodeGenHLSL/builtins/countbits.hlsl
A clang/test/CodeGenHLSL/builtins/splitdouble.hlsl
A clang/test/CodeGenHLSL/convergence/entry.point.hlsl
M clang/test/CodeGenOpenCLCXX/local_addrspace_init.clcpp
M clang/test/Driver/XRay/xray-shared.cpp
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/cuda-cross-compiling.c
A clang/test/Driver/fprofile-generate-cold-function-coverage.c
M clang/test/Driver/nvlink-wrapper.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/ps5-linker.c
R clang/test/Driver/renderscript.rs
M clang/test/Driver/riscv-profiles.c
M clang/test/Driver/unknown-std.c
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Preprocessor/predefined-macros-no-warnings.c
M clang/test/Preprocessor/riscv-target-features.c
M clang/test/Sema/arithmetic-fence-builtin.c
M clang/test/Sema/asm.c
R clang/test/Sema/renderscript.rs
M clang/test/SemaCXX/conditional-expr.cpp
M clang/test/SemaCXX/constexpr-string.cpp
A clang/test/SemaCXX/warn-memaccess.cpp
M clang/test/SemaHLSL/BuiltIns/asuint-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/countbits-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/splitdouble-errors.hlsl
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/tools/clang-nvlink-wrapper/ClangNVLinkWrapper.cpp
M clang/tools/clang-nvlink-wrapper/NVLinkOpts.td
M clang/tools/clang-scan-deps/ClangScanDeps.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangCommentCommandInfoEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLNamedCharacterReferenceEmitter.cpp
M clang/utils/TableGen/ClangCommentHTMLTagsEmitter.cpp
M clang/utils/TableGen/NeonEmitter.cpp
M clang/www/cxx_dr_status.html
M clang/www/index.html
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/include/fuzzer/FuzzedDataProvider.h
M compiler-rt/lib/asan/scripts/asan_symbolize.py
M compiler-rt/lib/hwasan/scripts/hwasan_symbolize
M compiler-rt/test/hwasan/TestCases/many-threads-uaf.c
M compiler-rt/test/hwasan/TestCases/mem-intrinsics.c
M compiler-rt/test/hwasan/TestCases/use-after-free.c
M compiler-rt/test/hwasan/lit.cfg.py
M compiler-rt/test/lit.common.configured.in
M compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/include/flang/Runtime/CUDA/kernel.h
M flang/include/flang/Runtime/CUDA/registration.h
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInstance.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
M flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CUFGPUToLLVMConversion.cpp
M flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/ControlFlowConverter.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/runtime/CUDA/kernel.cpp
M flang/runtime/CUDA/registration.cpp
M flang/test/Driver/frontend-forwarding.f90
A flang/test/Driver/mabi.f90
A flang/test/Fir/CUDA/cuda-constructor-2.f90
A flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/cuda-gpu-launch-func.mlir
A flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/convert-to-llvm-openmp-and-fir.fir
M flang/test/Fir/loop01.fir
M flang/test/Fir/loop02.fir
M flang/test/Lower/HLFIR/goto-do-body.f90
A flang/test/Lower/OpenMP/Todo/depend-clause.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-derived-assignments.f90
M flang/test/Lower/array-derived.f90
M flang/test/Lower/array-elemental-calls-char-byval.f90
M flang/test/Lower/array-elemental-calls-char.f90
M flang/test/Lower/array-expression-assumed-size.f90
M flang/test/Lower/array-expression-slice-1.f90
M flang/test/Lower/array-substring.f90
M flang/test/Lower/array-temp.f90
M flang/test/Lower/components.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/goto-do-body.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/vector-subscript-io.f90
A flang/test/Parser/OpenMP/taskloop.f90
M flang/test/Semantics/OpenMP/default-none.f90
A flang/test/Semantics/OpenMP/depend04.f90
A flang/test/Semantics/OpenMP/depend05.f90
A flang/test/Transforms/debug-index-type.fir
M flang/tools/bbc/bbc.cpp
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/hdr/CMakeLists.txt
M libc/hdr/fcntl_macros.h
A libc/hdr/fcntl_overlay.h
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/mode_t.h
M libc/newhdrgen/yaml/math.yaml
M libc/src/__support/File/linux/CMakeLists.txt
M libc/src/__support/File/linux/dir.cpp
M libc/src/__support/File/linux/file.cpp
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/fcntl/creat.h
M libc/src/fcntl/linux/CMakeLists.txt
M libc/src/fcntl/linux/creat.cpp
M libc/src/fcntl/linux/open.cpp
M libc/src/fcntl/linux/openat.cpp
M libc/src/fcntl/open.h
M libc/src/fcntl/openat.h
M libc/src/math/CMakeLists.txt
M libc/src/math/cbrt.h
A libc/src/math/cospif16.h
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/cospif16.cpp
A libc/src/math/generic/sincosf16_utils.h
M libc/src/math/generic/sinpif16.cpp
M libc/src/spawn/linux/CMakeLists.txt
M libc/src/spawn/linux/posix_spawn.cpp
M libc/src/stdio/gpu/fprintf.cpp
M libc/src/stdio/gpu/printf.cpp
M libc/src/stdio/gpu/vfprintf.cpp
M libc/src/stdio/gpu/vfprintf_utils.h
M libc/src/stdio/gpu/vprintf.cpp
M libc/src/stdio/linux/CMakeLists.txt
M libc/src/stdio/linux/remove.cpp
M libc/src/stdio/linux/rename.cpp
M libc/src/stdio/vsscanf.h
M libc/src/sys/mman/linux/CMakeLists.txt
M libc/src/sys/mman/linux/shm_open.cpp
M libc/src/sys/mman/shm_open.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/src/sys/stat/linux/chmod.cpp
M libc/src/sys/stat/linux/fchmod.cpp
M libc/src/sys/stat/linux/fstat.cpp
M libc/src/sys/stat/linux/lstat.cpp
M libc/src/sys/stat/linux/mkdir.cpp
M libc/src/sys/stat/linux/stat.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/access.cpp
M libc/src/unistd/linux/dup2.cpp
M libc/src/unistd/linux/link.cpp
M libc/src/unistd/linux/linkat.cpp
M libc/src/unistd/linux/readlink.cpp
M libc/src/unistd/linux/readlinkat.cpp
M libc/src/unistd/linux/rmdir.cpp
M libc/src/unistd/linux/symlink.cpp
M libc/src/unistd/linux/symlinkat.cpp
M libc/src/unistd/linux/unlink.cpp
M libc/src/unistd/linux/unlinkat.cpp
M libc/test/src/fcntl/CMakeLists.txt
M libc/test/src/fcntl/openat_test.cpp
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/cospif16_test.cpp
M libc/test/src/math/exhaustive/sinpif_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/cospif16_test.cpp
M libc/test/src/sys/sendfile/CMakeLists.txt
M libc/test/src/sys/sendfile/sendfile_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/chmod_test.cpp
M libc/test/src/sys/stat/fchmod_test.cpp
M libc/test/src/sys/stat/fchmodat_test.cpp
M libc/test/src/sys/stat/fstat_test.cpp
M libc/test/src/sys/stat/lstat_test.cpp
M libc/test/src/sys/stat/mkdirat_test.cpp
M libc/test/src/sys/stat/stat_test.cpp
M libc/test/src/sys/statvfs/linux/fstatvfs_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/chdir_test.cpp
M libc/test/src/unistd/fchdir_test.cpp
M libc/test/src/unistd/readlinkat_test.cpp
M libc/test/src/unistd/rmdir_test.cpp
M libc/test/src/unistd/syscall_test.cpp
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libclc/CMakeLists.txt
A libclc/clc/include/clc/clcfunc.h
A libclc/clc/include/clc/clctypes.h
A libclc/clc/include/clc/geometric/clc_dot.h
A libclc/clc/include/clc/geometric/clc_dot.inc
A libclc/clc/include/clc/internal/clc.h
A libclc/clc/lib/clspv/SOURCES
A libclc/clc/lib/clspv/dummy.cl
A libclc/clc/lib/clspv64
A libclc/clc/lib/generic/SOURCES
A libclc/clc/lib/generic/geometric/clc_dot.cl
A libclc/clc/lib/spirv/SOURCES
A libclc/clc/lib/spirv64/SOURCES
M libclc/cmake/modules/AddLibclc.cmake
R libclc/generic/include/clc/clcfunc.h
R libclc/generic/include/clc/clctypes.h
M libclc/generic/lib/geometric/dot.cl
M libcxx/CMakeLists.txt
M libcxx/docs/ReleaseNotes/20.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/CMakeLists.txt
M libcxx/include/__config
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__vector/vector.h
M libcxx/include/ccomplex
M libcxx/include/ciso646
M libcxx/include/complex
M libcxx/include/complex.h
A libcxx/include/cstdalign
M libcxx/include/cstdbool
M libcxx/include/ctgmath
M libcxx/include/module.modulemap
M libcxx/include/tgmath.h
R libcxx/test/libcxx/assertions/modes/enabling_assertions_enables_extensive_mode.pass.cpp
M libcxx/test/libcxx/clang_modules_include.gen.py
M libcxx/test/libcxx/double_include.gen.py
M libcxx/test/libcxx/header_inclusions.gen.py
M libcxx/test/libcxx/include_as_c.sh.cpp
M libcxx/test/libcxx/libcpp_version.gen.py
M libcxx/test/libcxx/no_assert_include.gen.py
A libcxx/test/libcxx/numerics/complex.number/cmplx.over.pow.pass.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/containers/sequences/vector/vector.cons/exceptions.pass.cpp
M libcxx/test/std/depr/depr.c.headers/ciso646.compile.pass.cpp
A libcxx/test/std/depr/depr.c.headers/stdalign_h.compile.pass.cpp
A libcxx/test/std/depr/depr.cpp.headers/ccomplex.verify.cpp
A libcxx/test/std/depr/depr.cpp.headers/ciso646.verify.cpp
A libcxx/test/std/depr/depr.cpp.headers/cstdalign.verify.cpp
A libcxx/test/std/depr/depr.cpp.headers/cstdbool.verify.cpp
A libcxx/test/std/depr/depr.cpp.headers/ctgmath.verify.cpp
M libcxx/test/std/experimental/simd/simd.class/simd_unary.pass.cpp
A libcxx/test/std/language.support/support.runtime/cstdalign.compile.pass.cpp
M libcxx/test/std/language.support/support.runtime/cstdbool.pass.cpp
M libcxx/test/std/numerics/c.math/ctgmath.pass.cpp
M libcxx/test/std/numerics/complex.number/ccmplx/ccomplex.pass.cpp
M libcxx/test/std/strings/basic.string/string.capacity/deallocate_size.pass.cpp
M libcxx/test/std/utilities/expected/types.h
M libcxx/test/support/min_allocator.h
M libcxx/utils/libcxx/header_information.py
M libunwind/src/DwarfInstructions.hpp
M libunwind/src/DwarfParser.hpp
M libunwind/src/dwarf2.h
M lld/COFF/Chunks.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.h
M lld/MachO/BPSectionOrderer.cpp
A lld/test/COFF/autoimport-arm64ec-data.test
M lldb/docs/resources/test.rst
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/source/Core/SourceManager.cpp
M lldb/source/Host/common/FileAction.cpp
M lldb/test/API/commands/settings/TestSettings.py
M lldb/test/API/python_api/process/io/TestProcessIO.py
M lldb/tools/debugserver/source/MacOSX/MachVMRegion.cpp
M lldb/tools/lldb-dap/Breakpoint.cpp
M lldb/tools/lldb-dap/Breakpoint.h
M lldb/tools/lldb-dap/BreakpointBase.cpp
M lldb/tools/lldb-dap/BreakpointBase.h
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/FifoFiles.cpp
M lldb/tools/lldb-dap/FifoFiles.h
M lldb/tools/lldb-dap/FunctionBreakpoint.cpp
M lldb/tools/lldb-dap/IOStream.cpp
M lldb/tools/lldb-dap/IOStream.h
M lldb/tools/lldb-dap/InstructionBreakpoint.cpp
M lldb/tools/lldb-dap/InstructionBreakpoint.h
M lldb/tools/lldb-dap/JSONUtils.cpp
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/OutputRedirector.h
M lldb/tools/lldb-dap/RunInTerminal.cpp
M lldb/tools/lldb-dap/RunInTerminal.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/unittests/Expression/DWARFExpressionTest.cpp
M lldb/unittests/Host/FileActionTest.cpp
M llvm/docs/CommandGuide/lit.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/LangRef.rst
M llvm/docs/RISCVUsage.rst
M llvm/docs/ReleaseNotes.md
M llvm/docs/UserGuides.rst
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/ADT/ArrayRef.h
M llvm/include/llvm/ADT/GenericCycleImpl.h
M llvm/include/llvm/ADT/GenericCycleInfo.h
M llvm/include/llvm/ADT/StringMapEntry.h
M llvm/include/llvm/ADT/StringRef.h
A llvm/include/llvm/ADT/TrieHashIndexGenerator.h
A llvm/include/llvm/ADT/TrieRawHashMap.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/VecFuncs.def
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/GIMatchTableExecutor.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
M llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/ExecutionEngine/JITLink/MachO.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/MachOObjectFormat.h
M llvm/include/llvm/Frontend/OpenMP/ClauseT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCInstPrinter.h
M llvm/include/llvm/MC/MCParser/MCAsmParser.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/Remarks/HotnessThresholdParser.h
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/SandboxIR/PassManager.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/Endian.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Transforms/IPO/FunctionSpecialization.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/NullPass.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/PrintInstructionCount.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromMetadata.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/StackSafetyAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinterDwarf.cpp
M llvm/lib/CodeGen/BranchFolding.cpp
M llvm/lib/CodeGen/CFIInstrInserter.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandMemCmp.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCombiner.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/MachineSizeOpts.cpp
M llvm/lib/CodeGen/MachineStripDebug.cpp
M llvm/lib/CodeGen/SelectOptimize.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/TailDuplicator.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
M llvm/lib/ExecutionEngine/ExecutionEngine.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/MachOObjectFormat.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/DebugInfo.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCInstPrinter.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/SandboxIR/Context.cpp
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/SandboxIR/PassManager.cpp
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/TrieRawHashMap.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64GenRegisterBankInfo.def
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PointerAuth.cpp
M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.cpp
M llvm/lib/Target/AArch64/AArch64Subtarget.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
M llvm/lib/Target/AArch64/SMEInstrFormats.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.cpp
M llvm/lib/Target/ARC/MCTargetDesc/ARCInstPrinter.h
M llvm/lib/Target/ARM/ARMFrameLowering.cpp
M llvm/lib/Target/ARM/ARMSubtarget.cpp
M llvm/lib/Target/ARM/ARMSubtarget.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.cpp
M llvm/lib/Target/CSKY/MCTargetDesc/CSKYInstPrinter.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.cpp
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonInstPrinter.h
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.cpp
M llvm/lib/Target/Lanai/MCTargetDesc/LanaiInstPrinter.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchInstPrinter.h
M llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.cpp
M llvm/lib/Target/M68k/MCTargetDesc/M68kInstPrinter.h
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.cpp
M llvm/lib/Target/MSP430/MCTargetDesc/MSP430InstPrinter.h
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsInstPrinter.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVInstPrinter.h
M llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
M llvm/lib/Target/RISCV/RISCVProfiles.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP400.td
M llvm/lib/Target/RISCV/RISCVSchedSiFiveP600.td
M llvm/lib/Target/RISCV/RISCVScheduleV.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
M llvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.cpp
M llvm/lib/Target/VE/MCTargetDesc/VEInstPrinter.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.h
M llvm/lib/Target/X86/MCTargetDesc/X86InstComments.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCAsmInfo.cpp
M llvm/lib/Target/X86/X86FixupBWInsts.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrSystem.td
M llvm/lib/Target/X86/X86OptimizeLEAs.cpp
M llvm/lib/Target/X86/X86PadShortFunction.cpp
M llvm/lib/Target/X86/X86PfmCounters.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.cpp
M llvm/lib/Target/XCore/MCTargetDesc/XCoreInstPrinter.h
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
M llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
M llvm/lib/TargetParser/RISCVISAInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroEarly.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/FunctionSpecialization.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/ConstantHoisting.cpp
M llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Utils/SizeOpts.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/RegionsFromMetadata.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/CostModel/RISCV/fround.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fmul.ll
M llvm/test/Analysis/StackSafetyAnalysis/local.ll
M llvm/test/Analysis/ValueTracking/numsignbits-from-assume.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/Assembler/invalid-inttype.ll
M llvm/test/Assembler/invalid-name.ll
M llvm/test/Assembler/invalid-name2.ll
M llvm/test/Bindings/llvm-c/debug_info_new_format.ll
A llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sincos.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/GlobalISel/sve-integer.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/arm64-vshift.ll
M llvm/test/CodeGen/AArch64/cvt-fp-int-fp.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-fp16.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics.ll
A llvm/test/CodeGen/AArch64/llvm.frexp.ll
A llvm/test/CodeGen/AArch64/llvm.sincos-fmf.ll
A llvm/test/CodeGen/AArch64/llvm.sincos.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-regsave.mir
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll
M llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll
M llvm/test/CodeGen/AArch64/pacbti-llvm-generated-funcs-2.ll
M llvm/test/CodeGen/AArch64/sign-return-address-cfi-negate-ra-state.ll
M llvm/test/CodeGen/AArch64/sign-return-address-pauth-lr.ll
M llvm/test/CodeGen/AArch64/sign-return-address.ll
M llvm/test/CodeGen/AArch64/srem-lkk.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
A llvm/test/CodeGen/AMDGPU/fold-omod-crash.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
A llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir
A llvm/test/CodeGen/AMDGPU/issue98474-need-live-out-undef-subregister-def.ll
A llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
A llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/ARM/fp-intrinsics.ll
A llvm/test/CodeGen/ARM/llvm.sincos.ll
M llvm/test/CodeGen/DirectX/countbits.ll
A llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
R llvm/test/CodeGen/DirectX/split-double.ll
A llvm/test/CodeGen/DirectX/splitdouble.ll
A llvm/test/CodeGen/Generic/MIRStripDebug/bundles.mir
M llvm/test/CodeGen/MIR/AArch64/return-address-signing.mir
M llvm/test/CodeGen/PowerPC/copysignl.ll
M llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll
M llvm/test/CodeGen/PowerPC/saddo-ssubo.ll
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/double-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/float-intrinsics-strict.ll
M llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-compress-fp.ll
M llvm/test/CodeGen/RISCV/rvv/remat.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-vops.ll
M llvm/test/CodeGen/RISCV/rvv/vector-compress.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/splitdouble.ll
M llvm/test/CodeGen/Thumb2/bti-pac-replace-2.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-basic.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-frame-chain.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-indirect-tail-call.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-outliner-3.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-outliner-4.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-overalign.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-stack-arg.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-varargs-1.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-varargs-2.ll
M llvm/test/CodeGen/Thumb2/pacbti-m-vla.ll
M llvm/test/CodeGen/X86/andnot-patterns.ll
M llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
M llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/CodeGen/X86/avx512dq-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512dq-intrinsics.ll
M llvm/test/CodeGen/X86/avx512dqvl-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll
M llvm/test/CodeGen/X86/avxneconvert-intrinsics.ll
M llvm/test/CodeGen/X86/bfloat-constrained.ll
M llvm/test/CodeGen/X86/float-strict-powi-convert.ll
M llvm/test/CodeGen/X86/scmp.ll
A llvm/test/CodeGen/X86/sm4-evex-intrinsics.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16.ll
M llvm/test/CodeGen/X86/stack-folding-fp-avx512fp16vl.ll
M llvm/test/CodeGen/X86/ucmp.ll
M llvm/test/CodeGen/X86/vector-compress.ll
M llvm/test/DebugInfo/Generic/debug-names-accel-table-types.ll
M llvm/test/DebugInfo/Generic/ipsccp-remap-assign-id.ll
A llvm/test/MC/AArch64/FP8/fmmla-diagnostics.s
A llvm/test/MC/AArch64/FP8/fmmla.s
A llvm/test/MC/AArch64/SME2/bfmul-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfmul.s
A llvm/test/MC/AArch64/SME2/bfscale-diagnostics.s
A llvm/test/MC/AArch64/SME2/bfscale.s
A llvm/test/MC/AArch64/SME2p2/fmop4a-fp8-fp32-widening-diagnostics.s
A llvm/test/MC/AArch64/SME2p2/fmop4a-fp8-fp32-widening.s
A llvm/test/MC/AArch64/SME2p2/fmop4as-fp16-non-widening-diagnostics.s
A llvm/test/MC/AArch64/SME2p2/fmop4as-fp16-non-widening.s
A llvm/test/MC/AArch64/SME2p2/fmul-diagnostics.s
A llvm/test/MC/AArch64/SME2p2/fmul.s
M llvm/test/MC/AArch64/SVE/bfcvt-diagnostics.s
M llvm/test/MC/AArch64/SVE/matrix-multiply-fp-diagnostics.s
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu.s
M llvm/test/MC/AArch64/SVE2/fcvtx-diagnostics.s
A llvm/test/MC/AArch64/SVE2/fmmla-f16f32mm-diagnostics.s
A llvm/test/MC/AArch64/SVE2/fmmla-f16f32mm.s
A llvm/test/MC/AArch64/SVE2/fmmla-f8f16mm-diagnostics.s
A llvm/test/MC/AArch64/SVE2/fmmla-f8f16mm.s
A llvm/test/MC/AArch64/SVE2/fmmla-f8f32mm-diagnostics.s
A llvm/test/MC/AArch64/SVE2/fmmla-f8f32mm.s
M llvm/test/MC/AArch64/SVE2/sqabs-diagnostics.s
M llvm/test/MC/AArch64/SVE2/sqneg-diagnostics.s
M llvm/test/MC/AArch64/SVE2/urecpe-diagnostics.s
M llvm/test/MC/AArch64/SVE2/ursqrte-diagnostics.s
A llvm/test/MC/AArch64/SVE2p1/pmlal-diagnostics.s
A llvm/test/MC/AArch64/SVE2p1/pmlal.s
A llvm/test/MC/AArch64/SVE2p1/pmull-diagnostics.s
A llvm/test/MC/AArch64/SVE2p1/pmull.s
A llvm/test/MC/AArch64/SVE2p2/bfcvt_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/bfcvt_z.s
A llvm/test/MC/AArch64/SVE2p2/fcvt_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/fcvt_z.s
A llvm/test/MC/AArch64/SVE2p2/fcvtx_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/fcvtx_z.s
A llvm/test/MC/AArch64/SVE2p2/sqabs_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/sqabs_z.s
A llvm/test/MC/AArch64/SVE2p2/sqneg_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/sqneg_z.s
A llvm/test/MC/AArch64/SVE2p2/unary_arithmetic_predicated_z-diagnotics.s
A llvm/test/MC/AArch64/SVE2p2/unary_arithmetic_predicated_z.s
A llvm/test/MC/AArch64/SVE2p2/urecpe_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/urecpe_z.s
A llvm/test/MC/AArch64/SVE2p2/ursqrte_z-diagnostics.s
A llvm/test/MC/AArch64/SVE2p2/ursqrte_z.s
A llvm/test/MC/AArch64/armv9.6a-cvtf.s
A llvm/test/MC/AArch64/armv9.6a-fcvt.s
M llvm/test/MC/AArch64/directive-arch-negative.s
M llvm/test/MC/AArch64/directive-arch.s
M llvm/test/MC/AArch64/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/directive-arch_extension.s
M llvm/test/MC/AArch64/directive-cpu.s
M llvm/test/MC/AArch64/directives-case_insensitive.s
A llvm/test/MC/AArch64/negate_ra_state_with_pc.s
M llvm/test/MC/AArch64/neon-diagnostics.s
A llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vopc.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp16.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopc_t16_promote.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp16.s
A llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vopcx_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage.s
A llvm/test/MC/AMDGPU/gfx12_asm_vop3c-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3c.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopc-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp16.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopc_t16_promote.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopcx-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp16.s
A llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8-fake16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vopcx_t16_promote.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vopcx_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vimage.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopc_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vopcx_dpp8.txt
A llvm/test/MC/Disassembler/X86/apx/msr-imm.txt
A llvm/test/MC/Disassembler/X86/msrimm-64.txt
A llvm/test/MC/Disassembler/X86/sm4-evex-32.txt
A llvm/test/MC/Disassembler/X86/sm4-evex-64.txt
M llvm/test/MC/RISCV/attribute-arch.s
A llvm/test/MC/X86/apx/msrimm-att.s
A llvm/test/MC/X86/apx/msrimm-intel.s
A llvm/test/MC/X86/msrimm-64-att.s
A llvm/test/MC/X86/msrimm-64-intel.s
A llvm/test/MC/X86/sm4-evex-32-att.s
A llvm/test/MC/X86/sm4-evex-32-intel.s
A llvm/test/MC/X86/sm4-evex-64-att.s
A llvm/test/MC/X86/sm4-evex-64-intel.s
A llvm/test/MachineVerifier/AMDGPU/issue98474-missing-def-liveout-physical-subregister.mir
M llvm/test/TableGen/64-bit-int.td
M llvm/test/TableGen/invalid-macro-name-command-line.td
M llvm/test/TableGen/prep-diag1.td
M llvm/test/TableGen/prep-diag10.td
M llvm/test/TableGen/prep-diag11.td
M llvm/test/TableGen/prep-diag12.td
M llvm/test/TableGen/prep-diag13.td
M llvm/test/TableGen/prep-diag14.td
M llvm/test/TableGen/prep-diag2.td
M llvm/test/TableGen/prep-diag3.td
M llvm/test/TableGen/prep-diag4.td
M llvm/test/TableGen/prep-diag6.td
M llvm/test/TableGen/prep-diag8.td
M llvm/test/TableGen/prep-diag9.td
M llvm/test/TableGen/prep-ifndef-diag-1.td
M llvm/test/TableGen/prep-ifndef-diag-2.td
M llvm/test/TableGen/unterminated-c-comment.td
M llvm/test/TableGen/unterminated-code-block.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/Transforms/EarlyCSE/defaultfp-strictfp.ll
M llvm/test/Transforms/EarlyCSE/ebstrict-strictfp.ll
M llvm/test/Transforms/EarlyCSE/mixed-strictfp.ll
M llvm/test/Transforms/EarlyCSE/nonmixed-strictfp.ll
M llvm/test/Transforms/FunctionSpecialization/compiler-crash-58759.ll
M llvm/test/Transforms/FunctionSpecialization/function-specialization-constant-expression.ll
M llvm/test/Transforms/FunctionSpecialization/function-specialization2.ll
M llvm/test/Transforms/FunctionSpecialization/function-specialization4.ll
M llvm/test/Transforms/FunctionSpecialization/get-possible-constants.ll
M llvm/test/Transforms/FunctionSpecialization/global-rank.ll
M llvm/test/Transforms/FunctionSpecialization/identical-specializations.ll
M llvm/test/Transforms/FunctionSpecialization/literal-const.ll
A llvm/test/Transforms/FunctionSpecialization/maxgrowth.ll
M llvm/test/Transforms/FunctionSpecialization/specialize-multiple-arguments.ll
A llvm/test/Transforms/FunctionSpecialization/track-ptr-return.ll
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/InstCombine/2007-10-31-RangeCrash.ll
M llvm/test/Transforms/InstCombine/and-compare.ll
M llvm/test/Transforms/InstCombine/cast_phi.ll
M llvm/test/Transforms/InstCombine/constant-fold-iteration.ll
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/icmp-or.ll
A llvm/test/Transforms/InstCombine/pr105510.ll
M llvm/test/Transforms/InstCombine/pr55228.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/test/Transforms/InstCombine/sink_instruction.ll
M llvm/test/Transforms/InstCombine/vec_shuffle.ll
M llvm/test/Transforms/InstCombine/zext-or-icmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vplan-vp-intrinsics-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls-finite.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing.ll
M llvm/test/Transforms/PGOProfile/chr.ll
A llvm/test/Transforms/PGOProfile/instr-gen-cold-function.ll
M llvm/test/Transforms/SCCP/strictfp-phis-fcmp.ll
M llvm/test/Transforms/SCCP/strictfp-phis-fcmps.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/X86/conversion-fp16.ll
A llvm/test/Transforms/SLPVectorizer/full-overlap-non-schedulable.ll
M llvm/test/Transforms/SimpleLoopUnswitch/2007-08-01-LCSSA.ll
M llvm/test/Transforms/Util/add-TLI-mappings.ll
M llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm.s.expected
M llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_err.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_sort.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_sort.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_sort_with_comment.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_sort_with_comment.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_unique.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_unique.s.expected
M llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm.txt.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm_unique.txt
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm_unique.txt.expected
M llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_multirun_dasm.txt.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/amdgpu-sort.test
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/amdgpu-unique.test
A llvm/test/tools/llvm-objdump/MachO/AArch64/aliases.s
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/tools/llvm-c-test/debuginfo.c
M llvm/tools/llvm-objdump/MachODump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-objdump/llvm-objdump.h
M llvm/unittests/ADT/CMakeLists.txt
A llvm/unittests/ADT/TrieRawHashMapTest.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDebugFrameTest.cpp
M llvm/unittests/ExecutionEngine/JITLink/CMakeLists.txt
R llvm/unittests/ExecutionEngine/JITLink/JITLinkMocks.cpp
R llvm/unittests/ExecutionEngine/JITLink/JITLinkMocks.h
A llvm/unittests/ExecutionEngine/JITLink/JITLinkTestUtils.cpp
A llvm/unittests/ExecutionEngine/JITLink/JITLinkTestUtils.h
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
A llvm/unittests/ExecutionEngine/JITLink/MachOLinkGraphTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/MemoryManagerErrorTests.cpp
M llvm/unittests/SandboxIR/PassTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/CMakeLists.txt
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
A llvm/unittests/Transforms/Vectorize/SandboxVectorizer/VecUtilsTest.cpp
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/Attributes.cpp
M llvm/utils/TableGen/CTagsEmitter.cpp
M llvm/utils/TableGen/CallingConvEmitter.cpp
M llvm/utils/TableGen/CodeEmitterGen.cpp
M llvm/utils/TableGen/CodeGenMapTable.cpp
M llvm/utils/TableGen/DAGISelEmitter.cpp
M llvm/utils/TableGen/DFAPacketizerEmitter.cpp
M llvm/utils/TableGen/DXILEmitter.cpp
M llvm/utils/TableGen/DirectiveEmitter.cpp
M llvm/utils/TableGen/DisassemblerEmitter.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/TableGen/OptionRSTEmitter.cpp
M llvm/utils/TableGen/PseudoLoweringEmitter.cpp
M llvm/utils/TableGen/RISCVTargetDefEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/TableGen/TableGen.cpp
M llvm/utils/TableGen/VTEmitter.cpp
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/gn/secondary/clang-tools-extra/clang-tidy/bugprone/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
M llvm/utils/gn/secondary/compiler-rt/test/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/JITLink/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/SandboxVectorizer/BUILD.gn
M llvm/utils/update_mc_test_checks.py
M mlir/docs/Bufferization.md
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
M mlir/include/mlir/Dialect/SCF/TransformOps/SCFTransformOps.td
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.h
M mlir/include/mlir/Dialect/SCF/Transforms/Passes.td
M mlir/include/mlir/Dialect/Vector/IR/VectorOps.td
M mlir/lib/Conversion/FuncToLLVM/FuncToLLVM.cpp
M mlir/lib/Conversion/LinalgToStandard/CMakeLists.txt
M mlir/lib/Conversion/MathToFuncs/MathToFuncs.cpp
M mlir/lib/Conversion/MathToLibm/CMakeLists.txt
M mlir/lib/Dialect/Arith/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/SCF/Transforms/BufferizableOpInterfaceImpl.cpp
R mlir/lib/Dialect/SCF/Transforms/Bufferize.cpp
M mlir/lib/Dialect/SCF/Transforms/CMakeLists.txt
M mlir/lib/Dialect/SCF/Transforms/LoopSpecialization.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Interfaces/Utils/InferIntRangeCommon.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/MathToFuncs/ctlz.mlir
M mlir/test/Conversion/MathToFuncs/ipowi.mlir
M mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir
M mlir/test/Dialect/Arith/int-range-interface.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/vectorization-pad-patterns.mlir
M mlir/test/Dialect/Linalg/vectorization-unsupported.mlir
M mlir/test/Dialect/Linalg/vectorization-with-patterns.mlir
M mlir/test/Dialect/SCF/bufferize.mlir
M mlir/test/Dialect/Vector/canonicalize.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
M mlir/test/Target/LLVMIR/openmp-reduction.mlir
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M runtimes/CMakeLists.txt
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
rebase to remove const_cast
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/c7e8cde68b01...ec8a7013e1d0
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