[all-commits] [llvm/llvm-project] 9a5b3a: [DXIL] Add GroupMemoryBarrierWithGroupSync intrins...

Adam Yang via All-commits all-commits at lists.llvm.org
Tue Oct 29 10:17:56 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 9a5b3a1bbca6790602ec3291da850fc4485cc807
      https://github.com/llvm/llvm-project/commit/9a5b3a1bbca6790602ec3291da850fc4485cc807
  Author: Adam Yang <hanbyang at microsoft.com>
  Date:   2024-10-29 (Tue, 29 Oct 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/lib/Target/DirectX/DXIL.td
    M llvm/lib/Target/DirectX/DXILOpLowering.cpp
    A llvm/test/CodeGen/DirectX/group_memory_barrier_with_group_sync.ll
    M llvm/utils/TableGen/DXILEmitter.cpp

  Log Message:
  -----------
  [DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic (#111884)

fixes #112974
partially fixes #70103

### Changes
- Added new tablegen based way of lowering dx intrinsics to DXIL ops.
- Added int_dx_group_memory_barrier_with_group_sync intrinsic in
IntrinsicsDirectX.td
- Added expansion for int_dx_group_memory_barrier_with_group_sync in
DXILIntrinsicExpansion.cpp`
- Added DXIL backend test case

### Related PRs
* [[clang][HLSL] Add GroupMemoryBarrierWithGroupSync intrinsic
#111883](https://github.com/llvm/llvm-project/pull/111883)
* [[SPIRV] Add GroupMemoryBarrierWithGroupSync intrinsic
#111888](https://github.com/llvm/llvm-project/pull/111888)



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