[all-commits] [llvm/llvm-project] 2a9dd8: [AArch64] Add assembly/disassembly for zeroing SVE...

SpencerAbson via All-commits all-commits at lists.llvm.org
Tue Oct 29 09:55:40 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2a9dd8af5ad9783d8ecba6bf93521de64bab6f81
      https://github.com/llvm/llvm-project/commit/2a9dd8af5ad9783d8ecba6bf93521de64bab6f81
  Author: SpencerAbson <Spencer.Abson at arm.com>
  Date:   2024-10-29 (Tue, 29 Oct 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/MC/AArch64/SVE/bfcvt-diagnostics.s
    M llvm/test/MC/AArch64/SVE2/fcvtx-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p2/bfcvt_z-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p2/bfcvt_z.s
    A llvm/test/MC/AArch64/SVE2p2/fcvt_z-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p2/fcvt_z.s
    A llvm/test/MC/AArch64/SVE2p2/fcvtx_z-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p2/fcvtx_z.s

  Log Message:
  -----------
  [AArch64] Add assembly/disassembly for zeroing SVE FCVT{X} and BFCVT (#113916)

This patch adds assembly/disassembly support for the following SVE2.2
instructions

    - FCVT (zeroing)
    - FCVTX (zeroing)
    - BFCVT (zeroing)
    
In accordance with:
https://developer.arm.com/documentation/ddi0602/2024-09/SVE-Instructions



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