[all-commits] [llvm/llvm-project] 98c8d6: [AArch64] Add assembly/dissasembly for BFSCALE ins...

Lukacma via All-commits all-commits at lists.llvm.org
Tue Oct 29 04:08:58 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 98c8d643539194321f3dba8698e95999165b1024
      https://github.com/llvm/llvm-project/commit/98c8d643539194321f3dba8698e95999165b1024
  Author: Lukacma <Marian.Lukac at arm.com>
  Date:   2024-10-29 (Tue, 29 Oct 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SMEInstrInfo.td
    M llvm/lib/Target/AArch64/SMEInstrFormats.td
    A llvm/test/MC/AArch64/SME2/bfscale-diagnostics.s
    A llvm/test/MC/AArch64/SME2/bfscale.s

  Log Message:
  -----------
  [AArch64] Add assembly/dissasembly for BFSCALE instructions (#113538)

This patch adds assembly/disassembly for following instructions:
   BFSCALE (multiple and single vector)
   BFSCALE (multiple vectors)

As specified in https://developer.arm.com/documentation/ddi0602/2024-09

Co-authored-by: Momchil Velikov
[momchil.velikov at arm.com](mailto:momchil.velikov at arm.com)



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