[all-commits] [llvm/llvm-project] 7b3da7: [GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND...

Thorsten Schütt via All-commits all-commits at lists.llvm.org
Sun Oct 27 15:14:29 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7b3da7b3b2b0e2f322dddf1f343571cc7fd09b09
      https://github.com/llvm/llvm-project/commit/7b3da7b3b2b0e2f322dddf1f343571cc7fd09b09
  Author: Thorsten Schütt <schuett at gmail.com>
  Date:   2024-10-27 (Sun, 27 Oct 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
    M llvm/lib/Target/AArch64/AArch64GenRegisterBankInfo.def
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
    A llvm/test/CodeGen/AArch64/GlobalISel/sve-integer.ll

  Log Message:
  -----------
  [GlobalISel][AArch64] Legalize G_ADD, G_SUB, G_AND, G_OR, and G_XOR for SVE (#110561)

Credits: https://github.com/llvm/llvm-project/pull/72976

LLVM ERROR: cannot select: %3:zpr(<vscale x 2 x s64>) = G_MUL %0:fpr,
%1:fpr (in function: xmulnxv2i64)

;; mul
define void @xmulnxv2i64(<vscale x 2 x i64> %a, <vscale x 2 x i64> %b,
ptr %p) {
entry:
  %c = mul <vscale x 2 x i64> %a, %b
  store <vscale x 2 x i64> %c, ptr %p, align 16
   ret void
}

define void @mulnxv4i32(<vscale x 4 x i32> %a, <vscale x 4 x i32> %b,
ptr %p) {
entry:
  %c = mul <vscale x 4 x i32> %a, %b
  store <vscale x 4 x i32> %c, ptr %p, align 16
   ret void
}

define void @mulnxv8i16(<vscale x 8 x i16> %a, <vscale x 8 x i16> %b,
ptr %p) {
entry:
  %c = mul <vscale x 8 x i16> %a, %b
  store <vscale x 8 x i16> %c, ptr %p, align 16
  ret void
}

define void @mulnxv16i8(<vscale x 16 x i8> %a, <vscale x 16 x i8> %b,
ptr %p) {
entry:
  %c = mul <vscale x 16 x i8> %a, %b
  store <vscale x 16 x i8> %c, ptr %p, align 16
  ret void
}



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