[all-commits] [llvm/llvm-project] ed6ddf: [RISCV] Add Smrnmi extension (#111668)

[dong-miao via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ed6ddffb583beb450c4b0e1747ccd14f7e063105
      https://github.com/llvm/llvm-project/commit/ed6ddffb583beb450c4b0e1747ccd14f7e063105
  Author: dong-miao <601183878 at qq.com>
  Date:   2024-10-25 (Fri, 25 Oct 2024)

  Changed paths:
    M clang/test/Driver/print-supported-extensions-riscv.c
    M clang/test/Preprocessor/riscv-target-features.c
    M llvm/docs/RISCVUsage.rst
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/test/CodeGen/RISCV/attributes.ll
    M llvm/test/MC/RISCV/attribute-arch.s
    M llvm/test/MC/RISCV/machine-csr-names.s
    A llvm/test/MC/RISCV/smrnmi-invalid.s
    A llvm/test/MC/RISCV/smrnmi-valid.s
    M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp

  Log Message:
  -----------
  [RISCV] Add Smrnmi extension (#111668)

This commit has completed the Extension for Resumable Non Maskable
Interrupts, adding four CRSs and one Trap-Return instruction.
Specification link:["Smrnmi"
Extension](https://github.com/riscv/riscv-isa-manual/blob/main/src/rnmi.adoc)

---------

Co-authored-by: Sam Elliott <sam at lenary.co.uk>



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