[all-commits] [llvm/llvm-project] cd0373: [AArch64] Allow single-element vector FP converts ...

[Benjamin Maxwell via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: cd0373e029fdca7d6d99677b805e728016574a1f
      https://github.com/llvm/llvm-project/commit/cd0373e029fdca7d6d99677b805e728016574a1f
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2024-10-24 (Thu, 24 Oct 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/sve-streaming-mode-cvt-fp-int-fp.ll

  Log Message:
  -----------
  [AArch64] Allow single-element vector FP converts with +sme2p2 (#112905)

Follow up to #112213 now that the +sme2p2 feature flag has landed. The
single-element vector variants of FCVTZS, FCVTZU, UCVTF, and SCVTF are
allowed in streaming SVE mode with +sme2p2.

Reference:
-
https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/FCVTZS--vector--integer---Floating-point-convert-to-signed-integer--rounding-toward-zero--vector--
-
https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/UCVTF--vector--integer---Unsigned-integer-convert-to-floating-point--vector--
-
https://developer.arm.com/documentation/ddi0602/2024-09/SIMD-FP-Instructions/SCVTF--vector--integer---Signed-integer-convert-to-floating-point--vector--



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