[all-commits] [llvm/llvm-project] 17bfd2: [AArch64] Add assembly/disassembly for multi-vecto...

[SpencerAbson via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 17bfd21391d080afbf2697a0a1a631a1be76a2e4
      https://github.com/llvm/llvm-project/commit/17bfd21391d080afbf2697a0a1a631a1be76a2e4
  Author: SpencerAbson <Spencer.Abson at arm.com>
  Date:   2024-10-24 (Thu, 24 Oct 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64.td
    M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    M llvm/test/MC/AArch64/SME2p1/directive-arch-negative.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/SME2p1/directive-arch_extension.s
    A llvm/test/MC/AArch64/SVE2p1/aesd-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/aesd.s
    A llvm/test/MC/AArch64/SVE2p1/aesdimc-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/aesdimc.s
    A llvm/test/MC/AArch64/SVE2p1/aese-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/aese.s
    A llvm/test/MC/AArch64/SVE2p1/aesemc-diagnostics.s
    A llvm/test/MC/AArch64/SVE2p1/aesemc.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch-negative.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch_extension-negative.s
    M llvm/test/MC/AArch64/SVE2p1/directive-arch_extension.s

  Log Message:
  -----------
  [AArch64] Add assembly/disassembly for multi-vector AES instructions (#113307)

This patch adds assembly/disassembly for the following multi-vector SVE
instructions

      - AESE (two/four registers)
      - AESD (two/four registers)
      - AESDIMC (two/four registers)
      - AESEMC (two/four registers)

- Introduce assembler extension tests for the new Armv9.6 sve-aes2 and
ssve-aes features
- In accordance with:
https://developer.arm.com/documentation/ddi0602/latest/



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