[all-commits] [llvm/llvm-project] a91ebc: [FMV][AArch64] Unify aes with pmull and sve2-aes w...

Alexandros Lamprineas via All-commits all-commits at lists.llvm.org
Wed Oct 23 08:29:16 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a91ebcdd91cae429762bbed39f569a4016fbf2b1
      https://github.com/llvm/llvm-project/commit/a91ebcdd91cae429762bbed39f569a4016fbf2b1
  Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
  Date:   2024-10-23 (Wed, 23 Oct 2024)

  Changed paths:
    M clang/test/CodeGen/aarch64-cpu-supports.c
    M clang/test/CodeGen/aarch64-fmv-dependencies.c
    M clang/test/CodeGen/attr-target-clones-aarch64.c
    M clang/test/CodeGen/attr-target-version.c
    M clang/test/Sema/attr-target-clones-aarch64.c
    M clang/test/Sema/attr-target-version.c
    M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
    M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/apple.inc
    M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/fuchsia.inc
    M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
    M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
    M llvm/lib/Target/AArch64/AArch64FMV.td

  Log Message:
  -----------
  [FMV][AArch64] Unify aes with pmull and sve2-aes with sve2-pmull128. (#111673)

According to the Arm Architecture Reference Manual for A-profile
architecture you can't have one feature without having the other:

ID_AA64ZFR0_EL1.AES, bits [7:4]

> FEAT_SVE_AES implements the functionality identified by the value
0b0001.
> FEAT_SVE_PMULL128 implements the functionality identified by the value
0b0010.
> The permitted values are 0b0000 and 0b0010.

(The following was removed from the latest release of the specification,
but it appears to be a mistake that was not intended to relax the
architecture constraints. The discrepancy has been reported)

ID_AA64ISAR0_EL1.AES, bits [7:4]

> FEAT_AES implements the functionality identified by the value 0b0001.
> FEAT_PMULL implements the functionality identified by the value
0b0010.
> From Armv8, the permitted values are 0b0000 and 0b0010.

Approved in ACLE as https://github.com/ARM-software/acle/pull/352



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