[all-commits] [llvm/llvm-project] 1d0992: [SandboxVec][Scheduler] Boilerplate and initial im...
Florian Mayer via All-commits
all-commits at lists.llvm.org
Tue Oct 22 15:25:03 PDT 2024
Branch: refs/heads/users/fmayer/spr/nfc-mte-add-more-tests-for-globals
Home: https://github.com/llvm/llvm-project
Commit: 1d09925b4a6fd4af0120825132be23be12fb03d6
https://github.com/llvm/llvm-project/commit/1d09925b4a6fd4af0120825132be23be12fb03d6
Author: vporpo <vporpodas at google.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/CMakeLists.txt
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
A llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
Log Message:
-----------
[SandboxVec][Scheduler] Boilerplate and initial implementation. (#112449)
This patch implements a ready-list-based scheduler that operates on
DependencyGraph.
It is used by the sandbox vectorizer to test the legality of vectorizing
a group of instrs.
SchedBundle is a helper container, containing all DGNodes that
correspond to the instructions that we are attempting to schedule with
trySchedule(Instrs).
Commit: f5bd36aece8f6b12422ce30903dd78d1b5006efd
https://github.com/llvm/llvm-project/commit/f5bd36aece8f6b12422ce30903dd78d1b5006efd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/SandboxVectorizer/BUILD.gn
Log Message:
-----------
[gn build] Port 1d09925b4a6f
Commit: 0138adb68fc20c2fd1a368ca3a2e531debed3852
https://github.com/llvm/llvm-project/commit/0138adb68fc20c2fd1a368ca3a2e531debed3852
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M compiler-rt/lib/lsan/lsan_common.cpp
Log Message:
-----------
[nfc][lsan] Rename `ScanExtraStack` and pass `region_type` (#113004)
Commit: 69d3a44eded0b0792c8d69e830579f84b8e81eeb
https://github.com/llvm/llvm-project/commit/69d3a44eded0b0792c8d69e830579f84b8e81eeb
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expxf16.h
A libc/src/math/generic/log10f16.cpp
A libc/src/math/log10f16.h
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/log10f16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/log10f16_test.cpp
Log Message:
-----------
[libc][math][c23] Add log10f16 C23 math function (#106091)
Part of #95250.
Commit: d97f6d1ae90e7c95be17c9cb7821ad94fe4587fe
https://github.com/llvm/llvm-project/commit/d97f6d1ae90e7c95be17c9cb7821ad94fe4587fe
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/spec/stdc.td
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
A libc/src/math/generic/sqrtf16.cpp
A libc/src/math/sqrtf16.h
M libc/test/src/math/CMakeLists.txt
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/sqrtf16_test.cpp
A libc/test/src/math/sqrtf16_test.cpp
Log Message:
-----------
[libc][math][c23] Add sqrtf16 C23 math function (#112406)
Part of #95250.
Commit: 2b7e9d27817da54c34a6f02dc00d2466c31f6fa0
https://github.com/llvm/llvm-project/commit/2b7e9d27817da54c34a6f02dc00d2466c31f6fa0
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
Log Message:
-----------
[lldb] Add missing whitespace in help text
Commit: f7b6dc821ad2aa02e027db76f193b85a87443e0b
https://github.com/llvm/llvm-project/commit/f7b6dc821ad2aa02e027db76f193b85a87443e0b
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/test/Driver/cuda-cross-compiling.c
Log Message:
-----------
[Clang] Fix missing `-` in argument to nvlinker
Commit: 864902e9b4d8bc6d3f0852d5c475e3dc97dd8335
https://github.com/llvm/llvm-project/commit/864902e9b4d8bc6d3f0852d5c475e3dc97dd8335
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
Log Message:
-----------
[flang][cuda] Call CUFGetDeviceAddress to get global device address from host address (#112989)
Commit: 1bc1a79a65a93a0224b5e5f69584219f9981bd23
https://github.com/llvm/llvm-project/commit/1bc1a79a65a93a0224b5e5f69584219f9981bd23
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/inline-asm-zdinx-constraint-r.ll
M llvm/test/CodeGen/RISCV/inline-asm-zfinx-constraint-r.ll
M llvm/test/CodeGen/RISCV/inline-asm-zhinx-constraint-r.ll
Log Message:
-----------
[RISCV] Support inline assembly 'f' constraint for Zfinx. (#112986)
This would allow some inline assembly code to work with either F or Zfinx.
This appears to match gcc behavior.
Commit: 1784aca904718421452445a4d835af3cd3c3c89b
https://github.com/llvm/llvm-project/commit/1784aca904718421452445a4d835af3cd3c3c89b
Author: Peter Collingbourne <peter at pcc.me.uk>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
Log Message:
-----------
gn build: Sync hwasan assembly file source list.
Commit: 561f9155fb8beea15e1824ea966f934477f05fa6
https://github.com/llvm/llvm-project/commit/561f9155fb8beea15e1824ea966f934477f05fa6
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
Log Message:
-----------
[gn build] Port b515d9ea1e43
Commit: b5fa4fee46c1d0046cc395e3338ae13fe6e2cb84
https://github.com/llvm/llvm-project/commit/b5fa4fee46c1d0046cc395e3338ae13fe6e2cb84
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M compiler-rt/lib/lsan/lsan_common.cpp
Log Message:
-----------
[lsan] Fix compilation on Android (#113003)
Commit: 2a6b09e0d3d3c1a05d3d5165202a6e68900974b1
https://github.com/llvm/llvm-project/commit/2a6b09e0d3d3c1a05d3d5165202a6e68900974b1
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
Log Message:
-----------
[LV] Use type from InsertPos for cost computation of interleave groups.
Previously the legacy cost model would pick the type for the cost
computation depending on the order of the members in the input IR.
This is incompatible with the VPlan-based cost model (independent of
original IR order) and also doesn't match code-gen, which uses the type
of the insert position.
Update the legacy cost model to use the type (and address space) from
the Group's insert position.
This brings the legacy cost model in line with the legacy cost model and
fixes a divergence between both models.
Note that the X86 cost model seems to assign different costs to groups
with i64 and double types. Added a TODO to check.
Fixes https://github.com/llvm/llvm-project/issues/112922.
Commit: 0a6def62c2807d213e2b80f23c4a14cb9302f3fd
https://github.com/llvm/llvm-project/commit/0a6def62c2807d213e2b80f23c4a14cb9302f3fd
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M mlir/tools/mlir-tblgen/OpDocGen.cpp
Log Message:
-----------
[mlir][doc] Emit `\n` if description not end with `\n`. (#112898)
This PR addresses a markdown formatting issue by ensuring a `\n` is
emitted if the description string does not already end with one. Fixes
#112672.
Commit: cf4442e6b10280a90982a161b91319ebd1235718
https://github.com/llvm/llvm-project/commit/cf4442e6b10280a90982a161b91319ebd1235718
Author: Job Henandez Lara <jobhdezlara93 at gmail.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M libc/hdr/stdio_overlay.h
M libc/hdr/wchar_overlay.h
Log Message:
-----------
[libc] temporaliy disable __USE_EXTERN_INLINES and set __USE_FORITFY_LEVEL to 1 before including in overlay mode (#113012)
Commit: 85df28180bd38d3fd5356efe6022eebec31e0814
https://github.com/llvm/llvm-project/commit/85df28180bd38d3fd5356efe6022eebec31e0814
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
A clang/test/Format/dry-run-warning.cpp
M clang/tools/clang-format/ClangFormat.cpp
Log Message:
-----------
[clang-format] Fix a bug that always returns error for JSON (#112839)
Fixes #108556.
Commit: 5406834cdaa6d26b98484d634df579606ae02229
https://github.com/llvm/llvm-project/commit/5406834cdaa6d26b98484d634df579606ae02229
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-register-func.fir
M flang/test/Fir/cuf-invalid.fir
Log Message:
-----------
[flang][cuda] Add cuf.register_module operation (#112971)
Add a new operation to register the fatbin and pass it to
`cuf.register_kernel`
Commit: d37bc32a65651e647148236ffb9728ea2e77eac3
https://github.com/llvm/llvm-project/commit/d37bc32a65651e647148236ffb9728ea2e77eac3
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
A flang/include/flang/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.h
M flang/include/flang/Optimizer/Support/InitFIR.h
A flang/include/flang/Runtime/CUDA/registration.h
M flang/lib/Optimizer/Dialect/CUF/CMakeLists.txt
A flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/registration.cpp
Log Message:
-----------
[flang][cuda] Translate cuf.register_kernel and cuf.register_module (#112972)
Add LLVM IR Translation for `cuf.register_module` and
`cuf.register_kernel`. These are lowered to function call to the CUF
runtime entries.
Commit: 3d84b74cb3543428c35fc39e889684497286d482
https://github.com/llvm/llvm-project/commit/3d84b74cb3543428c35fc39e889684497286d482
Author: Augusto Noronha <anoronha at apple.com>
Date: 2024-10-18 (Fri, 18 Oct 2024)
Changed paths:
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/TypeSystem.cpp
Log Message:
-----------
[lldb] Add GetMangledTypeName to TypeSystem/CompilerType (#113006)
Swift types have mangled names, so there should be a way to read those
from the compiler type.
This patch upstreams these two changes from swiftlang/llvm-project
(which were added there since at least 2016).
Commit: d8b17f2fb6129dba99c2ef843e5c38cc4414ae67
https://github.com/llvm/llvm-project/commit/d8b17f2fb6129dba99c2ef843e5c38cc4414ae67
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-shifts-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector-widen-crash.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/load.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AArch64/zext.ll
Log Message:
-----------
[GlobalISel] Combine G_UNMERGE_VALUES with anyext and build vector (#112370)
G_UNMERGE_VALUES (G_ANYEXT (G_BUILD_VECTOR))
ag G_UNMERGE_VALUES llvm/test/CodeGen/AArch64/GlobalISel | grep ANYEXT
[ANYEXT] is build vector or shuffle vector
Prior art:
https://reviews.llvm.org/D87117
https://reviews.llvm.org/D87166
https://reviews.llvm.org/D87174
https://reviews.llvm.org/D87427
; CHECK-NEXT: [[BUILD_VECTOR2:%[0-9]+]]:_(<8 x s8>) = G_BUILD_VECTOR
[[C2]](s8), [[C2]](s8), [[C2]](s8), [[C2]](s8), [[DEF1]](s8),
[[DEF1]](s8), [[DEF1]](s8), [[DEF1]](s8)
; CHECK-NEXT: [[ANYEXT1:%[0-9]+]]:_(<8 x s16>) = G_ANYEXT
[[BUILD_VECTOR2]](<8 x s8>)
; CHECK-NEXT: [[UV10:%[0-9]+]]:_(<4 x s16>), [[UV11:%[0-9]+]]:_(<4 x
s16>) = G_UNMERGE_VALUES
[[ANYEXT1]](<8 x s16>)
Test:
llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
Commit: 5e81437f2ba03ee0ab93b26a9654da9b95dab3b0
https://github.com/llvm/llvm-project/commit/5e81437f2ba03ee0ab93b26a9654da9b95dab3b0
Author: BrnBlrg <BenjaminAaronBlumer at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M clang/docs/analyzer/user-docs/CommandLineUsage.rst
Log Message:
-----------
[analyzer][doc] Fix typo in "translation unit" in analyzer doc CommandLineUsage.rst (#112966)
Commit: faed85b8e4961e853bfb10cd8ed1544e179ade0a
https://github.com/llvm/llvm-project/commit/faed85b8e4961e853bfb10cd8ed1544e179ade0a
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
Log Message:
-----------
[lldb][test][NFC] Document DYLIB_NAME Makefile variable (#112735)
Got caught out by this because simply specifying `DYLIB_CXX_SOURCES`
(without specifying `DYLIB_NAME`) resulted in linker errors because the
dylib was never built (and linked). We should probably make that a
Makefile error (though I haven't audited when exactly not specifying
`DYLIB_NAME` is valid; looked like that can happen when we specify
`FRAMEWORK`).
Commit: aa320600e2b7136f5156dd0c31f98ec0f8d5bce1
https://github.com/llvm/llvm-project/commit/aa320600e2b7136f5156dd0c31f98ec0f8d5bce1
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
Log Message:
-----------
[lldb][ClangASTImporter][NFC] Emit a log message when we break MapImported invariant (#112748)
This patch emits a warning into the expression log when we call
`MapImported` on a decl which has already been imported, but with a new
`to` destination decl. In asserts builds this would lead to triggering
this [ASTImporter::MapImported
assertion](https://github.com/llvm/llvm-project/blob/6d7712a70c163d2ae9e1dc928db31fcb45d9e404/clang/lib/AST/ASTImporter.cpp#L10493-L10494).
In no-asserts builds we will likely crash, in potentially non-obvious
ways. The hope is that the log message will help in diagnosing this type
of issue in the field.
The underlying issue is discussed in more detail in:
https://github.com/llvm/llvm-project/pull/112566.
In a non-asserts build, the last few expression log entries would look
as follows:
```
CompleteTagDecl on (ASTContext*)scratch ASTContext Completing (TagDecl*)0x00000001132d31d0 named Foo
CTD Before:
CXXRecordDecl 0x1132d31d0 <<invalid sloc>> <invalid sloc> <undeserialized declarations> struct Foo
[ClangASTImporter] WARNING: overwriting an already imported decl '0x000000014378fd80' ('Foo') from '0x0000000143790c00' with 0x00000001132d31d0. Likely due to a name conflict when importing 'Foo'.
[ClangASTImporter] Imported (FieldDecl*)0x0000000143790220, named service (from (Decl*)0x0000000143791270), metadata 271
[ClangASTImporter] Decl has no origin information in (ASTContext*)0x00000001132c8c00
FindExternalLexicalDecls on (ASTContext*)0x0000000143c1f600 'scratch ASTContext' in 'Foo' (CXXRecordDecl*)0x000000014378FD80
FELD Original decl (ASTContext*)0x00000001132c8c00 (Decl*)0x0000000143790c00:
CXXRecordDecl 0x143790c00 <<invalid sloc>> <invalid sloc> struct Foo definition
|-DefinitionData pass_in_registers aggregate standard_layout trivially_copyable pod trivial literal
| |-DefaultConstructor exists trivial needs_implicit
| |-CopyConstructor simple trivial has_const_param needs_implicit implicit_has_const_param
| |-MoveConstructor exists simple trivial needs_implicit
| |-CopyAssignment simple trivial has_const_param needs_implicit implicit_has_const_param
| |-MoveAssignment exists simple trivial needs_implicit
| `-Destructor simple irrelevant trivial needs_implicit
|-FieldDecl 0x143791270 <<invalid sloc>> <invalid sloc> service 'Service *'
`-FieldDecl 0x1437912c8 <<invalid sloc>> <invalid sloc> mach_endpoint 'int'
FELD Adding [to CXXRecordDecl Foo] lexical FieldDecl FieldDecl 0x143791270 <<invalid sloc>> <invalid sloc> service 'Service *'
FELD Adding [to CXXRecordDecl Foo] lexical FieldDecl FieldDecl 0x1437912c8 <<invalid sloc>> <invalid sloc> mach_endpoint 'int'
[ClangASTImporter] Imported (FieldDecl*)0x0000000143790278, named mach_endpoint (from (Decl*)0x00000001437912c8), metadata 280
[ClangASTImporter] Decl has no origin information in (ASTContext*)0x00000001132c8c00
```
Note how we start "completing" `Foo`. Then emit our new `WARNING`.
Shortly after, we crash, and the log abruptly ends.
rdar://135551810
Commit: 1bbf3a37056761ec407031431e28f856428566f0
https://github.com/llvm/llvm-project/commit/1bbf3a37056761ec407031431e28f856428566f0
Author: Hui <hui.xie1990 at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M libcxx/include/__iterator/reverse_iterator.h
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/greater-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/greater.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/less-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/less.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/not-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.default.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.iter.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.reverse_iterator.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.conv/base.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/arrow.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/bracket.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/dereference.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/decrement-assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/increment-assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/minus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/plus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/postdecrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/postincrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/predecrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/preincrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/make_reverse_iterator.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/minus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/plus.pass.cpp
Log Message:
-----------
[libc++] Fix `reverse_iterator` when underlying is c++20 `bidirectional_iterator` but not `Cpp17BidirectionalIterator` (#112100)
`reverse_iterator` supports either c++20 `bidirectional_iterator` or
`Cpp17BidirectionalIterator `
http://eel.is/c++draft/reverse.iter.requirements
The current `reverse_iterator` uses `std::prev` in its `operator->`,
which only supports the `Cpp17BidirectionalIterator` properly.
If the underlying iterator is c++20 `bidirectional_iterator` but does
not satisfy the named requirement `Cpp17BidirectionalIterator`,
(examples are `zip_view::iterator`, `flat_map::iterator`), the current
`std::prev` silently compiles but does a no-op and returns the same
iterator back. So `reverse_iterator::operator->` will silently give a
wrong answer.
Even if we fix the behaviour of `std::prev`, at best, we could fail to
compile the code. But this is not ok, because we need to support this
kind of iterators in `reverse_iterator`.
The solution is simply to not use `std::prev`.
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 1775b98de719299b653c12999d49ca04a9f4f65b
https://github.com/llvm/llvm-project/commit/1775b98de719299b653c12999d49ca04a9f4f65b
Author: Finlay <finlay.marno at codeplay.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBarrierOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMiscOps.td
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
A mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir
Log Message:
-----------
[mlir][spirv] Add spirv-to-llvm conversion for OpControlBarrier (#111864)
The conversion is based on the expected llvm function from the
LLVM/SPIRV translation tool.
Commit: 8fe49b0bbef5134c87adc2719165392fca1865c3
https://github.com/llvm/llvm-project/commit/8fe49b0bbef5134c87adc2719165392fca1865c3
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M mlir/docs/Dialects/Linalg/_index.md
Log Message:
-----------
[mlir][docs] Fix name of `mlir-linalg-ods-yaml-gen`(NFC) (#113029)
Commit: 5785cbb40570c3847aa994b2d2b7e03321eee7eb
https://github.com/llvm/llvm-project/commit/5785cbb40570c3847aa994b2d2b7e03321eee7eb
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/ARM/fmuladd-soft-float.ll
A llvm/test/CodeGen/Mips/fmuladd-soft-float.ll
A llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll
A llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
A llvm/test/CodeGen/X86/fmuladd-soft-float.ll
Log Message:
-----------
[llvm] Ensure that soft float targets don't emit `fma()` libcalls. (#106615)
The previous behavior could be harmful in some edge cases, such as
emitting a call to `fma()` in the `fma()` implementation itself.
Do this by just being more accurate in `isFMAFasterThanFMulAndFAdd()`.
This was already done for PowerPC; this commit just extends that to Arm,
z/Arch, and x86. MIPS and SPARC already got it right, but I added tests
for them too, for good measure.
Note: I don't have commit access.
Commit: 5aec88f0e6920b27dbc6cf7b4625088291441210
https://github.com/llvm/llvm-project/commit/5aec88f0e6920b27dbc6cf7b4625088291441210
Author: Nico Weber <thakis at chromium.org>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M compiler-rt/lib/hwasan/CMakeLists.txt
M llvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
Log Message:
-----------
[hwasan], [gn]: Fix formatting of hwasan cmake; re-sync gn file for b515d9ea1e43
Commit: 0f0a96b8621fcc8e1d6b6a3d047c263bb17a7f39
https://github.com/llvm/llvm-project/commit/0f0a96b8621fcc8e1d6b6a3d047c263bb17a7f39
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M clang/test/CodeGenCUDA/bf16.cu
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
M llvm/test/CodeGen/NVPTX/activemask.ll
M llvm/test/CodeGen/NVPTX/addr-mode.ll
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/chain-different-as.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
M llvm/test/CodeGen/NVPTX/copysign.ll
M llvm/test/CodeGen/NVPTX/dot-product.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/elect.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i128-param.ll
M llvm/test/CodeGen/NVPTX/i128-retval.ll
M llvm/test/CodeGen/NVPTX/i128-struct.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/ldparam-v4.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-alloca.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/param-vectorize-device.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure-ptx.ll
M llvm/test/CodeGen/NVPTX/rcp-opt.ll
M llvm/test/CodeGen/NVPTX/rotate.ll
M llvm/test/CodeGen/NVPTX/rotate_64.ll
M llvm/test/CodeGen/NVPTX/sad-intrins.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/tid-range.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/unfold-masked-merge-vector-variablemask.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vec-param-load.ll
M llvm/test/CodeGen/NVPTX/vector-args.ll
M llvm/test/CodeGen/NVPTX/vector-call.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
M llvm/test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
Log Message:
-----------
[llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)
Remove the extraneous '+0' immediate offset part in PTX load/stores, to
improve readability of output PTX code.
Commit: 02bf3b54c02643069ad1a952c19f97cab00a3241
https://github.com/llvm/llvm-project/commit/02bf3b54c02643069ad1a952c19f97cab00a3241
Author: Felix Schneider <fx.schn at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Linalg/roundtrip.mlir
Log Message:
-----------
[mlir][linalg] Add quantized conv2d operator with FCHW,NCHW order (#107740)
This patch adds a quantized version of the `linalg.conv2d_nchw_fchw` Op.
This is the "channel-first" ordering typically used by PyTorch and
others.
Commit: 697a455e6fecf364c1ac4ff9874aefddf2952454
https://github.com/llvm/llvm-project/commit/697a455e6fecf364c1ac4ff9874aefddf2952454
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M lldb/include/lldb/Core/Module.h
M lldb/source/Core/Module.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
A lldb/test/Shell/SymbolFile/DWARF/TestDedupWarnings.test
Log Message:
-----------
More aggressively deduplicate global warnings based on contents. (#112801)
I've been getting complaints from users being spammed by -gmodules
missing file warnings going out of control because each object file
depends on an entire DAG of PCM files that usually are all missing at
once. To reduce this problem, this patch does two things:
1. Module now maintains a DenseMap<hash, once> that is used to display
each warning only once, based on its actual text.
2. The PCM warning itself is reworded to include less details, such as
the DIE offset, which is only useful to LLDB developers, who can get
this from the dwarf log if they need it. Because the detail is omitted
the hashing from (1) deduplicates the warnings.
rdar://138144624
Commit: f87f3ad6ea8bb80cba9ce009079e1b6c7486feac
https://github.com/llvm/llvm-project/commit/f87f3ad6ea8bb80cba9ce009079e1b6c7486feac
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M .github/workflows/containers/github-action-ci/stage1.Dockerfile
Log Message:
-----------
[Github] Bump CI compiler version to 19.1.2 (#113016)
Commit: ef91cd3f018411e0ba7989003d7617041e35f650
https://github.com/llvm/llvm-project/commit/ef91cd3f018411e0ba7989003d7617041e35f650
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.gfx10.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
Log Message:
-----------
AMDGPU: Handle folding frame indexes into add with immediate (#110738)
Commit: 06fce61e03d87fcd6b3c2dfb187cdeeaa0d1e20e
https://github.com/llvm/llvm-project/commit/06fce61e03d87fcd6b3c2dfb187cdeeaa0d1e20e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/X86.td
Log Message:
-----------
[X86] X86.td - whitespace cleanup. NFC.
Commit: 93ec08d62971d51a239fba8468d3cf9cb9e54fb0
https://github.com/llvm/llvm-project/commit/93ec08d62971d51a239fba8468d3cf9cb9e54fb0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[DAG] Move SIGN_EXTEND_INREG constant folding inside FoldConstantArithmetic
Update visitSIGN_EXTEND_INREG to call FoldConstantArithmetic instead of getNode.
Commit: 093d4db2f3c874d4683fb01194b00dbb20e5c713
https://github.com/llvm/llvm-project/commit/093d4db2f3c874d4683fb01194b00dbb20e5c713
Author: Campbell Barton <ideasman42 at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M clang/tools/clang-format/clang-format.el
Log Message:
-----------
Add "clang-format-on-save-mode" minor mode to clang-format.el (#104533)
Add an minor mode which can be optionally used to run clang-format on
save.
Formatting before saving works well and is convenient to avoid having to
remember to manually run clang format.
I've written this as it's own package but it's probably better if the
functionality is supported by clang-format.el.
See: https://github.com/melpa/melpa/pull/8762
Commit: 10f6d01e3d6cd6963bb2ec8729ab4f0aff9fdb5f
https://github.com/llvm/llvm-project/commit/10f6d01e3d6cd6963bb2ec8729ab4f0aff9fdb5f
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/extract-subvec-combine.ll
Log Message:
-----------
[GlobalISel][AArch64] Legalize G_EXTRACT_SUBVECTOR (#112946)
for future combines
Commit: 8819267747c868309d606f58cb616b05217622eb
https://github.com/llvm/llvm-project/commit/8819267747c868309d606f58cb616b05217622eb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Log Message:
-----------
[InstCombine] Simplify code with SmallMapVector::operator[] (NFC) (#113022)
Commit: ca9f396cac0371a398eeef73182987a55a21e4a1
https://github.com/llvm/llvm-project/commit/ca9f396cac0371a398eeef73182987a55a21e4a1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M lldb/source/Core/DataFileCache.cpp
Log Message:
-----------
[lldb] Avoid repeated hash lookups (NFC) (#113024)
Commit: f4136b326514b0732054e17eadc646b45925192d
https://github.com/llvm/llvm-project/commit/f4136b326514b0732054e17eadc646b45925192d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/tools/llvm-diff/lib/DifferenceEngine.cpp
Log Message:
-----------
[llvm-diff] Avoid repeated hash lookups (NFC) (#113025)
Commit: b26df3e463cd1d65adadcd469fcd4b203484e39f
https://github.com/llvm/llvm-project/commit/b26df3e463cd1d65adadcd469fcd4b203484e39f
Author: Martin Storsjö <martin at martin.st>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/combine-sra.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/sat-add.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/vector-trunc-ssat.ll
M llvm/test/CodeGen/X86/vector-trunc-usat.ll
Log Message:
-----------
Revert "[DAG] isConstantIntBuildVectorOrConstantInt - peek through bitcasts (#112710)"
This reverts commit a630771b28f4b252e2754776b8f3ab416133951a.
This caused compilation to hang for Windows/ARM, see
https://github.com/llvm/llvm-project/pull/112710 for details.
Commit: 2eb1699184cf4d5de69f7825f66d7b3c04827f77
https://github.com/llvm/llvm-project/commit/2eb1699184cf4d5de69f7825f66d7b3c04827f77
Author: Tor Shepherd <tor.aksel.shepherd at gmail.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
Log Message:
-----------
[clangd] Add inlay hints for default function arguments (#95712)
The new inlay hints have the `DefaultArguments` kind and can be enabled in config similar to other inlay kint kinds.
Commit: dde26e361f50df4b999ac117222c74f2c100f817
https://github.com/llvm/llvm-project/commit/dde26e361f50df4b999ac117222c74f2c100f817
Author: Xing Xue <xingxue at outlook.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M libunwind/src/UnwindCursor.hpp
Log Message:
-----------
[libunwind][AIX] Call dlclose only when dlsym() fails (#112768)
The personality routine `__xlcxx_personality_v0` in `libc++abi` is
hard-coded in the unwinder as the handler for EH in applications
generated by the legacy IBM C++ compiler. The symbol is resolved
dynamically using `dlopen` to avoid a hard dependency of `libunwind` on
`libc++abi` for cases such as non-C++ applications. However, `dlclose`
was incorrectly called after `dlsym` succeeded, potentially invalidating
the function pointer obtained from `dlsym` when the memory allocated for
the `dlopen` is reclaimed. This PR changes to call `dlclose` only when
`dlsym` fails.
Commit: cd938bf3279b6d2f1c0a8c82b6371a384d744378
https://github.com/llvm/llvm-project/commit/cd938bf3279b6d2f1c0a8c82b6371a384d744378
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M lldb/include/lldb/Target/Language.h
M lldb/source/Target/ThreadPlanStepOverRange.cpp
Log Message:
-----------
[lldb] Introduce Language::AreEquivalentFunctions (#112720)
This allows languages to provide an opinion on whether two symbol
contexts are equivalent (i.e. belong to the same function).
It is useful to drive the comparisons done by stepping plans that need
to ensure symbol contexts obtained from different points in time are
actually the same.
Commit: 2deb3a26fa47a4640962489e5473726d7a8bf12b
https://github.com/llvm/llvm-project/commit/2deb3a26fa47a4640962489e5473726d7a8bf12b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Fixup IV users only once during epilogue vectorization. (NFC)
Induction users only need to be updated when vectorizing the epilogue.
Avoid running fixupIVUsers when vectorizing the main loop during
epilogue vectorization.
Commit: fe8af49a1bf73055941d7aba5d1d2f8e894e8022
https://github.com/llvm/llvm-project/commit/fe8af49a1bf73055941d7aba5d1d2f8e894e8022
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Pass Ctx & to Defined & CommonSymbol
Commit: cba5c77a715cfa5892c69b6c646556825932575b
https://github.com/llvm/llvm-project/commit/cba5c77a715cfa5892c69b6c646556825932575b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[VPlan] Mark unreachable code path when retrieving the scalar PH. (NFCI)
Commit: 1336e3d0b9a361fbbe2d97f225ef6757d20df51a
https://github.com/llvm/llvm-project/commit/1336e3d0b9a361fbbe2d97f225ef6757d20df51a
Author: c8ef <c8ef at outlook.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
A llvm/test/Transforms/InstCombine/ilogb.ll
Log Message:
-----------
[ConstantFold] Fold `ilogb` and `ilogbf` when the input parameter is a constant value. (#113014)
This patch adds support for constant folding for the `ilogb` and
`ilogbf` libc functions.
Commit: 4a011ac84fa16f7eed34c309bdac5591d9553da7
https://github.com/llvm/llvm-project/commit/4a011ac84fa16f7eed34c309bdac5591d9553da7
Author: NAKAMURA Takumi <geek4civic at gmail.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/test/CoverageMapping/branch-constfolded.cpp
M clang/test/CoverageMapping/if.cpp
M clang/test/CoverageMapping/macro-expansion.c
M clang/test/CoverageMapping/mcdc-scratch-space.c
M clang/test/CoverageMapping/mcdc-system-headers.cpp
M clang/test/CoverageMapping/switch.cpp
M clang/test/CoverageMapping/switchmacro.c
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/test/tools/llvm-cov/branch-c-general.test
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
M llvm/tools/llvm-cov/CoverageExporterLcov.cpp
M llvm/tools/llvm-cov/CoverageSummaryInfo.cpp
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-cov/SourceCoverageViewText.cpp
Log Message:
-----------
[Coverage] Introduce "partial fold" on BranchRegion (#112694)
Currently both True/False counts were folded. It lost the information,
"It is True or False before folding." It prevented recalling branch
counts in merging template instantiations.
In `llvm-cov`, a folded branch is shown as:
- `[True: n, Folded]`
- `[Folded, False n]`
In the case If `n` is zero, a branch is reported as "uncovered". This is
distinguished from "folded" branch. When folded branches are merged,
`Folded` may be dissolved.
In the coverage map, either `Counter` is `Zero`. Currently both were
`Zero`.
Since "partial fold" has been introduced, either case in `switch` is
omitted as `Folded`.
Each `case:` in `switch` is reported as `[True: n, Folded]`, since
`False` count doesn't show meaningful value.
When `switch` doesn't have `default:`, `switch (Cond)` is reported as
`[Folded, False: n]`, since `True` count was just the sum of `case`(s).
`switch` with `default` can be considered as "the statement that doesn't
have any `False`(s)".
Commit: 861bd36bce3c3e1384b87b0366cf83e2c022c325
https://github.com/llvm/llvm-project/commit/861bd36bce3c3e1384b87b0366cf83e2c022c325
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/MapFile.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Pass Ctx & to Symbol::getVA
Commit: 5d928ffce22d976b6594496f14351e00c2e4dd78
https://github.com/llvm/llvm-project/commit/5d928ffce22d976b6594496f14351e00c2e4dd78
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M lld/ELF/OutputSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Remove error-prone RelocationBaseSection::classof
Commit: e6625a2c106f6af468a98323b08c7ce3cf273485
https://github.com/llvm/llvm-project/commit/e6625a2c106f6af468a98323b08c7ce3cf273485
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-19 (Sat, 19 Oct 2024)
Changed paths:
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/MapFile.cpp
M lld/ELF/Symbols.cpp
Log Message:
-----------
[ELF] Pass Ctx &
Commit: 11dad2fa5138a50d60a5a34a2c7e074b976820e2
https://github.com/llvm/llvm-project/commit/11dad2fa5138a50d60a5a34a2c7e074b976820e2
Author: Pranav Bhandarkar <pranav.bhandarkar at amd.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-allocatable.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
A flang/test/Transforms/omp-maps-for-privatized-symbols.fir
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
Log Message:
-----------
[flang][OpenMP] - Add `MapInfoOp` instances for target private variables when needed (#109862)
This PR adds an OpenMP dialect related pass for FIR/HLFIR which creates
`MapInfoOp` instances for certain privatized symbols. For example, if an
allocatable variable is used in a private clause attached to a
`omp.target` op, then the allocatable variable's descriptor will be
needed on the device (e.g. GPU). This descriptor needs to be separately
mapped onto the device. This pass creates the necessary `omp.map.info`
ops for this.
Commit: e6c01432b6fb6077e1bdf2e0abf05d2c2dd3fd3e
https://github.com/llvm/llvm-project/commit/e6c01432b6fb6077e1bdf2e0abf05d2c2dd3fd3e
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M libc/newhdrgen/yaml/math.yaml
Log Message:
-----------
[libc][math][c23] Update newhdrgen for new _Float16 math functions (#113005)
Commit: ba1255def64a9c3c68d97ace051eec76f546eeb0
https://github.com/llvm/llvm-project/commit/ba1255def64a9c3c68d97ace051eec76f546eeb0
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAG] Use FoldConstantArithmetic to constant fold (and (ext (and V, c1)), c2) -> (and (ext V), (and c1, (ext c2)))
Noticed while triaging the regression from #112710 noticed by @mstorsjo - don't rely on isConstantIntBuildVectorOrConstantInt+getNode to guarantee constant folding (if it fails to constant fold it will infinite loop), use FoldConstantArithmetic instead.
Commit: 94cddcfc1ca21958add4355653872e8eea2557b7
https://github.com/llvm/llvm-project/commit/94cddcfc1ca21958add4355653872e8eea2557b7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
A llvm/test/CodeGen/ARM/pr112710.ll
Log Message:
-----------
[ARM] Add reduced regression test for infinite-loop due to #112710
Commit: f0b3b6d15b2c0ee2cff2dd31dc075adb5d9a4ff7
https://github.com/llvm/llvm-project/commit/f0b3b6d15b2c0ee2cff2dd31dc075adb5d9a4ff7
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/avx2-arith.ll
M llvm/test/CodeGen/X86/combine-sra.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-256.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/pmul.ll
M llvm/test/CodeGen/X86/prefer-avx256-wide-mul.ll
M llvm/test/CodeGen/X86/psubus.ll
M llvm/test/CodeGen/X86/sat-add.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining-sse41.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/vector-trunc-ssat.ll
M llvm/test/CodeGen/X86/vector-trunc-usat.ll
Log Message:
-----------
[DAG] isConstantIntBuildVectorOrConstantInt - peek through bitcasts (#112710) (REAPPLIED)
Alter both isConstantIntBuildVectorOrConstantInt + isConstantFPBuildVectorOrConstantFP to return a bool instead of the underlying SDNode, and adjust usage to account for this.
Update isConstantIntBuildVectorOrConstantInt to peek though bitcasts when attempting to find a constant, in particular this improves canonicalization of constants to the RHS on commutable instructions.
X86 is the beneficiary here as it often bitcasts rematerializable 0/-1 vector constants as vXi32 and bitcasts to the requested type
Minor cleanup that helps with #107423
Reapplied after regression fix ba1255def64a9c3c68d97ace051eec76f546eeb0
Commit: aa7f377c965ca79cf3022ddafe6cbd419bd52db5
https://github.com/llvm/llvm-project/commit/aa7f377c965ca79cf3022ddafe6cbd419bd52db5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/clocale
M libcxx/include/cstdint
R libcxx/include/locale.h
M libcxx/include/module.modulemap
R libcxx/include/stdint.h
M libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
M libcxx/utils/libcxx/header_information.py
Log Message:
-----------
[libc++] Remove libc++'s own stdint.h and locale.h (#107436)
These headers are not doing anything beyond the system or compiler
provided equivalent headers, so there's no real reason to keep them
around. Reducing the number of C headers we provide in libc++ simplifies
our header layering and reduces the potential for confusion when headers
are layered incorrectly.
Commit: 5a47d48034dd3473eafd621b6f81647dd449f8e3
https://github.com/llvm/llvm-project/commit/5a47d48034dd3473eafd621b6f81647dd449f8e3
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port aa7f377c965c
Commit: 490b7d12f6bef2c399fca83e6a6dde31be021913
https://github.com/llvm/llvm-project/commit/490b7d12f6bef2c399fca83e6a6dde31be021913
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M clang/include/clang/AST/ExprCXX.h
M clang/lib/AST/ExprCXX.cpp
Log Message:
-----------
[clang][NFC] Pass const ASTContext& to CXXTypeidExpr API (#113083)
Commit: 2ce10f0491142863d3f21cd0adb312ab2cfed107
https://github.com/llvm/llvm-project/commit/2ce10f0491142863d3f21cd0adb312ab2cfed107
Author: Job Henandez Lara <jobhdezlara93 at gmail.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M libc/src/string/CMakeLists.txt
M libc/src/string/strcat.h
M libc/src/string/strcpy.h
M libc/src/string/strdup.h
M libc/src/string/strlcat.h
M libc/src/string/strlcpy.h
M libc/src/string/strlen.h
M libc/src/string/strncat.h
M libc/src/string/strndup.h
Log Message:
-----------
[libc] Remove the <string.h> header in libc/src and libc/test (#113076)
Commit: f13d3f72118b83e326169592e8f3c5962fd0eb29
https://github.com/llvm/llvm-project/commit/f13d3f72118b83e326169592e8f3c5962fd0eb29
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
Log Message:
-----------
[Tooling] Simplify code with StringMap::operator[] (NFC) (#113071)
Commit: 6ec113d4c35db934ec8fdb3d226d2d8e525a1f84
https://github.com/llvm/llvm-project/commit/6ec113d4c35db934ec8fdb3d226d2d8e525a1f84
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[Local] Avoid repeated map lookups (NFC) (#113072)
Commit: 8673d0e0673dd1a5e6f7a5df7509c45e33582987
https://github.com/llvm/llvm-project/commit/8673d0e0673dd1a5e6f7a5df7509c45e33582987
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M lldb/source/Interpreter/Options.cpp
Log Message:
-----------
[lldb] Avoid repeated map lookups (NFC) (#113073)
Commit: 5405ba50de6753e3969f4e6c690f53f2abb29b2f
https://github.com/llvm/llvm-project/commit/5405ba50de6753e3969f4e6c690f53f2abb29b2f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode] Check ia32_{pext,pdep} builtins for integer args (#113091)
Commit: b9cb9b3f0d1e891b385eb53f8414b29554fd9234
https://github.com/llvm/llvm-project/commit/b9cb9b3f0d1e891b385eb53f8414b29554fd9234
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/GVNSink.cpp
Log Message:
-----------
[GVNSink] Avoid repeated hash lookups (NFC) (#113023)
Commit: 3bddf85e5274b302915f77cec3e1ac60c9309ebd
https://github.com/llvm/llvm-project/commit/3bddf85e5274b302915f77cec3e1ac60c9309ebd
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/tools/sancov/sancov.cpp
Log Message:
-----------
[sancov] Avoid repeated map lookups (NFC) (#113026)
Commit: 2077fb80ffb58cd1060ec6a5475399c6ad297df3
https://github.com/llvm/llvm-project/commit/2077fb80ffb58cd1060ec6a5475399c6ad297df3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
Log Message:
-----------
[mlir] Avoid repeated map lookups (NFC) (#113074)
Commit: d1401822e2d2753bed3ac597a42cc0b261de40a4
https://github.com/llvm/llvm-project/commit/d1401822e2d2753bed3ac597a42cc0b261de40a4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/lib/Support/VirtualFileSystem.cpp
Log Message:
-----------
[Support] Use a hetrogenous lookup with std::map (NFC) (#113075)
Commit: c2717a89b8437d041d532c7b2c535ca4f4b35872
https://github.com/llvm/llvm-project/commit/c2717a89b8437d041d532c7b2c535ca4f4b35872
Author: Martin Storsjö <martin at martin.st>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Windows/delay_dbghelp.cpp
Log Message:
-----------
[compiler-rt] [test] Remove an unintended grep parameter
This parameter seems unintentional here; we're trying to grep
the input on stdin, from the earlier stage in the pipeline.
Since a recent update on Github Actions runners, the previous
form (grepping a file, while piping in data on stdin) would fail
running the test, with the test runner Python script throwing
an exception when evaluating it:
File "D:\a\llvm-mingw\llvm-mingw\llvm-project\llvm\utils\lit\lit\TestRunner.py", line 935, in _executeShCmd
out = procs[i].stdout.read()
^^^^^^^^^^^^^^^^^^^^^^
File "C:\hostedtoolcache\windows\Python\3.12.7\x64\Lib\encodings\cp1252.py", line 23, in decode
return codecs.charmap_decode(input,self.errors,decoding_table)[0]
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
TypeError: a bytes-like object is required, not 'NoneType'
Commit: 20bda93e438c63fb68a8130b7f88090c558e99b7
https://github.com/llvm/llvm-project/commit/20bda93e438c63fb68a8130b7f88090c558e99b7
Author: Fawdlstty <fawdlstty at users.noreply.github.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add basic support for scalbnxx (#112936)
This patch adds basic support for `scalbln, scalblnf, scalblnl, scalbn,
scalbnf, scalbnl`. Constant folding support will be submitted in a
subsequent patch.
Related issue: <#112631>
Commit: 173907b5d77115623f160978a95159e36e05ee6c
https://github.com/llvm/llvm-project/commit/173907b5d77115623f160978a95159e36e05ee6c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-20 (Sun, 20 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Move logic to check if op is invariant to legacy cost model. (NFC)
This allows the function to be re-used in other places
Commit: d80b9cf713fd1698641c5b265de6b66618991476
https://github.com/llvm/llvm-project/commit/d80b9cf713fd1698641c5b265de6b66618991476
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/include/clang/ASTMatchers/ASTMatchersMacros.h
Log Message:
-----------
[Clang][ASTMatchers] Add visibility macros to variables declared by macros (#110206)
This will fix missing symbols for ASTMatchersTests on windows when
building with CLANG_LINK_CLANG and explicit visibility macros are used.
This PR depends on macros that will be be added in #108276
This is part of the work to enable LLVM_BUILD_LLVM_DYLIB and LLVM\Clang
plugins on window.
Commit: df8b785838a2db01b4d056e603f7317209accefb
https://github.com/llvm/llvm-project/commit/df8b785838a2db01b4d056e603f7317209accefb
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/cxx98.cpp
Log Message:
-----------
[clang][bytecode] Narrow pointer in UO_Deref unary operators (#113089)
Otherwise we treat this like an array element even though we should
treat it as a single object.
Commit: 615a5eb02c91ef78f59461f842873617dd187450
https://github.com/llvm/llvm-project/commit/615a5eb02c91ef78f59461f842873617dd187450
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode] Check ai32_bextr builtins for integer args (#113128)
Commit: 9b49392d6edcdfcc59304350ebd4196be5180d4a
https://github.com/llvm/llvm-project/commit/9b49392d6edcdfcc59304350ebd4196be5180d4a
Author: Thirumalai Shaktivel <74826228+Thirumalai-Shaktivel at users.noreply.github.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/OpenMP/atomic06-empty.f90
A flang/test/Semantics/OpenMP/declare-simd-empty.f90
A flang/test/Semantics/OpenMP/threadprivate08-empty.f90
Log Message:
-----------
[Flang] Handle the source (scopes) for some OpenMP constructs (#109097)
Fixes: https://github.com/llvm/llvm-project/issues/82943
Fixes: https://github.com/llvm/llvm-project/issues/82942
Fixes: https://github.com/llvm/llvm-project/issues/85593
Commit: 3c5cea650dcef5e5aae8f4090f5b7f410b31fca2
https://github.com/llvm/llvm-project/commit/3c5cea650dcef5e5aae8f4090f5b7f410b31fca2
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
Log Message:
-----------
[AMDGPU]: Add implicit-def to the BB prolog (#112872)
IMPLICIT_DEF inserted for a wwm-register at the
very first block or the predecessor block where
it is used for sgpr spilling can appear at a block
begin that requires spill-insertion during per-lane
VGPR regalloc phase. The presence of the IMPLICIT_DEF
currently breaks the BB prolog.
Fixes: SWDEV-490717
Commit: 923b8eea644a4d1fed0f3e20677514cf3f4e0fcc
https://github.com/llvm/llvm-project/commit/923b8eea644a4d1fed0f3e20677514cf3f4e0fcc
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/complex.cpp
Log Message:
-----------
[clang][bytecode] Allow ArrayElemPtr ops on null pointers (#113132)
This regresses one of the _Complex test cases a bit, but since the
diagnostic output wasn't very good here in the first place, let's ignore
it.
Commit: d582442becf1507a243614ee7348ccbb51eade28
https://github.com/llvm/llvm-project/commit/d582442becf1507a243614ee7348ccbb51eade28
Author: Ronan Keryell <ronan.keryell at amd.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/docs/CommandGuide/llvm-cxxfilt.rst
A llvm/test/tools/llvm-cxxfilt/quote.test
M llvm/tools/llvm-cxxfilt/Opts.td
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
Log Message:
-----------
[llvm-cxxfilt] Add --quote option to quote demangled function names (#111871)
This is useful when looking at LLVM/MLIR assembly produced from C++
sources. For example
cir.call @_ZN3aie4tileILi1ELi4EE7programIZ4mainE3$_0EEvOT_(%2, %7) :
will be translated to
cir.call @"void aie::tile<1, 4>::program<main::$_0>(main::$_0&&)"(%2,
%7) : which can be parsed as valid MLIR by the right mlir-lsp-server.
If a symbol is already quoted, do not quote it more.
---------
Co-authored-by: James Henderson <jh7370 at my.bristol.ac.uk>
Commit: ba5676cf91f91bbddfacae06c036cf79af0f2088
https://github.com/llvm/llvm-project/commit/ba5676cf91f91bbddfacae06c036cf79af0f2088
Author: tangaac <tangyan01 at loongson.cn>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-minmax.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
Log Message:
-----------
[LoongArch] Minor refinement to monotonic atomic semantics. (#112681)
Don't use "_db" version AM instructions for LoongArch atomic memory
operations with monotonic semantics.
Commit: c77e836123d056d98051ee980003593706f9284d
https://github.com/llvm/llvm-project/commit/c77e836123d056d98051ee980003593706f9284d
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/test/CodeGen/attr-target-clones-riscv.c
M clang/test/CodeGen/attr-target-version-riscv.c
M clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version-riscv.cpp
M clang/test/SemaCXX/attr-target-clones-riscv.cpp
M clang/test/SemaCXX/attr-target-version-riscv.cpp
Log Message:
-----------
[RISCV][FMV] Remove support for negative priority (#112161)
Ensure that target_version and target_clones do not accept negative
numbers for the priority feature.
Base on discussion on
https://github.com/riscv-non-isa/riscv-c-api-doc/pull/85.
Commit: 6360652e9f5b5975d71c619abd981f102eeccec8
https://github.com/llvm/llvm-project/commit/6360652e9f5b5975d71c619abd981f102eeccec8
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
Log Message:
-----------
Reland [AMDGPU] Serialize WWM_REG vreg flag (#110229) (#112492)
A reland but not an exact copy as `VRegInfo.Flags` from the parser is
now an int8 instead of a vector; so only need to copy over the value.
Commit: 911a6f2fcc719c46b5b392823473ba0bb5b1f4e1
https://github.com/llvm/llvm-project/commit/911a6f2fcc719c46b5b392823473ba0bb5b1f4e1
Author: Liu An <liuan at loongson.cn>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
A lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
A lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
A lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.out
Log Message:
-----------
[lldb][LoongArch64] Add support for LoongArch64 in elf-core for lldb (#112296)
When using the lldb command 'target create --core' on the LoongArch64
architecture, this part of the code is required.
Commit: a705838394c367280f709d628f807bfdf33f9a4a
https://github.com/llvm/llvm-project/commit/a705838394c367280f709d628f807bfdf33f9a4a
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/elf-core/BUILD.gn
Log Message:
-----------
[gn build] Port 911a6f2fcc71
Commit: 4f06f79c03f8392f63f4430fcfcaefa763cf5c93
https://github.com/llvm/llvm-project/commit/4f06f79c03f8392f63f4430fcfcaefa763cf5c93
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/utils/lit/lit/reports.py
Log Message:
-----------
[llvm][llvm-lit] Handle testsuite elapsed time being None
The time for all testsuites will always exist because lit
measures it itself. For a given testsuite, I guess that it
can be None if for example the suite is empty.
Commit: 8507dbaec3f644b8a0c6291f097800d82a4f4b16
https://github.com/llvm/llvm-project/commit/8507dbaec3f644b8a0c6291f097800d82a4f4b16
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/reports.py
A llvm/utils/lit/tests/unique-output-file.py
Log Message:
-----------
[llvm][llvm-lit] Add option to create unique result file names if results already exist (#112729)
When running a build like:
```
ninja check-clang check-llvm
```
Prior to my changes you ended up with one results file, in this specific case Junit XML:
```
results.xml
```
This would only include the last set of tests lit ran, which were for
llvm. To get around this, many CI systems will run one check target,
move the file away, then run another, somehow propgating the return code
as well.
```
rectode=0
for target in targets:
ninja target
retcode=$?
mv results.xml results-${target}.xml
<report the overall return code>
```
I want to use something like this Buildkite reporting plugin in CI, which needs to have all the results available:
https://buildkite.com/docs/agent/v3/cli-annotate#using-annotations-to-report-test-results
Modifying CI's build scripts for Windows and Linux is a lot of work. So
my changes instead make lit detect an existing result file and modify
the file name to find a new file to write to. Now you will get:
```
results.xml results.<tempfile generated value>.xml
```
This will work for all result file types since I'm doing it in the base
Report class. Now you've got separate files, it's easy to collect them
with `<path>/*.xml`.
Note that the `<tempfile generated value>` is not ordered.
Commit: f1ba8943c88ba2b53aaad407933dbb4b48b029d3
https://github.com/llvm/llvm-project/commit/f1ba8943c88ba2b53aaad407933dbb4b48b029d3
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Symbols.cpp
M lld/COFF/Symbols.h
A lld/test/COFF/weak-antidep-chain.test
A lld/test/COFF/weak-antidep.test
Log Message:
-----------
[LLD][COFF] Support anti-dependency symbols (#112542)
Co-authored-by: Billy Laws <blaws05 at gmail.com>
Anti-dependency symbols are allowed to be duplicated, with the first
definition taking precedence. If a regular weak alias is present, it is
preferred over an anti-dependency definition. Chaining anti-dependencies
is not allowed.
Commit: 159f25301763215ffc49c3c3aa6cb8095a990b41
https://github.com/llvm/llvm-project/commit/159f25301763215ffc49c3c3aa6cb8095a990b41
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
A clang/test/AST/ByteCode/openmp.cpp
Log Message:
-----------
[clang][bytecode] Diagnose invalid declrefs differently if we've... (#113140)
... tried their initializer already. In that case, diagnose the
non-const initializer instead of the reference to a non-constexpr
variable later. This is used in a lot of openmp tests.
Commit: 95b4128c6a87e9b894aa75524e63be147cca790b
https://github.com/llvm/llvm-project/commit/95b4128c6a87e9b894aa75524e63be147cca790b
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M flang/include/flang/Optimizer/Support/InternalNames.h
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Integration/debug-extra-global-2.f90
A flang/test/Integration/debug-extra-global.f90
A flang/test/Transforms/debug-extra-global.fir
Log Message:
-----------
[flang][debug] Don't generate debug for compiler-generated variables (#112423)
Flang generates many globals to handle derived types. There was a check
in debug info to filter them based on the information that their names
start with a period. This changed since PR#104859 where 'X' is being
used instead of '.'.
This PR fixes this issue by also adding 'X' in that list. As user
variables gets lower cased by the NameUniquer, there is no risk that
those will be filtered out. I added a test for that to be sure.
Commit: d906ac52ab8ee46090a6696f4ffb34c40ee6abb7
https://github.com/llvm/llvm-project/commit/d906ac52ab8ee46090a6696f4ffb34c40ee6abb7
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AVR.h
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/mdouble.c
A clang/test/Sema/avr-size-align.c
M clang/test/Sema/unbounded-array-bounds.c
Log Message:
-----------
[clang][AVR] Fix basic type size/alignment values to match avr-gcc. (#111290)
Closes #102172
Commit: a18dd29077c84fc076a4ed431d9e815a3d0b6f24
https://github.com/llvm/llvm-project/commit/a18dd29077c84fc076a4ed431d9e815a3d0b6f24
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
Log Message:
-----------
[ConstantFolding] Set signed/implicitTrunc when handling GEP offsets
GEP offsets have sext_or_trunc semantics. We were already doing
this for the outer-most GEP, but not for the inner ones.
I believe one of the sanitizer buildbot failures was due to this,
but I did not manage to reproduce the issue or come up with a
test case. Usually the problematic case will already be folded
away due to index type canonicalization.
Commit: 25b58c877c851bed9c34362cd69bcd8d8bb65ac4
https://github.com/llvm/llvm-project/commit/25b58c877c851bed9c34362cd69bcd8d8bb65ac4
Author: Krasimir Georgiev <krasimir at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
bazelbuild: fix for commit 2ce10 (#113142)
bazelbuild: fix for
https://github.com/llvm/llvm-project/commit/2ce10f0491142863d3f21cd0adb312ab2cfed107.
No functional changes intended.
Commit: df02bcc81d5099d60c2ec037edf8eaeb66456319
https://github.com/llvm/llvm-project/commit/df02bcc81d5099d60c2ec037edf8eaeb66456319
Author: Krasimir Georgiev <krasimir at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
bazelbuild: fix for commit d80b9cf713fd (#113153)
Fix for
https://github.com/llvm/llvm-project/commit/d80b9cf713fd1698641c5b265de6b66618991476.
No functional changes intended.
Commit: c47df3e8c8f47bab8a8302757c50710e0e1c43fb
https://github.com/llvm/llvm-project/commit/c47df3e8c8f47bab8a8302757c50710e0e1c43fb
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lldb/test/Shell/Recognizer/Inputs/verbose_trap-in-stl.cpp
Log Message:
-----------
[lldb][test] Make vector operator[] return T& to workaround Arm codegen issue
Since https://github.com/llvm/llvm-project/pull/109628 landed, this test
has been failing on 32-bit Arm.
This is due to a codegen problem (whether added or uncovered by the change,
not known) where the trap instruction is placed after the frame pointer
and link register are restored.
https://github.com/llvm/llvm-project/issues/113154
So the code was:
```
std::__1::vector<int>::operator[](unsigned int):
sub sp, sp, #8
str r0, [sp, #4]
str r1, [sp]
add sp, sp, #8
.inst 0xe7ffdefe
bx lr
```
When lldb saw the trap, the PC was inside operator[] but the frame
information actually pointed to g.
This bug only happens for leaf functions so adding a return type
works around it:
```
std::__1::vector<int>::operator[](unsigned int):
push {r11, lr}
mov r11, sp
sub sp, sp, #8
str r0, [sp, #4]
str r1, [sp]
mov sp, r11
pop {r11, lr}
.inst 0xe7ffdefe
bx lr
```
(and operator[] should return T& anyway)
Now the PC location and frame information should match and the
test passes.
Commit: 46dc91e7d9a1b6dd0144e628519d06954b7b4e53
https://github.com/llvm/llvm-project/commit/46dc91e7d9a1b6dd0144e628519d06954b7b4e53
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/FileSystemStatCache.h
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/FileSystemStatCache.cpp
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Serialization/ASTReader.cpp
A clang/test/Preprocessor/embed_zos.c
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/lib/Support/VirtualFileSystem.cpp
Log Message:
-----------
[SystemZ][z/OS] Add new openFileForReadBinary function, and pass IsText parameter to getBufferForFile (#111723)
This patch adds an IsText parameter to the following getBufferForFile,
getBufferForFileImpl. We introduce a new virtual function
openFileForReadBinary which defaults to openFileForRead except in
RealFileSystem which uses the OF_None flag instead of OF_Text.
The default is set to OF_Text instead of OF_None, this change in value
does not affect any other platforms other than z/OS. Setting this
parameter correctly is required to open files on z/OS in the correct
encoding. The IsText parameter is based on the context of where we open
files, for example, in the ASTReader, HeaderMap requires that files
always be opened in binary even though they might be tagged as text.
Commit: 17ac10c28f0a3c078a82595787da7d855e581bf1
https://github.com/llvm/llvm-project/commit/17ac10c28f0a3c078a82595787da7d855e581bf1
Author: David Green <david.green at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
Log Message:
-----------
Revert "[SLP]Initial non-power-of-2 support (but still whole register) for reductions"
This reverts commit 7f2e937469a8cec3fe977bf41ad2dfb9b4ce648a as it causes
regressions in the tests it modifies, and undoes what was added in #100653
(which itself was a fix for a previous regression).
Commit: 22e21bc1e796406c89e4a24fd81a1623ab2d7d85
https://github.com/llvm/llvm-project/commit/22e21bc1e796406c89e4a24fd81a1623ab2d7d85
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/utils/lit/lit/cl_arguments.py
Log Message:
-----------
[llvm][llvm-lit] Correct description of --use-unique-output-file-name
The initial version of this feature would use the output file name
if it could, but in switching to temp files I forgot to replicate that
behaviour.
What happens now is we always use a tempfile name and the output
path is a template for that. I think the current behaviour
still makes sense so I'm just correcting the documentation.
Commit: 6bac41496eb24c80aa659008d08220355a617c49
https://github.com/llvm/llvm-project/commit/6bac41496eb24c80aa659008d08220355a617c49
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-insert-subvector.mir
Log Message:
-----------
[RISCV][GISEL] Legalize G_INSERT_SUBVECTOR (#108859)
This code is heavily based on the SelectionDAG lowerINSERT_SUBVECTOR
code.
Commit: 08330dba923c6293b71c85a9f27153c630adc968
https://github.com/llvm/llvm-project/commit/08330dba923c6293b71c85a9f27153c630adc968
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/utils/lit/lit/cl_arguments.py
Log Message:
-----------
[llvm][llvm-lit] Fix missing word in --use-unique-output-file-name help
Fixes 22e21bc1e796406c89e4a24fd81a1623ab2d7d85.
Commit: e26d9070d3eaee587b3ef0da6d12200a5b994765
https://github.com/llvm/llvm-project/commit/e26d9070d3eaee587b3ef0da6d12200a5b994765
Author: Nathan Gauër <brioche at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/Transforms/Utils.h
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
Log Message:
-----------
[Reg2Mem] Add legacy pass wrapping Reg2Mem (#111024)
The SPIR-V backend will need to use Reg2Mem, hence this pass needs to be
wrapped to be used with the legacy pass manager.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 89d8449a2900123c2e9bd7a11315381b2b70c155
https://github.com/llvm/llvm-project/commit/89d8449a2900123c2e9bd7a11315381b2b70c155
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
Log Message:
-----------
[ORC] Fix LLJIT's __cxa_atexit declaration for clang-repl. (#113141)
Add sign extension on i32 return value.
Commit: ecfeacd152f07cf8aea210f63415e3e48b05ab22
https://github.com/llvm/llvm-project/commit/ecfeacd152f07cf8aea210f63415e3e48b05ab22
Author: David Green <david.green at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
Log Message:
-----------
[AArch64] Convert aarch64_neon_sqxtn to ISD::TRUNCATE_SSAT_S and replace tablegen patterns
This lowers the aarch64_neon_sqxtn intrinsics to the new TRUNCATE_SSAT_S ISD
nodes, performing the same for sqxtun and uqxtn. This allows us to clean up the
tablegen patterns a little and in a future commit add combines for sqxtn.
Commit: c44860c8d2582abd88794267b4fa0fa953bbef80
https://github.com/llvm/llvm-project/commit/c44860c8d2582abd88794267b4fa0fa953bbef80
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
Log Message:
-----------
[Flang][OpenMP] Disable lowering of omp.simd reductions in composites (#112686)
Currently, the `omp.simd` operation is ignored during MLIR to LLVM IR
translation when it takes part in a composite construct. One consequence
of this limitation is that any entry block arguments defined by that
operation will trigger a compiler crash if they are used anywhere, as
they are not bound to an LLVM IR value.
A previous PR introducing support for the `reduction` clause resulted in
the creation and use of entry block arguments attached to the `omp.simd`
operation, causing compiler crashes on 'do simd reduction(...)'
constructs.
This patch disables Flang lowering of simd reductions in 'do simd'
constructs to avoid triggering these errors while translation to LLVM IR
is still incomplete.
Commit: 5c9c281c251402fd65bb01717112cf22019ee409
https://github.com/llvm/llvm-project/commit/5c9c281c251402fd65bb01717112cf22019ee409
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
Log Message:
-----------
[DebugInfo] Use heterogenous lookups with std::map (NFC) (#113118)
Commit: 61a286ac0817671ad09a505303b7a3a446798316
https://github.com/llvm/llvm-project/commit/61a286ac0817671ad09a505303b7a3a446798316
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
Log Message:
-----------
[tools] Don't call StringRef::str() when calling StringMap::find (NFC) (#113119)
StringMap::find takes StringRef. We don't need to create an instance
of std::string from StringRef only to convert it right back to
StringRef.
Commit: 1bf1e92c72ec9086ab24103cf968e115b7248101
https://github.com/llvm/llvm-project/commit/1bf1e92c72ec9086ab24103cf968e115b7248101
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
Log Message:
-----------
[lldb] Avoid repeated map lookups (NFC) (#113121)
Commit: af6e1881e0791ac1ee611b62a3d12d9fb03ca142
https://github.com/llvm/llvm-project/commit/af6e1881e0791ac1ee611b62a3d12d9fb03ca142
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
Log Message:
-----------
[mlir] Avoid repeated map lookups (NFC) (#113122)
Commit: e2074c60bb3982cd8afb6408670332ea27da6383
https://github.com/llvm/llvm-project/commit/e2074c60bb3982cd8afb6408670332ea27da6383
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/test/CodeGen/AArch64/bitfield-insert.ll
Log Message:
-----------
[AArch64] Use implicitTrunc in isBitfieldDstMask() (NFC)
This code intentionally discards the high bits, so set
implicitTrunc=true. This is currently NFC but will enable an
APInt assertion in the future.
Commit: f0312d962d0510d613a5ad1aec0f0e44d4f124c0
https://github.com/llvm/llvm-project/commit/f0312d962d0510d613a5ad1aec0f0e44d4f124c0
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M mlir/test/lib/Pass/CMakeLists.txt
A mlir/test/lib/Pass/TestSPIRVCPURunnerPipeline.cpp
M mlir/test/mlir-spirv-cpu-runner/double.mlir
M mlir/test/mlir-spirv-cpu-runner/simple_add.mlir
M mlir/tools/mlir-opt/mlir-opt.cpp
M mlir/tools/mlir-spirv-cpu-runner/mlir-spirv-cpu-runner.cpp
Log Message:
-----------
[mlir][mlir-spirv-cpu-runner] Move MLIR pass pipeline to mlir-opt (#111575)
Adds a new mlir-opt test-only pass, -test-spirv-cpu-runner-pipeline,
which runs the set of MLIR passes needed for the mlir-spirv-cpu-runner,
and removes them from the runner. The tests are changed to invoke
mlir-opt with this flag before running the runner. The eventual goal is
to move all host/device code generation steps out of the runner, like
with some of the other runners.
Commit: f2302ed3d0f84ca867a3e664ed65bc89e52ee670
https://github.com/llvm/llvm-project/commit/f2302ed3d0f84ca867a3e664ed65bc89e52ee670
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-insert-subvector.mir
Log Message:
-----------
[RISCV][GISEL] Fix operand on RISCV::G_VMV_V_V_VL
6bac41496eb24c80aa659008d08220355a617c49 added this opcode with the wrong
number of operands. It didn't fail on check-llvm for me or on pre-commit CI,
but once committed we got buildbot failures. This patch fixes the definition
of the instruction and fixes the failing test.
Commit: bd861d0e690cfd05184d86e954289cccfec97e92
https://github.com/llvm/llvm-project/commit/bd861d0e690cfd05184d86e954289cccfec97e92
Author: David Green <david.green at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/qshrn.ll
Log Message:
-----------
[AArch64] Add some basic patterns for qshrn.
With the truncssat nodes these are relatively simple tablegen patterns to add.
The existing intrinsics are converted to shift+truncsat to they can lower using
the new patterns.
Fixes #112925.
Commit: 1dfdbf716112627dea5e79f7f4f1e1e9335ee9df
https://github.com/llvm/llvm-project/commit/1dfdbf716112627dea5e79f7f4f1e1e9335ee9df
Author: Boaz Brickner <brickner at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/test/CXX/drs/cwg9xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add covariance tests that make sure we return an error when return value is different in pointer / lvalue ref / rvalue ref (#112853)
Per https://cplusplus.github.io/CWG/issues/960.html.
Commit: 67ff5ba9af9754261abe11d762af11532a816126
https://github.com/llvm/llvm-project/commit/67ff5ba9af9754261abe11d762af11532a816126
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/MC/AArch64/LSFE/directive-arch-negative.s
A llvm/test/MC/AArch64/LSFE/directive-arch.s
A llvm/test/MC/AArch64/LSFE/directive-arch_extension-negative.s
A llvm/test/MC/AArch64/LSFE/directive-arch_extension.s
A llvm/test/MC/AArch64/LSFE/directive-cpu-negative.s
A llvm/test/MC/AArch64/LSFE/directive-cpu.s
A llvm/test/MC/AArch64/LSFE/ldfadd-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfadd.s
A llvm/test/MC/AArch64/LSFE/ldfmax-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmax.s
A llvm/test/MC/AArch64/LSFE/ldfmaxnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmaxnm.s
A llvm/test/MC/AArch64/LSFE/ldfmin-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmin.s
A llvm/test/MC/AArch64/LSFE/ldfminnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfminnm.s
A llvm/test/MC/AArch64/LSFE/stfadd-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfadd.s
A llvm/test/MC/AArch64/LSFE/stfmax-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmax.s
A llvm/test/MC/AArch64/LSFE/stfmaxnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmaxnm.s
A llvm/test/MC/AArch64/LSFE/stfmin-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmin.s
A llvm/test/MC/AArch64/LSFE/stfminnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfminnm.s
Log Message:
-----------
[AArch64] Add assembly/disaasembly of atomic ld/st (#112892)
This patch adds assembly/disassembly for the following instructions:
ldfadd{a,al,l,}, ldbfadd{a,al,l,}
ldfmax{a,al,l,}, ldbfmax{a,al,l,}
ldfmaxnm{a,al,l,}, ldbfmaxnm{a,al,l,}
ldfmin{a,al,l,}, ldbfmin{a,al,l,}
ldfminnm{a,al,l,} ldbfminnm{a,al,l,}
stfadd{l,}, stbfadd{l,}
stfmax{l,}, stbfmax{l,}
stfmaxnm{l,}, stbfmaxnm{l,}
stfmin{l,}, stbfmin{l,}
stfminnm{l,}, stbfminnm{l,}
According to [1]
[1]https://developer.arm.com/documentation/ddi0602
Co-authored-by: Spencer Abson
[spencer.abson at arm.com](mailto:spencer.abson at arm.com)
Co-authored-by: Caroline Concatto
[caroline.concatto at arm.com](mailto:caroline.concatto at arm.com)
Commit: a2ba438f3e5635e368333213914c7452a6a6a2da
https://github.com/llvm/llvm-project/commit/a2ba438f3e5635e368333213914c7452a6a6a2da
Author: XChy <xxs_chy at outlook.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
Log Message:
-----------
[InstCombine] Preserve the flag from RHS only if the `and` is bitwise (#113164)
Fixes #113123
Alive proof: https://alive2.llvm.org/ce/z/hnqeLC
Commit: 1e07c4800cf46ac9e4748b664cb58cbd48acb918
https://github.com/llvm/llvm-project/commit/1e07c4800cf46ac9e4748b664cb58cbd48acb918
Author: Chris Apple <cja-private at pm.me>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M compiler-rt/lib/rtsan/CMakeLists.txt
R compiler-rt/lib/rtsan/rtsan_interceptors.cpp
A compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
R compiler-rt/lib/rtsan/tests/rtsan_test_interceptors.cpp
A compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
Log Message:
-----------
[rtsan][NFC] Rename *interceptors.cpp to *interceptors_posix.cpp (#112935)
Done in preparation of exploring rtsan on windows.
Commit: 4679583181a9032b4f7c6476c7a1bfefe5724b47
https://github.com/llvm/llvm-project/commit/4679583181a9032b4f7c6476c7a1bfefe5724b47
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/fmlal-loreg.ll
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
Log Message:
-----------
[LLVM][AArch64] Add register classes for Armv9.6 assembly (#111717)
Add new register classes/operands and their encoder/decoder behaviour
required for the new Armv9.6 instructions (see
https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/The-Armv9-6-architecture-extension).
This work is the basis ofthe 2024 Armv9.6 architecture update effort for
SME.
Co-authored-by: Caroline Concatto caroline.concatto at arm.com
Co-authored-by: Marian Lukac marian.lukac at arm.com
Co-authored-by: Momchil Velikov momchil.velikov at arm.com
Commit: e7302319b52e3d231216d54d10622b0698928a96
https://github.com/llvm/llvm-project/commit/e7302319b52e3d231216d54d10622b0698928a96
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M mlir/test/lib/Pass/CMakeLists.txt
Log Message:
-----------
[mlir] Fix shared build. NFC
Commit: 17e9752267ed9c81c8da87f3a6d0e01f130b0d04
https://github.com/llvm/llvm-project/commit/17e9752267ed9c81c8da87f3a6d0e01f130b0d04
Author: Jakub Kuderski <jakub at nod-labs.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M mlir/test/lib/Pass/CMakeLists.txt
R mlir/test/lib/Pass/TestSPIRVCPURunnerPipeline.cpp
M mlir/test/mlir-spirv-cpu-runner/double.mlir
M mlir/test/mlir-spirv-cpu-runner/simple_add.mlir
M mlir/tools/mlir-opt/mlir-opt.cpp
M mlir/tools/mlir-spirv-cpu-runner/mlir-spirv-cpu-runner.cpp
Log Message:
-----------
Revert "[mlir][mlir-spirv-cpu-runner] Move MLIR pass pipeline to mlir-opt" (#113176)
Reverts llvm/llvm-project#111575
This caused build failures:
https://lab.llvm.org/buildbot/#/builders/138/builds/5244
Commit: c5ca1b8626db71fa7ac5d851fa3a0710641136ff
https://github.com/llvm/llvm-project/commit/c5ca1b8626db71fa7ac5d851fa3a0710641136ff
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/test/CodeGen/PowerPC/sat-add.ll
A llvm/test/CodeGen/PowerPC/uaddo-32.ll
A llvm/test/CodeGen/PowerPC/uaddo-64.ll
Log Message:
-----------
[PPC] Add custom lowering for uaddo (#110137)
Improve the codegen for uaddo node for i64 in 64-bit mode and i32 in
32-bit mode by custom lowering.
Commit: 900b6369e2f5fbc229371a142fdcd28b5280dbc0
https://github.com/llvm/llvm-project/commit/900b6369e2f5fbc229371a142fdcd28b5280dbc0
Author: Jake Egan <jake.egan at ibm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/log1p.ll
Log Message:
-----------
[AIX][test] XFAIL constant folding log1p test
Test added by commit 47a6da2d4dc7d996eb2678243ac566822d59e483 fails on the AIX bot. So XFAIL for now to investigate further.
Commit: 120e42d3135f558b5e0a73da1c6484571eeff941
https://github.com/llvm/llvm-project/commit/120e42d3135f558b5e0a73da1c6484571eeff941
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/test/ThinLTO/X86/memprof-icp.ll
Log Message:
-----------
[MemProf] Improve metadata cleanup in LTO backend (#113039)
Previously we were attempting to remove the memprof-related metadata
when iterating through instructions in the LTO backend. However, we
missed some as there are a number of cases where we skip instructions,
or even entire functions. Simplify the cleanup and ensure all is removed
by doing a full sweep over all instructions after completing cloning.
This is largely NFC except with -memprof-report-hinted-sizes enabled,
because we were propagating and simplifying the metadata after inlining
in the LTO backend, which caused some stray messages as metadata was
re-converted to attributes.
Commit: 8417f6af54c8f6dcf5893ab1352b50bf33c5a1ba
https://github.com/llvm/llvm-project/commit/8417f6af54c8f6dcf5893ab1352b50bf33c5a1ba
Author: Hans Wennborg <hans at chromium.org>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M compiler-rt/lib/interception/interception_win.cpp
Log Message:
-----------
[win/asan] Fix instruction size for 44 0f b6 1a
movzx r11d,BYTE PTR [rdx]
is four bytes long.
Follow-up to #111638
Commit: 42ba452aa94e4da277842d8990ad958a6256e558
https://github.com/llvm/llvm-project/commit/42ba452aa94e4da277842d8990ad958a6256e558
Author: Spencer Abson <Spencer.Abson at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/fmlal-loreg.ll
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
Log Message:
-----------
[NFC] Fix -WError for unused Encode/Decode ZK methods
Remove the unused functions and register classes from the change below
https://github.com/llvm/llvm-project/commit/4679583181a9032b4f7c6476c7a1bfefe5724b47
Commit: 9e03920cbf946e7ba282e99213707643a23ae5fb
https://github.com/llvm/llvm-project/commit/9e03920cbf946e7ba282e99213707643a23ae5fb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/root-gather-reused-scalar.ll
Log Message:
-----------
[SLP]Ignore root gather node, when searching for reuses
Root gather/buildvector node should be ignored when SLP vectorizer tries
to find matching gather nodes, vectorized earlier. This node is
definitely the last one in the pipeline and it does not have users. It
may cause the compiler crash
Fixes #113143
Commit: 54c93aabec965469fe7db1f4391a190e3d640feb
https://github.com/llvm/llvm-project/commit/54c93aabec965469fe7db1f4391a190e3d640feb
Author: vporpo <vporpodas at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Scaffolding for Legality (#112623)
This patch adds a LegalityResultWithReason class for describing the
reason why legality decided not to vectorize the code.
Commit: fc59f2cc0f191bb7a0706dfb65e3e46fef69f466
https://github.com/llvm/llvm-project/commit/fc59f2cc0f191bb7a0706dfb65e3e46fef69f466
Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
A llvm/test/CodeGen/PowerPC/const-stov.ll
M llvm/test/CodeGen/PowerPC/load-and-splat.ll
M llvm/test/CodeGen/PowerPC/p10-splatImm32-undef.ll
M llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
Log Message:
-----------
[PowerPC] special case small int constant for custom scalar_to_vector (#109850)
Special case small int constant in the PPC custom lowering of
scalar_to_vector.
Commit: f1e455ed51be4f53462db87aa5d64dbd830e5de2
https://github.com/llvm/llvm-project/commit/f1e455ed51be4f53462db87aa5d64dbd830e5de2
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
Log Message:
-----------
[NFC][Sema][OpenMP] Fix free-nonheap-object warning (#112942)
This is one of the many PRs to fix errors with LLVM_ENABLE_WERROR=on.
Built by GCC 11.
Fix warning
In destructor ‘llvm::APInt::~APInt()’,
inlined from ‘llvm::APInt::~APInt()’ at
llvm-project/llvm/include/llvm/ADT/APInt.h:190:3,
inlined from ‘llvm::APSInt::~APSInt()’ at
llvm-project/llvm/include/llvm/ADT/APSInt.h:23:21,
inlined from ‘bool
checkOMPArraySectionConstantForReduction(clang::ASTContext&, const
clang::ArraySectionExpr*, bool&, llvm::SmallVectorImpl<llvm::APSInt>&)’
at llvm-project/clang/lib/Sema/SemaOpenMP.cpp:18357:45,
inlined from ‘bool actOnOMPReductionKindClause(clang::Sema&,
{anonymous}::DSAStackTy*, clang::OpenMPClauseKind,
llvm::ArrayRef<clang::Expr*>, clang::SourceLocation,
clang::SourceLocation, clang::SourceLocation, clang::SourceLocation,
clang::CXXScopeSpec&, const clang::DeclarationNameInfo&,
llvm::ArrayRef<clang::Expr*>, {anonymous}::ReductionData&)’ at
llvm-project/clang/lib/Sema/SemaOpenMP.cpp:18715:68:
llvm-project/llvm/include/llvm/ADT/APInt.h:192:18: error: ‘void operator
delete [](void*)’ called on a pointer to an unallocated object ‘1’
[-Werror=free-nonheap-object]
192 | delete[] U.pVal;
| ^~~~
Commit: d4630ae5ed678e50f4758d0fb7a6875494f690e5
https://github.com/llvm/llvm-project/commit/d4630ae5ed678e50f4758d0fb7a6875494f690e5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
Log Message:
-----------
[Vectorize] Fix a warning
This patch fixes:
llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h:85:16:
error: private field 'Reason' is not used
[-Werror,-Wunused-private-field]
Commit: 006fb0904d8e549476342de4b749792f73b3af85
https://github.com/llvm/llvm-project/commit/006fb0904d8e549476342de4b749792f73b3af85
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 54c93aabec96
Commit: 3277c7cd28154e33637a168acb26cea7ac1f7fff
https://github.com/llvm/llvm-project/commit/3277c7cd28154e33637a168acb26cea7ac1f7fff
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs.mir
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
Log Message:
-----------
[AMDGPU] Skip VGPR deallocation for waveslot limited kernels (#112765)
MSG_DEALLOC_VGPRS slows down very small waveslot limited kernels. It's
been identified this message is only really needed for VGPR limited
kernels. A kernel becomes VGPR limited if a total number of VGPRs per
SIMD / number of used VGPRs is more than a number of wave slots.
Commit: ac9ee618572537bcd77c58899aaab1d41dbad206
https://github.com/llvm/llvm-project/commit/ac9ee618572537bcd77c58899aaab1d41dbad206
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M flang/test/Fir/OpenACC/legalize-data.fir
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
A mlir/lib/Dialect/OpenACC/Transforms/LegalizeDataValues.cpp
M mlir/test/Dialect/OpenACC/legalize-data.mlir
Log Message:
-----------
[acc] Improve LegalizeDataValues pass to handle data constructs (#112990)
Renames LegalizeData to LegalizeDataValues since this pass fixes up SSA
values. LegalizeData suggested that it fixed data mapping.
This change also adds support to fix up ssa values for data clause
operations. Effectively, compute regions within a data region use the
ssa values from data operations also. The ssa values within data regions
but not within compute regions are not updated.
This change is to support the requirement in the OpenACC spec which
notes that a visible data clause is not just one on the current compute
construct but on the lexically containing data construct or visible
declare directive.
Commit: dcbf2c2ca078367fcd84feae9a51226b9761117a
https://github.com/llvm/llvm-project/commit/dcbf2c2ca078367fcd84feae9a51226b9761117a
Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
A llvm/test/CodeGen/DirectX/split-double.ll
A llvm/test/Transforms/Scalarizer/frexp.ll
Log Message:
-----------
[Scalarizer][DirectX] support structs return types (#111569)
Based on this RFC:
https://discourse.llvm.org/t/rfc-allow-the-scalarizer-pass-to-scalarize-vectors-returned-in-structs/82306
LLVM intrinsics do not support out params. To get around this limitation
implementers will make intrinsics return structs to capture a return
type and an out param. This implementation detail should not impact
scalarization since these cases should be elementwise operations.
## Three changes are needed.
- The CallInst visitor needs to be updated to handle Structs
- A new visitor is needed for `ExtractValue` instructions
- finsh needs to be update to handle structs so that insert elements are
properly propogated.
## Testing changes
- Add support for `llvm.frexp`
- Add support for `llvm.dx.splitdouble`
fixes https://github.com/llvm/llvm-project/issues/111437
Commit: 7eb8238a32516008476b717bc6a2be8c59f7f535
https://github.com/llvm/llvm-project/commit/7eb8238a32516008476b717bc6a2be8c59f7f535
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/test/TableGen/x86-fold-tables.td
Log Message:
-----------
[TableGen] Handle Windows line endings in x86-fold-tables.td test (#112997)
The x86-fold-tables.td has been failing for me and [in
CI](https://buildkite.com/llvm-project/github-pull-requests/builds/111277#0192a122-c5c9-4e4e-bc5b-7532fec99ae4)
if Git happens to decide to check out the baseline file with Windows
line endings.
This fix for this is to add the `--strip-trailing-cr` option to diff to
normalize the line endings before comparing them.
Commit: 8ae39c8e34de2d24c46827b324c76bac845c18b0
https://github.com/llvm/llvm-project/commit/8ae39c8e34de2d24c46827b324c76bac845c18b0
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/MC/MCParser/AsmParser.cpp
Log Message:
-----------
[MC] Fix llvm-mc unterminated string constants warning for Windows (#112995)
#98060 introduced a warning for unterminated string constants, however
it was only checking for `\n` which means that it produced strange
results on Windows (always blaming column 1) including having the
[associated test
fail](https://buildkite.com/llvm-project/github-pull-requests/builds/111277#0192a122-c5c9-4e4e-bc5b-7532fec99ae4)
if Git happened to use Windows newlines when creating the file.
This fix for this is to detect both `\r` and `\n`, but don't double-warn
for Windows newlines.
Commit: 766bd6f4d05a4b52892be4f1b740e67053a22ee6
https://github.com/llvm/llvm-project/commit/766bd6f4d05a4b52892be4f1b740e67053a22ee6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated map lookups (NFC) (#112819)
Commit: eaa7b385368fa7e3dad9b95411d04be55e71494e
https://github.com/llvm/llvm-project/commit/eaa7b385368fa7e3dad9b95411d04be55e71494e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#113120)
Commit: 30a402833f50b14148c8b963f3ffaaeaeea5fd78
https://github.com/llvm/llvm-project/commit/30a402833f50b14148c8b963f3ffaaeaeea5fd78
Author: Augusto Noronha <anoronha at apple.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lldb/include/lldb/Symbol/TypeSystem.h
Log Message:
-----------
[lldb][NFC] Fix doxygen comment on top of GetMangledTypeName
Commit: ab07fc832009b678c0b24392ad7e02a8e5dd3932
https://github.com/llvm/llvm-project/commit/ab07fc832009b678c0b24392ad7e02a8e5dd3932
Author: Yijia Gu <yijiagu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] add missing dep in OpenAccTransforms
Commit: 2c331b35712e0fad93cf804674196b7c0e47ebd9
https://github.com/llvm/llvm-project/commit/2c331b35712e0fad93cf804674196b7c0e47ebd9
Author: Yijia Gu <yijiagu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[mlir][bazel] remove tab blank in OpenAccTransforms
Commit: 4de708e32e31ac32b924dfeb020086636700c0f7
https://github.com/llvm/llvm-project/commit/4de708e32e31ac32b924dfeb020086636700c0f7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lldb/tools/debugserver/debugserver.xcodeproj/project.pbxproj
R lldb/tools/debugserver/source/MacOSX/stack_logging.h
Log Message:
-----------
[lldb] Remove stack_logging.h (#112987)
This file is covered under the Apple open source license rather than the
LLVM license. Presumably this was an oversight, but it doesn't really
matter as this file is unused. Remove it altogether.
Commit: ed5072ee28809abf0f140ca15df549a418bb5c69
https://github.com/llvm/llvm-project/commit/ed5072ee28809abf0f140ca15df549a418bb5c69
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lld/test/MachO/icf-safe-thunks-dwarf.ll
M lld/test/MachO/icf-safe-thunks.ll
Log Message:
-----------
[NFC][lld-macho] Generate test bodies for icf-safe-thunk tests (#111927)
Autogenerate `.ll` code from cpp code in some `-icf-safe-thunk` tests
using `update_test_body.py`
```
PATH=build/bin:$PATH llvm/utils/update_test_body.py lld/test/MachO/icf-safe-thunks.ll lld/test/MachO/icf-safe-thunks-dwarf.ll
```
https://llvm.org/docs/TestingGuide.html#elaborated-tests
I recently became aware of this tool and I wanted to practice using it.
This also allows to remove the custom instructions to generate the `.ll`
code.
Commit: 59528bbc73644f7c9e08406cf61a21b5dd8fe3b8
https://github.com/llvm/llvm-project/commit/59528bbc73644f7c9e08406cf61a21b5dd8fe3b8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
Log Message:
-----------
[nfc][msan] Reorder flags in RUN: (#113196)
Commit: cafeacff2c6367a229aa8b65be99835177f5c3be
https://github.com/llvm/llvm-project/commit/cafeacff2c6367a229aa8b65be99835177f5c3be
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
Log Message:
-----------
[nfc][msan] Remove RUN: duplicates (#113197)
Commit: 7dc2542ac24fcae89dfd179fa58c4ec4fb959e2b
https://github.com/llvm/llvm-project/commit/7dc2542ac24fcae89dfd179fa58c4ec4fb959e2b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
[nfc][msan] Fix old typo in test (#113198)
Commit: f58ce1152703ca753794b8cef36da30bd2668d0f
https://github.com/llvm/llvm-project/commit/f58ce1152703ca753794b8cef36da30bd2668d0f
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/SetTheory.cpp
M llvm/lib/TableGen/TGParser.cpp
Log Message:
-----------
[NFC][TableGen] Use auto when initializing variables with cast<> (#113171)
Use `auto` when initializing a variable with `cast<>`. Remove some
unneeded `const_cast` (since all Init pointers are now const).
Commit: e6ada7162e25ab28f6e588fba23f0c11dd1238b5
https://github.com/llvm/llvm-project/commit/e6ada7162e25ab28f6e588fba23f0c11dd1238b5
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
A llvm/test/CodeGen/AArch64/regalloc-spill-weight-basic.ll
Log Message:
-----------
[regalloc][basic] Change spill weight for optsize funcs (#112960)
Change the spill weight calculations for `optsize` functions to remove
the block frequency multiplier. For those functions, we do not want to
consider the runtime cost of spilling, only the codesize cost.
I built a large app with the basic and greedy (default) register
allocator enabled.
| Regalloc Type | Uncompressed Size Delta | Compressed Size Delta |
| - | - | - |
| Basic | -303.8 KiB (-0.23%) | -232.0 KiB (-0.39%) |
| Greedy | 159.1 KiB (0.12%) | 130.1 KiB (0.22%) |
Since I only saw a size win with the basic register allocator, I decided
to only change the behavior for that type.
Commit: 40ea92c859234d536553cf26650e89d6e52071c6
https://github.com/llvm/llvm-project/commit/40ea92c859234d536553cf26650e89d6e52071c6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lldb/unittests/ScriptInterpreter/Lua/ScriptInterpreterTests.cpp
Log Message:
-----------
[lldb] Update ScriptInterpreterTests for CommandReturnObject API change
Commit: 622e398d8828431e082a336814d29932e22c8450
https://github.com/llvm/llvm-project/commit/622e398d8828431e082a336814d29932e22c8450
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
Log Message:
-----------
[AMDGPU] Allow overload of __builtin_amdgcn_mov/update_dpp (#112447)
We need to support 64-bit data types (intrinsics do support it). We are
also silently converting FP to integer argument now, also fixed.
Commit: 4b1b51ac52445f2308174287c721ad7f60a8053b
https://github.com/llvm/llvm-project/commit/4b1b51ac52445f2308174287c721ad7f60a8053b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/gather-node-same-as-vect-but-order.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/non-power-of-2-order-detection.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vect-gather-same-nodes.ll
Log Message:
-----------
[SLP]Initial non-power-of-2 support (but still whole register) for reductions
Enables initial non-power-of-2 support (but still requires number of
elements, forming whole registers) for reductions.
Enables extra vectorization for
MultiSource/Benchmarks/7zip/7zip-benchmark, CINT2006/464.h264ref and
CFP2017rate/526.blender_r (checked for SSE2)
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/112361
Commit: dca43a1c82f1023127343daae487c3a6a8c7e3d4
https://github.com/llvm/llvm-project/commit/dca43a1c82f1023127343daae487c3a6a8c7e3d4
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lld/test/MachO/objc-category-merging-minimal.s
Log Message:
-----------
[lld/Macho][test] Mark objc-category-merging-minimal.s as unsupported on Windows (#113209)
With #112981, the test uses awk, which gnuwin32 doesn't seem to have.
Commit: 009fb567ceb9a8afea3c13b5eb943a1f15fdf3b5
https://github.com/llvm/llvm-project/commit/009fb567ceb9a8afea3c13b5eb943a1f15fdf3b5
Author: David Green <david.green at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/rqshrn.ll
Log Message:
-----------
[AArch64] Add patterns for combining qxtn+rshr to qrshrn
Similar to bd861d0e690cfd05184d86, this adds some patterns for converting
signed and unsigned variants of rshr+qxtn to qrshrn.
Commit: 3903cb4695012fb85a76c83b5616f2ffe6fa10f4
https://github.com/llvm/llvm-project/commit/3903cb4695012fb85a76c83b5616f2ffe6fa10f4
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/lit_test.bzl
Log Message:
-----------
[bazel] Use rules_python load statements (#113213)
With bazel 8.x these are strongly encouraged, and this disambiguates
which version of these rules we get for older versions. Specifically the
native.py_test was using the wrong version of py_test.
Commit: 6e1a7ac53163c335868d5773b1b35b55828f329c
https://github.com/llvm/llvm-project/commit/6e1a7ac53163c335868d5773b1b35b55828f329c
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrCompiler.td
A llvm/test/CodeGen/X86/no-dup-cv-directive.ll
M llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
Log Message:
-----------
[llvm][x64] Mark win x64 SEH pseudo instruction as meta instructions (again) (#112962)
When adding new SEH pseudo instructions in #110024 I noticed that some
of the tests were changing their output since these new instructions
were counting towards thresholds for branching versus folding decisions.
These instructions do not result in real machine instructions being
emitted, so they should be marked as meta instructions.
This is a re-do of #110889 as we hit an issue where some of the SEH
pseudo instructions in the prolog were being duplicated, which resulted
errors being raised as the CodeView generator was seeing prolog
directives after an end-prolog directive:
<https://github.com/llvm/llvm-project/pull/110889#issuecomment-2393405613>.
The fix for this is to mark the prolog related SEH pseudo instructions
as being non-duplicatable.
Commit: b6e9ba017f222b2f95237d69126281d6252bf176
https://github.com/llvm/llvm-project/commit/b6e9ba017f222b2f95237d69126281d6252bf176
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/lib/Basic/Targets/AArch64.cpp
M clang/test/CodeGen/aarch64-cpu-supports-target.c
M clang/test/CodeGen/aarch64-cpu-supports.c
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/Sema/attr-target-clones-aarch64.c
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/lib/Target/AArch64/AArch64FMV.td
Log Message:
-----------
[FMV][AArch64] Unify features memtag and memtag2. (#112511)
If we split these features in the compiler (see relevant pull request
https://github.com/llvm/llvm-project/pull/109299), we would only be able
to hand-write a 'memtag2' version using inline assembly since the
compiler cannot generate the instructions that become available with
FEAT_MTE2. However these instructions only work at Exception Level 1, so
they would be unusable since FMV is a user space facility. I am
therefore unifying them.
Approved in ACLE as https://github.com/ARM-software/acle/pull/351
Commit: 34d4f660fe57132d17d2e37b72ccfc1d07269de9
https://github.com/llvm/llvm-project/commit/34d4f660fe57132d17d2e37b72ccfc1d07269de9
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M mlir/test/IR/properties.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.h
Log Message:
-----------
[mlir] Fix the emission of `prop-dict` when operations have no properties (#112851)
When an operation has no properties, no property struct is emitted. To avoid a compilation error, we should also skip emitting `setPropertiesFromParsedAttr`, `parseProperties` and `printProperties` in such cases.
Compilation error:
```
error: ‘Properties’ has not been declared
static ::llvm::LogicalResult setPropertiesFromParsedAttr(Properties &prop, ::mlir::Attribute attr, ::llvm::function_ref<::mlir::InFlightDiagnostic()> emitError);
```
Commit: 28a2f57c98431e71f62ce524481a1356a87b5696
https://github.com/llvm/llvm-project/commit/28a2f57c98431e71f62ce524481a1356a87b5696
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M utils/bazel/.bazelrc
Log Message:
-----------
[bazel] Pass --build_runfile_links=false (#113221)
This improves performance of doing a `bazel test @llvm-project//...` a
lot because previously every lit test would have some symlink tree
configured for it.
Commit: 9de0566fcf90dd838558c57df339fbfcc33fe36c
https://github.com/llvm/llvm-project/commit/9de0566fcf90dd838558c57df339fbfcc33fe36c
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Delete unused class member (#113165)
Delete unused class member in `SearchableTableEmitter` class.
Commit: 74e1554d7b4013a975cf5fb8df64a6419bb14a45
https://github.com/llvm/llvm-project/commit/74e1554d7b4013a975cf5fb8df64a6419bb14a45
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
Log Message:
-----------
[lldb] Fix the sorting function for diagnostics (#113220)
Commit: 7b703bd3e7c1f8fa2274978679664d41673cdea1
https://github.com/llvm/llvm-project/commit/7b703bd3e7c1f8fa2274978679664d41673cdea1
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M lldb/docs/resources/addinglanguagesupport.md
Log Message:
-----------
[lldb][docs] Fix "Developing LLDB" table of contents (#113166)
Currently all the headings marked as `#` show up
as a top-level entry in the `Developing LLDB`
toctree. This patch marks these as `##` so only
`Adding Programming Language Support` is displayed
in the table of contents.
Commit: 9b7be3ebe5c15ff43cfb5232a572289a83f20294
https://github.com/llvm/llvm-project/commit/9b7be3ebe5c15ff43cfb5232a572289a83f20294
Author: Tom Stellard <tstellar at redhat.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC] skip reoptimization tests on s390x. (#112796)
The test was failing on s390x with this error:
JIT session error: Unsupported target machine architecture in ELF object
<main>-jitted-objectbuffer
Commit: 6c4267fb1779bc5550bb413f33250f9365acfbc6
https://github.com/llvm/llvm-project/commit/6c4267fb1779bc5550bb413f33250f9365acfbc6
Author: Michael Jones <michaelrj at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
A libc/shared/fp_bits.h
A libc/shared/str_to_float.h
A libc/shared/str_to_integer.h
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/__support/str_to_num_result.h
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__charconv/from_chars_floating_point.h
M libcxx/include/__configuration/availability.h
M libcxx/include/charconv
M libcxx/include/module.modulemap
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/CMakeLists.txt
M libcxx/src/charconv.cpp
A libcxx/src/include/from_chars_floating_point.h
A libcxx/test/std/utilities/charconv/charconv.from.chars/floating_point.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
M libcxx/test/support/charconv_test_helpers.h
M libcxx/test/support/test_macros.h
M libcxx/utils/libcxx/test/features.py
A runtimes/cmake/Modules/FindLibcCommonUtils.cmake
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libcxx][libc] Hand in Hand PoC with from_chars (#91651)
Implements std::from_chars for float and double.
The implementation uses LLVM-libc to do the real parsing. Since this is
the first time libc++
uses LLVM-libc there is a bit of additional infrastructure code. The
patch is based on the
[RFC] Project Hand In Hand (LLVM-libc/libc++ code sharing)
https://discourse.llvm.org/t/rfc-project-hand-in-hand-llvm-libc-libc-code-sharing/77701
Commit: 7a90ff752c4e07e6826d9e1f23871401a6592b23
https://github.com/llvm/llvm-project/commit/7a90ff752c4e07e6826d9e1f23871401a6592b23
Author: Yuta Saito <kateinoigakukun at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingUtil.c
Log Message:
-----------
[compiler-rt][profile] Use `flock` shim on Windows even if detection fails (#112695)
Commit: a26bc43cdb0b47730e3a6426cea9f69d02697927
https://github.com/llvm/llvm-project/commit/a26bc43cdb0b47730e3a6426cea9f69d02697927
Author: Thomas Preud'homme <thomas.preudhomme at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/cmake/modules/AddLLVM.cmake
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
Log Message:
-----------
Fix CMake dependencies on mlir-linalg-ods-yaml-gen (#112224)
Fix a number of dependencies issue to build mlir-linalg-ods-yaml-gen
host binary which make a cross-build using the Make generator fail.
Namely:
- do not use binary path for the custom target created when
LLVM_USE_HOST_TOOLS is true;
- use target name instead of name of variable holding the target name
for add_custom_target and set_target_properties in setup_host_tool();
- remove dependency on target defined in different directory in
add_linalg_ods_yaml_gen() since add_custom_target DEPENDS can only be
used on "files and outputs of custom commands created with
add_custom_command() command calls in the same directory";
- remove unneeded dependency on ${MLIR_LINALG_ODS_YAML_GEN_EXE}, the
target dependency will ensure the binary will be built.
Note that we keep using ${MLIR_LINALG_ODS_YAML_GEN_EXE} in the COMMAND
rather than use ${MLIR_LINALG_ODS_YAML_GEN_TARGET} because when
LLVM_NATIVE_TOOL_DIR is used the latter is an empty string.
Testing-wise, all three codepaths in get_host_tool_path() were tested
with both GNU Make and Ninja generators:
- cross-compiling with LLVM_NATIVE_TOOL_DIR checks the if path;
- cross-compiling without LLVM_NATIVE_TOOL_DIR checks the elseif path;
- native build without LLVM_NATIVE_TOOL_DIR checks the else path.
Commit: 3acc58c1bba375345ab1abd7e95a379d1d64cea8
https://github.com/llvm/llvm-project/commit/3acc58c1bba375345ab1abd7e95a379d1d64cea8
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/cmake/modules/AddLLVM.cmake
M mlir/include/mlir/Dialect/Linalg/IR/CMakeLists.txt
Log Message:
-----------
Revert "Fix CMake dependencies on mlir-linalg-ods-yaml-gen" (#113229)
Reverts llvm/llvm-project#112224
Many bots are broken
Commit: d91318b643188bb855f115b02af9532f87c787b7
https://github.com/llvm/llvm-project/commit/d91318b643188bb855f115b02af9532f87c787b7
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SeedCollectorTest.cpp
Log Message:
-----------
[SandboxVectorizer] New class to actually collect and manage seeds (#112979)
There are many more tests to add, but I would like to get this reviewed
and the details sorted out before it grows too big.
Commit: 6201bcc3b5ed8c2dab39b8365cee09018eee8110
https://github.com/llvm/llvm-project/commit/6201bcc3b5ed8c2dab39b8365cee09018eee8110
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/lib/Headers/opencl-c-base.h
M clang/test/Headers/opencl-c-header.cl
Log Message:
-----------
[OpenCL] Add cl_ext_image_unorm_int_2_101010_EXT extension (#113145)
Add the defines for the `cl_ext_image_unorm_int_2_101010_EXT` extension.
Commit: 0de8de1b8432f01adb0a7c6d2f1e3d4fd8c0c30c
https://github.com/llvm/llvm-project/commit/0de8de1b8432f01adb0a7c6d2f1e3d4fd8c0c30c
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SeedCollector.h
R llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SeedCollector.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SeedCollectorTest.cpp
Log Message:
-----------
[SandboxVectorizer] revert New class to actually collect and manage s… (#113231)
…eeds (#112979)
This reverts commit d91318b643188bb855f115b02af9532f87c787b7.
Commit: c3fe0e46e2188fc94a64b51166d8b7e7694ed8c8
https://github.com/llvm/llvm-project/commit/c3fe0e46e2188fc94a64b51166d8b7e7694ed8c8
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[NFC][AMDGPU] clang-format `llvm/lib/Target/AMDGPU/SIISelLowering.cpp` (#112645)
Commit: 31dd03cb3ee73e20b8220c2bf991c1afcba923c5
https://github.com/llvm/llvm-project/commit/31dd03cb3ee73e20b8220c2bf991c1afcba923c5
Author: Florian Albrechtskirchinger <falbrechtskirchinger at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/test/PCH/cxx2a-constraints-crash.cpp
Log Message:
-----------
[Concepts] Add regression test for #99036 (#113137)
Commit: dac0f7e83ebcaed451d5d0bcc3a4c7f949f0c26c
https://github.com/llvm/llvm-project/commit/dac0f7e83ebcaed451d5d0bcc3a4c7f949f0c26c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
Log Message:
-----------
[VPlan] Add general recipe matcher, replace handwritten ones (NFC)
The new matcher is more flexible and can be used to build matchers for
additional recipe types without unnecessary duplication.
Commit: 23b18fa01e6de7cb86a0cd294d58e5f8635d4afe
https://github.com/llvm/llvm-project/commit/23b18fa01e6de7cb86a0cd294d58e5f8635d4afe
Author: Florian Mayer <fmayer at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/IR/Globals.cpp
A llvm/test/CodeGen/AArch64/semantic-interposition-memtag.ll
Log Message:
-----------
[MTE] Do not allow local aliases to MTE globals (#106280)
With this change and appropriate linker changes
(https://r.android.com/3236256)
AOSP boots with memtag-global throughout the platform.
Without this change, we would sometimes generate PC-relative references
to tagged globals, which then do not have the proper tag.
Commit: 7eb326441356f9e9aafa6d9f982c3c19ac6cad22
https://github.com/llvm/llvm-project/commit/7eb326441356f9e9aafa6d9f982c3c19ac6cad22
Author: Michael Jones <michaelrj at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M libc/src/__support/macros/properties/types.h
M libc/src/__support/str_to_float.h
Log Message:
-----------
[libc] Add handling for long double=double double (#113235)
For Hand-In-Hand we need float to string to support a wider set of
architectures, specifically the ones that libc++ supports. This includes
powerpc, which apparently uses "double double" as its long double type.
Since Hand-In-Hand isn't currently using long double, this just opts
them out.
Commit: 1295d2e6da2fe90f3b770ab1d35bf5caecd38bed
https://github.com/llvm/llvm-project/commit/1295d2e6da2fe90f3b770ab1d35bf5caecd38bed
Author: Justin Fargnoli <justinfargnoli at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/docs/Passes.rst
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/Transforms/Utils/IRNormalizer.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/IRNormalizer.cpp
A llvm/test/Transforms/IRNormalizer/naming-args-instr-blocks.ll
A llvm/test/Transforms/IRNormalizer/naming-arguments.ll
A llvm/test/Transforms/IRNormalizer/naming.ll
A llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll
A llvm/test/Transforms/IRNormalizer/regression-coro-elide-musttail.ll
A llvm/test/Transforms/IRNormalizer/regression-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-dont-hoist-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll
A llvm/test/Transforms/IRNormalizer/reordering-basic.ll
A llvm/test/Transforms/IRNormalizer/reordering.ll
Log Message:
-----------
[LLVM] Add IRNormalizer Pass (#68176)
Add the llvm-canon tool. Description from the [original
PR](https://reviews.llvm.org/D66029#change-wZv3yOpDdxIu):
> Added a new llvm-canon tool which aims to transform LLVM Modules into
a canonical form by reordering and renaming instructions while
preserving the same semantics. This tool makes it easier to spot
semantic differences while diffing two modules which have undergone
different transformation passes.
The current version of this tool can:
- Reorder instructions within a function.
- Rename instructions based on the operands.
- Sort commutative operands.
This code was originally written by @michalpaszkowski and [submitted to
mainline
LLVM](https://github.com/llvm/llvm-project/commit/14d358537f124a732adad1ec6edf3981dc9baece).
However, it was quickly
[reverted](https://github.com/llvm/llvm-project/commit/335de55fa3384946f1e62050f2545c0966163236)
to do BuildBot errors.
Michal presented his version of the tool in [LLVM-Canon: Shooting for
Clear Diffs](https://www.youtube.com/watch?v=c9WMijSOEUg).
@AidanGoldfarb and I ported the code to the new pass manager, added more
tests, and fixed some bugs related to PHI nodes that may have been the
root cause of the BuildBot errors that caused the patch to be reverted.
Additionally, we rewrote the implementation of instruction reordering to
fix cases where the original algorithm would break use-def chains.
Note that this is @AidanGoldfarb and I's first time submitting to LLVM.
Please liberally critique the PR!
CC @plotfi for initial review.
---------
Co-authored-by: Aidan <aidan.goldfarb at mail.mcgill.ca>
Commit: b8930cd13d484fadc12b810d76156c2c9e884f75
https://github.com/llvm/llvm-project/commit/b8930cd13d484fadc12b810d76156c2c9e884f75
Author: Shubham Sandeep Rastogi <srastogi22 at apple.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/lib/Passes/StandardInstrumentations.cpp
A llvm/test/Other/dropped-var-stats.ll
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/DroppedVariableStatsTest.cpp
Log Message:
-----------
Add a pass to collect dropped variable statistics (#102233)
This patch is inspired by @Snowy1803 excellent work in swift and the
patch: https://github.com/swiftlang/swift/pull/73334/files
Add an instrumentation pass to llvm to collect dropped debug information
variable statistics for every Function-level and Module-level IR pass.
This patch creates adds the class DroppedVariableStats which iterates
over every DbgRecord in a function or module before and after an
optimization pass and counts the number of variables who's debug
information has been dropped due to that pass, then prints that output
to stdout in a csv format.
I ran this patch on optdriver.cpp can see:
Pass Name, Dropped Variables
'InstCombinePass', 1
'SimplifyCFGPass', 6
'JumpThreadingPass', 25
Commit: 2ce655cf1b029481b88b48b409d7423472856b38
https://github.com/llvm/llvm-project/commit/2ce655cf1b029481b88b48b409d7423472856b38
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M mlir/lib/Dialect/Func/Transforms/DuplicateFunctionElimination.cpp
M mlir/test/Dialect/Func/duplicate-function-elimination.mlir
Log Message:
-----------
[mlir][func] Fix multiple bugs in `DuplicateFunctionElimination` (#109571)
This PR fixes multiple bugs in `DuplicateFunctionElimination`.
- Prevents elimination of function declarations.
- Updates all symbol uses to reference unique function representatives.
Fixes #93483.
Commit: b5bcdb5cfae452da30a699d7967cc1e0800ca997
https://github.com/llvm/llvm-project/commit/b5bcdb5cfae452da30a699d7967cc1e0800ca997
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/FormatTestCSharp.cpp
Log Message:
-----------
[clang-format] Fix a crash on C# `goto case` (#113056)
Fixes #113011.
Commit: 1d9b3222f3de7bad4ef27b7e4d7798f840097380
https://github.com/llvm/llvm-project/commit/1d9b3222f3de7bad4ef27b7e4d7798f840097380
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Implement VPWidenSelectRecipe::computeCost.
Implement VPlan-based cost computation for VPWidenSelectRecipe.
Commit: a4819bd46d8baebc3aaa8b38f78065de33593199
https://github.com/llvm/llvm-project/commit/a4819bd46d8baebc3aaa8b38f78065de33593199
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Restore case accidentially dropped in 34cdd67c85.
34cdd67c85 accidentially dropped the case for VPWidenIntrinsicSC. Add it
back again. Thanks @Mel-Chen for spotting this.
Commit: b3edc764f70f4e56807af60abdcfbef4dbdc5d95
https://github.com/llvm/llvm-project/commit/b3edc764f70f4e56807af60abdcfbef4dbdc5d95
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Implement VPWidenCastRecipe::computeCost(). (NFCI) (#111339)
This patch implement `VPWidenCastRecipe::computeCost()` and skip cast
recipies in the in-loop reduction.
Commit: 38fca7b7db2ba1647c87679d6750fc4a4bfe72e1
https://github.com/llvm/llvm-project/commit/38fca7b7db2ba1647c87679d6750fc4a4bfe72e1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[Vectorize] Simplify code with DenseMap::operator[] (NFC) (#113246)
Commit: 2437784a178adb299cf6e363427e98611e3d2460
https://github.com/llvm/llvm-project/commit/2437784a178adb299cf6e363427e98611e3d2460
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-21 (Mon, 21 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Replace unreachable by folding into else with assert (NFC).
Simplify code as suggested post-commit in
https://github.com/llvm/llvm-project/pull/110576/.
Commit: b90ea5caade7b92796276937467a0dabc355a62e
https://github.com/llvm/llvm-project/commit/b90ea5caade7b92796276937467a0dabc355a62e
Author: c8ef <c8ef at outlook.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
A llvm/test/Transforms/InstCombine/erf.ll
Log Message:
-----------
[ConstantFold] Fold `erf` and `erff` when the input parameter is a constant value. (#113079)
This patch adds support for constant folding for the `erf` and `erff`
libc functions.
Commit: dc84337f7b5bb2447e30f3364ebc863e9e04b8be
https://github.com/llvm/llvm-project/commit/dc84337f7b5bb2447e30f3364ebc863e9e04b8be
Author: CarolineConcatto <caroline.concatto at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
A llvm/test/MC/AArch64/CMPBR/cmpbr-diagnostics.s
A llvm/test/MC/AArch64/CMPBR/cmpbr.s
A llvm/test/MC/AArch64/CMPBR/cmpbr_aliases-diagnostics.s
A llvm/test/MC/AArch64/CMPBR/cmpbr_aliases.s
A llvm/test/MC/AArch64/CMPBR/cmpbr_lbl.s
M llvm/test/MC/AArch64/directive-arch-negative.s
M llvm/test/MC/AArch64/directive-arch.s
M llvm/test/MC/AArch64/directive-arch_extension-negative.s
Log Message:
-----------
[LLVM][AArch64]Add assembly/disassembly for compare-and-branch instructions (#112726)
This patch adds the assembly/disassembly for the following instructions:
CBB<cc>, CBH<cc>,
CB<cc>(immediate), CB<cc>(register)
CBBLE, CBBLO, CBBLS, CBBLT
CBHLE, CBHLO, CBHLS, CBHLT
CBGE, CBHS, CBLE, CBLS (immediate)
CBLE, CBLO, CBLS, CBLT(register)
According to [1]
[1]https://developer.arm.com/documentation/ddi0602
Co-authored-by: Momchil Velikov momchil.velikov at arm.com
Co-authored-by: Spencer Abson spencer.abson at arm.com
Commit: a4d6fe54a7c3c967d88862e51660a5cdabc080bb
https://github.com/llvm/llvm-project/commit/a4d6fe54a7c3c967d88862e51660a5cdabc080bb
Author: Jack Styles <jack.styles at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
A llvm/test/MC/ARM/arm-movt-movw-range-fail.s
A llvm/test/MC/ARM/arm-movt-movw-range-pass.s
M llvm/test/MC/ARM/macho-movwt.s
Log Message:
-----------
Reland "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (PR #111970)" (#112877)
**Change relanded after feedback on failures and improvements to the
check of the addend. Original PR #111970**
Changes from original patch:
- The value that is being checked has changed, it is now correctly
checking any Addend for the instruction, rather than the Value. The
addend is kept within the Target data structure from my investigation.
- Removed changes to the following tests due to the original behaviour
being correct, and my original patch causing unexpected errors
- llvm/test/MC/ARM/Windows/mov32t-range.s
- llvm/test/MC/MachO/ARM/thumb2-movw-fixup.s
As per the ARM ABI, the MOVT and MOVW instructions should have addends
that fall within a 16bit signed range. LLVM does not check this so it is
possible to use addends that are beyond the accepted range. These
addends are silently truncated.
A new check is added to ensure the addend falls within the expected
range, rejecting an addend that falls outside with an error.
Information relating to the ABI requirements can be found here:
https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#addends-and-pc-bias-compensation
Commit: 5ee9c2c0d9e585ac9298c32e1f3783628be3ce0a
https://github.com/llvm/llvm-project/commit/5ee9c2c0d9e585ac9298c32e1f3783628be3ce0a
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h
M llvm/include/llvm/DebugInfo/PDB/DIA/DIAUtils.h
Log Message:
-----------
[DebugInfo] Fix missing includes in two headers (#112766)
Add include needed for DWARFContext to DwarfTransformer.h
Add include needed for windows types like HRESULT to DIAUtils.h
Commit: b735c66da9c9ae752b88941d466895a0b696c75e
https://github.com/llvm/llvm-project/commit/b735c66da9c9ae752b88941d466895a0b696c75e
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-tidy/ClangTidyModuleRegistry.h
M clang-tools-extra/clangd/URI.h
M clang-tools-extra/clangd/refactor/Tweak.h
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/IncludeSpeller.h
M clang/include/clang/Basic/ParsedAttrInfo.h
M clang/include/clang/Frontend/FrontendPluginRegistry.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Tooling/CompilationDatabasePluginRegistry.h
M clang/include/clang/Tooling/ToolExecutorPluginRegistry.h
M flang/include/flang/Frontend/FrontendPluginRegistry.h
M llvm/include/llvm/CodeGen/GCMetadataPrinter.h
M llvm/include/llvm/IR/GCStrategy.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/Registry.h
Log Message:
-----------
Reland 'Update llvm::Registry to work for LLVM shared library builds on windows' (#109024) (#112640)
Fix missing extern templates for llvm::Registry use in other projects of
llvm
Windows doesn't implicitly import and merge exported symbols across
shared libraries
like Linux does so we need to explicitly export/import each
instantiation of llvm::Registry.
Updated LLVM_INSTANTIATE_REGISTRY to just be a full explicit template
instantiation.
This is part of the work to enable LLVM_BUILD_LLVM_DYLIB and LLVM
plugins on window.
Commit: 69abfd31419d94857b89e1c54bf551f43a19f657
https://github.com/llvm/llvm-project/commit/69abfd31419d94857b89e1c54bf551f43a19f657
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
A llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
Log Message:
-----------
[AMDGPU] Allow casts between the Global and Constant Addr Spaces in isValidAddrSpaceCast (#112493)
So far, isValidAddrSpaceCast only allows casts to the flat address
space and between the constant(32) address spaces. It does not allow
casting between the global and constant address spaces, even though they
alias. That affects, e.g., the lowering of memmoves from the constant to
the global address space in LowerMemIntrinsics, since that requires
aliasing address spaces to be castable.
This patch relaxes isValidAddrSpaceCast and allows such casts. It also
includes a memmove test that would crash with the previous
implementation because the memmove IR lowering would not be
applicable for the move from constant AS to global AS.
Commit: 4614b80c49fbab8b0283bf4ccba0716c488bcd98
https://github.com/llvm/llvm-project/commit/4614b80c49fbab8b0283bf4ccba0716c488bcd98
Author: WANG Rui <wangrui at loongson.cn>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
Log Message:
-----------
[LoongArch] Pre-commit tests for merge base with large offset. NFC
Commit: 73057349a292df72b944380db6fe6dfffd59c7fa
https://github.com/llvm/llvm-project/commit/73057349a292df72b944380db6fe6dfffd59c7fa
Author: Rajveer Singh Bharadwaj <rajveer.developer at icloud.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/DeclCXX.cpp
A clang/test/SemaCXX/GH95854.cpp
Log Message:
-----------
[clang] Allow class with anonymous union member to be const-default-constructible even if a union member has a default member initializer (#95854) (#96301)
Resolves #95854
-- As per https://eel.is/c++draft/dcl.init#general-8.3
Commit: 0412d719283a5b6af283a74ab2694202664b6241
https://github.com/llvm/llvm-project/commit/0412d719283a5b6af283a74ab2694202664b6241
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[llvm][doc] Fix return type of `vector.histogram` in LangRef examples (NFC) (#113172)
The `@llvm.experimental.vector.histogram.add` returns void.
Commit: 9ae41c24b37f5ce22c5b5a2f3bc0680aaf174f35
https://github.com/llvm/llvm-project/commit/9ae41c24b37f5ce22c5b5a2f3bc0680aaf174f35
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Create dummy pointers for non-reference DeclRefExprs (#113202)
... with non-constant initializers.
Commit: 2f58ac4a22baa27c1e9aad1b3c6d5c687ef03721
https://github.com/llvm/llvm-project/commit/2f58ac4a22baa27c1e9aad1b3c6d5c687ef03721
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
Log Message:
-----------
[libc][x86] copy one cache line at a time to prevent the use of `rep;movsb` (#113161)
When using `-mprefer-vector-width=128` with `-march=sandybridge` copying
3 cache lines in one go (192B) gets converted into `rep;movsb` which
translate into a 60% hit in performance.
Consecutive calls to `__builtin_memcpy_inline` (implementation behind
`builtin::Memcpy::block_offset`) are not coalesced by the compiler and
so calling it three times in a row generates the desired assembly. It
only differs in the interleaving of the loads and stores and does not
affect performance.
This is needed to reland
https://github.com/llvm/llvm-project/pull/108939.
Commit: d15559d69d519cae203508b1ffe3adbdd29ab387
https://github.com/llvm/llvm-project/commit/d15559d69d519cae203508b1ffe3adbdd29ab387
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/lambda-pack-expansion.cpp
Log Message:
-----------
[Clang] Don't assert on substituted-but-yet-expanded packs for nested lambdas (#112896)
Nested lambdas could refer to outer packs that would be expanded by a
larger CXXFoldExpr, in which case that reference could happen to be a
full expression containing intermediate types/expressions, e.g.
SubstTemplateTypeParmPackType/FunctionParmPackExpr. They are designated
as "UnexpandedPack" dependencies but don't introduce new packs anyway.
This also handles a missed case for VarDecls, where the flag of
ContainsUnexpandedPack was not propagated up to the surrounding lambda.
Fixes #112352
Commit: f719cfa8685a30a3f4115cc0ce446262daf81244
https://github.com/llvm/llvm-project/commit/f719cfa8685a30a3f4115cc0ce446262daf81244
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/offset-range-known-via-assume.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
Log Message:
-----------
LAA: be less conservative in isNoWrap (#112553)
isNoWrap has exactly one caller which handles Assume = true separately,
but too conservatively. Instead, pass Assume to isNoWrap, so it is
threaded into getPtrStride, which has the correct handling for the
Assume flag. Also note that the Stride == 1 check in isNoWrap is
incorrect: getPtrStride returns Strides == 1 or -1, except when
isNoWrapAddRec or Assume are true, assuming ShouldCheckWrap is true; we
can include the case of -1 Stride, and when isNoWrapAddRec is true. With
this change, passing Assume = true to getPtrStride could return a
non-unit stride, and we correctly handle that case as well.
Commit: d897ea37dbac66d51794938af4f112e05fb61b05
https://github.com/llvm/llvm-project/commit/d897ea37dbac66d51794938af4f112e05fb61b05
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
Log Message:
-----------
LAA: check nusw on GEP in place of inbounds (#112223)
With the introduction of the nusw flag in GEPNoWrapFlags, it should be
safe to weaken the check in LoopAccessAnalysis to just check the nusw
flag on the GEP, instead of inbounds.
Commit: 1e9a296557adbb5168346774c92814497e34524c
https://github.com/llvm/llvm-project/commit/1e9a296557adbb5168346774c92814497e34524c
Author: Andrei Safronov <andrei.safronov at espressif.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
A llvm/test/CodeGen/Xtensa/branch_analyze.ll
M llvm/test/CodeGen/Xtensa/brcc.ll
M llvm/test/CodeGen/Xtensa/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/Xtensa/select-cc.ll
Log Message:
-----------
[Xtensa] Implement branch analysis. (#110959)
Commit: c0c36aa0189de217d7a312829ba40e838090294d
https://github.com/llvm/llvm-project/commit/c0c36aa0189de217d7a312829ba40e838090294d
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/CodeGen/CGExprScalar.cpp
A clang/test/CodeGen/builtins-array-rank.cpp
Log Message:
-----------
[clang codegen] fix crash emitting __array_rank (#113186)
Fixed: #113044
the type of `ArrayTypeTraitExpr` can be changed, use i32 directly is
incorrect.
---------
Co-authored-by: Eli Friedman <efriedma at quicinc.com>
Commit: 6bb72de75a81e27b2768db767350bcf4ce7d2a2c
https://github.com/llvm/llvm-project/commit/6bb72de75a81e27b2768db767350bcf4ce7d2a2c
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Update cxx_dr_status.html
Commit: 83c6e2f8f4d3436a9cc1ebe10476e32e0fce3a9d
https://github.com/llvm/llvm-project/commit/83c6e2f8f4d3436a9cc1ebe10476e32e0fce3a9d
Author: Caroline Concatto <caroline.concatto at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64FixupKinds.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
R llvm/test/MC/AArch64/CMPBR/cmpbr-diagnostics.s
R llvm/test/MC/AArch64/CMPBR/cmpbr.s
R llvm/test/MC/AArch64/CMPBR/cmpbr_aliases-diagnostics.s
R llvm/test/MC/AArch64/CMPBR/cmpbr_aliases.s
R llvm/test/MC/AArch64/CMPBR/cmpbr_lbl.s
M llvm/test/MC/AArch64/directive-arch-negative.s
M llvm/test/MC/AArch64/directive-arch.s
M llvm/test/MC/AArch64/directive-arch_extension-negative.s
Log Message:
-----------
Revert "[LLVM][AArch64]Add assembly/disassembly for compare-and-branch instructions (#112726)"
This reverts commit dc84337f7b5bb2447e30f3364ebc863e9e04b8be.
Reversting because the sanitizer fails with the following error
llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp:502:56:
runtime error: left shift of negative value -256
Commit: 93802815abdb1e1f326162b930a8028eaccb73d5
https://github.com/llvm/llvm-project/commit/93802815abdb1e1f326162b930a8028eaccb73d5
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/VirtRegMap.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/X86/X86TileConfig.cpp
Log Message:
-----------
[NewPM][CodeGen] Port VirtRegMap to NPM (#109936)
Commit: 834b820f4047dcdce555f6a768821d95b04b2407
https://github.com/llvm/llvm-project/commit/834b820f4047dcdce555f6a768821d95b04b2407
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
Log Message:
-----------
[AMDGPU] Correct pass dependencies for SILowerSGPRSpills (#109937)
Replace unused analysis (VirtRegMap) dependency with the used one (SlotIndexes)
Initializes `SlotIndexesWrapperPass` which is used by SILowerSGPRSpills to ensure that legacy pass manager finds it.
Removes the initialization for `VirtRegMapWrapperPass` since it is not requested in this pass.
Commit: 75ec65e384d73d97bab2f1a4e273df4b622af4c4
https://github.com/llvm/llvm-project/commit/75ec65e384d73d97bab2f1a4e273df4b622af4c4
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LiveIntervalUnion.h
Log Message:
-----------
[CodeGen] LiveIntervalUnions::Array Implement move constructor (#111357)
Solves the double free error.
Commit: 4e32d7236b27affa5ae795d194e89d183b623f41
https://github.com/llvm/llvm-project/commit/4e32d7236b27affa5ae795d194e89d183b623f41
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
Log Message:
-----------
[NewPM][CodeGen] Port LiveRegMatrix to NPM (#109938)
Commit: f8cb526076270a02510ce75011a805369a5ddd51
https://github.com/llvm/llvm-project/commit/f8cb526076270a02510ce75011a805369a5ddd51
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
A llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs.mir
Log Message:
-----------
[AMDGPU] Add tests for SIPreAllocateWWMRegs (#109963)
Commit: ca32bd643b85d329e0b004b5a681b4f758ba1a40
https://github.com/llvm/llvm-project/commit/ca32bd643b85d329e0b004b5a681b4f758ba1a40
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
A llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h
M llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs.mir
Log Message:
-----------
[NewPM][AMDGPU] Port SIPreAllocateWWMRegs to NPM (#109939)
Commit: e7f1dae41241af6b26aed35d78e1eb9d728f2695
https://github.com/llvm/llvm-project/commit/e7f1dae41241af6b26aed35d78e1eb9d728f2695
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] gfx1152 does not have Feature1_5xVGPRs (#113163)
Commit: 11c818816d0558408eb966238bd9df5f54ac5fd0
https://github.com/llvm/llvm-project/commit/11c818816d0558408eb966238bd9df5f54ac5fd0
Author: James Chesterman <James.Chesterman at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve2-histcnt.ll
Log Message:
-----------
[AArch64] Improve index selection for histograms (#111150)
Removes unnecessary extends on the indices passed into histogram instructions. It also removes the instruction when the mask is zero.
Commit: aea60ab94db4729bad17daa86ccfc411d48a1699
https://github.com/llvm/llvm-project/commit/aea60ab94db4729bad17daa86ccfc411d48a1699
Author: Emilia Kond <emilia at rymiel.space>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Make bitwise and imply requires clause (#110942)
This patch adjusts the requires clause/expression parser to imply a
requires clause if it is preceded by a bitwise and operator `&`, and
assume it is a reference qualifier. The justification is that bitwise
operations should not be used for requires expressions.
This is a band-aid fix. The real problems lie in the lookahead heuristic
in the same method. It may be worth it to rewrite that whole heuristic
to track more state in the future, instead of just blindly marching
forward across multiple unrelated definitions, since right now, the
definition following the one with the requires clause can influence
whether the heuristic chooses clause or expression.
Fixes https://github.com/llvm/llvm-project/issues/110485
Commit: 6e0b0038cd65ce726ce404305a06e1cf33e36cca
https://github.com/llvm/llvm-project/commit/6e0b0038cd65ce726ce404305a06e1cf33e36cca
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-nullptr.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/atomics-unsafe-hw-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx940.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx8.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/opencl_types.cl
M clang/test/Index/pipe-size.cl
Log Message:
-----------
[clang][OpenCL][CodeGen][AMDGPU] Do not use `private` as the default AS for when `generic` is available (#112442)
Currently, for AMDGPU, when compiling for OpenCL, we unconditionally use
`private` as the default address space. This is wrong for cases where
the `generic` address space is available, and is corrected via this
patch. In general, this AS map abuse is a bad hack and we should re-work
it altogether, but at least after this patch we will stop being
incorrect for e.g. OpenCL 2.0.
Commit: b3acb25735fdeeafcc0944ad85d2af27fe332c10
https://github.com/llvm/llvm-project/commit/b3acb25735fdeeafcc0944ad85d2af27fe332c10
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
[AMDGPU] Don't rely on !eq comparing int with bits<5>. NFC. (#113279)
Tweak VOP2eInst_Base so that it does not rely on !eq comparing an int
value (-1) with a bits<5> value. This is to avoid a change in behaviour
when #112904 lands, which is a bug fix which has the side effect of
implicitly casting template arguments to the declared template parameter
type.
Commit: cd290a6480d575110e5d74f71f403f8fbbaaa6a7
https://github.com/llvm/llvm-project/commit/cd290a6480d575110e5d74f71f403f8fbbaaa6a7
Author: lifengxiang1025 <lifengxiang at kuaishou.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/docs/CompileCudaWithLLVM.rst
Log Message:
-----------
[Doc] Update a broken link in CompileCudaWithLLVM (#113282)
Commit: f1ade1f874db066a46142cacbb67f80d272862ed
https://github.com/llvm/llvm-project/commit/f1ade1f874db066a46142cacbb67f80d272862ed
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] while_le(#,max_int) -> all_active (#111183)
When the second operand of an incrementing while instruction is the
maximum value, comparisons that include equality can never fail.
Commit: deecfa90c6873aed882e2e55e539bd796bde01b0
https://github.com/llvm/llvm-project/commit/deecfa90c6873aed882e2e55e539bd796bde01b0
Author: Krasimir Georgiev <krasimir at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
bazelbuild: adapt for commit b735c66da9 (#113302)
Commit: a6d6c00fe7515763650b28ef56f1fc4b5c568c1c
https://github.com/llvm/llvm-project/commit/a6d6c00fe7515763650b28ef56f1fc4b5c568c1c
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
Log Message:
-----------
[clang] Lifetimebound in assignment operator should work for non-gsl annotated types. (#113180)
This issue is identified during the discussion of [this
comment](https://github.com/llvm/llvm-project/issues/112234#issuecomment-2426102198).
There will be no release note for this fix as it is a follow-up to
[#106997](https://github.com/llvm/llvm-project/pull/106997).
Commit: 91c11574e87b5c0f434688edac01e9580ef99a92
https://github.com/llvm/llvm-project/commit/91c11574e87b5c0f434688edac01e9580ef99a92
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.h
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/pad-to-specific-memory-space.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Examples/transform/ChH/full.mlir
Log Message:
-----------
Revert "[MLIR] Make `OneShotModuleBufferize` use `OpInterface` (#110322)" (#113124)
This reverts commit 2026501cf107fcb3cbd51026ba25fda3af823941.
Failing bot:
* https://lab.llvm.org/staging/#/builders/125/builds/389
Commit: 56f75b5c1510cea7648cad0cb32e4e0810edd0d9
https://github.com/llvm/llvm-project/commit/56f75b5c1510cea7648cad0cb32e4e0810edd0d9
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/test/SemaCXX/attr-lifetimebound.cpp
Log Message:
-----------
Fix the broken test
Commit: 5bb34803a48598c3fa6e480de1814d5fe2d0f652
https://github.com/llvm/llvm-project/commit/5bb34803a48598c3fa6e480de1814d5fe2d0f652
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/variadic-nvptx.c
M llvm/test/Analysis/CostModel/SystemZ/divrem-pow2.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/Instrumentation/MemorySanitizer/reduce.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
M llvm/test/Transforms/InstCombine/AArch64/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/aes-intrinsics.ll
M llvm/test/Transforms/InstCombine/pow-0.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
Log Message:
-----------
[NFC] Migrate tests to use autoupdate for CHECK lines.
Commit: c623df38c97d40889f2691775019dba32ac22c9b
https://github.com/llvm/llvm-project/commit/c623df38c97d40889f2691775019dba32ac22c9b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M libcxx/test/std/atomics/atomics.lockfree/is_always_lock_free.pass.cpp
Log Message:
-----------
[libc++] Fix typo in is_always_lock_free test (#113169)
Commit: d6e714b10e102eb32e64e04bf177226dbe16d0e7
https://github.com/llvm/llvm-project/commit/d6e714b10e102eb32e64e04bf177226dbe16d0e7
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M libcxx/test/libcxx/header_inclusions.gen.py
M libcxx/test/libcxx/headers_in_modulemap.sh.py
M libcxx/test/libcxx/transitive_includes.gen.py
A libcxx/test/libcxx/transitive_includes/to_csv.py
R libcxx/test/libcxx/transitive_includes_to_csv.py
M libcxx/utils/generate_iwyu_mapping.py
M libcxx/utils/generate_libcxx_cppm_in.py
M libcxx/utils/libcxx/header_information.py
Log Message:
-----------
[libc++] Rewrite the transitive header checking machinery (#110554)
Since we don't generate a full dependency graph of headers, we can
greatly simplify the script that parses the result of --trace-includes.
At the same time, we also unify the mechanism for detecting whether a
header is a public/C compat/internal/etc header with the existing
mechanism in header_information.py.
As a drive-by this fixes the headers_in_modulemap.sh.py test which had
been disabled by mistake because it used its own way of determining
the list of libc++ headers. By consistently using header_information.py
to get that information, problems like this shouldn't happen anymore.
This should also unblock #110303, which was blocked because of
a brittle implementation of the transitive includes check which broke
when the repository was cloned at a path like /path/__something/more.
Commit: b81d8e90339a788cc6cb148831612c6b39b93ad5
https://github.com/llvm/llvm-project/commit/b81d8e90339a788cc6cb148831612c6b39b93ad5
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/Parse/ParseDeclCXX.cpp
Log Message:
-----------
[NFC][Clang] Fix enumerated mismatch warning (#112816)
This is one of the many PRs to fix errors with LLVM_ENABLE_WERROR=on.
Built by GCC 11.
```
Fix warning:
llvm-project/clang/lib/Parse/ParseDeclCXX.cpp:3153:14: error: enumerated mismatch in conditional expression: ‘clang::diag::<unnamed enum>’ vs ‘clang::diag::<unnamed enum>’ [-Werror=enum-compare]
3152 | DS.isFriendSpecified() || NextToken().is(tok::kw_friend)
| ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
3153 | ? diag::err_friend_concept
| ^~~~~~~~~~~~~~~~~~~~~~~~~~
3154 | : diag::
| ~~~~~~~~
3155 | err_concept_decls_may_only_appear_in_global_namespace_scope);
```
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: 6761b24ae2f34b923df46412475a9ece50542b97
https://github.com/llvm/llvm-project/commit/6761b24ae2f34b923df46412475a9ece50542b97
Author: Jan Voung <jvoung at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
Log Message:
-----------
[clang][dataflow] Cache accessors for bugprone-unchecked-optional-access (#112605)
Treat calls to zero-param const methods as having stable return values
(with a cache) to address issue #58510. The cache is invalidated when
non-const methods are called. This uses the infrastructure from PR
#111006.
For now we cache methods returning:
- ref to optional
- optional by value
- booleans
We can extend that to pointers to optional in a next change.
Commit: 6512a8dd8c0ac255a082c93d66e29606f4546fee
https://github.com/llvm/llvm-project/commit/6512a8dd8c0ac255a082c93d66e29606f4546fee
Author: tltao <tony.le.tao at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/CMakeLists.txt
M llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.h
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.h
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/SystemZ.td
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
Log Message:
-----------
[SystemZ] Split SystemZInstPrinter to two classes based on Asm dialect (#112975)
In preparation for future work on separating the output of the GNU/HLASM
ASM dialects, we first separate the SystemZInstPrinter classes to two
versions, one for each ASM dialect.
The common code remains in a SystemZInstPrinterCommon class instead.
---------
Co-authored-by: Tony Tao <tonytao at ca.ibm.com>
Commit: 4275a731249c5becec666f47d26254695fd7f468
https://github.com/llvm/llvm-project/commit/4275a731249c5becec666f47d26254695fd7f468
Author: Michael Jones <michaelrj at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M libc/src/__support/macros/properties/types.h
Log Message:
-----------
[libc] Fix long double is double double const (#113258)
Turns out for double double LDBL_MANT_DIG == 106. This patch fixes the
constant. Should fix the ppc buildbot.
Previously:
https://github.com/llvm/llvm-project/pull/113235
https://github.com/llvm/llvm-project/issues/113237
https://github.com/llvm/llvm-project/pull/91651
Commit: 4c697f7037b719b9ed1fa3bcaa68c4a4219c2fc5
https://github.com/llvm/llvm-project/commit/4c697f7037b719b9ed1fa3bcaa68c4a4219c2fc5
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
Log Message:
-----------
[LowerMemIntrinsics] Use i8 GEPs in memcpy/memmove lowering (#112707)
The IR lowering of memcpy/memmove intrinsics uses a target-specific type
for its load/store operations. So far, the loaded and stored addresses
are computed with GEPs based on this type. That is wrong if the
allocation size of the type differs from its store size: The width of
the accesses is determined by the store size, while the GEP stride is
determined by the allocation size. If the allocation size is greater
than the store size, some bytes are not copied/moved.
This patch changes the GEPs to use i8 addressing, with offsets based on
the type's store size. The correctness of the lowering therefore no
longer depends on the type's allocation size.
This is in support of PR #112332, which allows adjusting the memcpy loop
lowering type through a command line argument in the AMDGPU backend.
Commit: 1004865f1ca41a9581da8747f34b29862d3ebc3d
https://github.com/llvm/llvm-project/commit/1004865f1ca41a9581da8747f34b29862d3ebc3d
Author: Kunwar Grover <groverkss at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
Log Message:
-----------
[mlir][Vector] Support 0-d vectors natively in TransferOpReduceRank (#112907)
Since
https://github.com/llvm/llvm-project/commit/ddf2d62c7dddf1e4a9012d96819ff1ed005fbb05
, 0-d vectors are supported in VectorType. This patch removes 0-d vector
handling with scalars for the TransferOpReduceRank pattern. This pattern
specifically introduces tensor.extract_slice during vectorization,
causing vectorization to not fold transfer_read/transfer_write slices
properly. The changes in vectorization test files reflect this.
There are other places where lowering patterns are still side-stepping
from handling 0-d vectors properly, by turning them into scalars, but
this patch only focuses on the vector.transfer_x patterns.
Commit: ac1a01f53333e819913e91393580d6786be02c3f
https://github.com/llvm/llvm-project/commit/ac1a01f53333e819913e91393580d6786be02c3f
Author: Daniel Hoekwater <hoekwater at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/CFIFixup.cpp
Log Message:
-----------
Reland [CFIFixup] Factor CFI remember/restore insertion into a helper (NFC) (#113328)
The previous submission looked like it triggered build failure
https://lab.llvm.org/buildbot/#/builders/17/builds/3116, but this
appears to be a spurious failure due to a flaky test.
Commit: da66f6a2801e350b84b7613e2675863964c4d695
https://github.com/llvm/llvm-project/commit/da66f6a2801e350b84b7613e2675863964c4d695
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
Log Message:
-----------
[llvm-jitlink] Use heterogenous lookups with std::map (NFC) (#113245)
Commit: 0690a42261a5e228b34409c79e76ed47d1080f21
https://github.com/llvm/llvm-project/commit/0690a42261a5e228b34409c79e76ed47d1080f21
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/BPF/BTFDebug.cpp
Log Message:
-----------
[BPF] Avoid repeated map lookups (NFC) (#113247)
Commit: 5dbfb49490c5f06c9c7843051471956b11ef2abd
https://github.com/llvm/llvm-project/commit/5dbfb49490c5f06c9c7843051471956b11ef2abd
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
Log Message:
-----------
[lldb] Avoid repeated hash lookups (NFC) (#113248)
Commit: c5ea7b8338e6947b5219f95a60702fac1da633ee
https://github.com/llvm/llvm-project/commit/c5ea7b8338e6947b5219f95a60702fac1da633ee
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M mlir/lib/Pass/IRPrinting.cpp
Log Message:
-----------
[mlir] Avoid repeated hash lookups (NFC) (#113249)
Commit: d8d144aea57af3840775464f9224a6edde607dea
https://github.com/llvm/llvm-project/commit/d8d144aea57af3840775464f9224a6edde607dea
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/MC/AArch64/SVE2/bfscale-diagnostics.s
A llvm/test/MC/AArch64/SVE2/bfscale.s
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu.s
Log Message:
-----------
[LLVM][AArch64] Add assembly/disassembly of SVE BFSCALE instruction (#113168)
This patch add assembly/disassembly and tests for sve bfscale
instruction according to https://developer.arm.com/documentation/ddi0602
.
Commit: a18826d75cb0d0d13fc1aef620e04d2901e9bced
https://github.com/llvm/llvm-project/commit/a18826d75cb0d0d13fc1aef620e04d2901e9bced
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
A llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
Log Message:
-----------
[AMDGPU] Create local KnownBits in case DenseMap gets invalidated (#111568)
KnownBits retrieved from DenseMap may invalidate if insertion requires a
(re)growth.
Fixes https://github.com/llvm/llvm-project/issues/110930
Commit: 6e535a9ac70fc0e69778f0d6c4568cb64a0e25db
https://github.com/llvm/llvm-project/commit/6e535a9ac70fc0e69778f0d6c4568cb64a0e25db
Author: Nashe Mncube <nashe.mncube at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/test/Driver/aarch64-v96a.c
M clang/test/Driver/print-supported-extensions-aarch64.c
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
A llvm/test/MC/AArch64/armv9.6a-lsui.s
A llvm/test/MC/AArch64/armv9.6a-occmo.s
A llvm/test/MC/AArch64/armv9.6a-pcdphint.s
A llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
A llvm/test/MC/AArch64/armv9.6a-srmask.s
A llvm/test/MC/Disassembler/AArch64/armv9.6a-lsui.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-occmo.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-pcdphint.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-rme-gpc3.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-srmask.txt
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[LLVM][MC][AArch64] Assembler support for Armv9.6-A memory systems extensions (#112341)
Add support for the following Armv9.6-A memory systems extensions:
FEAT_LSUI - Unprivileged Load Store
FEAT_OCCMO - Outer Cacheable Cache Maintenance Operation
FEAT_PCDPHINT - Producer-Consumer Data Placement Hints
FEAT_SRMASK - Bitwise System Register Write Masks
as documented here:
https://developer.arm.com/documentation/109697/2024_09/Feature-descriptions/The-Armv9-6-architecture-extension
Co-authored-by: Jonathan Thackray <jonathan.thackray at arm.com>
---------
Co-authored-by: Jonathan Thackray <jonathan.thackray at arm.com>
Commit: 5942be03eadc8abd320e3dad1abcc4e87ce4171a
https://github.com/llvm/llvm-project/commit/5942be03eadc8abd320e3dad1abcc4e87ce4171a
Author: Jordan Rupprecht <rupprecht at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M lldb/test/API/commands/settings/use_source_cache/Makefile
Log Message:
-----------
[lldb][test] Fix TestUseSourceCache for readonly source trees (#113251)
TestUseSourceCache attempts to write to a build artifact copied from the
source tree, and asserts the write succeeded. If the source tree is read
only, the copy will also be read only, causing it to fail. When
producing the build artifact, ensure that it is writable.
Commit: 40c3e583b7c29c94b3fdd2361c5288b2dcc3be83
https://github.com/llvm/llvm-project/commit/40c3e583b7c29c94b3fdd2361c5288b2dcc3be83
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/unittests/Support/KnownBitsTest.cpp
Log Message:
-----------
[KnownBits] Check that mul is optimal for low order bits (#113316)
Commit: 8bbd0797d4b8aa1d993f587eb2dfd9a89df1f406
https://github.com/llvm/llvm-project/commit/8bbd0797d4b8aa1d993f587eb2dfd9a89df1f406
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/include/clang/Basic/Module.h
M clang/include/clang/Lex/ModuleMap.h
M clang/lib/Basic/Module.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/Pragma.cpp
Log Message:
-----------
[clang] Allocate `Module` instances in `BumpPtrAllocator` (#112795)
In `clang-scan-deps`, we're creating lots of `Module` instances.
Allocating them all in a bump-pointer allocator reduces the number of
retired instructions by 1-1.5% on my workload.
Commit: db21bd4fa9bf40a9f6e7713bf674dcfaa48d1d5b
https://github.com/llvm/llvm-project/commit/db21bd4fa9bf40a9f6e7713bf674dcfaa48d1d5b
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-23 (Wed, 23 Oct 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
M llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
Log Message:
-----------
[ORC] Move EPC load-dylib and lookup operations into their own class.
This keeps common operations together, and should make it easier to write
re-usable dylib managers in the future (e.g. a DylibManager that uses
the EPC's remote-execution APIs to implement load and lookup).
Commit: cd4b33c9a976543171bb7b3455c485f99cfe654b
https://github.com/llvm/llvm-project/commit/cd4b33c9a976543171bb7b3455c485f99cfe654b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M lldb/include/lldb/Utility/Log.h
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Utility/Log.cpp
Log Message:
-----------
[lldb] Log errors to the system log if they would otherwise get dropped (#111911)
Log errors to the (always-on) system log if they would otherwise get
dropped by LLDB_LOG_ERROR.
Commit: 41365dcbd6aae0cb9c66fbe2e57adb658a2a3167
https://github.com/llvm/llvm-project/commit/41365dcbd6aae0cb9c66fbe2e57adb658a2a3167
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-23 (Wed, 23 Oct 2024)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/DylibManager.h
Log Message:
-----------
[ORC] Add missing DylibManager header.
-
Accidentally left out of db21bd4fa9bf40a9f6e7713bf674dcfaa48d1d5b.
Commit: 2074de252b59a82279c275a1c8e7a4be6e1101d8
https://github.com/llvm/llvm-project/commit/2074de252b59a82279c275a1c8e7a4be6e1101d8
Author: Alex Voicu <alexandru.voicu at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/Sema/SemaType.cpp
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
Log Message:
-----------
[clang][HIP] Don't use the OpenCLKernel CC when targeting AMDGCNSPIRV (#110447)
When compiling HIP source for AMDGCN flavoured SPIR-V that is expected
to be consumed by the ROCm HIP RT, it's not desirable to set the OpenCL
Kernel CC on `__global__` functions. On one hand, this is not an OpenCL
RT, so it doesn't compose with e.g. OCL specific attributes. On the
other it is a "noisy" CC that carries semantics, and breaks overload
resolution when using [generic dispatchers such as those used by
RAJA](https://github.com/LLNL/RAJAPerf/blob/186d4194a5719788ae96631c923f9ca337f56970/src/common/HipDataUtils.hpp#L39).
Commit: b263a71c2b1b14be53102f0a2ce4df131937f478
https://github.com/llvm/llvm-project/commit/b263a71c2b1b14be53102f0a2ce4df131937f478
Author: Peng Liu <winner245 at hotmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M libcxx/include/vector
Log Message:
-----------
[libc++] Refactor vector constructors to eliminate code duplication (#113193)
This PR refactors the std::vector's initializer_list constructors to
reduce code duplication. The constructors now call `__init_with_size`
directly, reducing code duplication and improving readability and
maintainability.
Commit: 53a8a7cd85c3dd41c04daa65d5497f8d6b79936a
https://github.com/llvm/llvm-project/commit/53a8a7cd85c3dd41c04daa65d5497f8d6b79936a
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ObjectFormats.h
Log Message:
-----------
[ORC] Fix typo in include guard comment.
Commit: 470a5991920730242acd18c90449d77fabdada63
https://github.com/llvm/llvm-project/commit/470a5991920730242acd18c90449d77fabdada63
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/Shared/MachOObjectFormat.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ObjectFormats.h
M llvm/lib/ExecutionEngine/Orc/Shared/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/Shared/MachOObjectFormat.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/ObjectFormats.cpp
Log Message:
-----------
[ORC] Move MachO object format details into their own header (NFC).
Commit: dc5c044193b31231dcb1d32c76bb03cbc9ed2c74
https://github.com/llvm/llvm-project/commit/dc5c044193b31231dcb1d32c76bb03cbc9ed2c74
Author: Greg Clayton <gclayton at fb.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
A llvm/test/tools/llvm-dwarfdump/Inputs/verify_split_dwarf_debug_names_ftus_dwo.yaml
A llvm/test/tools/llvm-dwarfdump/Inputs/verify_split_dwarf_debug_names_ftus_exe.yaml
A llvm/test/tools/llvm-dwarfdump/verify_split_dwarf_debug_names_ftus.test
Log Message:
-----------
Add verification support for .debug_names with foreign type units. (#109011)
This commit enables 'llvm-dwarfdump --veriy' to verify the DWARF in
foreign type units when using split DWARF for the .debug_names section.
Commit: 91fd1b4f32206267f6b9ce0dc4977d62ef227151
https://github.com/llvm/llvm-project/commit/91fd1b4f32206267f6b9ce0dc4977d62ef227151
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/test/SemaCUDA/fp16-arg-return.cu
Log Message:
-----------
[HIP] Always add -fnative-half-arguments-and-returns cmdline option. (#113335)
This command-line option is now required while building the HIP
applications (mainly for the host side) after we enabled __fp16
args and return values with patches D133885 & D145345.
Commit: 2ccbea1d738332cd92d8d33fdd51dfac3482328e
https://github.com/llvm/llvm-project/commit/2ccbea1d738332cd92d8d33fdd51dfac3482328e
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/tools/dsymutil/DebugMap.cpp
M llvm/tools/dsymutil/DebugMap.h
M llvm/tools/dsymutil/MachODebugMapParser.cpp
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/dsymutil/dsymutil.h
Log Message:
-----------
[dsymutil] Share one BinaryHolder between debug map parsing & linking (#113234)
I (re)discovered that dsymutil was instantiating two BinaryHolders: one
for parsing the debug map and one for linking. That really defeats the
purpose of the BinaryHolder as it serves as a cache. Fix the issue and
remove an old FIXME.
Commit: 5886454669c3c9026f7f27eab13509dd0241f2d6
https://github.com/llvm/llvm-project/commit/5886454669c3c9026f7f27eab13509dd0241f2d6
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/docs/CommandGuide/dsymutil.rst
M llvm/test/tools/dsymutil/X86/timestamp-mismatch.test
M llvm/test/tools/dsymutil/cmdline.test
M llvm/tools/dsymutil/BinaryHolder.cpp
M llvm/tools/dsymutil/BinaryHolder.h
M llvm/tools/dsymutil/Options.td
M llvm/tools/dsymutil/dsymutil.cpp
Log Message:
-----------
[dsymutil] Provide an option to ignore object timestamp mismatches (#113238)
Provide a option (--no-object-timestamp) to ignore object file timestamp
mismatches. We already have a similar option for Swift modules
(--no-swiftmodule-timestamp).
rdar://123975869
Commit: f66bc4d3f1ef5f4e16db0ac51a14f6941af90d0d
https://github.com/llvm/llvm-project/commit/f66bc4d3f1ef5f4e16db0ac51a14f6941af90d0d
Author: Daniel Hoekwater <hoekwater at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/CFIFixup.cpp
Log Message:
-----------
Revert "Reland [CFIFixup] Factor CFI remember/restore insertion into a helper (NFC)" (#113340)
Reverts llvm/llvm-project#113328
This change breaks a number of builds (e.g
https://lab.llvm.org/buildbot/#/builders/25/builds/3504), for some
reason. Reverting to do some troubleshooting.
Commit: 2fdf49db7562eadbe01b18f0d01a955cd41b94ea
https://github.com/llvm/llvm-project/commit/2fdf49db7562eadbe01b18f0d01a955cd41b94ea
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/test/tools/llvm-rc/tag-html.test
Log Message:
-----------
[llvm-rc] Handle Windows line endings in tag-html test (#113000)
The tag-html.test has been failing for me and [in
CI](https://buildkite.com/llvm-project/github-pull-requests/builds/111277#0192a122-c5c9-4e4e-bc5b-7532fec99ae4)
if Git happens to decide to check out the baseline file with Windows
line endings.
This fix for this is to call `tr` to strip Windows newlines when copying
the baselines files to the test output directory before embedding them.
Commit: 7b308b18c3946dd0e09c661db52f70eff3fe8104
https://github.com/llvm/llvm-project/commit/7b308b18c3946dd0e09c661db52f70eff3fe8104
Author: Sergey Kozub <skozub at nvidia.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
Fix bitcasting E8M0 APFloat to APInt (#113298)
Fixes a bug in APFloat handling of E8M0 type (zero mantissa).
Related PRs:
- https://github.com/llvm/llvm-project/pull/107127
- https://github.com/llvm/llvm-project/pull/111028
Commit: 6803062eb7f2e5ca3db2695688239aa57cdbcd0e
https://github.com/llvm/llvm-project/commit/6803062eb7f2e5ca3db2695688239aa57cdbcd0e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M bolt/lib/Core/DIEBuilder.cpp
Log Message:
-----------
[BOLT] Fix a build failure
This patch fixes:
bolt/lib/Core/DIEBuilder.cpp:285:40: error: too many arguments to
function call, expected 2, have 3
Commit: 2cbe7c2b9e1c5b39bceb20707723146147883b2b
https://github.com/llvm/llvm-project/commit/2cbe7c2b9e1c5b39bceb20707723146147883b2b
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port 1295d2e6da2f
Commit: c08a5c15e149c3620a74db1291f71f5193b31dd2
https://github.com/llvm/llvm-project/commit/c08a5c15e149c3620a74db1291f71f5193b31dd2
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Shared/BUILD.gn
Log Message:
-----------
[gn build] Port 470a59919207
Commit: 24293e6900028487beaf7f44965464ca9cb2745d
https://github.com/llvm/llvm-project/commit/24293e6900028487beaf7f44965464ca9cb2745d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
Log Message:
-----------
[gn build] Port 6512a8dd8c0a
Commit: 50df49e02a5875081c6bfbc533efe53ee6a1768b
https://github.com/llvm/llvm-project/commit/50df49e02a5875081c6bfbc533efe53ee6a1768b
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn build] Port 6c4267fb1779
Commit: 62cb1a3b0bc77ed36ee06345e739e66e8c0cc211
https://github.com/llvm/llvm-project/commit/62cb1a3b0bc77ed36ee06345e739e66e8c0cc211
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
[gn build] Port b8930cd13d48
Commit: 0764e55c91514734ff79ca4d666fbce2fa89fc9d
https://github.com/llvm/llvm-project/commit/0764e55c91514734ff79ca4d666fbce2fa89fc9d
Author: Sam Clegg <sbc at chromium.org>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
A lld/test/wasm/version.test
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
Log Message:
-----------
[lld][WebAssembly] Improve -v/-V/--version flag compat (#113204)
Fixes: #112836
Commit: 383bd05818ac395076c2e05d152601bbc80fa2d7
https://github.com/llvm/llvm-project/commit/383bd05818ac395076c2e05d152601bbc80fa2d7
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/docs/CodeOfConduct.rst
Log Message:
-----------
[docs] Add link to newest CoC transparency report
Commit: 9b9c2a082c240826e2cf91bb8e3a1dcb5bbba78a
https://github.com/llvm/llvm-project/commit/9b9c2a082c240826e2cf91bb8e3a1dcb5bbba78a
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV][NFC] Move RISCVISD::TAIL beside RISCVISD::CALL
Commit: 9edb4f74a606a7ba021accdb8896295bbaf18314
https://github.com/llvm/llvm-project/commit/9edb4f74a606a7ba021accdb8896295bbaf18314
Author: muiez <73544786+muiez at users.noreply.github.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/include/clang/Support/Compiler.h
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
Define CLANG_ABI and LLVM_ABI for z/OS (#113333)
This patch fixes the build failure seen on z/OS:
```
llvm/clang/include/clang/ASTMatchers/ASTMatchers.h:7212:1: error: unknown type name 'CLANG_ABI'
```
Commit: 8536c2e9a25681b6b0c740e708411f0ed3b12f11
https://github.com/llvm/llvm-project/commit/8536c2e9a25681b6b0c740e708411f0ed3b12f11
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/include/clang/AST/ExprConcepts.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
Log Message:
-----------
[clang][NFC] Move `concepts::createSubstDiagAt` from AST to Sema (#113294)
This fixes layering violation introduced in
2fd01d75a863184766ee0c82b5c0fc8be172448a. The declaration is moved to
`SemaTemplateInstantiate` section of `Sema.h`, after the file where it's
implemented.
Commit: 1b0fcf1e42e05611ec37aa7956988ae6317ad116
https://github.com/llvm/llvm-project/commit/1b0fcf1e42e05611ec37aa7956988ae6317ad116
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/unittests/clang-tidy/AddConstTest.cpp
Log Message:
-----------
[clang-tidy][NFC] Replace usages of `DeclSpec::TQ` with `Qualifiers::TQ` (#113295)
This patch improves, but doens't fully resolve the layering violation,
which stems from relying on Sema. There's one function that needs to
convert enumerator to a string (`buildQualifier` in
`FixItHintUtils.cpp`), but `Qualifiers::TQ` doesn't offer such function.
Even more, the set of enumerators is not complete compared to
`DeclSpec::TQ`, so I'm afraid that this would be a functional change.
Commit: e57548387000071562f44bfd66644480c8e6542d
https://github.com/llvm/llvm-project/commit/e57548387000071562f44bfd66644480c8e6542d
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
Log Message:
-----------
[ORC] Fix LLJITWithRemoteDebugging example after db21bd4fa9b.
Commit: 06d192925d3510d0af6c10e6f64f6deabf66b75f
https://github.com/llvm/llvm-project/commit/06d192925d3510d0af6c10e6f64f6deabf66b75f
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
A llvm/test/CodeGen/PowerPC/named-reg-alloc.ll
Log Message:
-----------
[PowerPC] Expand global named register support (#112603)
Enable all valid registers for intrinsics that read from and write
to global named registers.
Commit: 78e026f845fb4d924673a9d534cc36cf7b55473c
https://github.com/llvm/llvm-project/commit/78e026f845fb4d924673a9d534cc36cf7b55473c
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV][NFC] Document F64 ISD Nodes
Commit: 00b47b98d45da4822dc0ef81ea0d1d91bf56d1e6
https://github.com/llvm/llvm-project/commit/00b47b98d45da4822dc0ef81ea0d1d91bf56d1e6
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[NFC] Fix missplaced comment
Commit: 7191ced3b69e6f4f0e67056be416e399d0a8d7ca
https://github.com/llvm/llvm-project/commit/7191ced3b69e6f4f0e67056be416e399d0a8d7ca
Author: weiwei chen <weiwei.chen at modular.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/test/Dialect/Index/index-canonicalize.mlir
Log Message:
-----------
[MLIR] Add folding constants canonicalization for mlir::index::AddOp. (#111084)
- [x] Add a simple canonicalization for `mlir::index::AddOp`.
Commit: cc4926a0699eb27dd1974ea0f521d64dcf897af4
https://github.com/llvm/llvm-project/commit/cc4926a0699eb27dd1974ea0f521d64dcf897af4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M flang/runtime/CUDA/registration.cpp
Log Message:
-----------
[flang][cuda] Fix module registration (#113358)
Commit: 03fef62b84469c5dbbed04235c30eb96b6b48369
https://github.com/llvm/llvm-project/commit/03fef62b84469c5dbbed04235c30eb96b6b48369
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
Log Message:
-----------
[AMDGPU] Relax __builtin_amdgcn_update_dpp sema check (#113341)
Recent change applied too strict check for old and src operands match.
These shall be compatible, but not necessarily exactly the same.
Fixes: SWDEV-493072
Commit: 54cf62d19d8d9ca17b0557b515850d9c633f6bc7
https://github.com/llvm/llvm-project/commit/54cf62d19d8d9ca17b0557b515850d9c633f6bc7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
[nfc][msan] Generate test with update_test_checks.py (#113199)
PR is to:
1. Simplify test update in #113200
2. Make tests more comprehensive, currently interesting cases looks very
basic:
```
; CHECK-LABEL: @ICmpSGTAllOnes
; CHECK: icmp slt
; CHECK-NOT: call void @__msan_warning
; CHECK: icmp sgt
; CHECK-NOT: call void @__msan_warning
; CHECK: ret i1
```
Commit: 395093ec150accf19b8158f9d2327ba470e92867
https://github.com/llvm/llvm-project/commit/395093ec150accf19b8158f9d2327ba470e92867
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
[msan] Switch to -msan-handle-icmp-exact my default (#113200)
Fixes #111212.
This grows .text by 5.3% on CTMark, (or 2.6% large internal binary)
Perf regressed by 1.6%. We will try to improve in follow up patches.
It worth to pay some performance regression to fix
correctness to avoid stuff like #111212.
Commit: f1e59dcb4587fe65837237f780ca55b221726ff3
https://github.com/llvm/llvm-project/commit/f1e59dcb4587fe65837237f780ca55b221726ff3
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
A flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
R flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
A flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
R flang/lib/Optimizer/Transforms/CufImplicitDeviceGlobal.cpp
R flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
Renaming Cuf passes to CUF (#113351)
For consistency with other dialects and other CUF passes and files, this
patch renames passes CufOpConversion to CUFOpConversion,
CufImplicitDeviceGlobal to CUFDeviceGlobal.
It also renames the file.
Commit: 020fa86897c0d39d6a806221e330abf901be3cdd
https://github.com/llvm/llvm-project/commit/020fa86897c0d39d6a806221e330abf901be3cdd
Author: Artem Belevich <tra at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAssignValidGlobalNames.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
A llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
Log Message:
-----------
[NVPTX] mangle symbols in debug info to conform to PTX restrictions. (#113216)
Until now debug info was printing the symbols names as-is and that
resulted in invalid PTX when the symbols contained characters that are
invalid for PTX. E.g. `__PRETTY_FUNCTION.something`
Debug info is somewhat disconnected from the symbols themselves, so the
regular "NVPTXAssignValidGlobalNames" pass can't easily fix them.
As the "plan B" this patch catches printout of debug symbols and fixes
them, as needed. One gotcha is that the same code path is used to print
the names of debug info sections. Those section names do start with a
'.debug'. The dot in those names is nominally illegal in PTX, but the
debug section names with a dot are accepted as a special case. The
downside of this change is that if someone ever has a `.debug*` symbol
that needs to be referred to from the debug info, that label will be
passed through as-is, and will still produce broken PTX output. If/when
we run into a case where we need it to work, we could consider only
passing through specific debug section names, or add a mechanism
allowing us to tell section names apart from regular symbols.
Fixes #58491
Commit: c3aa8b7dd62065714256ad439afeab6fb2b1b89f
https://github.com/llvm/llvm-project/commit/c3aa8b7dd62065714256ad439afeab6fb2b1b89f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
Revert "[msan] Switch to -msan-handle-icmp-exact my default" (#113376)
Reverts llvm/llvm-project#113200
Breaks bots, see llvm/llvm-project#113200
Commit: 71792dc570c5b0eca0937efbd57d9ea1457dc87f
https://github.com/llvm/llvm-project/commit/71792dc570c5b0eca0937efbd57d9ea1457dc87f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[NFC][msan] Workaround arg evaluation order diff GCC vs Clang (#113378)
Commit: 5c92f2331c7e02059baddaa3eaf35c039a48caf2
https://github.com/llvm/llvm-project/commit/5c92f2331c7e02059baddaa3eaf35c039a48caf2
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/test/CodeGen/WebAssembly/externref-globalget.ll
Log Message:
-----------
[WebAssembly] Fix MIR printing of reference types (#113028)
When printing a memory operand in MIR, this line
https://github.com/llvm/llvm-project/blob/d37bc32a65651e647148236ffb9728ea2e77eac3/llvm/lib/CodeGen/MachineOperand.cpp#L1247
calls this
https://github.com/llvm/llvm-project/blob/d37bc32a65651e647148236ffb9728ea2e77eac3/llvm/include/llvm/Support/Alignment.h#L238
which assumes `Rhs` (the size in this case) is positive.
But Wasm reference types' size is set to 0:
https://github.com/llvm/llvm-project/blob/d37bc32a65651e647148236ffb9728ea2e77eac3/llvm/include/llvm/CodeGen/ValueTypes.td#L326-L328
`getSize() > 0` condition was added with the Wasm reference types
support in
https://github.com/llvm/llvm-project/commit/46667a10039b664b953eb70534c27627b35a267d,
and it looks it was removed in #84751. This revives the condition so
that Wasm reference types will not crash the MIR printer.
Commit: c77d8edf80570f450122a7687100553836149652
https://github.com/llvm/llvm-project/commit/c77d8edf80570f450122a7687100553836149652
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
Revert "Revert "[msan] Switch to -msan-handle-icmp-exact my default"" (#113379)
Reverts llvm/llvm-project#113376
Fixed with #113378
Commit: a8d506b32046636f462c8a637a8d2e0443622b00
https://github.com/llvm/llvm-project/commit/a8d506b32046636f462c8a637a8d2e0443622b00
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/test/Parser/OpenMP/map-modifiers.f90
Log Message:
-----------
[flang][OpenMP] Rename enum OmpxHold to Ompx_Hold in parser (#113366)
The convention is to use enum names that match the source spelling (up
to upper/lower case), including names with underscores.
Remove the special case from unparser, update tests.
Commit: 519eef3bdc3c17ac9b59933187e1d7bdc6c2729d
https://github.com/llvm/llvm-project/commit/519eef3bdc3c17ac9b59933187e1d7bdc6c2729d
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
Log Message:
-----------
[mlir][tosa] Add a verifier for `tosa.mul` (#113320)
This PR adds a verifier check for tosa.mul, requiring that the shift be
0 for float types.
Fixes #112716.
Commit: d98519715617a462c3ebadc778558b717354b6d2
https://github.com/llvm/llvm-project/commit/d98519715617a462c3ebadc778558b717354b6d2
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
M llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
Log Message:
-----------
[NFC][Fuzzer] Refactor to avoid a false warning from gcc (#112944)
This is one of the many PRs to fix errors with LLVM_ENABLE_WERROR=on.
Built by GCC 11.
Refactor the code to avoid the false warning
llvm-project/llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
llvm-project/llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp: In
function ‘int LLVMFuzzerInitialize(int*, char***)’:
llvm-project/llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp:141:43:
error: ISO C++ forbids zero-size array ‘argv’ [-Werror=pedantic]
141 | ExitOnError ExitOnErr(std::string(*argv[0]) + ": error:");
|
Commit: 0ffa29fe8152e247eea87017e8c5aeedc6329c15
https://github.com/llvm/llvm-project/commit/0ffa29fe8152e247eea87017e8c5aeedc6329c15
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/include/clang/Serialization/ModuleFile.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleManager.cpp
Log Message:
-----------
[clang][modules] Timestamp PCM files when writing (#112452)
Clang uses timestamp files to track the last time an implicitly-built
PCM file was verified to be up-to-date with regard to its inputs. With
`-fbuild-session-{file,timestamp}=` and
`-fmodules-validate-once-per-build-session` this reduces the number of
times a PCM file is checked per "build session".
The behavior I'm seeing with the current scheme is that when lots of
Clang instances wait for the same PCM to be built, they race to validate
it as soon as the file lock gets released, causing lots of concurrent
IO.
This patch makes it so that the timestamp is written by the same Clang
instance responsible for building the PCM while still holding the lock.
This makes it so that whenever a PCM file gets compiled, it's never
re-validated in the same build session.
I believe this is as sound as the current scheme. One thing to be aware
of is that there might be a time interval between accessing input file N
and writing the timestamp file, where changes to input files 0..<N would
not result in a rebuild. Since this is the case current scheme too, I'm
not too concerned about that.
I've seen this speed up `clang-scan-deps` by ~27%.
Commit: fe480cf9232c91d4fad883b4d2748dcc5a6fc0c5
https://github.com/llvm/llvm-project/commit/fe480cf9232c91d4fad883b4d2748dcc5a6fc0c5
Author: jofrn <jofernau at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
Log Message:
-----------
[ARM] Use proper types for these records. (#113370)
llvm#112904 will add typechecking to submulticlass arguments, and these
ones are currently mistyped.
Commit: 2e0506f83bfde6db93454bdf28e4a71c160d4f5b
https://github.com/llvm/llvm-project/commit/2e0506f83bfde6db93454bdf28e4a71c160d4f5b
Author: Florian Mayer <fmayer at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/test/MC/AArch64/global-tagging.ll
Log Message:
-----------
[NFC] [MTE] Remove useless yaml2obj from test (#113374)
We already have the .o, there is no reason to go .o -> YAML -> .o
Commit: 15b37198588bda0bb6ab703da9cc5639ba849916
https://github.com/llvm/llvm-project/commit/15b37198588bda0bb6ab703da9cc5639ba849916
Author: Florian Mayer <fmayer at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M .github/workflows/containers/github-action-ci/stage1.Dockerfile
M bolt/lib/Core/DIEBuilder.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-tidy/ClangTidyModuleRegistry.h
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
M clang-tools-extra/clangd/URI.h
M clang-tools-extra/clangd/refactor/Tweak.h
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/IncludeSpeller.h
M clang-tools-extra/unittests/clang-tidy/AddConstTest.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/user-docs/CommandLineUsage.rst
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/ExprConcepts.h
M clang/include/clang/ASTMatchers/ASTMatchersMacros.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/FileSystemStatCache.h
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/ParsedAttrInfo.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/FrontendPluginRegistry.h
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Support/Compiler.h
M clang/include/clang/Tooling/CompilationDatabasePluginRegistry.h
M clang/include/clang/Tooling/ToolExecutorPluginRegistry.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/FileSystemStatCache.cpp
M clang/lib/Basic/Module.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AVR.h
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Headers/opencl-c-base.h
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/test/AST/ByteCode/complex.cpp
M clang/test/AST/ByteCode/cxx98.cpp
A clang/test/AST/ByteCode/openmp.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/CXX/drs/cwg9xx.cpp
M clang/test/CodeGen/aarch64-cpu-supports-target.c
M clang/test/CodeGen/aarch64-cpu-supports.c
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-clones-riscv.c
M clang/test/CodeGen/attr-target-version-riscv.c
M clang/test/CodeGen/attr-target-version.c
A clang/test/CodeGen/builtins-array-rank.cpp
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/mdouble.c
M clang/test/CodeGen/variadic-nvptx.c
M clang/test/CodeGenCUDA/bf16.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version-riscv.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-nullptr.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/atomics-unsafe-hw-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx940.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx8.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/opencl_types.cl
M clang/test/CoverageMapping/branch-constfolded.cpp
M clang/test/CoverageMapping/if.cpp
M clang/test/CoverageMapping/macro-expansion.c
M clang/test/CoverageMapping/mcdc-scratch-space.c
M clang/test/CoverageMapping/mcdc-system-headers.cpp
M clang/test/CoverageMapping/switch.cpp
M clang/test/CoverageMapping/switchmacro.c
M clang/test/Driver/aarch64-v96a.c
M clang/test/Driver/cuda-cross-compiling.c
M clang/test/Driver/print-supported-extensions-aarch64.c
A clang/test/Format/dry-run-warning.cpp
M clang/test/Headers/opencl-c-header.cl
M clang/test/Index/pipe-size.cl
M clang/test/PCH/cxx2a-constraints-crash.cpp
A clang/test/Preprocessor/embed_zos.c
M clang/test/Sema/attr-target-clones-aarch64.c
A clang/test/Sema/avr-size-align.c
M clang/test/Sema/unbounded-array-bounds.c
M clang/test/SemaCUDA/fp16-arg-return.cu
A clang/test/SemaCXX/GH95854.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/attr-target-clones-riscv.cpp
M clang/test/SemaCXX/attr-target-version-riscv.cpp
M clang/test/SemaCXX/lambda-pack-expansion.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/clang-format.el
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/unittests/Format/FormatTestCSharp.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/www/cxx_dr_status.html
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M compiler-rt/lib/hwasan/CMakeLists.txt
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/profile/InstrProfilingUtil.c
M compiler-rt/lib/rtsan/CMakeLists.txt
R compiler-rt/lib/rtsan/rtsan_interceptors.cpp
A compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
R compiler-rt/lib/rtsan/tests/rtsan_test_interceptors.cpp
A compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/test/asan/TestCases/Windows/delay_dbghelp.cpp
M flang/include/flang/Frontend/FrontendPluginRegistry.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
A flang/include/flang/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Optimizer/Support/InternalNames.h
A flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
R flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/parse-tree.h
A flang/include/flang/Runtime/CUDA/registration.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Dialect/CUF/CMakeLists.txt
A flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
A flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
A flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
R flang/lib/Optimizer/Transforms/CufImplicitDeviceGlobal.cpp
R flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/registration.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/CUDA/cuda-register-func.fir
M flang/test/Fir/OpenACC/legalize-data.fir
M flang/test/Fir/cuf-invalid.fir
A flang/test/Integration/debug-extra-global-2.f90
A flang/test/Integration/debug-extra-global.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-allocatable.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
A flang/test/Semantics/OpenMP/atomic06-empty.f90
A flang/test/Semantics/OpenMP/declare-simd-empty.f90
A flang/test/Semantics/OpenMP/threadprivate08-empty.f90
A flang/test/Transforms/debug-extra-global.fir
A flang/test/Transforms/omp-maps-for-privatized-symbols.fir
M libc/config/gpu/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/hdr/stdio_overlay.h
M libc/hdr/wchar_overlay.h
M libc/newhdrgen/yaml/math.yaml
A libc/shared/fp_bits.h
A libc/shared/str_to_float.h
A libc/shared/str_to_integer.h
M libc/spec/stdc.td
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/macros/properties/types.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/__support/str_to_num_result.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expxf16.h
A libc/src/math/generic/log10f16.cpp
A libc/src/math/generic/sqrtf16.cpp
A libc/src/math/log10f16.h
A libc/src/math/sqrtf16.h
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
M libc/src/string/strcat.h
M libc/src/string/strcpy.h
M libc/src/string/strdup.h
M libc/src/string/strlcat.h
M libc/src/string/strlcpy.h
M libc/src/string/strlen.h
M libc/src/string/strncat.h
M libc/src/string/strndup.h
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/log10f16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/log10f16_test.cpp
A libc/test/src/math/smoke/sqrtf16_test.cpp
A libc/test/src/math/sqrtf16_test.cpp
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__charconv/from_chars_floating_point.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__iterator/reverse_iterator.h
M libcxx/include/charconv
M libcxx/include/clocale
M libcxx/include/cstdint
R libcxx/include/locale.h
M libcxx/include/module.modulemap
R libcxx/include/stdint.h
M libcxx/include/vector
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/CMakeLists.txt
M libcxx/src/charconv.cpp
A libcxx/src/include/from_chars_floating_point.h
M libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
M libcxx/test/libcxx/header_inclusions.gen.py
M libcxx/test/libcxx/headers_in_modulemap.sh.py
M libcxx/test/libcxx/transitive_includes.gen.py
A libcxx/test/libcxx/transitive_includes/to_csv.py
R libcxx/test/libcxx/transitive_includes_to_csv.py
M libcxx/test/std/atomics/atomics.lockfree/is_always_lock_free.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/greater-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/greater.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/less-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/less.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/not-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.default.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.iter.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.reverse_iterator.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.conv/base.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/arrow.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/bracket.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/dereference.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/decrement-assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/increment-assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/minus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/plus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/postdecrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/postincrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/predecrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/preincrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/make_reverse_iterator.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/minus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/plus.pass.cpp
A libcxx/test/std/utilities/charconv/charconv.from.chars/floating_point.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
M libcxx/test/support/charconv_test_helpers.h
M libcxx/test/support/test_macros.h
M libcxx/utils/generate_iwyu_mapping.py
M libcxx/utils/generate_libcxx_cppm_in.py
M libcxx/utils/libcxx/header_information.py
M libcxx/utils/libcxx/test/features.py
M libunwind/src/UnwindCursor.hpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Symbols.cpp
M lld/COFF/Symbols.h
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MapFile.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
A lld/test/COFF/weak-antidep-chain.test
A lld/test/COFF/weak-antidep.test
M lld/test/MachO/icf-safe-thunks-dwarf.ll
M lld/test/MachO/icf-safe-thunks.ll
M lld/test/MachO/objc-category-merging-minimal.s
A lld/test/wasm/version.test
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lldb/docs/resources/addinglanguagesupport.md
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/include/lldb/Target/Language.h
M lldb/include/lldb/Utility/Log.h
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Core/DataFileCache.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
A lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
A lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/TypeSystem.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/Log.cpp
M lldb/test/API/commands/settings/use_source_cache/Makefile
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
A lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.out
M lldb/test/Shell/Recognizer/Inputs/verbose_trap-in-stl.cpp
A lldb/test/Shell/SymbolFile/DWARF/TestDedupWarnings.test
M lldb/tools/debugserver/debugserver.xcodeproj/project.pbxproj
R lldb/tools/debugserver/source/MacOSX/stack_logging.h
M lldb/unittests/ScriptInterpreter/Lua/ScriptInterpreterTests.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodeOfConduct.rst
M llvm/docs/CommandGuide/dsymutil.rst
M llvm/docs/CommandGuide/llvm-cxxfilt.rst
M llvm/docs/CompileCudaWithLLVM.rst
M llvm/docs/LangRef.rst
M llvm/docs/Passes.rst
M llvm/docs/ReleaseNotes.md
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/GCMetadataPrinter.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/LiveIntervalUnion.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/VirtRegMap.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/PDB/DIA/DIAUtils.h
A llvm/include/llvm/ExecutionEngine/Orc/DylibManager.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/MachOObjectFormat.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ObjectFormats.h
M llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
M llvm/include/llvm/IR/GCStrategy.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/Registry.h
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/include/llvm/Transforms/Utils.h
A llvm/include/llvm/Transforms/Utils/IRNormalizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/Shared/MachOObjectFormat.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/ObjectFormats.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/SetTheory.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
A llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAssignValidGlobalNames.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/CMakeLists.txt
M llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.h
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.h
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/SystemZ.td
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86TileConfig.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/IRNormalizer.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/CostModel/SystemZ/divrem-pow2.ll
M llvm/test/Analysis/LoopAccessAnalysis/offset-range-known-via-assume.ll
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-shifts-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector-widen-crash.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/bitfield-insert.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/extract-subvec-combine.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/load.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/qshrn.ll
A llvm/test/CodeGen/AArch64/regalloc-spill-weight-basic.ll
A llvm/test/CodeGen/AArch64/rqshrn.ll
A llvm/test/CodeGen/AArch64/semantic-interposition-memtag.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll
M llvm/test/CodeGen/AArch64/sve2-histcnt.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AArch64/zext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.gfx10.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
A llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
A llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs.mir
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
A llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs.mir
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
A llvm/test/CodeGen/ARM/fmuladd-soft-float.ll
A llvm/test/CodeGen/ARM/pr112710.ll
A llvm/test/CodeGen/DirectX/split-double.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-minmax.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
A llvm/test/CodeGen/Mips/fmuladd-soft-float.ll
M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
M llvm/test/CodeGen/NVPTX/activemask.ll
M llvm/test/CodeGen/NVPTX/addr-mode.ll
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/chain-different-as.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
M llvm/test/CodeGen/NVPTX/copysign.ll
M llvm/test/CodeGen/NVPTX/dot-product.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/elect.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i128-param.ll
M llvm/test/CodeGen/NVPTX/i128-retval.ll
M llvm/test/CodeGen/NVPTX/i128-struct.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/ldparam-v4.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-alloca.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/param-vectorize-device.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure-ptx.ll
M llvm/test/CodeGen/NVPTX/rcp-opt.ll
M llvm/test/CodeGen/NVPTX/rotate.ll
M llvm/test/CodeGen/NVPTX/rotate_64.ll
M llvm/test/CodeGen/NVPTX/sad-intrins.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/tid-range.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/unfold-masked-merge-vector-variablemask.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vec-param-load.ll
M llvm/test/CodeGen/NVPTX/vector-args.ll
M llvm/test/CodeGen/NVPTX/vector-call.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
M llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
A llvm/test/CodeGen/PowerPC/const-stov.ll
M llvm/test/CodeGen/PowerPC/load-and-splat.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
A llvm/test/CodeGen/PowerPC/named-reg-alloc.ll
M llvm/test/CodeGen/PowerPC/p10-splatImm32-undef.ll
M llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
M llvm/test/CodeGen/PowerPC/sat-add.ll
A llvm/test/CodeGen/PowerPC/uaddo-32.ll
A llvm/test/CodeGen/PowerPC/uaddo-64.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-insert-subvector.mir
M llvm/test/CodeGen/RISCV/inline-asm-zdinx-constraint-r.ll
M llvm/test/CodeGen/RISCV/inline-asm-zfinx-constraint-r.ll
M llvm/test/CodeGen/RISCV/inline-asm-zhinx-constraint-r.ll
A llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll
A llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
M llvm/test/CodeGen/WebAssembly/externref-globalget.ll
A llvm/test/CodeGen/X86/fmuladd-soft-float.ll
A llvm/test/CodeGen/X86/no-dup-cv-directive.ll
M llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
A llvm/test/CodeGen/Xtensa/branch_analyze.ll
M llvm/test/CodeGen/Xtensa/brcc.ll
M llvm/test/CodeGen/Xtensa/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/Xtensa/select-cc.ll
M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
A llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
M llvm/test/Instrumentation/MemorySanitizer/reduce.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
A llvm/test/MC/AArch64/LSFE/directive-arch-negative.s
A llvm/test/MC/AArch64/LSFE/directive-arch.s
A llvm/test/MC/AArch64/LSFE/directive-arch_extension-negative.s
A llvm/test/MC/AArch64/LSFE/directive-arch_extension.s
A llvm/test/MC/AArch64/LSFE/directive-cpu-negative.s
A llvm/test/MC/AArch64/LSFE/directive-cpu.s
A llvm/test/MC/AArch64/LSFE/ldfadd-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfadd.s
A llvm/test/MC/AArch64/LSFE/ldfmax-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmax.s
A llvm/test/MC/AArch64/LSFE/ldfmaxnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmaxnm.s
A llvm/test/MC/AArch64/LSFE/ldfmin-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmin.s
A llvm/test/MC/AArch64/LSFE/ldfminnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfminnm.s
A llvm/test/MC/AArch64/LSFE/stfadd-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfadd.s
A llvm/test/MC/AArch64/LSFE/stfmax-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmax.s
A llvm/test/MC/AArch64/LSFE/stfmaxnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmaxnm.s
A llvm/test/MC/AArch64/LSFE/stfmin-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmin.s
A llvm/test/MC/AArch64/LSFE/stfminnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfminnm.s
A llvm/test/MC/AArch64/SVE2/bfscale-diagnostics.s
A llvm/test/MC/AArch64/SVE2/bfscale.s
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu.s
A llvm/test/MC/AArch64/armv9.6a-lsui.s
A llvm/test/MC/AArch64/armv9.6a-occmo.s
A llvm/test/MC/AArch64/armv9.6a-pcdphint.s
A llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
A llvm/test/MC/AArch64/armv9.6a-srmask.s
A llvm/test/MC/ARM/arm-movt-movw-range-fail.s
A llvm/test/MC/ARM/arm-movt-movw-range-pass.s
M llvm/test/MC/ARM/macho-movwt.s
A llvm/test/MC/Disassembler/AArch64/armv9.6a-lsui.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-occmo.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-pcdphint.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-rme-gpc3.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-srmask.txt
A llvm/test/Other/dropped-var-stats.ll
M llvm/test/TableGen/x86-fold-tables.td
M llvm/test/ThinLTO/X86/memprof-icp.ll
A llvm/test/Transforms/IRNormalizer/naming-args-instr-blocks.ll
A llvm/test/Transforms/IRNormalizer/naming-arguments.ll
A llvm/test/Transforms/IRNormalizer/naming.ll
A llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll
A llvm/test/Transforms/IRNormalizer/regression-coro-elide-musttail.ll
A llvm/test/Transforms/IRNormalizer/regression-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-dont-hoist-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll
A llvm/test/Transforms/IRNormalizer/reordering-basic.ll
A llvm/test/Transforms/IRNormalizer/reordering.ll
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/InstCombine/AArch64/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/aes-intrinsics.ll
A llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
A llvm/test/Transforms/InstCombine/ilogb.ll
M llvm/test/Transforms/InstCombine/log1p.ll
M llvm/test/Transforms/InstCombine/pow-0.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
M llvm/test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
A llvm/test/Transforms/SLPVectorizer/X86/root-gather-reused-scalar.ll
A llvm/test/Transforms/Scalarizer/frexp.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
M llvm/test/tools/dsymutil/X86/timestamp-mismatch.test
M llvm/test/tools/dsymutil/cmdline.test
M llvm/test/tools/llvm-cov/branch-c-general.test
A llvm/test/tools/llvm-cxxfilt/quote.test
A llvm/test/tools/llvm-dwarfdump/Inputs/verify_split_dwarf_debug_names_ftus_dwo.yaml
A llvm/test/tools/llvm-dwarfdump/Inputs/verify_split_dwarf_debug_names_ftus_exe.yaml
A llvm/test/tools/llvm-dwarfdump/verify_split_dwarf_debug_names_ftus.test
M llvm/test/tools/llvm-rc/tag-html.test
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/tools/dsymutil/BinaryHolder.cpp
M llvm/tools/dsymutil/BinaryHolder.h
M llvm/tools/dsymutil/DebugMap.cpp
M llvm/tools/dsymutil/DebugMap.h
M llvm/tools/dsymutil/MachODebugMapParser.cpp
M llvm/tools/dsymutil/Options.td
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/dsymutil/dsymutil.h
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
M llvm/tools/llvm-cov/CoverageExporterLcov.cpp
M llvm/tools/llvm-cov/CoverageSummaryInfo.cpp
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-cov/SourceCoverageViewText.cpp
M llvm/tools/llvm-cxxfilt/Opts.td
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
M llvm/tools/llvm-diff/lib/DifferenceEngine.cpp
M llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
M llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/DroppedVariableStatsTest.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/CMakeLists.txt
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
A llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/elf-core/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Shared/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/SandboxVectorizer/BUILD.gn
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/reports.py
A llvm/utils/lit/tests/unique-output-file.py
M mlir/docs/Dialects/Linalg/_index.md
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.h
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBarrierOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMiscOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Func/Transforms/DuplicateFunctionElimination.cpp
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
A mlir/lib/Dialect/OpenACC/Transforms/LegalizeDataValues.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Pass/IRPrinting.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
A mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/Func/duplicate-function-elimination.mlir
M mlir/test/Dialect/Index/index-canonicalize.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/pad-to-specific-memory-space.mlir
M mlir/test/Dialect/Linalg/roundtrip.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/OpenACC/legalize-data.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Examples/transform/ChH/full.mlir
M mlir/test/IR/properties.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.h
A runtimes/cmake/Modules/FindLibcCommonUtils.cmake
M utils/bazel/.bazelrc
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/lit_test.bzl
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Commit: 034c709aab75087a1c139b9cde575bad2744bdbe
https://github.com/llvm/llvm-project/commit/034c709aab75087a1c139b9cde575bad2744bdbe
Author: Florian Mayer <fmayer at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M .github/workflows/containers/github-action-ci/stage1.Dockerfile
M bolt/lib/Core/DIEBuilder.cpp
M clang-tools-extra/clang-doc/Generators.h
M clang-tools-extra/clang-tidy/ClangTidyModuleRegistry.h
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/clangd/Config.h
M clang-tools-extra/clangd/ConfigCompile.cpp
M clang-tools-extra/clangd/ConfigFragment.h
M clang-tools-extra/clangd/ConfigYAML.cpp
M clang-tools-extra/clangd/InlayHints.cpp
M clang-tools-extra/clangd/Protocol.cpp
M clang-tools-extra/clangd/Protocol.h
M clang-tools-extra/clangd/URI.h
M clang-tools-extra/clangd/refactor/Tweak.h
M clang-tools-extra/clangd/unittests/InlayHintTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/unchecked-optional-access.rst
M clang-tools-extra/include-cleaner/include/clang-include-cleaner/IncludeSpeller.h
M clang-tools-extra/unittests/clang-tidy/AddConstTest.cpp
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/user-docs/CommandLineUsage.rst
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/ExprConcepts.h
M clang/include/clang/ASTMatchers/ASTMatchersMacros.h
M clang/include/clang/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/FileSystemStatCache.h
M clang/include/clang/Basic/Module.h
M clang/include/clang/Basic/ParsedAttrInfo.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/FrontendPluginRegistry.h
M clang/include/clang/Lex/ModuleMap.h
M clang/include/clang/Lex/Preprocessor.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/Support/Compiler.h
M clang/include/clang/Tooling/CompilationDatabasePluginRegistry.h
M clang/include/clang/Tooling/ToolExecutorPluginRegistry.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/Analysis/FlowSensitive/Models/UncheckedOptionalAccessModel.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/FileSystemStatCache.cpp
M clang/lib/Basic/Module.cpp
M clang/lib/Basic/TargetInfo.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/Basic/Targets/AVR.h
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/Driver/ToolChains/Cuda.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Headers/opencl-c-base.h
M clang/lib/Lex/HeaderMap.cpp
M clang/lib/Lex/ModuleMap.cpp
M clang/lib/Lex/PPDirectives.cpp
M clang/lib/Lex/Pragma.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTCommon.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ModuleManager.cpp
M clang/lib/Tooling/Inclusions/HeaderIncludes.cpp
M clang/test/AST/ByteCode/complex.cpp
M clang/test/AST/ByteCode/cxx98.cpp
A clang/test/AST/ByteCode/openmp.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/CXX/drs/cwg9xx.cpp
M clang/test/CodeGen/aarch64-cpu-supports-target.c
M clang/test/CodeGen/aarch64-cpu-supports.c
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/aarch64-sve-vls-bitwise-ops.c
M clang/test/CodeGen/arm-bf16-convert-intrinsics.c
M clang/test/CodeGen/attr-target-clones-aarch64.c
M clang/test/CodeGen/attr-target-clones-riscv.c
M clang/test/CodeGen/attr-target-version-riscv.c
M clang/test/CodeGen/attr-target-version.c
A clang/test/CodeGen/builtins-array-rank.cpp
M clang/test/CodeGen/cx-complex-range.c
M clang/test/CodeGen/mdouble.c
M clang/test/CodeGen/variadic-nvptx.c
M clang/test/CodeGenCUDA/bf16.cu
M clang/test/CodeGenCUDA/device-init-fun.cu
M clang/test/CodeGenCUDA/kernel-amdgcn.cu
M clang/test/CodeGenCXX/attr-target-clones-riscv.cpp
M clang/test/CodeGenCXX/attr-target-version-riscv.cpp
M clang/test/CodeGenOpenCL/addr-space-struct-arg.cl
M clang/test/CodeGenOpenCL/amdgcn-automatic-variable.cl
M clang/test/CodeGenOpenCL/amdgpu-abi-struct-arg-byref.cl
M clang/test/CodeGenOpenCL/amdgpu-enqueue-kernel.cl
M clang/test/CodeGenOpenCL/amdgpu-nullptr.cl
M clang/test/CodeGenOpenCL/atomic-ops.cl
M clang/test/CodeGenOpenCL/atomics-unsafe-hw-remarks-gfx90a.cl
M clang/test/CodeGenOpenCL/blocks.cl
M clang/test/CodeGenOpenCL/builtins-alloca.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx940.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx12.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx8.cl
M clang/test/CodeGenOpenCL/builtins-fp-atomics-gfx90a.cl
M clang/test/CodeGenOpenCL/enqueue-kernel-non-entry-block.cl
M clang/test/CodeGenOpenCL/opencl_types.cl
M clang/test/CoverageMapping/branch-constfolded.cpp
M clang/test/CoverageMapping/if.cpp
M clang/test/CoverageMapping/macro-expansion.c
M clang/test/CoverageMapping/mcdc-scratch-space.c
M clang/test/CoverageMapping/mcdc-system-headers.cpp
M clang/test/CoverageMapping/switch.cpp
M clang/test/CoverageMapping/switchmacro.c
M clang/test/Driver/aarch64-v96a.c
M clang/test/Driver/cuda-cross-compiling.c
M clang/test/Driver/print-supported-extensions-aarch64.c
A clang/test/Format/dry-run-warning.cpp
M clang/test/Headers/opencl-c-header.cl
M clang/test/Index/pipe-size.cl
M clang/test/PCH/cxx2a-constraints-crash.cpp
A clang/test/Preprocessor/embed_zos.c
M clang/test/Sema/attr-target-clones-aarch64.c
A clang/test/Sema/avr-size-align.c
M clang/test/Sema/unbounded-array-bounds.c
M clang/test/SemaCUDA/fp16-arg-return.cu
A clang/test/SemaCXX/GH95854.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
M clang/test/SemaCXX/attr-target-clones-riscv.cpp
M clang/test/SemaCXX/attr-target-version-riscv.cpp
M clang/test/SemaCXX/lambda-pack-expansion.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-format/clang-format.el
M clang/unittests/Analysis/FlowSensitive/UncheckedOptionalAccessModelTest.cpp
M clang/unittests/Format/FormatTestCSharp.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/www/cxx_dr_status.html
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M compiler-rt/lib/hwasan/CMakeLists.txt
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/lsan/lsan_common.cpp
M compiler-rt/lib/profile/InstrProfilingUtil.c
M compiler-rt/lib/rtsan/CMakeLists.txt
R compiler-rt/lib/rtsan/rtsan_interceptors.cpp
A compiler-rt/lib/rtsan/rtsan_interceptors_posix.cpp
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
R compiler-rt/lib/rtsan/tests/rtsan_test_interceptors.cpp
A compiler-rt/lib/rtsan/tests/rtsan_test_interceptors_posix.cpp
M compiler-rt/test/asan/TestCases/Windows/delay_dbghelp.cpp
M flang/include/flang/Frontend/FrontendPluginRegistry.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
A flang/include/flang/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.h
M flang/include/flang/Optimizer/OpenMP/Passes.td
M flang/include/flang/Optimizer/Support/InitFIR.h
M flang/include/flang/Optimizer/Support/InternalNames.h
A flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
R flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/parse-tree.h
A flang/include/flang/Runtime/CUDA/registration.h
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Dialect/CUF/CMakeLists.txt
A flang/lib/Optimizer/Dialect/CUF/CUFToLLVMIRTranslation.cpp
M flang/lib/Optimizer/OpenMP/CMakeLists.txt
A flang/lib/Optimizer/OpenMP/MapsForPrivatizedSymbols.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Support/InternalNames.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUFAddConstructor.cpp
A flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
A flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
R flang/lib/Optimizer/Transforms/CufImplicitDeviceGlobal.cpp
R flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/runtime/CUDA/CMakeLists.txt
A flang/runtime/CUDA/registration.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/CUDA/cuda-register-func.fir
M flang/test/Fir/OpenACC/legalize-data.fir
M flang/test/Fir/cuf-invalid.fir
A flang/test/Integration/debug-extra-global-2.f90
A flang/test/Integration/debug-extra-global.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-allocatable.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Parser/OpenMP/map-modifiers.f90
A flang/test/Semantics/OpenMP/atomic06-empty.f90
A flang/test/Semantics/OpenMP/declare-simd-empty.f90
A flang/test/Semantics/OpenMP/threadprivate08-empty.f90
A flang/test/Transforms/debug-extra-global.fir
A flang/test/Transforms/omp-maps-for-privatized-symbols.fir
M libc/config/gpu/entrypoints.txt
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/math/index.rst
M libc/hdr/stdio_overlay.h
M libc/hdr/wchar_overlay.h
M libc/newhdrgen/yaml/math.yaml
A libc/shared/fp_bits.h
A libc/shared/str_to_float.h
A libc/shared/str_to_integer.h
M libc/spec/stdc.td
M libc/src/__support/FPUtil/FPBits.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/high_precision_decimal.h
M libc/src/__support/macros/properties/types.h
M libc/src/__support/str_to_float.h
M libc/src/__support/str_to_integer.h
M libc/src/__support/str_to_num_result.h
M libc/src/math/CMakeLists.txt
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/expxf16.h
A libc/src/math/generic/log10f16.cpp
A libc/src/math/generic/sqrtf16.cpp
A libc/src/math/log10f16.h
A libc/src/math/sqrtf16.h
M libc/src/string/CMakeLists.txt
M libc/src/string/memory_utils/x86_64/inline_memcpy.h
M libc/src/string/strcat.h
M libc/src/string/strcpy.h
M libc/src/string/strdup.h
M libc/src/string/strlcat.h
M libc/src/string/strlcpy.h
M libc/src/string/strlen.h
M libc/src/string/strncat.h
M libc/src/string/strndup.h
M libc/test/src/math/CMakeLists.txt
A libc/test/src/math/log10f16_test.cpp
M libc/test/src/math/smoke/CMakeLists.txt
A libc/test/src/math/smoke/log10f16_test.cpp
A libc/test/src/math/smoke/sqrtf16_test.cpp
A libc/test/src/math/sqrtf16_test.cpp
M libcxx/docs/Status/Cxx17Papers.csv
M libcxx/docs/Status/Cxx2cIssues.csv
M libcxx/include/CMakeLists.txt
A libcxx/include/__charconv/from_chars_floating_point.h
M libcxx/include/__configuration/availability.h
M libcxx/include/__iterator/reverse_iterator.h
M libcxx/include/charconv
M libcxx/include/clocale
M libcxx/include/cstdint
R libcxx/include/locale.h
M libcxx/include/module.modulemap
R libcxx/include/stdint.h
M libcxx/include/vector
M libcxx/lib/abi/CHANGELOG.TXT
M libcxx/lib/abi/arm64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/i686-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/powerpc64-ibm-aix.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-apple-darwin.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-linux-android21.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-freebsd.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.exceptions.nonew.abilist
M libcxx/lib/abi/x86_64-unknown-linux-gnu.libcxxabi.v1.stable.noexceptions.nonew.abilist
M libcxx/src/CMakeLists.txt
M libcxx/src/charconv.cpp
A libcxx/src/include/from_chars_floating_point.h
M libcxx/test/libcxx/depr/depr.c.headers/extern_c.pass.cpp
M libcxx/test/libcxx/header_inclusions.gen.py
M libcxx/test/libcxx/headers_in_modulemap.sh.py
M libcxx/test/libcxx/transitive_includes.gen.py
A libcxx/test/libcxx/transitive_includes/to_csv.py
R libcxx/test/libcxx/transitive_includes_to_csv.py
M libcxx/test/std/atomics/atomics.lockfree/is_always_lock_free.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/greater-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/greater.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/less-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/less.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cmp/not-equal.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.default.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.iter.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.cons/ctor.reverse_iterator.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.conv/base.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/arrow.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/bracket.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.elem/dereference.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/decrement-assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/increment-assign.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/minus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/plus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/postdecrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/postincrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/predecrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nav/preincrement.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/make_reverse_iterator.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/minus.pass.cpp
M libcxx/test/std/iterators/predef.iterators/reverse.iterators/reverse.iter.nonmember/plus.pass.cpp
A libcxx/test/std/utilities/charconv/charconv.from.chars/floating_point.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.cpp
M libcxx/test/std/utilities/charconv/charconv.msvc/test.pass.cpp
M libcxx/test/support/charconv_test_helpers.h
M libcxx/test/support/test_macros.h
M libcxx/utils/generate_iwyu_mapping.py
M libcxx/utils/generate_libcxx_cppm_in.py
M libcxx/utils/libcxx/header_information.py
M libcxx/utils/libcxx/test/features.py
M libunwind/src/UnwindCursor.hpp
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/SymbolTable.cpp
M lld/COFF/Symbols.cpp
M lld/COFF/Symbols.h
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/AVR.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MapFile.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
A lld/test/COFF/weak-antidep-chain.test
A lld/test/COFF/weak-antidep.test
M lld/test/MachO/icf-safe-thunks-dwarf.ll
M lld/test/MachO/icf-safe-thunks.ll
M lld/test/MachO/objc-category-merging-minimal.s
A lld/test/wasm/version.test
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lldb/docs/resources/addinglanguagesupport.md
M lldb/include/lldb/Core/Module.h
M lldb/include/lldb/Symbol/CompilerType.h
M lldb/include/lldb/Symbol/TypeSystem.h
M lldb/include/lldb/Target/Language.h
M lldb/include/lldb/Utility/Log.h
M lldb/packages/Python/lldbsuite/test/make/Makefile.rules
M lldb/source/API/SystemInitializerFull.cpp
M lldb/source/Core/DataFileCache.cpp
M lldb/source/Core/Module.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_loongarch64.cpp
M lldb/source/Plugins/Process/elf-core/CMakeLists.txt
A lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.cpp
A lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_loongarch64.h
M lldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/PDB/SymbolFilePDB.cpp
M lldb/source/Symbol/CompilerType.cpp
M lldb/source/Symbol/TypeSystem.cpp
M lldb/source/Target/ThreadPlanStepOverRange.cpp
M lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/Log.cpp
M lldb/test/API/commands/settings/use_source_cache/Makefile
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
A lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-loongarch64.out
M lldb/test/Shell/Recognizer/Inputs/verbose_trap-in-stl.cpp
A lldb/test/Shell/SymbolFile/DWARF/TestDedupWarnings.test
M lldb/tools/debugserver/debugserver.xcodeproj/project.pbxproj
R lldb/tools/debugserver/source/MacOSX/stack_logging.h
M lldb/unittests/ScriptInterpreter/Lua/ScriptInterpreterTests.cpp
M lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodeOfConduct.rst
M llvm/docs/CommandGuide/dsymutil.rst
M llvm/docs/CommandGuide/llvm-cxxfilt.rst
M llvm/docs/CompileCudaWithLLVM.rst
M llvm/docs/LangRef.rst
M llvm/docs/Passes.rst
M llvm/docs/ReleaseNotes.md
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/VectorUtils.h
M llvm/include/llvm/CodeGen/CalcSpillWeights.h
M llvm/include/llvm/CodeGen/GCMetadataPrinter.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/include/llvm/CodeGen/LiveIntervalUnion.h
M llvm/include/llvm/CodeGen/LiveIntervals.h
M llvm/include/llvm/CodeGen/LiveRegMatrix.h
M llvm/include/llvm/CodeGen/SelectionDAGNodes.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/VirtRegMap.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFAcceleratorTable.h
M llvm/include/llvm/DebugInfo/DWARF/DWARFContext.h
M llvm/include/llvm/DebugInfo/GSYM/DwarfTransformer.h
M llvm/include/llvm/DebugInfo/LogicalView/Readers/LVBinaryReader.h
M llvm/include/llvm/DebugInfo/PDB/DIA/DIAUtils.h
A llvm/include/llvm/ExecutionEngine/Orc/DylibManager.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
A llvm/include/llvm/ExecutionEngine/Orc/Shared/MachOObjectFormat.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/ObjectFormats.h
M llvm/include/llvm/ExecutionEngine/Orc/SimpleRemoteEPC.h
M llvm/include/llvm/IR/GCStrategy.h
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/LinkAllPasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/Passes/StandardInstrumentations.h
M llvm/include/llvm/ProfileData/Coverage/CoverageMapping.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/Registry.h
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/include/llvm/Transforms/Utils.h
A llvm/include/llvm/Transforms/Utils/IRNormalizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Scheduler.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CodeGen/CalcSpillWeights.cpp
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/DebugInfo/DWARF/DWARFAcceleratorTable.cpp
M llvm/lib/DebugInfo/DWARF/DWARFContext.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/DebugInfo/DWARF/DWARFVerifier.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVBinaryReader.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDebugObjectRegistrar.cpp
M llvm/lib/ExecutionEngine/Orc/EPCDynamicLibrarySearchGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/EPCGenericDylibManager.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/lib/ExecutionEngine/Orc/LookupAndRecordAddrs.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/Shared/MachOObjectFormat.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/ObjectFormats.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/IR/Globals.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Passes/StandardInstrumentations.cpp
M llvm/lib/ProfileData/Coverage/CoverageMapping.cpp
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/SetTheory.cpp
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64Features.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SystemOperands.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCExpr.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
A llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrMVE.td
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
M llvm/lib/Target/BPF/BTFDebug.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAssignValidGlobalNames.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrGISel.td
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/CMakeLists.txt
M llvm/lib/Target/SystemZ/MCTargetDesc/CMakeLists.txt
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZGNUInstPrinter.h
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZHLASMInstPrinter.h
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.cpp
R llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinter.h
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.cpp
A llvm/lib/Target/SystemZ/MCTargetDesc/SystemZInstPrinterCommon.h
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
M llvm/lib/Target/SystemZ/SystemZ.td
M llvm/lib/Target/SystemZ/SystemZAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/X86/X86.td
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrCompiler.td
M llvm/lib/Target/X86/X86TileConfig.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.cpp
M llvm/lib/Target/Xtensa/XtensaInstrInfo.h
M llvm/lib/Target/Xtensa/XtensaInstrInfo.td
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/Reg2Mem.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/CMakeLists.txt
A llvm/lib/Transforms/Utils/IRNormalizer.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BottomUpVec.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/Scheduler.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/CostModel/SystemZ/divrem-pow2.ll
M llvm/test/Analysis/LoopAccessAnalysis/offset-range-known-via-assume.ll
M llvm/test/Analysis/LoopAccessAnalysis/symbolic-stride.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-shifts-undef.mir
M llvm/test/CodeGen/AArch64/GlobalISel/combine-unmerge.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector-widen-crash.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/regbank-inlineasm.mir
M llvm/test/CodeGen/AArch64/aarch64-sve-asm.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/bitfield-insert.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/emit_fneg_with_non_register_operand.mir
M llvm/test/CodeGen/AArch64/extract-subvec-combine.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptosi-sat-vector.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-scalar.ll
M llvm/test/CodeGen/AArch64/fptoui-sat-vector.ll
M llvm/test/CodeGen/AArch64/load.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/peephole-insvigpr.mir
M llvm/test/CodeGen/AArch64/qshrn.ll
A llvm/test/CodeGen/AArch64/regalloc-spill-weight-basic.ll
A llvm/test/CodeGen/AArch64/rqshrn.ll
A llvm/test/CodeGen/AArch64/semantic-interposition-memtag.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/sve-intrinsics-while.ll
M llvm/test/CodeGen/AArch64/sve2-histcnt.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AArch64/zext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/addsubu64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_udec_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_uinc_wrap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.if.break.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.store.2d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul-known-bits.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics_cond_sub.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/br_cc.f16.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/build_vector.ll
M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/clamp-modifier.ll
M llvm/test/CodeGen/AMDGPU/clamp.ll
M llvm/test/CodeGen/AMDGPU/cluster_stores.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/commute-compares-scalar-float.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/divergence-driven-buildvector.ll
M llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract_vector_elt-f16.ll
M llvm/test/CodeGen/AMDGPU/fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f32.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f64.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fma-combine.ll
M llvm/test/CodeGen/AMDGPU/fmax3.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmed3.ll
M llvm/test/CodeGen/AMDGPU/fmin3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fmul-2-combine-multi-use.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-fabs.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fneg.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg.ll
M llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.gfx10.mir
M llvm/test/CodeGen/AMDGPU/fold-operands-frame-index.mir
M llvm/test/CodeGen/AMDGPU/fp-atomics-gfx1200.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-num-global-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp32.ll
M llvm/test/CodeGen/AMDGPU/fp16_to_fp64.ll
M llvm/test/CodeGen/AMDGPU/fp32_to_fp16.ll
M llvm/test/CodeGen/AMDGPU/fpext.f16.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/frame-index-elimination.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fshr.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx12_scalar_subword_loads.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/idiv-licm.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/image-load-d16-tfe.ll
M llvm/test/CodeGen/AMDGPU/imm16.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/kernel-vgpr-spill-mubuf-with-voffset.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.bitreplicate.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.fp8.dpp.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.add.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.bvh.stack.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.sub.gs.reg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.bf16.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f16.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.fdot2.f32.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.atomic.ordered.add.b64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.global.load.tr-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.store.a16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.inverse.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane16.var.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane64.ptr.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.quadmask.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sendmsg.rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.tfe.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.d16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wmma_64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.writelane.ll
M llvm/test/CodeGen/AMDGPU/llvm.ceil.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.cos.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.floor.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.get.fpmode.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.mulo.ll
M llvm/test/CodeGen/AMDGPU/llvm.rint.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
M llvm/test/CodeGen/AMDGPU/llvm.sin.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.trunc.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-f64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
M llvm/test/CodeGen/AMDGPU/mad.u16.ll
M llvm/test/CodeGen/AMDGPU/mad_64_32.ll
M llvm/test/CodeGen/AMDGPU/madak.ll
M llvm/test/CodeGen/AMDGPU/match-perm-extract-vector-elt-bug.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/max-hard-clause-length.ll
A llvm/test/CodeGen/AMDGPU/mcexpr-knownbits-assign-crash-gh-issue-110930.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
A llvm/test/CodeGen/AMDGPU/memmove-var-size.ll
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/minimummaximum.ll
M llvm/test/CodeGen/AMDGPU/minmax.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/offset-split-global.ll
M llvm/test/CodeGen/AMDGPU/omod.ll
M llvm/test/CodeGen/AMDGPU/release-vgprs-dbg-loc.mir
M llvm/test/CodeGen/AMDGPU/release-vgprs.mir
M llvm/test/CodeGen/AMDGPU/rotl.ll
M llvm/test/CodeGen/AMDGPU/rotr.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scalar-float-sopc.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i16.ll
M llvm/test/CodeGen/AMDGPU/shrink-add-sub-constant.ll
A llvm/test/CodeGen/AMDGPU/si-pre-allocate-wwm-regs.mir
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/trap-abis.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/uitofp.f16.ll
M llvm/test/CodeGen/AMDGPU/v_cndmask.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/v_sat_pk_u8_i16.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/wait-before-stores-with-scope_sys.ll
M llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w32.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-imm.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-iu-modifiers.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64-swmmac-index_key.ll
M llvm/test/CodeGen/AMDGPU/wmma-gfx12-w64.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_32.ll
M llvm/test/CodeGen/AMDGPU/wmma_multiple_64.ll
M llvm/test/CodeGen/AMDGPU/workgroup-id-in-arch-sgprs.ll
A llvm/test/CodeGen/ARM/fmuladd-soft-float.ll
A llvm/test/CodeGen/ARM/pr112710.ll
A llvm/test/CodeGen/DirectX/split-double.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw-minmax.ll
M llvm/test/CodeGen/LoongArch/ir-instruction/atomicrmw.ll
M llvm/test/CodeGen/LoongArch/merge-base-offset.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
A llvm/test/CodeGen/Mips/fmuladd-soft-float.ll
M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
M llvm/test/CodeGen/NVPTX/activemask.ll
M llvm/test/CodeGen/NVPTX/addr-mode.ll
M llvm/test/CodeGen/NVPTX/aggregate-return.ll
M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/bswap.ll
M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/chain-different-as.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
M llvm/test/CodeGen/NVPTX/combine-mad.ll
M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
M llvm/test/CodeGen/NVPTX/copysign.ll
M llvm/test/CodeGen/NVPTX/dot-product.ll
M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
M llvm/test/CodeGen/NVPTX/elect.ll
M llvm/test/CodeGen/NVPTX/extractelement.ll
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i128-param.ll
M llvm/test/CodeGen/NVPTX/i128-retval.ll
M llvm/test/CodeGen/NVPTX/i128-struct.ll
M llvm/test/CodeGen/NVPTX/i128.ll
M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/jump-table.ll
M llvm/test/CodeGen/NVPTX/ldparam-v4.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-alloca.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/lower-args.ll
M llvm/test/CodeGen/NVPTX/math-intrins.ll
M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
M llvm/test/CodeGen/NVPTX/param-load-store.ll
M llvm/test/CodeGen/NVPTX/param-overalign.ll
M llvm/test/CodeGen/NVPTX/param-vectorize-device.ll
M llvm/test/CodeGen/NVPTX/proxy-reg-erasure-ptx.ll
M llvm/test/CodeGen/NVPTX/rcp-opt.ll
M llvm/test/CodeGen/NVPTX/rotate.ll
M llvm/test/CodeGen/NVPTX/rotate_64.ll
M llvm/test/CodeGen/NVPTX/sad-intrins.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/NVPTX/st-param-imm.ll
M llvm/test/CodeGen/NVPTX/store-undef.ll
M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
M llvm/test/CodeGen/NVPTX/tid-range.ll
M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
M llvm/test/CodeGen/NVPTX/unfold-masked-merge-vector-variablemask.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
M llvm/test/CodeGen/NVPTX/variadics-backend.ll
M llvm/test/CodeGen/NVPTX/vec-param-load.ll
M llvm/test/CodeGen/NVPTX/vector-args.ll
M llvm/test/CodeGen/NVPTX/vector-call.ll
M llvm/test/CodeGen/NVPTX/vector-returns.ll
M llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
A llvm/test/CodeGen/PowerPC/const-stov.ll
M llvm/test/CodeGen/PowerPC/load-and-splat.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
A llvm/test/CodeGen/PowerPC/named-reg-alloc.ll
M llvm/test/CodeGen/PowerPC/p10-splatImm32-undef.ll
M llvm/test/CodeGen/PowerPC/ppc-32bit-build-vector.ll
M llvm/test/CodeGen/PowerPC/sat-add.ll
A llvm/test/CodeGen/PowerPC/uaddo-32.ll
A llvm/test/CodeGen/PowerPC/uaddo-64.ll
A llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rvv/legalize-insert-subvector.mir
M llvm/test/CodeGen/RISCV/inline-asm-zdinx-constraint-r.ll
M llvm/test/CodeGen/RISCV/inline-asm-zfinx-constraint-r.ll
M llvm/test/CodeGen/RISCV/inline-asm-zhinx-constraint-r.ll
A llvm/test/CodeGen/SPARC/fmuladd-soft-float.ll
A llvm/test/CodeGen/SystemZ/fmuladd-soft-float.ll
M llvm/test/CodeGen/WebAssembly/externref-globalget.ll
A llvm/test/CodeGen/X86/fmuladd-soft-float.ll
A llvm/test/CodeGen/X86/no-dup-cv-directive.ll
M llvm/test/CodeGen/X86/x86-win64-shrink-wrapping.ll
A llvm/test/CodeGen/Xtensa/branch_analyze.ll
M llvm/test/CodeGen/Xtensa/brcc.ll
M llvm/test/CodeGen/Xtensa/ctlz-cttz-ctpop.ll
M llvm/test/CodeGen/Xtensa/select-cc.ll
M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
A llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
M llvm/test/Instrumentation/MemorySanitizer/reduce.ll
M llvm/test/Instrumentation/MemorySanitizer/vector_arith.ll
A llvm/test/MC/AArch64/LSFE/directive-arch-negative.s
A llvm/test/MC/AArch64/LSFE/directive-arch.s
A llvm/test/MC/AArch64/LSFE/directive-arch_extension-negative.s
A llvm/test/MC/AArch64/LSFE/directive-arch_extension.s
A llvm/test/MC/AArch64/LSFE/directive-cpu-negative.s
A llvm/test/MC/AArch64/LSFE/directive-cpu.s
A llvm/test/MC/AArch64/LSFE/ldfadd-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfadd.s
A llvm/test/MC/AArch64/LSFE/ldfmax-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmax.s
A llvm/test/MC/AArch64/LSFE/ldfmaxnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmaxnm.s
A llvm/test/MC/AArch64/LSFE/ldfmin-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfmin.s
A llvm/test/MC/AArch64/LSFE/ldfminnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/ldfminnm.s
A llvm/test/MC/AArch64/LSFE/stfadd-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfadd.s
A llvm/test/MC/AArch64/LSFE/stfmax-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmax.s
A llvm/test/MC/AArch64/LSFE/stfmaxnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmaxnm.s
A llvm/test/MC/AArch64/LSFE/stfmin-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfmin.s
A llvm/test/MC/AArch64/LSFE/stfminnm-diagnostics.s
A llvm/test/MC/AArch64/LSFE/stfminnm.s
A llvm/test/MC/AArch64/SVE2/bfscale-diagnostics.s
A llvm/test/MC/AArch64/SVE2/bfscale.s
M llvm/test/MC/AArch64/SVE2/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE2/directive-arch_extension.s
M llvm/test/MC/AArch64/SVE2/directive-cpu-negative.s
M llvm/test/MC/AArch64/SVE2/directive-cpu.s
A llvm/test/MC/AArch64/armv9.6a-lsui.s
A llvm/test/MC/AArch64/armv9.6a-occmo.s
A llvm/test/MC/AArch64/armv9.6a-pcdphint.s
A llvm/test/MC/AArch64/armv9.6a-rme-gpc3.s
A llvm/test/MC/AArch64/armv9.6a-srmask.s
A llvm/test/MC/ARM/arm-movt-movw-range-fail.s
A llvm/test/MC/ARM/arm-movt-movw-range-pass.s
M llvm/test/MC/ARM/macho-movwt.s
A llvm/test/MC/Disassembler/AArch64/armv9.6a-lsui.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-occmo.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-pcdphint.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-rme-gpc3.txt
A llvm/test/MC/Disassembler/AArch64/armv9.6a-srmask.txt
A llvm/test/Other/dropped-var-stats.ll
M llvm/test/TableGen/x86-fold-tables.td
M llvm/test/ThinLTO/X86/memprof-icp.ll
A llvm/test/Transforms/IRNormalizer/naming-args-instr-blocks.ll
A llvm/test/Transforms/IRNormalizer/naming-arguments.ll
A llvm/test/Transforms/IRNormalizer/naming.ll
A llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll
A llvm/test/Transforms/IRNormalizer/regression-coro-elide-musttail.ll
A llvm/test/Transforms/IRNormalizer/regression-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-dont-hoist-deoptimize.ll
A llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll
A llvm/test/Transforms/IRNormalizer/reordering-basic.ll
A llvm/test/Transforms/IRNormalizer/reordering.ll
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/InstCombine/AArch64/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/AArch64/aes-intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/2012-04-23-Neon-Intrinsics.ll
M llvm/test/Transforms/InstCombine/ARM/aes-intrinsics.ll
A llvm/test/Transforms/InstCombine/erf.ll
M llvm/test/Transforms/InstCombine/fcmp-range-check-idiom.ll
A llvm/test/Transforms/InstCombine/ilogb.ll
M llvm/test/Transforms/InstCombine/log1p.ll
M llvm/test/Transforms/InstCombine/pow-0.ll
M llvm/test/Transforms/LoopVectorize/AArch64/blend-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
M llvm/test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/slpordering.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loadorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_with_external_users.ll
A llvm/test/Transforms/SLPVectorizer/X86/root-gather-reused-scalar.ll
A llvm/test/Transforms/Scalarizer/frexp.ll
M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected
M llvm/test/tools/dsymutil/X86/timestamp-mismatch.test
M llvm/test/tools/dsymutil/cmdline.test
M llvm/test/tools/llvm-cov/branch-c-general.test
A llvm/test/tools/llvm-cxxfilt/quote.test
A llvm/test/tools/llvm-dwarfdump/Inputs/verify_split_dwarf_debug_names_ftus_dwo.yaml
A llvm/test/tools/llvm-dwarfdump/Inputs/verify_split_dwarf_debug_names_ftus_exe.yaml
A llvm/test/tools/llvm-dwarfdump/verify_split_dwarf_debug_names_ftus.test
M llvm/test/tools/llvm-rc/tag-html.test
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/tools/dsymutil/BinaryHolder.cpp
M llvm/tools/dsymutil/BinaryHolder.h
M llvm/tools/dsymutil/DebugMap.cpp
M llvm/tools/dsymutil/DebugMap.h
M llvm/tools/dsymutil/MachODebugMapParser.cpp
M llvm/tools/dsymutil/Options.td
M llvm/tools/dsymutil/dsymutil.cpp
M llvm/tools/dsymutil/dsymutil.h
M llvm/tools/llvm-cov/CoverageExporterJson.cpp
M llvm/tools/llvm-cov/CoverageExporterLcov.cpp
M llvm/tools/llvm-cov/CoverageSummaryInfo.cpp
M llvm/tools/llvm-cov/SourceCoverageViewHTML.cpp
M llvm/tools/llvm-cov/SourceCoverageViewText.cpp
M llvm/tools/llvm-cxxfilt/Opts.td
M llvm/tools/llvm-cxxfilt/llvm-cxxfilt.cpp
M llvm/tools/llvm-diff/lib/DifferenceEngine.cpp
M llvm/tools/llvm-isel-fuzzer/llvm-isel-fuzzer.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.h
M llvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-readtapi/llvm-readtapi.cpp
M llvm/tools/sancov/sancov.cpp
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/IR/CMakeLists.txt
A llvm/unittests/IR/DroppedVariableStatsTest.cpp
M llvm/unittests/Support/KnownBitsTest.cpp
M llvm/unittests/TargetParser/TargetParserTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/CMakeLists.txt
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
A llvm/unittests/Transforms/Vectorize/SandboxVectorizer/SchedulerTest.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/gn/secondary/compiler-rt/lib/hwasan/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
M llvm/utils/gn/secondary/lldb/source/Plugins/Process/elf-core/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Shared/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/SandboxVectorizer/BUILD.gn
M llvm/utils/lit/lit/cl_arguments.py
M llvm/utils/lit/lit/reports.py
A llvm/utils/lit/tests/unique-output-file.py
M mlir/docs/Dialects/Linalg/_index.md
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.h
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/OpenACC/OpenACC.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.h
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBarrierOps.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVMiscOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Dialect/Bufferization/IR/BufferizableOpInterface.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotModuleBufferize.cpp
M mlir/lib/Dialect/Func/Transforms/DuplicateFunctionElimination.cpp
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/lib/Dialect/OpenACC/Transforms/CMakeLists.txt
R mlir/lib/Dialect/OpenACC/Transforms/LegalizeData.cpp
A mlir/lib/Dialect/OpenACC/Transforms/LegalizeDataValues.cpp
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorTransfer.cpp
M mlir/lib/Pass/IRPrinting.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
A mlir/test/Conversion/SPIRVToLLVM/barrier-ops-to-llvm.mlir
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
M mlir/test/Dialect/Func/duplicate-function-elimination.mlir
M mlir/test/Dialect/Index/index-canonicalize.mlir
M mlir/test/Dialect/LLVM/transform-e2e.mlir
M mlir/test/Dialect/Linalg/matmul-shared-memory-padding.mlir
M mlir/test/Dialect/Linalg/pad-to-specific-memory-space.mlir
M mlir/test/Dialect/Linalg/roundtrip.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/OpenACC/legalize-data.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Vector/transform-vector.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Examples/transform/ChH/full.mlir
M mlir/test/IR/properties.mlir
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Pass/CMakeLists.txt
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.h
A runtimes/cmake/Modules/FindLibcCommonUtils.cmake
M utils/bazel/.bazelrc
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/lit_test.bzl
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
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Compare: https://github.com/llvm/llvm-project/compare/d900e054eaee...034c709aab75
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