[all-commits] [llvm/llvm-project] e57548: [ORC] Fix LLJITWithRemoteDebugging example after d...
Alexey Bataev via All-commits
all-commits at lists.llvm.org
Tue Oct 22 13:35:27 PDT 2024
Branch: refs/heads/users/alexey-bataev/spr/slpdo-not-vectorize-code-in-eh-and-non-returning-blocks
Home: https://github.com/llvm/llvm-project
Commit: e57548387000071562f44bfd66644480c8e6542d
https://github.com/llvm/llvm-project/commit/e57548387000071562f44bfd66644480c8e6542d
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
Log Message:
-----------
[ORC] Fix LLJITWithRemoteDebugging example after db21bd4fa9b.
Commit: 06d192925d3510d0af6c10e6f64f6deabf66b75f
https://github.com/llvm/llvm-project/commit/06d192925d3510d0af6c10e6f64f6deabf66b75f
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
A llvm/test/CodeGen/PowerPC/named-reg-alloc.ll
Log Message:
-----------
[PowerPC] Expand global named register support (#112603)
Enable all valid registers for intrinsics that read from and write
to global named registers.
Commit: 78e026f845fb4d924673a9d534cc36cf7b55473c
https://github.com/llvm/llvm-project/commit/78e026f845fb4d924673a9d534cc36cf7b55473c
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV][NFC] Document F64 ISD Nodes
Commit: 00b47b98d45da4822dc0ef81ea0d1d91bf56d1e6
https://github.com/llvm/llvm-project/commit/00b47b98d45da4822dc0ef81ea0d1d91bf56d1e6
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[NFC] Fix missplaced comment
Commit: 7191ced3b69e6f4f0e67056be416e399d0a8d7ca
https://github.com/llvm/llvm-project/commit/7191ced3b69e6f4f0e67056be416e399d0a8d7ca
Author: weiwei chen <weiwei.chen at modular.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/test/Dialect/Index/index-canonicalize.mlir
Log Message:
-----------
[MLIR] Add folding constants canonicalization for mlir::index::AddOp. (#111084)
- [x] Add a simple canonicalization for `mlir::index::AddOp`.
Commit: cc4926a0699eb27dd1974ea0f521d64dcf897af4
https://github.com/llvm/llvm-project/commit/cc4926a0699eb27dd1974ea0f521d64dcf897af4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M flang/runtime/CUDA/registration.cpp
Log Message:
-----------
[flang][cuda] Fix module registration (#113358)
Commit: 03fef62b84469c5dbbed04235c30eb96b6b48369
https://github.com/llvm/llvm-project/commit/03fef62b84469c5dbbed04235c30eb96b6b48369
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
Log Message:
-----------
[AMDGPU] Relax __builtin_amdgcn_update_dpp sema check (#113341)
Recent change applied too strict check for old and src operands match.
These shall be compatible, but not necessarily exactly the same.
Fixes: SWDEV-493072
Commit: 54cf62d19d8d9ca17b0557b515850d9c633f6bc7
https://github.com/llvm/llvm-project/commit/54cf62d19d8d9ca17b0557b515850d9c633f6bc7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
[nfc][msan] Generate test with update_test_checks.py (#113199)
PR is to:
1. Simplify test update in #113200
2. Make tests more comprehensive, currently interesting cases looks very
basic:
```
; CHECK-LABEL: @ICmpSGTAllOnes
; CHECK: icmp slt
; CHECK-NOT: call void @__msan_warning
; CHECK: icmp sgt
; CHECK-NOT: call void @__msan_warning
; CHECK: ret i1
```
Commit: 395093ec150accf19b8158f9d2327ba470e92867
https://github.com/llvm/llvm-project/commit/395093ec150accf19b8158f9d2327ba470e92867
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
[msan] Switch to -msan-handle-icmp-exact my default (#113200)
Fixes #111212.
This grows .text by 5.3% on CTMark, (or 2.6% large internal binary)
Perf regressed by 1.6%. We will try to improve in follow up patches.
It worth to pay some performance regression to fix
correctness to avoid stuff like #111212.
Commit: f1e59dcb4587fe65837237f780ca55b221726ff3
https://github.com/llvm/llvm-project/commit/f1e59dcb4587fe65837237f780ca55b221726ff3
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
A flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
R flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
A flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
R flang/lib/Optimizer/Transforms/CufImplicitDeviceGlobal.cpp
R flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
Renaming Cuf passes to CUF (#113351)
For consistency with other dialects and other CUF passes and files, this
patch renames passes CufOpConversion to CUFOpConversion,
CufImplicitDeviceGlobal to CUFDeviceGlobal.
It also renames the file.
Commit: 020fa86897c0d39d6a806221e330abf901be3cdd
https://github.com/llvm/llvm-project/commit/020fa86897c0d39d6a806221e330abf901be3cdd
Author: Artem Belevich <tra at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAssignValidGlobalNames.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
A llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
Log Message:
-----------
[NVPTX] mangle symbols in debug info to conform to PTX restrictions. (#113216)
Until now debug info was printing the symbols names as-is and that
resulted in invalid PTX when the symbols contained characters that are
invalid for PTX. E.g. `__PRETTY_FUNCTION.something`
Debug info is somewhat disconnected from the symbols themselves, so the
regular "NVPTXAssignValidGlobalNames" pass can't easily fix them.
As the "plan B" this patch catches printout of debug symbols and fixes
them, as needed. One gotcha is that the same code path is used to print
the names of debug info sections. Those section names do start with a
'.debug'. The dot in those names is nominally illegal in PTX, but the
debug section names with a dot are accepted as a special case. The
downside of this change is that if someone ever has a `.debug*` symbol
that needs to be referred to from the debug info, that label will be
passed through as-is, and will still produce broken PTX output. If/when
we run into a case where we need it to work, we could consider only
passing through specific debug section names, or add a mechanism
allowing us to tell section names apart from regular symbols.
Fixes #58491
Commit: c3aa8b7dd62065714256ad439afeab6fb2b1b89f
https://github.com/llvm/llvm-project/commit/c3aa8b7dd62065714256ad439afeab6fb2b1b89f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
Revert "[msan] Switch to -msan-handle-icmp-exact my default" (#113376)
Reverts llvm/llvm-project#113200
Breaks bots, see llvm/llvm-project#113200
Commit: 71792dc570c5b0eca0937efbd57d9ea1457dc87f
https://github.com/llvm/llvm-project/commit/71792dc570c5b0eca0937efbd57d9ea1457dc87f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[NFC][msan] Workaround arg evaluation order diff GCC vs Clang (#113378)
Commit: bbeef5706327f8cb0c744c698b9084d4945845e3
https://github.com/llvm/llvm-project/commit/bbeef5706327f8cb0c744c698b9084d4945845e3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
A flang/include/flang/Optimizer/Transforms/CUFOpConversion.h
R flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CUFDeviceGlobal.cpp
A flang/lib/Optimizer/Transforms/CUFOpConversion.cpp
R flang/lib/Optimizer/Transforms/CufImplicitDeviceGlobal.cpp
R flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/runtime/CUDA/registration.cpp
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.cpp
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXTargetStreamer.h
M llvm/lib/Target/NVPTX/NVPTXAssignValidGlobalNames.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
A llvm/test/CodeGen/PowerPC/named-reg-alloc.ll
A llvm/test/DebugInfo/NVPTX/debug-ptx-symbols.ll
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/test/Dialect/Index/index-canonicalize.mlir
Log Message:
-----------
Fix formatting
Created using spr 1.3.5
Compare: https://github.com/llvm/llvm-project/compare/f67a77f1ebc5...bbeef5706327
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