[all-commits] [llvm/llvm-project] 7b308b: Fix bitcasting E8M0 APFloat to APInt (#113298)
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Tue Oct 22 12:34:59 PDT 2024
Branch: refs/heads/users/vitalybuka/spr/main.msan-switch-to-msan-handle-icmp-exact-my-default
Home: https://github.com/llvm/llvm-project
Commit: 7b308b18c3946dd0e09c661db52f70eff3fe8104
https://github.com/llvm/llvm-project/commit/7b308b18c3946dd0e09c661db52f70eff3fe8104
Author: Sergey Kozub <skozub at nvidia.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Support/APFloat.cpp
M llvm/unittests/ADT/APFloatTest.cpp
Log Message:
-----------
Fix bitcasting E8M0 APFloat to APInt (#113298)
Fixes a bug in APFloat handling of E8M0 type (zero mantissa).
Related PRs:
- https://github.com/llvm/llvm-project/pull/107127
- https://github.com/llvm/llvm-project/pull/111028
Commit: 6803062eb7f2e5ca3db2695688239aa57cdbcd0e
https://github.com/llvm/llvm-project/commit/6803062eb7f2e5ca3db2695688239aa57cdbcd0e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M bolt/lib/Core/DIEBuilder.cpp
Log Message:
-----------
[BOLT] Fix a build failure
This patch fixes:
bolt/lib/Core/DIEBuilder.cpp:285:40: error: too many arguments to
function call, expected 2, have 3
Commit: 2cbe7c2b9e1c5b39bceb20707723146147883b2b
https://github.com/llvm/llvm-project/commit/2cbe7c2b9e1c5b39bceb20707723146147883b2b
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
Log Message:
-----------
[gn build] Port 1295d2e6da2f
Commit: c08a5c15e149c3620a74db1291f71f5193b31dd2
https://github.com/llvm/llvm-project/commit/c08a5c15e149c3620a74db1291f71f5193b31dd2
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Shared/BUILD.gn
Log Message:
-----------
[gn build] Port 470a59919207
Commit: 24293e6900028487beaf7f44965464ca9cb2745d
https://github.com/llvm/llvm-project/commit/24293e6900028487beaf7f44965464ca9cb2745d
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
Log Message:
-----------
[gn build] Port 6512a8dd8c0a
Commit: 50df49e02a5875081c6bfbc533efe53ee6a1768b
https://github.com/llvm/llvm-project/commit/50df49e02a5875081c6bfbc533efe53ee6a1768b
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
Log Message:
-----------
[gn build] Port 6c4267fb1779
Commit: 62cb1a3b0bc77ed36ee06345e739e66e8c0cc211
https://github.com/llvm/llvm-project/commit/62cb1a3b0bc77ed36ee06345e739e66e8c0cc211
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
Log Message:
-----------
[gn build] Port b8930cd13d48
Commit: 0764e55c91514734ff79ca4d666fbce2fa89fc9d
https://github.com/llvm/llvm-project/commit/0764e55c91514734ff79ca4d666fbce2fa89fc9d
Author: Sam Clegg <sbc at chromium.org>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
A lld/test/wasm/version.test
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
Log Message:
-----------
[lld][WebAssembly] Improve -v/-V/--version flag compat (#113204)
Fixes: #112836
Commit: 383bd05818ac395076c2e05d152601bbc80fa2d7
https://github.com/llvm/llvm-project/commit/383bd05818ac395076c2e05d152601bbc80fa2d7
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/docs/CodeOfConduct.rst
Log Message:
-----------
[docs] Add link to newest CoC transparency report
Commit: 9b9c2a082c240826e2cf91bb8e3a1dcb5bbba78a
https://github.com/llvm/llvm-project/commit/9b9c2a082c240826e2cf91bb8e3a1dcb5bbba78a
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV][NFC] Move RISCVISD::TAIL beside RISCVISD::CALL
Commit: 9edb4f74a606a7ba021accdb8896295bbaf18314
https://github.com/llvm/llvm-project/commit/9edb4f74a606a7ba021accdb8896295bbaf18314
Author: muiez <73544786+muiez at users.noreply.github.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/include/clang/Support/Compiler.h
M llvm/include/llvm/Support/Compiler.h
Log Message:
-----------
Define CLANG_ABI and LLVM_ABI for z/OS (#113333)
This patch fixes the build failure seen on z/OS:
```
llvm/clang/include/clang/ASTMatchers/ASTMatchers.h:7212:1: error: unknown type name 'CLANG_ABI'
```
Commit: 8536c2e9a25681b6b0c740e708411f0ed3b12f11
https://github.com/llvm/llvm-project/commit/8536c2e9a25681b6b0c740e708411f0ed3b12f11
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/include/clang/AST/ExprConcepts.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
Log Message:
-----------
[clang][NFC] Move `concepts::createSubstDiagAt` from AST to Sema (#113294)
This fixes layering violation introduced in
2fd01d75a863184766ee0c82b5c0fc8be172448a. The declaration is moved to
`SemaTemplateInstantiate` section of `Sema.h`, after the file where it's
implemented.
Commit: 1b0fcf1e42e05611ec37aa7956988ae6317ad116
https://github.com/llvm/llvm-project/commit/1b0fcf1e42e05611ec37aa7956988ae6317ad116
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/unittests/clang-tidy/AddConstTest.cpp
Log Message:
-----------
[clang-tidy][NFC] Replace usages of `DeclSpec::TQ` with `Qualifiers::TQ` (#113295)
This patch improves, but doens't fully resolve the layering violation,
which stems from relying on Sema. There's one function that needs to
convert enumerator to a string (`buildQualifier` in
`FixItHintUtils.cpp`), but `Qualifiers::TQ` doesn't offer such function.
Even more, the set of enumerators is not complete compared to
`DeclSpec::TQ`, so I'm afraid that this would be a functional change.
Commit: e57548387000071562f44bfd66644480c8e6542d
https://github.com/llvm/llvm-project/commit/e57548387000071562f44bfd66644480c8e6542d
Author: Lang Hames <lhames at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
Log Message:
-----------
[ORC] Fix LLJITWithRemoteDebugging example after db21bd4fa9b.
Commit: 06d192925d3510d0af6c10e6f64f6deabf66b75f
https://github.com/llvm/llvm-project/commit/06d192925d3510d0af6c10e6f64f6deabf66b75f
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
A llvm/test/CodeGen/PowerPC/named-reg-alloc.ll
Log Message:
-----------
[PowerPC] Expand global named register support (#112603)
Enable all valid registers for intrinsics that read from and write
to global named registers.
Commit: 78e026f845fb4d924673a9d534cc36cf7b55473c
https://github.com/llvm/llvm-project/commit/78e026f845fb4d924673a9d534cc36cf7b55473c
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV][NFC] Document F64 ISD Nodes
Commit: 00b47b98d45da4822dc0ef81ea0d1d91bf56d1e6
https://github.com/llvm/llvm-project/commit/00b47b98d45da4822dc0ef81ea0d1d91bf56d1e6
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[NFC] Fix missplaced comment
Commit: 7191ced3b69e6f4f0e67056be416e399d0a8d7ca
https://github.com/llvm/llvm-project/commit/7191ced3b69e6f4f0e67056be416e399d0a8d7ca
Author: weiwei chen <weiwei.chen at modular.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/test/Dialect/Index/index-canonicalize.mlir
Log Message:
-----------
[MLIR] Add folding constants canonicalization for mlir::index::AddOp. (#111084)
- [x] Add a simple canonicalization for `mlir::index::AddOp`.
Commit: cc4926a0699eb27dd1974ea0f521d64dcf897af4
https://github.com/llvm/llvm-project/commit/cc4926a0699eb27dd1974ea0f521d64dcf897af4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M flang/runtime/CUDA/registration.cpp
Log Message:
-----------
[flang][cuda] Fix module registration (#113358)
Commit: 03fef62b84469c5dbbed04235c30eb96b6b48369
https://github.com/llvm/llvm-project/commit/03fef62b84469c5dbbed04235c30eb96b6b48369
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
Log Message:
-----------
[AMDGPU] Relax __builtin_amdgcn_update_dpp sema check (#113341)
Recent change applied too strict check for old and src operands match.
These shall be compatible, but not necessarily exactly the same.
Fixes: SWDEV-493072
Commit: 54cf62d19d8d9ca17b0557b515850d9c633f6bc7
https://github.com/llvm/llvm-project/commit/54cf62d19d8d9ca17b0557b515850d9c633f6bc7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/msan_basic.ll
M llvm/test/Instrumentation/MemorySanitizer/pr32842.ll
Log Message:
-----------
[nfc][msan] Generate test with update_test_checks.py (#113199)
PR is to:
1. Simplify test update in #113200
2. Make tests more comprehensive, currently interesting cases looks very
basic:
```
; CHECK-LABEL: @ICmpSGTAllOnes
; CHECK: icmp slt
; CHECK-NOT: call void @__msan_warning
; CHECK: icmp sgt
; CHECK-NOT: call void @__msan_warning
; CHECK: ret i1
```
Commit: 73bda973b927deb2b72cfdc9b02154917c58bd39
https://github.com/llvm/llvm-project/commit/73bda973b927deb2b72cfdc9b02154917c58bd39
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M bolt/lib/Core/DIEBuilder.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/performance/ForRangeCopyCheck.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryCopyInitialization.cpp
M clang-tools-extra/clang-tidy/performance/UnnecessaryValueParamCheck.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.cpp
M clang-tools-extra/clang-tidy/utils/FixItHintUtils.h
M clang-tools-extra/unittests/clang-tidy/AddConstTest.cpp
M clang/include/clang/AST/ExprConcepts.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Support/Compiler.h
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx9.cl
M flang/runtime/CUDA/registration.cpp
A lld/test/wasm/version.test
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M llvm/docs/CodeOfConduct.rst
M llvm/examples/OrcV2Examples/LLJITWithRemoteDebugging/RemoteJITUtils.cpp
M llvm/include/llvm/Support/Compiler.h
M llvm/lib/Support/APFloat.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r0.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r1.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r13.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll
M llvm/test/CodeGen/PowerPC/named-reg-alloc-r2.ll
A llvm/test/CodeGen/PowerPC/named-reg-alloc.ll
M llvm/unittests/ADT/APFloatTest.cpp
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/libcxx/src/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/Shared/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/SystemZ/MCTargetDesc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Utils/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/IR/BUILD.gn
M mlir/include/mlir/Dialect/Index/IR/IndexOps.td
M mlir/lib/Dialect/Index/IR/IndexOps.cpp
M mlir/test/Dialect/Index/index-canonicalize.mlir
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/b63e932a14f5...73bda973b927
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