[all-commits] [llvm/llvm-project] 4c697f: [LowerMemIntrinsics] Use i8 GEPs in memcpy/memmove...

[Fabian Ritter via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4c697f7037b719b9ed1fa3bcaa68c4a4219c2fc5
      https://github.com/llvm/llvm-project/commit/4c697f7037b719b9ed1fa3bcaa68c4a4219c2fc5
  Author: Fabian Ritter <fabian.ritter at amd.com>
  Date:   2024-10-22 (Tue, 22 Oct 2024)

  Changed paths:
    M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.memcpy.ll
    M llvm/test/CodeGen/AMDGPU/lower-mem-intrinsics.ll
    M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
    M llvm/test/CodeGen/AMDGPU/memmove-var-size.ll

  Log Message:
  -----------
  [LowerMemIntrinsics] Use i8 GEPs in memcpy/memmove lowering (#112707)

The IR lowering of memcpy/memmove intrinsics uses a target-specific type
for its load/store operations. So far, the loaded and stored addresses
are computed with GEPs based on this type. That is wrong if the
allocation size of the type differs from its store size: The width of
the accesses is determined by the store size, while the GEP stride is
determined by the allocation size. If the allocation size is greater
than the store size, some bytes are not copied/moved.

This patch changes the GEPs to use i8 addressing, with offsets based on
the type's store size. The correctness of the lowering therefore no
longer depends on the type's allocation size.

This is in support of PR #112332, which allows adjusting the memcpy loop
lowering type through a command line argument in the AMDGPU backend.



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