[all-commits] [llvm/llvm-project] 35390b: [NewPM][CodeGen] Port VirtRegMap to NPM
Akshat Oke via All-commits
all-commits at lists.llvm.org
Tue Oct 22 02:43:25 PDT 2024
Branch: refs/heads/users/Akshat-Oke/port-vrm
Home: https://github.com/llvm/llvm-project
Commit: 35390b0e342978fe876832a1aece4c28b80eee35
https://github.com/llvm/llvm-project/commit/35390b0e342978fe876832a1aece4c28b80eee35
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/VirtRegMap.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/X86/X86TileConfig.cpp
Log Message:
-----------
[NewPM][CodeGen] Port VirtRegMap to NPM
Commit: cb4a3b2938cb174e8587a331c0c5b5ce2ac7e669
https://github.com/llvm/llvm-project/commit/cb4a3b2938cb174e8587a331c0c5b5ce2ac7e669
Author: Akshat Oke <Akshat.Oke at amd.com>
Date: 2024-10-22 (Tue, 22 Oct 2024)
Changed paths:
M llvm/include/llvm/CodeGen/VirtRegMap.h
M llvm/include/llvm/InitializePasses.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/LiveRegMatrix.cpp
M llvm/lib/CodeGen/RegAllocBasic.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/RegAllocPBQP.cpp
M llvm/lib/CodeGen/VirtRegMap.cpp
M llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
M llvm/lib/Target/AMDGPU/SILowerWWMCopies.cpp
M llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
M llvm/lib/Target/X86/X86TileConfig.cpp
Log Message:
-----------
Rename to *Legacy
Compare: https://github.com/llvm/llvm-project/compare/8a82e45e7ceb...cb4a3b2938cb
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