[all-commits] [llvm/llvm-project] a4d6fe: Reland "[llvm][ARM] Add Addend Checks for MOVT and...

[Jack Styles via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a4d6fe54a7c3c967d88862e51660a5cdabc080bb
      https://github.com/llvm/llvm-project/commit/a4d6fe54a7c3c967d88862e51660a5cdabc080bb
  Author: Jack Styles <jack.styles at arm.com>
  Date:   2024-10-22 (Tue, 22 Oct 2024)

  Changed paths:
    M llvm/docs/ReleaseNotes.md
    M llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp
    A llvm/test/MC/ARM/arm-movt-movw-range-fail.s
    A llvm/test/MC/ARM/arm-movt-movw-range-pass.s
    M llvm/test/MC/ARM/macho-movwt.s

  Log Message:
  -----------
  Reland "[llvm][ARM] Add Addend Checks for MOVT and MOVW instructions. (PR #111970)" (#112877)

**Change relanded after feedback on failures and improvements to the
check of the addend. Original PR #111970**
Changes from original patch:
- The value that is being checked has changed, it is now correctly
checking any Addend for the instruction, rather than the Value. The
addend is kept within the Target data structure from my investigation.
- Removed changes to the following tests due to the original behaviour
being correct, and my original patch causing unexpected errors
    - llvm/test/MC/ARM/Windows/mov32t-range.s
    - llvm/test/MC/MachO/ARM/thumb2-movw-fixup.s

As per the ARM ABI, the MOVT and MOVW instructions should have addends
that fall within a 16bit signed range. LLVM does not check this so it is
possible to use addends that are beyond the accepted range. These
addends are silently truncated.

A new check is added to ensure the addend falls within the expected
range, rejecting an addend that falls outside with an error.

Information relating to the ABI requirements can be found here:
https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst#addends-and-pc-bias-compensation



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