[all-commits] [llvm/llvm-project] dce609: Try to fix clobbering lanes in other assigned lane...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/issue98474-register-coalescer-verifier-error_split0
  Home:   https://github.com/llvm/llvm-project
  Commit: dce609b406e66c11a912c953447f55a09547f7c7
      https://github.com/llvm/llvm-project/commit/dce609b406e66c11a912c953447f55a09547f7c7
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-10-21 (Mon, 21 Oct 2024)

  Changed paths:
    M llvm/lib/CodeGen/VirtRegMap.cpp

  Log Message:
  -----------
  Try to fix clobbering lanes in other assigned lanes of physreg


  Commit: 785a3658196ea9c16d21c69242660f7e5d362d8a
      https://github.com/llvm/llvm-project/commit/785a3658196ea9c16d21c69242660f7e5d362d8a
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-10-21 (Mon, 21 Oct 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/LiveRegMatrix.h
    M llvm/lib/CodeGen/LiveRegMatrix.cpp
    M llvm/lib/CodeGen/VirtRegMap.cpp
    M llvm/test/CodeGen/AMDGPU/indirect-call.ll
    M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill-inspect-subrange.mir
    M llvm/test/CodeGen/AMDGPU/infloop-subrange-spill.mir
    A llvm/test/CodeGen/AMDGPU/issue98474-assigned-physreg-interference.mir
    M llvm/test/CodeGen/AMDGPU/issue98474-virtregrewriter-live-out-undef-subregisters.mir
    M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
    M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll

  Log Message:
  -----------
  Use LiveRegMatrix and only add necessary impdefs

We apparently need to detect interference with other assigned
intervals to avoid clobbering the undef lanes defined in other
intervals, since the undef def didn't count as interference.

This is pretty ugly and adds a new dependency on LiveRegMatrix,
keeping it live for one more pass. It also adds a lot of implicit
operand spam (we really should have a better representation for this).


Compare: https://github.com/llvm/llvm-project/compare/dce609b406e6%5E...785a3658196e

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