[all-commits] [llvm/llvm-project] 0f0a96: [llvm][NVPTX] Strip unneeded '+0' in PTX load/stor...

Youngsuk Kim via All-commits all-commits at lists.llvm.org
Sat Oct 19 07:05:57 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0f0a96b8621fcc8e1d6b6a3d047c263bb17a7f39
      https://github.com/llvm/llvm-project/commit/0f0a96b8621fcc8e1d6b6a3d047c263bb17a7f39
  Author: Youngsuk Kim <youngsuk.kim at hpe.com>
  Date:   2024-10-19 (Sat, 19 Oct 2024)

  Changed paths:
    M clang/test/CodeGenCUDA/bf16.cu
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
    M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.h
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll
    M llvm/test/CodeGen/NVPTX/activemask.ll
    M llvm/test/CodeGen/NVPTX/addr-mode.ll
    M llvm/test/CodeGen/NVPTX/aggregate-return.ll
    M llvm/test/CodeGen/NVPTX/bf16-instructions.ll
    M llvm/test/CodeGen/NVPTX/bf16x2-instructions-approx.ll
    M llvm/test/CodeGen/NVPTX/bf16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/bswap.ll
    M llvm/test/CodeGen/NVPTX/call-with-alloca-buffer.ll
    M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
    M llvm/test/CodeGen/NVPTX/chain-different-as.ll
    M llvm/test/CodeGen/NVPTX/cmpxchg.ll
    M llvm/test/CodeGen/NVPTX/combine-mad.ll
    M llvm/test/CodeGen/NVPTX/compute-ptx-value-vts.ll
    M llvm/test/CodeGen/NVPTX/convert-int-sm20.ll
    M llvm/test/CodeGen/NVPTX/copysign.ll
    M llvm/test/CodeGen/NVPTX/dot-product.ll
    M llvm/test/CodeGen/NVPTX/dynamic_stackalloc.ll
    M llvm/test/CodeGen/NVPTX/elect.ll
    M llvm/test/CodeGen/NVPTX/extractelement.ll
    M llvm/test/CodeGen/NVPTX/f16-instructions.ll
    M llvm/test/CodeGen/NVPTX/f16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/i128-param.ll
    M llvm/test/CodeGen/NVPTX/i128-retval.ll
    M llvm/test/CodeGen/NVPTX/i128-struct.ll
    M llvm/test/CodeGen/NVPTX/i128.ll
    M llvm/test/CodeGen/NVPTX/i16x2-instructions.ll
    M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
    M llvm/test/CodeGen/NVPTX/indirect_byval.ll
    M llvm/test/CodeGen/NVPTX/jump-table.ll
    M llvm/test/CodeGen/NVPTX/ldparam-v4.ll
    M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
    M llvm/test/CodeGen/NVPTX/lower-alloca.ll
    M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
    M llvm/test/CodeGen/NVPTX/lower-args.ll
    M llvm/test/CodeGen/NVPTX/math-intrins.ll
    M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
    M llvm/test/CodeGen/NVPTX/nvvm-reflect-arch-O0.ll
    M llvm/test/CodeGen/NVPTX/param-load-store.ll
    M llvm/test/CodeGen/NVPTX/param-overalign.ll
    M llvm/test/CodeGen/NVPTX/param-vectorize-device.ll
    M llvm/test/CodeGen/NVPTX/proxy-reg-erasure-ptx.ll
    M llvm/test/CodeGen/NVPTX/rcp-opt.ll
    M llvm/test/CodeGen/NVPTX/rotate.ll
    M llvm/test/CodeGen/NVPTX/rotate_64.ll
    M llvm/test/CodeGen/NVPTX/sad-intrins.ll
    M llvm/test/CodeGen/NVPTX/sext-setcc.ll
    M llvm/test/CodeGen/NVPTX/st-param-imm.ll
    M llvm/test/CodeGen/NVPTX/store-undef.ll
    M llvm/test/CodeGen/NVPTX/tex-read-cuda.ll
    M llvm/test/CodeGen/NVPTX/tid-range.ll
    M llvm/test/CodeGen/NVPTX/unaligned-param-load-store.ll
    M llvm/test/CodeGen/NVPTX/unfold-masked-merge-vector-variablemask.ll
    M llvm/test/CodeGen/NVPTX/vaargs.ll
    M llvm/test/CodeGen/NVPTX/variadics-backend.ll
    M llvm/test/CodeGen/NVPTX/vec-param-load.ll
    M llvm/test/CodeGen/NVPTX/vector-args.ll
    M llvm/test/CodeGen/NVPTX/vector-call.ll
    M llvm/test/CodeGen/NVPTX/vector-returns.ll
    M llvm/test/DebugInfo/NVPTX/dbg-declare-alloca.ll
    M llvm/test/Transforms/NaryReassociate/NVPTX/nary-slsr.ll
    M llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/nvptx-basic.ll.expected

  Log Message:
  -----------
  [llvm][NVPTX] Strip unneeded '+0' in PTX load/store (#113017)

Remove the extraneous '+0' immediate offset part in PTX load/stores, to
improve readability of output PTX code.



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