[all-commits] [llvm/llvm-project] 1bc1a7: [RISCV] Support inline assembly 'f' constraint for...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 1bc1a79a65a93a0224b5e5f69584219f9981bd23
      https://github.com/llvm/llvm-project/commit/1bc1a79a65a93a0224b5e5f69584219f9981bd23
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-10-18 (Fri, 18 Oct 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/inline-asm-zdinx-constraint-r.ll
    M llvm/test/CodeGen/RISCV/inline-asm-zfinx-constraint-r.ll
    M llvm/test/CodeGen/RISCV/inline-asm-zhinx-constraint-r.ll

  Log Message:
  -----------
  [RISCV] Support inline assembly 'f' constraint for Zfinx. (#112986)

This would allow some inline assembly code to work with either F or Zfinx.
This appears to match gcc behavior.



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