[all-commits] [llvm/llvm-project] 228f88: [RISCV] Inline Assembly: RVC constraint and N modi...

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 228f88fdc8e92789e0562f8a47493493da843145
      https://github.com/llvm/llvm-project/commit/228f88fdc8e92789e0562f8a47493493da843145
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2024-10-18 (Fri, 18 Oct 2024)

  Changed paths:
    M clang/lib/Basic/Targets/RISCV.cpp
    M clang/test/CodeGen/RISCV/riscv-inline-asm.c
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
    M llvm/test/CodeGen/RISCV/inline-asm-d-constraint-f.ll
    A llvm/test/CodeGen/RISCV/inline-asm-d-modifier-N.ll
    M llvm/test/CodeGen/RISCV/inline-asm-f-constraint-f.ll
    A llvm/test/CodeGen/RISCV/inline-asm-f-modifier-N.ll
    M llvm/test/CodeGen/RISCV/inline-asm-invalid.ll
    A llvm/test/CodeGen/RISCV/inline-asm-zdinx-constraint-r.ll
    M llvm/test/CodeGen/RISCV/inline-asm-zfh-constraint-f.ll
    A llvm/test/CodeGen/RISCV/inline-asm-zfh-modifier-N.ll
    A llvm/test/CodeGen/RISCV/inline-asm-zfinx-constraint-r.ll
    A llvm/test/CodeGen/RISCV/inline-asm-zhinx-constraint-r.ll
    M llvm/test/CodeGen/RISCV/inline-asm.ll
    M llvm/test/CodeGen/RISCV/zdinx-asm-constraint.ll

  Log Message:
  -----------
  [RISCV] Inline Assembly: RVC constraint and N modifier (#112561)

This change implements support for the `cr` and `cf` register
constraints (which allocate a RVC GPR or RVC FPR respectively), and the
`N` modifier (which prints the raw encoding of a register rather than
the name).

The intention behind these additions is to make it easier to use inline
assembly when assembling raw instructions that are not supported by the
compiler, for instance when experimenting with new instructions or when
supporting proprietary extensions outside the toolchain.

These implement part of my proposal in riscv-non-isa/riscv-c-api-doc#92

As part of the implementation, I felt there was not enough coverage of
inline assembly and the "in X" floating-point extensions, so I have
added more regression tests around these configurations.



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