[all-commits] [llvm/llvm-project] f5f007: [DAGCombiner] Fix check for extending loads (#112182)

[Lewis Crawford via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f5f00764abeb7023719d64774e263936b3f31ab7
      https://github.com/llvm/llvm-project/commit/f5f00764abeb7023719d64774e263936b3f31ab7
  Author: Lewis Crawford <lcrawford at nvidia.com>
  Date:   2024-10-16 (Wed, 16 Oct 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    A llvm/test/CodeGen/AArch64/aarch64-scalarize-vec-load-ext.ll

  Log Message:
  -----------
  [DAGCombiner] Fix check for extending loads (#112182)

Fix a check for extending loads in DAGCombiner,
where if the result type has more bits than the
loaded type it should count as an extending load.

All backends apart from AArch64 ignore this
ExtTy argument to shouldReduceLoadWidth, so this
change currently only impacts AArch64.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications