[all-commits] [llvm/llvm-project] 429387: [RISCV] Support Expressions in .insn Directives (#...

[Sam Elliott via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 429387a71ce20b7890cc32073c61c4114053b558
      https://github.com/llvm/llvm-project/commit/429387a71ce20b7890cc32073c61c4114053b558
  Author: Sam Elliott <quic_aelliott at quicinc.com>
  Date:   2024-10-14 (Mon, 14 Oct 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/test/MC/RISCV/insn-invalid.s
    M llvm/test/MC/RISCV/insn.s

  Log Message:
  -----------
  [RISCV] Support Expressions in .insn Directives (#111893)

When assembling raw instructions, often you want to or together several
fields for clarity, or because you're using an assembly macro with
separate arguments.

This brings the use of `.insn` closer into line with what can be done
with the binutils assembler.

The 64-bit instruction test here explicitly sets the top bit to make
sure this works, even though the assembler is really using `int64_t`
in most places internally.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications