[all-commits] [llvm/llvm-project] 15de23: [IR] Allow MDString in operand bundles (#110805)
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Fri Oct 11 16:18:55 PDT 2024
Branch: refs/heads/users/vitalybuka/spr/main.lsan-log-thread-history
Home: https://github.com/llvm/llvm-project
Commit: 15de239406bfc0a1dfbd0640490c4bd5d1e0ac33
https://github.com/llvm/llvm-project/commit/15de239406bfc0a1dfbd0640490c4bd5d1e0ac33
Author: Serge Pavlov <sepavloff at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/test/Bitcode/compatibility.ll
M llvm/test/Bitcode/operand-bundles.ll
Log Message:
-----------
[IR] Allow MDString in operand bundles (#110805)
This change implements support of metadata strings in operand bundle
values. It makes possible calls like:
call void @some_func(i32 %x) [ "foo"(i32 42, metadata !"abc") ]
It requires some extension of the bitcode serialization. As SSA values
and metadata are stored in different tables, there must be a way to
distinguish them during deserialization. It is implemented by putting a
special marker before the metadata index. The marker cannot be treated
as a reference to any SSA value, so it unambiguously identifies
metadata. It allows extending the bitcode serialization without breaking
compatibility.
Metadata as operand bundle values are intended to be used in
floating-point function calls. They would represent the same information
as now is passed by the constrained intrinsic arguments.
Commit: c22588c7cdc5a82afd825ce90f21f922dedee98b
https://github.com/llvm/llvm-project/commit/c22588c7cdc5a82afd825ce90f21f922dedee98b
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-10 (Thu, 10 Oct 2024)
Changed paths:
M lld/ELF/EhFrame.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
Log Message:
-----------
[ELF] Move InputSectionBase::file to SectionBase
... and add getCtx (file->ctx). This allows InputSectionBase and
OutputSection to access ctx without taking an extra function argument.
Commit: e018f550d0c40bd99294cdd943c23bbec3804ace
https://github.com/llvm/llvm-project/commit/e018f550d0c40bd99294cdd943c23bbec3804ace
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-10 (Thu, 10 Oct 2024)
Changed paths:
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/DWARF.cpp
Log Message:
-----------
[ELF] Pass Ctx &
Commit: 25cda9e069bc5948f38dde0d2e07814a7bf3fc71
https://github.com/llvm/llvm-project/commit/25cda9e069bc5948f38dde0d2e07814a7bf3fc71
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-10 (Thu, 10 Oct 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.h
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Pass Ctx & to SyntheticSection
Commit: 1fd79f105da64cec7986807c1d9c4896bd39dafa
https://github.com/llvm/llvm-project/commit/1fd79f105da64cec7986807c1d9c4896bd39dafa
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
Log Message:
-----------
[clang][bytecode] Check number of addcarry/subborrow args (#111952)
Apparently this can fail as well.
Commit: d91c103a107ab16b59c1bb67687233a1100d7ecf
https://github.com/llvm/llvm-project/commit/d91c103a107ab16b59c1bb67687233a1100d7ecf
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-10 (Thu, 10 Oct 2024)
Changed paths:
M lld/ELF/InputSection.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Pass Ctx & to SyntheticSections
Commit: d656b2063262d59c3565e63095104c01d1f6a5a3
https://github.com/llvm/llvm-project/commit/d656b2063262d59c3565e63095104c01d1f6a5a3
Author: Pierre van Houtryve <pierre.vanhoutryve at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
A llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm-debug.ll
A llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm.ll
R llvm/test/tools/llvm-split/AMDGPU/kernels-alias-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect.ll
Log Message:
-----------
[AMDGPU][SplitModule] Cleanup CallsExternal Handling (#106528)
- Don't treat inline ASM as indirect calls
- Remove call to alias testing, which was broken (only working by pure
luck right now) and isn't needed anyway. GlobalOpt should take care of
them for us.
Commit: 81bd712f928b3c736d83252df75c1c1bd3374122
https://github.com/llvm/llvm-project/commit/81bd712f928b3c736d83252df75c1c1bd3374122
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-10 (Thu, 10 Oct 2024)
Changed paths:
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Revert Ctx & parameters from SyntheticSection
Since Ctx &ctx is a member variable,
1f391a75af8685e6bba89421443d72ac6a186599
7a5b9ef54eb96abd8415fd893576c42e51fd95db
e2f0ec3a3a8a2981be8a1aac2004cfb9064c61e8 can be reverted.
Commit: 173c68239d1d11f4e36c8af07a28310da67568a7
https://github.com/llvm/llvm-project/commit/173c68239d1d11f4e36c8af07a28310da67568a7
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/flat-address-space.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memcpy-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memmove-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/sdwa-commute.ll
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
Log Message:
-----------
[AMDGPU] Enable unaligned scratch accesses (#110219)
This allows us to emit wide generic and scratch memory accesses when we
do not have alignment information. In cases where accesses happen to be
properly aligned or where generic accesses do not go to scratch memory,
this improves performance of the generated code by a factor of up to 16x
and reduces code size, especially when lowering memcpy and memmove
intrinsics.
Also: Make the use of the FeatureUnalignedScratchAccess feature more
consistent: FeatureUnalignedScratchAccess and EnableFlatScratch are now
orthogonal, whereas, before, code assumed that the latter implies the
former at some places.
Part of SWDEV-455845.
Commit: 65780f4d8e34461e6bd3baf2ff77496f97874b94
https://github.com/llvm/llvm-project/commit/65780f4d8e34461e6bd3baf2ff77496f97874b94
Author: Dmitry Polukhin <34227995+dmpolukhin at users.noreply.github.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/lib/Lex/Preprocessor.cpp
A clang/test/Headers/import_header_unit_after_pragma.cpp
Log Message:
-----------
[C++20][Modules] Allow import for a header unit after #pragma (#111662)
Summary:
`#pragma` and headers that finish with them shouldn't prevent `import
"header_unit.h"` syntax.
Test Plan: check-clang
Commit: ff04bb8f4064274aedcb6e916079132ab6042a10
https://github.com/llvm/llvm-project/commit/ff04bb8f4064274aedcb6e916079132ab6042a10
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/test/AST/ByteCode/cxx1z.cpp
Log Message:
-----------
[clang][bytecode] Use PredefinedExpr as base for its variable (#111956)
This fixes the error message generated.
Commit: bff2b8c06f362b6b4c761fc1d3951da2bddf17de
https://github.com/llvm/llvm-project/commit/bff2b8c06f362b6b4c761fc1d3951da2bddf17de
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/test/Dialect/SparseTensor/codegen.mlir
A mlir/test/Dialect/SparseTensor/no_lowering.mlir
Log Message:
-----------
[mlir][sparse][test] Adjust tests for `LowerSparseOpsToForeach` (#110976)
This PR relocates the tests added in #109435 to a new file named
`no_lowering.mlir` and adds some new tests.
Commit: 8bb12ca28f7f195aa483fdb5921681ec373564ab
https://github.com/llvm/llvm-project/commit/8bb12ca28f7f195aa483fdb5921681ec373564ab
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Update `cxx_dr_status.html`
Commit: bb4696ce3051be820de91c8c98b2649af1680236
https://github.com/llvm/llvm-project/commit/bb4696ce3051be820de91c8c98b2649af1680236
Author: Dmitriy Smirnov <dmitriy.smirnov at arm.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
M mlir/lib/Dialect/Linalg/Transforms/WinogradConv2D.cpp
M mlir/test/Dialect/Linalg/transform-tile-and-winograd-rewrite.mlir
M mlir/test/Dialect/Linalg/transform-tile-winograd.mlir
M mlir/test/Dialect/Linalg/winograd-conv2d-rewrite.mlir
Log Message:
-----------
[mlir][linalg] Fix for bias handling for Winograd (#110331)
PR makes winograd.output_transform op a destination style op and fixes
handing of a pre-existing data in its output argument (i.e. possibly
pre-initialized with bias, which was discarded before).
---------
Signed-off-by: Dmitriy Smirnov <dmitriy.smirnov at arm.com>
Commit: ebeb56af5f8f1ff9da8f5a7e98348f460d223de1
https://github.com/llvm/llvm-project/commit/ebeb56af5f8f1ff9da8f5a7e98348f460d223de1
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
Log Message:
-----------
[lldb] Only send "posix" error codes through the gdb-remote protocol (#108170)
The other side has no way of telling which namespace do these codes
belong to, so mashing them all together is not very helpful.
I'm mainly doing this to simplify some code in a pending patch
<https://github.com/llvm/llvm-project/pull/106774/files#r1752628604>,
and I've picked the posix error category semi-randomly. If we wanted to
be serious about assigning meaning to these error codes, we should
create a special error category for "gdb errors".
Commit: b222f319306a9cad9ac11183b7036ff45097c26f
https://github.com/llvm/llvm-project/commit/b222f319306a9cad9ac11183b7036ff45097c26f
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
R lldb/test/Shell/SymbolFile/DWARF/no_unique_address-with-bitfields.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/no_unique_address-with-bitfields.cpp
Log Message:
-----------
[lldb][test] Fixed the test `no_unique_address-with-bitfields` (#111902)
Fixed the error `unable to create target: 'No available targets are
compatible with triple "x86_64-apple-macosx10.4.0"'` running `clang
--target=x86_64-apple-macosx -c -gdwarf -o %t %s`.
Commit: 72f339de45bb590f25571c4c447a725e6f1dd8d7
https://github.com/llvm/llvm-project/commit/72f339de45bb590f25571c4c447a725e6f1dd8d7
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
Log Message:
-----------
[LoopVectorize] Use predicated version of getSmallConstantMaxTripCount (#109928)
There are a number of places where we call getSmallConstantMaxTripCount
without passing a vector of predicates:
getSmallBestKnownTC
isIndvarOverflowCheckKnownFalse
computeMaxVF
isMoreProfitable
I've changed all of these to now pass in a predicate vector so that
we get the benefit of making better vectorisation choices when we
know the max trip count for loops that require SCEV predicate checks.
I've tried to add tests that cover all the cases affected by these
changes.
Commit: 1276ce9e9713b2a0802004676fad7e40980396d5
https://github.com/llvm/llvm-project/commit/1276ce9e9713b2a0802004676fad7e40980396d5
Author: Emilio Cota <ecg at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/TransposeMatmul.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
M mlir/test/python/dialects/linalg/ops.py
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
Log Message:
-----------
Revert "[mlir][linalg] Introduce transpose semantic to 'linalg.matmul' ops. (#104783)"
This reverts commit 03483737a7a2d72a257a5ab6ff01748ad9cf0f75 and
99c8557, which is a fix-up on top of the former.
I'm reverting because this commit broke two tests:
mlir/test/python/integration/dialects/linalg/opsrun.py
mlir/test/python/integration/dialects/transform.py
See https://lab.llvm.org/buildbot/#/builders/138/builds/4872
I'm not familiar with the tests, so I'm leaving it to the original author
to either remove or adapt the broken tests, as discussed here:
https://github.com/llvm/llvm-project/pull/104783#issuecomment-2406390905
Commit: a4402039bffd788b9af82435fd5a2fb311fdc6e8
https://github.com/llvm/llvm-project/commit/a4402039bffd788b9af82435fd5a2fb311fdc6e8
Author: Sebastian Kreutzer <SebastianKreutzer at gmx.net>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/XRayArgs.h
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/XRayArgs.cpp
A clang/test/Driver/XRay/xray-shared.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/include/xray/xray_interface.h
M compiler-rt/lib/xray/CMakeLists.txt
A compiler-rt/lib/xray/xray_dso_init.cpp
M compiler-rt/lib/xray/xray_init.cpp
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_interface_internal.h
M compiler-rt/lib/xray/xray_trampoline_x86_64.S
M compiler-rt/lib/xray/xray_x86_64.cpp
A compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
A compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
A compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
A compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
A compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
A compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
Log Message:
-----------
[XRay] Add support for instrumentation of DSOs on x86_64 (#90959)
This PR introduces shared library (DSO) support for XRay based on a
revised version of the implementation outlined in [this
RFC](https://discourse.llvm.org/t/rfc-upstreaming-dso-instrumentation-support-for-xray/73000).
The feature enables the patching and handling of events from DSOs,
supporting both libraries linked at startup or explicitly loaded, e.g.
via `dlopen`.
This patch adds the following:
- The `-fxray-shared` flag to enable the feature (turned off by default)
- A small runtime library that is linked into every instrumented DSO,
providing position-independent trampolines and code to register with the
main XRay runtime
- Changes to the XRay runtime to support management and patching of
multiple objects
These changes are fully backward compatible, i.e. running without
instrumented DSOs will produce identical traces (in terms of recorded
function IDs) to the previous implementation.
Due to my limited ability to test on other architectures, this feature
is only implemented and tested with x86_64. Extending support to other
architectures is fairly straightforward, requiring only a
position-independent implementation of the architecture-specific
trampoline implementation (see
`compiler-rt/lib/xray/xray_trampoline_x86_64.S` for reference).
This patch does not include any functionality to resolve function IDs
from DSOs for the provided logging/tracing modes. These modes still work
and will record calls from DSOs, but symbol resolution for these
functions in not available. Getting this to work properly requires
recording information about the loaded DSOs and should IMO be discussed
in a separate RFC, as there are mulitple feasible approaches.
@petrhosek @jplehr
Commit: 42ec740d0347a89b656c9be5ac4a7e4d8bcd30d5
https://github.com/llvm/llvm-project/commit/42ec740d0347a89b656c9be5ac4a7e4d8bcd30d5
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][ExprConstant] Remove an outdated TODO comment (#111959)
Seems like passing the quantities directly seems to work fine.
Commit: 7b0d56be1d002e9cf0d8dda8ecaee99c5dbc88cf
https://github.com/llvm/llvm-project/commit/7b0d56be1d002e9cf0d8dda8ecaee99c5dbc88cf
Author: Petar Avramovic <Petar.Avramovic at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
Log Message:
-----------
AMDGPU/GlobalISel: Fix inst-selection of ballot (#109986)
Both input and output of ballot are lane-masks:
result is lane-mask with 'S32/S64 LLT and SGPR bank'
input is lane-mask with 'S1 LLT and VCC reg bank'.
Ballot copies bits from input lane-mask for
all active lanes and puts 0 for inactive lanes.
GlobalISel did not set 0 in result for inactive lanes
for non-constant input.
Commit: 777142937a599d8a9cea5964b415d9cd13016d79
https://github.com/llvm/llvm-project/commit/777142937a599d8a9cea5964b415d9cd13016d79
Author: Simon Camphausen <simon.camphausen at iml.fraunhofer.de>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-failed.mlir
Log Message:
-----------
[mlir][EmitC] Fail on memrefs with 0 dims in type conversion (#111965)
This let's the type conversion fail instead of generating invalid array
types.
Commit: 80c15c48d1fbb53478c9400e598abcbdcae0d962
https://github.com/llvm/llvm-project/commit/80c15c48d1fbb53478c9400e598abcbdcae0d962
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/builtin-assume-aligned.c
M clang/test/SemaCXX/builtin-assume-aligned.cpp
Log Message:
-----------
[clang][bytecode] Implement __builtin_assume_aligned (#111968)
Commit: 73ad416ebf9d11b876f22ede0ee90f660192869f
https://github.com/llvm/llvm-project/commit/73ad416ebf9d11b876f22ede0ee90f660192869f
Author: Dominik Adamski <dominik.adamski at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Analysis/CMakeLists.txt
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-1.fir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-2.fir
Log Message:
-----------
[OpenMP][Flang] Enable alias analysis inside omp target region (#111670)
At present, alias analysis does not work for operations inside OMP
target regions because the FIR declare operations within OMP target do
not offer sufficient information for alias analysis. Consequently, it is
necessary to examine the FIR code outside the OMP target region.
Commit: f74f568b29885c3fa63c44e33f91f3bb7281138e
https://github.com/llvm/llvm-project/commit/f74f568b29885c3fa63c44e33f91f3bb7281138e
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/test/Analysis/pointer-sub.c
Log Message:
-----------
[clang][analyzer] PointerSubChecker should not warn on pointers converted to numerical type (#111846)
Pointer values casted to integer (non-pointer) type should be able to be
subtracted as usual.
Commit: 6a65e98fa7901dc1de91172d065fafb16ce89d77
https://github.com/llvm/llvm-project/commit/6a65e98fa7901dc1de91172d065fafb16ce89d77
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/ispow2.ll
Log Message:
-----------
[InstCombine] Drop range attributes in `foldIsPowerOf2` (#111946)
Fixes https://github.com/llvm/llvm-project/issues/111934.
Commit: 65da32c634a8345fcbe021f69fc6a609d074c08c
https://github.com/llvm/llvm-project/commit/65da32c634a8345fcbe021f69fc6a609d074c08c
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/blend-any-of-reduction-cost.ll
Log Message:
-----------
[LV] Account for any-of reduction when computing costs of blend phis.
Any-of reductions are narrowed to i1. Update the legacy cost model to
use the correct type when computing the cost of a phi that gets lowered
to selects (BLEND).
This fixes a divergence between legacy and VPlan-based cost models after
36fc291b6ec6d.
Fixes https://github.com/llvm/llvm-project/issues/111874.
Commit: d941254da94c8a5897689a74012a57de279c2c9e
https://github.com/llvm/llvm-project/commit/d941254da94c8a5897689a74012a57de279c2c9e
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
Log Message:
-----------
[lldb][test] Fix var name typo in TestProcessSaveCoreMinidump
Commit: 4451f9f812d458f6b53785b27869674caf01e67b
https://github.com/llvm/llvm-project/commit/4451f9f812d458f6b53785b27869674caf01e67b
Author: Sebastian Kreutzer <sebastian.kreutzer at stud.tu-darmstadt.de>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/include/clang/Driver/XRayArgs.h
M clang/lib/Driver/XRayArgs.cpp
M compiler-rt/include/xray/xray_interface.h
M compiler-rt/lib/xray/xray_interface.cpp
Log Message:
-----------
[XRay] Fix LLVM include in xray_interface.cpp (#111978)
Removes a dependency on LLVM in `xray_interface.cpp` by replacing
`llvm_unreachable` with compiler-rt's `UNREACHABLE`.
Applies clang-format to some unformatted changes.
Original PR: #90959
Commit: 0163ac1f53abc0a0f6e5b7e56912c1dee67e7f32
https://github.com/llvm/llvm-project/commit/0163ac1f53abc0a0f6e5b7e56912c1dee67e7f32
Author: Mats Petersson <mats.petersson at arm.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
A flang/test/Lower/OpenMP/Todo/reduction-task.f90
A flang/test/Lower/OpenMP/Todo/target-inreduction.f90
A flang/test/Lower/OpenMP/Todo/task-inreduction.f90
M flang/test/Lower/OpenMP/Todo/task_mergeable.f90
A flang/test/Lower/OpenMP/Todo/taskgroup-task-reduction.f90
A flang/test/Lower/OpenMP/Todo/taskloop.f90
A flang/test/Lower/OpenMP/Todo/taskwait-depend.f90
A flang/test/Lower/OpenMP/Todo/taskwait-nowait.f90
Log Message:
-----------
[Flang][OpenMP]Add tests for TODOs and small changes to improve messages (#111562)
The bulk of this change are new tests to check that we get a "Not yet
implemneted: *some stuff here*" message when using some not yet
supported OpenMP functionality.
For some of these cases, this also means adding additional clauses to a
filter list in OpenMP.cpp - this changes nothing [to the best of my
understanding] other than allowing the clause to get to the point where
it can be rejected in a TODO with a more clear message. One of the TOOD
filters were missing Mergeable clause, so this was also added and the
existing test updated for the new more specific error message.
There is no functional change intended here.
Commit: b5ea5be2a714e28bac57d417c221f687efe396bf
https://github.com/llvm/llvm-project/commit/b5ea5be2a714e28bac57d417c221f687efe396bf
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/test/MC/RISCV/insn.s
Log Message:
-----------
[RISCV][MC] Fix >32bit .insn Directives (#111878)
The original patch had a reasonably significant bug. You could not use
`.insn` to assemble encodings that had any bits set above the low 32
bits. This is due to the fact that `getMachineOpValue` was truncating
the immediate value, and I did not commit enough tests of useful cases.
This changes the result of `getMachineOpValue` to be able to return the
48-bit and 64-bit immediates needed for the wider `.insn` directives.
I took the opportunity to move some of the test cases around in the file
to make looking at the output of `llvm-objdump` a little clearer.
Commit: 303c8d20601d810c177f6646f771c1eb3f29ab8c
https://github.com/llvm/llvm-project/commit/303c8d20601d810c177f6646f771c1eb3f29ab8c
Author: Rin Dobrescu <irina.dobrescu at arm.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
A llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-forwarding.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
Log Message:
-----------
[AArch64] Add SchedReadAdvance to Neoverse-V1 scheduling model. (#111538)
Introduce a description of late forwarding to the Neoverse-V1 Scheduling model.
Commit: 90627a5a190a99ae2991d524580d866484aaba16
https://github.com/llvm/llvm-project/commit/90627a5a190a99ae2991d524580d866484aaba16
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Driver/XRayArgs.h
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/XRayArgs.cpp
R clang/test/Driver/XRay/xray-shared.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/include/xray/xray_interface.h
M compiler-rt/lib/xray/CMakeLists.txt
R compiler-rt/lib/xray/xray_dso_init.cpp
M compiler-rt/lib/xray/xray_init.cpp
M compiler-rt/lib/xray/xray_interface.cpp
M compiler-rt/lib/xray/xray_interface_internal.h
M compiler-rt/lib/xray/xray_trampoline_x86_64.S
M compiler-rt/lib/xray/xray_x86_64.cpp
R compiler-rt/test/xray/TestCases/Posix/basic-mode-dso.cpp
R compiler-rt/test/xray/TestCases/Posix/clang-xray-shared.cpp
R compiler-rt/test/xray/TestCases/Posix/dlopen.cpp
R compiler-rt/test/xray/TestCases/Posix/dso-dep-chains.cpp
R compiler-rt/test/xray/TestCases/Posix/patch-premain-dso.cpp
R compiler-rt/test/xray/TestCases/Posix/patching-unpatching-dso.cpp
Log Message:
-----------
Revert "[XRay] Add support for instrumentation of DSOs on x86_64 (#90959)"
This reverts commit a4402039bffd788b9af82435fd5a2fb311fdc6e8 and 4451f9f812d458f6b53785b27869674caf01e67b
Commit: 14705a912f6296700cef4d2aa7eb100f71dfbd0a
https://github.com/llvm/llvm-project/commit/14705a912f6296700cef4d2aa7eb100f71dfbd0a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/statepoint-twoaddr.mir
M llvm/test/CodeGen/AMDGPU/expand-variadic-call.ll
M llvm/test/CodeGen/X86/tls-align.ll
Log Message:
-----------
CodeGen: Remove redundant REQUIRES registered-target from tests (#111982)
These are already in target specific test directories.
Commit: 900ea21ffb38ba5b783b20f394c43c6c89d58086
https://github.com/llvm/llvm-project/commit/900ea21ffb38ba5b783b20f394c43c6c89d58086
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/docs/CodingStandards.rst
Log Message:
-----------
[NFC][CodingStandard] Add additional example for if-else brace rule (#111733)
Add example to document that single statement `else` needs a brace if
the associated `if` needs a brace.
Commit: fa789dffb1e12c2aece0187aeacc48dfb1768340
https://github.com/llvm/llvm-project/commit/fa789dffb1e12c2aece0187aeacc48dfb1768340
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/Targets/SystemZ.cpp
M llvm/examples/BrainF/BrainF.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/MatrixBuilder.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/CodeGen/ExpandLargeFpConvert.cpp
M llvm/lib/CodeGen/ExpandMemCmp.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/HardwareLoops.cpp
M llvm/lib/CodeGen/IntrinsicLowering.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/IntrinsicInst.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/Hexagon/HexagonGenExtract.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SystemZ/SystemZTDC.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerRefTypesIntPtrConv.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86PartialReduction.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/lib/Transforms/IPO/CrossDSOCFI.cpp
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/KCFI.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
M llvm/lib/Transforms/Scalar/LoopFlatten.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LowerGuardIntrinsic.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MakeGuardsExplicit.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/EntryExitInstrumenter.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOpcodes.cpp
M llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/IR/IntrinsicsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/IR/VPIntrinsicTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M polly/lib/CodeGen/IslExprBuilder.cpp
M polly/lib/CodeGen/PerfMonitor.cpp
Log Message:
-----------
[NFC] Rename `Intrinsic::getDeclaration` to `getOrInsertDeclaration` (#111752)
Rename the function to reflect its correct behavior and to be consistent
with `Module::getOrInsertFunction`. This is also in preparation of
adding a new `Intrinsic::getDeclaration` that will have behavior similar
to `Module::getFunction` (i.e, just lookup, no creation).
Commit: c84f75966af79a381e27e6ffc9481c1fae2fcb4f
https://github.com/llvm/llvm-project/commit/c84f75966af79a381e27e6ffc9481c1fae2fcb4f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M libc/src/math/generic/cos.cpp
M libc/src/math/generic/range_reduction_double_common.h
Log Message:
-----------
[libc] Fix compilation of new trig functions (#111987)
Commit: 26b832a9ec03d0a35baaf00d81f607004fe2a8cf
https://github.com/llvm/llvm-project/commit/26b832a9ec03d0a35baaf00d81f607004fe2a8cf
Author: Daniel Mokeev <mokeev.gh at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/orc-b-patterns.ll
Log Message:
-----------
[RISCV] Add DAG combine to turn (sub (shl X, 8-Y), (shr X, Y)) into orc.b (#111828)
This patch generalizes the DAG combine for `(sub (shl X, 8), X) =>
(orc.b X)`
into the more general form of `(sub (shl X, 8 - Y), (srl X, Y)) =>
(orc.b X)`.
Alive2 generalized proof: https://alive2.llvm.org/ce/z/dFcf_n
Related issue: https://github.com/llvm/llvm-project/issues/96595
Related PR: https://github.com/llvm/llvm-project/pull/96680
Commit: 9a696b68b735fa01276d16d39370f9102fee4a0b
https://github.com/llvm/llvm-project/commit/9a696b68b735fa01276d16d39370f9102fee4a0b
Author: Emilio Cota <ecg at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
Log Message:
-----------
Revert "[NVPTX] Prefer prmt.b32 over bfi.b32 (#110766)"
This reverts commit 3f9998af4f79e95fe8be615df9d6b898008044b9.
It breaks downstream tests with egregious numerical differences.
Unfortunately no upstream tests are broken, but the fact that
a prior iteration of the commit (pre-optimization) does work
with our downstream tests (coming from the Triton repo) supports
the claim that the final version of the commit is incorrect.
Reverting now so that the original author can evaluate.
Commit: c8da2253f9aa4dff039e9ed766ff0f865632a0eb
https://github.com/llvm/llvm-project/commit/c8da2253f9aa4dff039e9ed766ff0f865632a0eb
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
Log Message:
-----------
[Clang] Replace Intrinsic::getDeclaration with getOrInsertDeclaration (#111990)
Fix build failure from the rename change. Looks like one additional
reference sneaked in between pre-commit checks and the commit itself.
Commit: ed7251b3aeb7c471dc50e9409e83a9ec01f40df5
https://github.com/llvm/llvm-project/commit/ed7251b3aeb7c471dc50e9409e83a9ec01f40df5
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaTemplate/cwg2398.cpp
Log Message:
-----------
Revert "[clang] Implement TTP P0522 pack matching for deduced function template calls. (#111457)"
See discussion in https://github.com/llvm/llvm-project/pull/111711
This reverts commit 4dadf42c1a74dd4e37db9ffd6fbb3027f59751a7.
Commit: bdd46cc6b74eeed14936f1373bbb6446e09979fe
https://github.com/llvm/llvm-project/commit/bdd46cc6b74eeed14936f1373bbb6446e09979fe
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/TemplateDeduction.h
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/SemaTemplate/cwg2398.cpp
Log Message:
-----------
Revert "[clang] CWG2398: improve overload resolution backwards compat (#107350)"
See discussion in https://github.com/llvm/llvm-project/pull/111711
This reverts commit 224519b08945637a85e9798c78286643288f7b77.
Commit: efcfa6e711689ada546c323316145ecd749d380a
https://github.com/llvm/llvm-project/commit/efcfa6e711689ada546c323316145ecd749d380a
Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-0x.cpp
M clang/test/CXX/temp/temp.param/p12.cpp
M clang/test/Modules/cxx-templates.cpp
M clang/test/SemaCXX/make_integer_seq.cpp
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/test/Templight/templight-prior-template-arg.cpp
Log Message:
-----------
Revert "Reland: [clang] Finish implementation of P0522 (#111711)"
See discussion in https://github.com/llvm/llvm-project/pull/111711
This reverts commit 6213aa5e58a7d32bdc82dd40322fb1bab83c4783.
Commit: 870d37dd1257d211f96797bf041280b2260ed260
https://github.com/llvm/llvm-project/commit/870d37dd1257d211f96797bf041280b2260ed260
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
Log Message:
-----------
[AMDGPU] Rewrite RegSeqNames using !foreach. NFC. (#111994)
This reduces the total number of TableGen records produced by AMDGPU.td
by about 6%.
Commit: c8554e13eec048180d003af2aa7b2cc8498d4fba
https://github.com/llvm/llvm-project/commit/c8554e13eec048180d003af2aa7b2cc8498d4fba
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Basic/IdentifierTable.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p1.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p10.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p11.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p3.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p4.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p5.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p6.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p7.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p8.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p9.cpp
M clang/test/CXX/over/over.oper/over.literal/p2.cpp
M clang/test/CXX/over/over.oper/over.literal/p3.cpp
M clang/test/CXX/over/over.oper/over.literal/p5.cpp
M clang/test/CXX/over/over.oper/over.literal/p6.cpp
M clang/test/CXX/over/over.oper/over.literal/p7.cpp
M clang/test/CXX/over/over.oper/over.literal/p8.cpp
M clang/test/FixIt/fixit-c++11.cpp
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/SemaCXX/cxx11-user-defined-literals-unused.cpp
M clang/test/SemaCXX/cxx11-user-defined-literals.cpp
M clang/test/SemaCXX/cxx2a-consteval.cpp
M clang/test/SemaCXX/cxx98-compat.cpp
M clang/test/SemaCXX/literal-operators.cpp
M clang/test/SemaCXX/no-warn-user-defined-literals-in-system-headers.cpp
M clang/test/SemaCXX/reserved-identifier.cpp
M clang/test/SemaCXX/warn-xor-as-pow.cpp
Log Message:
-----------
Turn `-Wdeprecated-literal-operator` on by default (#111027)
It would be nice to see what our users think about this change, as this
is something that WG21/EWG quite wants to fix a handful of questionable
issues with UB. Depending on the outcome of this after being committed,
we might instead suggest EWG undeprecate this, and require a bit of
'magic' from the lexer.
Additionally, this patch makes it so we emit this diagnostic ALSO in
cases where the literal name is reserved. It doesn't make sense to limit
that.
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Commit: a2bd5db00d07bc28fcfb3350b9d50e72e6350cba
https://github.com/llvm/llvm-project/commit/a2bd5db00d07bc28fcfb3350b9d50e72e6350cba
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M lldb/utils/lldb-dotest/CMakeLists.txt
M lldb/utils/lldb-dotest/lldb-dotest.in
Log Message:
-----------
[lldb] Fix finding make tool for tests (#111980)
Fixes 0e913237871e8c9290e82be30be8b3484952eee0 /
https://github.com/llvm/llvm-project/pull/111531
For reasons I can't explain, a clean build works fine for me, and all
the bots are working fine. But if I rebuild in some way the make tool
becomes None.
Looking at the other variables, they had these extra lines so I've added
those for make and it seems to solve the problem.
Commit: c3a10dc8498b1e501f5a32b082b63b0c1fc499a5
https://github.com/llvm/llvm-project/commit/c3a10dc8498b1e501f5a32b082b63b0c1fc499a5
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
A llvm/test/CodeGen/AArch64/consecutive-stores-of-faddv.ll
Log Message:
-----------
[AArch64] Disable consecutive store merging when Neon is unavailable (#111519)
Lowering fixed-size BUILD_VECTORS without Neon may introduce stack
spills, leading to more stores/reloads than if the stores were not
merged. In some cases, it can also prevent using paired store
instructions.
In the future, we may want to relax when SVE is available, but
currently, the SVE lowerings for BUILD_VECTOR are limited to a few
specific cases.
Commit: bd12729a828c653da53f7182dda29982123913db
https://github.com/llvm/llvm-project/commit/bd12729a828c653da53f7182dda29982123913db
Author: Alejandro Álvarez Ayllón <alejandro.alvarez at sonarsource.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/PrettyPrinter.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
Log Message:
-----------
[clang] Ignore inline namespace for `hasName` (#109147)
Add a new enumeration `SuppressInlineNamespaceMode` to `PrintingPolicy` that
is explicit about how to handle inline namespaces. `SuppressInlineNamespace`
uses that enumeration now instead of a Boolean value.
Specializing a template from an inline namespace should be transparent.
For instance
```
namespace foo {
inline namespace v1 {
template<typename A>
void function(A&);
}
}
namespace foo {
template<>
void function<int>(int&);
}
```
`hasName` should match both declarations of `foo::function`.
Makes the behavior of `matchesNodeFullSlow` and `matchesNodeFullFast`
consistent, fixing an assert inside `HasNameMatcher::matchesNode`.
Commit: 923fef903853d61ccef39e8ac770693bf145207f
https://github.com/llvm/llvm-project/commit/923fef903853d61ccef39e8ac770693bf145207f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M libcxxabi/CMakeLists.txt
Log Message:
-----------
[libc++abi] Remove unused LIBCXXABI_LIBCXX_INCLUDES CMake option (#111824)
This hasn't been used for several years, so it's effectively dead code
at this point.
Commit: 33c14f19656c751bbbc083e4a168ab898e583bfd
https://github.com/llvm/llvm-project/commit/33c14f19656c751bbbc083e4a168ab898e583bfd
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Add output groups to run-buildbot (#111739)
This improves the CI output by providing collapsable sections for
sub-parts of our build.
This was originally opened as #75233.
Co-authored-by: eric <eric at efcs.ca>
Commit: f7eb2715425d9cc25ec5acbcaab7eca323513f25
https://github.com/llvm/llvm-project/commit/f7eb2715425d9cc25ec5acbcaab7eca323513f25
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector] Add more tests for ConvertVectorToLLVM (7/n) (#111895)
Adds tests with scalable vectors for the Vector-To-LLVM conversion pass.
Covers the following Ops:
* vector.fma
* vector.reduce
Commit: 1c94388f38c61c77d16abd9e164c78790ab23b58
https://github.com/llvm/llvm-project/commit/1c94388f38c61c77d16abd9e164c78790ab23b58
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
A llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.ll
Log Message:
-----------
[RISCV] Introduce VLOptimizer pass (#108640)
The purpose of this optimization is to make the VL argument, for
instructions that have a VL argument, as small as possible. This is
implemented by visiting each instruction in reverse order and checking
that if it has a VL argument, whether the VL can be reduced.
By putting this pass before VSETVLI insertion, we see three kinds of
changes to generated code:
1. Eliminate VSETVLI instructions
2. Reduce the VL toggle on VSETVLI instructions that also change vtype
3. Reduce the VL set by a VSETVLI instruction
The list of supported instructions is currently whitelisted for safety.
In the future, we could add more instructions to `isSupportedInstr` to
support even more VL optimization.
We originally wrote this pass because vector GEP instructions do not
take a VL, which leads us to emit code that uses VL=VLMAX to implement
GEP in the RISC-V backend. As a result, some of the vector instructions
will write to lanes, specifically between the intended VL and VLMAX,
that will never be read. As an alternative to this pass, we considered
adding a vector predicated GEP instruction, but this would not fit well
into the intrinsic type system since GEP has a variable number of
arguments, each with arbitrary types. The second approach we considered
was to put this pass after VSETVLI insertion, but we found that it was
more difficult to recognize optimization opportunities, especially
across basic block boundaries -- the data flow analysis was also a bit
more expensive and complex.
While this pass solves the GEP problem, we have expanded it to handle
more cases of VL optimization, and there is opportunity for the analysis
to be improved to enable even more optimization. We have a few follow up
patches to post, but figured this would be a good start.
---------
Co-authored-by: Craig Topper <craig.topper at sifive.com>
Co-authored-by: Kito Cheng <kito.cheng at sifive.com>
Commit: 5dac691b66accd2f80c4291280efd5368986d7af
https://github.com/llvm/llvm-project/commit/5dac691b66accd2f80c4291280efd5368986d7af
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
[gn build] Port 1c94388f38c6
Commit: 4b3f251bada55cfc20a2c72321fa0bbfd7a759d5
https://github.com/llvm/llvm-project/commit/4b3f251bada55cfc20a2c72321fa0bbfd7a759d5
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M mlir/include/mlir/Analysis/DataFlow/DeadCodeAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/DenseAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/SparseAnalysis.h
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/include/mlir/IR/Block.h
M mlir/lib/Analysis/DataFlow/DeadCodeAnalysis.cpp
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Analysis/DataFlow/SparseAnalysis.cpp
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/test/lib/Analysis/DataFlow/TestDeadCodeAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
Log Message:
-----------
[mlir] [dataflow] unify semantics of program point (#110344)
The concept of a 'program point' in the original data flow framework is
ambiguous. It can refer to either an operation or a block itself. This
representation has different interpretations in forward and backward
data-flow analysis. In forward data-flow analysis, the program point of
an operation represents the state after the operation, while in backward
data flow analysis, it represents the state before the operation. When
using forward or backward data-flow analysis, it is crucial to carefully
handle this distinction to ensure correctness.
This patch refactors the definition of program point, unifying the
interpretation of program points in both forward and backward data-flow
analysis.
How to integrate this patch?
For dense forward data-flow analysis and other analysis (except dense
backward data-flow analysis), the program point corresponding to the
original operation can be obtained by `getProgramPointAfter(op)`, and
the program point corresponding to the original block can be obtained by
`getProgramPointBefore(block)`.
For dense backward data-flow analysis, the program point corresponding
to the original operation can be obtained by
`getProgramPointBefore(op)`, and the program point corresponding to the
original block can be obtained by `getProgramPointAfter(block)`.
NOTE: If you need to get the lattice of other data-flow analyses in
dense backward data-flow analysis, you should still use the dense
forward data-flow approach. For example, to get the Executable state of
a block in dense backward data-flow analysis and add the dependency of
the current operation, you should write:
``getOrCreateFor<Executable>(getProgramPointBefore(op),
getProgramPointBefore(block))``
In case above, we use getProgramPointBefore(op) because the analysis we
rely on is dense backward data-flow, and we use
getProgramPointBefore(block) because the lattice we query is the result
of a non-dense backward data flow computation.
related dsscussion:
https://discourse.llvm.org/t/rfc-unify-the-semantics-of-program-points/80671/8
corresponding PSA:
https://discourse.llvm.org/t/psa-program-point-semantics-change/81479
Commit: a8a66245954f8ef079708d314f0059d6c3e07b28
https://github.com/llvm/llvm-project/commit/a8a66245954f8ef079708d314f0059d6c3e07b28
Author: Ralf Jung <post at ralfj.de>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/docs/LangRef.rst
Log Message:
-----------
[IR] LangRef: state explicitly that floats generally behave according to IEEE-754 (#102140)
Fixes https://github.com/llvm/llvm-project/issues/60942: IEEE semantics
is likely what many frontends want (it definitely is what Rust wants),
and it is what LLVM passes already assume when they use APFloat to
propagate float operations.
This does not reflect what happens on x87, but what happens there is
just plain unsound (https://github.com/llvm/llvm-project/issues/89885,
https://github.com/llvm/llvm-project/issues/44218); there is no coherent
specification that will describe this behavior correctly -- the backend
in combination with standard LLVM passes is just fundamentally buggy in
a hard-to-fix-way.
There's also the questions around flushing subnormals to zero, but [this
discussion](https://discourse.llvm.org/t/questions-about-llvm-canonicalize/79378)
seems to indicate a general stance of: this is specific non-standard
hardware behavior, and generally needs LLVM to be told that basic float
ops do not return the standard result. Just naively running
LLVM-compiled code on hardware configured to flush subnormals will lead
to #89885-like issues.
AFAIK this is also what Alive2 implements (@nunoplopes please correct me
if I am wrong).
Commit: e34e27f19820af958db7c3b93de7f489aa3bf4dc
https://github.com/llvm/llvm-project/commit/e34e27f19820af958db7c3b93de7f489aa3bf4dc
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
A llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-only-one-live-use.ll
Log Message:
-----------
[TTI][AMDGPU] Allow targets to adjust `LastCallToStaticBonus` via `getInliningLastCallToStaticBonus` (#111311)
Currently we will not be able to inline a large function even if it only
has one live use because the inline cost is still very high after
applying `LastCallToStaticBonus`, which is a constant. This could
significantly impact the performance because CSR spill is very
expensive.
This PR adds a new function `getInliningLastCallToStaticBonus` to TTI to
allow targets to customize this value.
Fixes SWDEV-471398.
Commit: 2d133aaaeb97df62a92de80dae48f6bd8859a9e3
https://github.com/llvm/llvm-project/commit/2d133aaaeb97df62a92de80dae48f6bd8859a9e3
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
Log Message:
-----------
[OpenACC] Fix 'classof' for two unused types.
While implementing a different clause, I discovered these placeholder
clauses had their 'classof' implementation done incorrectly, so this
fixes that.
Commit: bae17a2682c8fcc58c1b7248427b153dba7cb39b
https://github.com/llvm/llvm-project/commit/bae17a2682c8fcc58c1b7248427b153dba7cb39b
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/include/clang/Basic/OpenACCKinds.h
Log Message:
-----------
[OpenACC] Make all AST enums have an underlying type.
We store these in a few places, so ensuring they are kept in a uint8_t
will minimize the amount of storage on the stack.
Commit: c13f806f17ac61961015e38b69c8b39ba7d454ac
https://github.com/llvm/llvm-project/commit/c13f806f17ac61961015e38b69c8b39ba7d454ac
Author: Javed Absar <106147771+javedabsar1 at users.noreply.github.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
A mlir/test/Dialect/Linalg/roundtrip-broadcast.mlir
A mlir/test/Dialect/Linalg/roundtrip-transpose.mlir
A mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize.mlir
Log Message:
-----------
[mlir][linalg] raise generic to named ops. (#110421)
Add support for specializing linalg.broadcast and linalg.transform from generic. Also, does some refactoring to reuse specialization checks, migrating some common uses to op interface methods.
Commit: 8b17916217e8443a2740e387ca2ff93acdb46988
https://github.com/llvm/llvm-project/commit/8b17916217e8443a2740e387ca2ff93acdb46988
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV] Fix -Wunused-function in RISCVVLOptimizer.cpp (NFC)
/llvm-project/llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp:125:21:
error: unused function 'operator<<' [-Werror,-Wunused-function]
static raw_ostream &operator<<(raw_ostream &OS, const OperandInfo &OI) {
^
1 error generated.
Commit: e8dd95e97bd45c8ee3cc2a3d95c9a6198a970d80
https://github.com/llvm/llvm-project/commit/e8dd95e97bd45c8ee3cc2a3d95c9a6198a970d80
Author: vporpo <vporpodas at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
Log Message:
-----------
[SandboxVec][DAG] Extend DAG (#111908)
This patch implements growing the DAG towards the top or bottom. This
does the necessary dependency checks and adds new mem dependencies.
Commit: 67160c5ab5f5b7fd5fa7851abcfde367c8a9f91b
https://github.com/llvm/llvm-project/commit/67160c5ab5f5b7fd5fa7851abcfde367c8a9f91b
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
A llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
Log Message:
-----------
[AMDGPU] Avoid resource propagation for recursion through multiple functions (#111004)
Avoid constructing recursive MCExpr definitions when multiple functions
cause a recursion.
Fixes #110863
Commit: 2d5f3b0a61fb171617012a2c3ba05fd31fb3bb1d
https://github.com/llvm/llvm-project/commit/2d5f3b0a61fb171617012a2c3ba05fd31fb3bb1d
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-demote-scc-branches.ll
M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
A llvm/test/CodeGen/AMDGPU/insert-handle-flat-vmem-ds.mir
R llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem-ds.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir
M llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-special-instructions.mir
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
Log Message:
-----------
[AMDGPU][SIPreEmitPeephole] mustRetainExeczBranch: use BranchProbability and TargetSchedmodel (#109818)
Remove s_cbranch_execnz branches if the transformation is
profitable according to `BranchProbability` and `TargetSchedmodel`.
Commit: 1c6688ae3449da9c8fee1e1c12c892223496fb4c
https://github.com/llvm/llvm-project/commit/1c6688ae3449da9c8fee1e1c12c892223496fb4c
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
A lld/test/ELF/linkerscript/provide-defined.s
Log Message:
-----------
[ELF] Make shouldAddProvideSym return values consistent when demoted to Undefined
Case: `PROVIDE(f1 = bar);` when both `f1` and `bar` are in separate
sections that would be discarded by GC.
Due to `demoteDefined`, `shouldAddProvideSym(f1)` may initially return
false (when Defined) and then return true (been demoted to Undefined).
```
addScriptReferencedSymbolsToSymTable
shouldAddProvideSym(f1): false
// the RHS (bar) is not added to `referencedSymbols` and may be GCed
declareSymbols
shouldAddProvideSym(f1): false
markLive
demoteSymbolsAndComputeIsPreemptible
// demoted f1 to Undefined
processSymbolAssignments
addSymbol
shouldAddProvideSym(f1): true
```
The inconsistency can cause `cmd->expression()` in `addSymbol` to be
evaluated, leading to `symbol not found: bar` errors (since `bar` in the
RHS is not in `referencedSymbols` and is GCed) (#111478).
Fix this by adding a `sym->isUsedInRegularObj` condition, making
`shouldAddProvideSym(f1)` values consistent. In addition, we need a
`sym->exportDynamic` condition to keep provide-shared.s working.
Fixes: ebb326a51fec37b5a47e5702e8ea157cd4f835cd
Pull Request: https://github.com/llvm/llvm-project/pull/111945
Commit: b1746894deebe3fa8d0d18e56c0d33c37ef916cd
https://github.com/llvm/llvm-project/commit/b1746894deebe3fa8d0d18e56c0d33c37ef916cd
Author: Fangrui Song <i at maskray.me>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
Log Message:
-----------
[AMDGPU] Fix -Wunused-variable in non-assertion builds after #109818
Commit: 75774c1c364711d365dae14028edfda5122a0d50
https://github.com/llvm/llvm-project/commit/75774c1c364711d365dae14028edfda5122a0d50
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Default to MemProf version 3 (#108863)
It's very confusing to have support for Verion 3 but not default to
it. This patch teaches llvm-profdata to use MemProf version 3 by
default.
Commit: eef6c0926ea5075c7b67a8f6023bfc775563d1f6
https://github.com/llvm/llvm-project/commit/eef6c0926ea5075c7b67a8f6023bfc775563d1f6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Log Message:
-----------
[ARM] Avoid repeated hash lookups (NFC) (#111935)
Commit: 8a53dc69c2e9a67cb1b7ea9a568bc0194889f114
https://github.com/llvm/llvm-project/commit/8a53dc69c2e9a67cb1b7ea9a568bc0194889f114
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
Log Message:
-----------
[DebugInfo] Avoid repeated map lookups (NFC) (#111936)
Commit: 2acec3ee21e846ce48c643b431b804a893d18cde
https://github.com/llvm/llvm-project/commit/2acec3ee21e846ce48c643b431b804a893d18cde
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#111937)
Commit: 0f476277d52b3d31739fe8a1b06791f1747e152d
https://github.com/llvm/llvm-project/commit/0f476277d52b3d31739fe8a1b06791f1747e152d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/ObjectYAML/COFFEmitter.cpp
Log Message:
-----------
[ObjectYAML] Avoid repeated hash lookups (NFC) (#111938)
Commit: 3f156ef4cc333bcf9389addd1e0054b654501d7e
https://github.com/llvm/llvm-project/commit/3f156ef4cc333bcf9389addd1e0054b654501d7e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang-tools-extra/clangd/Headers.cpp
M clang-tools-extra/clangd/XRefs.cpp
Log Message:
-----------
[clangd] Simplify code with *Map::operator[] (NFC) (#111939)
Commit: 5b25c31351ad1b10a3819411379b3258869c1e1b
https://github.com/llvm/llvm-project/commit/5b25c31351ad1b10a3819411379b3258869c1e1b
Author: Erich Keane <ekeane at nvidia.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/test/AST/ast-print-openacc-loop-construct.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
A clang/test/SemaOpenACC/loop-construct-gang-ast.cpp
A clang/test/SemaOpenACC/loop-construct-gang-clause.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
[OpenACC] Implement loop 'gang' clause. (#112006)
The 'gang' clause is used to specify parallel execution of loops, thus
has some complicated rules depending on the 'loop's associated compute
construct. This patch implements all of those.
Commit: 089227feaf0efb5e540783a5542655e25669e7d8
https://github.com/llvm/llvm-project/commit/089227feaf0efb5e540783a5542655e25669e7d8
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M lldb/include/lldb/Expression/DiagnosticManager.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/include/lldb/Utility/Args.h
A lldb/include/lldb/Utility/DiagnosticsRendering.h
M lldb/include/lldb/Utility/Status.h
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Commands/CommandObjectExpression.cpp
R lldb/source/Commands/DiagnosticRendering.h
M lldb/source/Expression/DiagnosticManager.cpp
M lldb/source/Expression/FunctionCaller.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Utility/Args.cpp
M lldb/source/Utility/CMakeLists.txt
A lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
A lldb/test/Shell/Commands/command-dwim-print.test
A lldb/test/Shell/Commands/command-options.test
M lldb/unittests/Interpreter/CMakeLists.txt
R lldb/unittests/Interpreter/TestCommandObjectExpression.cpp
M lldb/unittests/Utility/CMakeLists.txt
A lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
Log Message:
-----------
Support inline diagnostics in CommandReturnObject (#110901)
and implement them for dwim-print (a.k.a. `p`) as an example.
The next step will be to expose them as structured data in
SBCommandReturnObject.
Commit: b96ebee1fab2b281c97deb54f3d61c469fe07d01
https://github.com/llvm/llvm-project/commit/b96ebee1fab2b281c97deb54f3d61c469fe07d01
Author: Jacques Pienaar <jpienaar at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/include/mlir/IR/AsmState.h
M mlir/unittests/IR/AttributeTest.cpp
Log Message:
-----------
[mlir] Fix allocateAndCopyWithAlign for immutable (#108679)
Previously this would assert when attempting to getMutableData.
Commit: 50866e84d1da8462aeb96607bf6d9e5bbd5869c5
https://github.com/llvm/llvm-project/commit/50866e84d1da8462aeb96607bf6d9e5bbd5869c5
Author: Janek van Oirschot <janek.vanoirschot at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMCResourceInfo.cpp
M llvm/test/CodeGen/AMDGPU/function-resource-usage.ll
R llvm/test/CodeGen/AMDGPU/recursive-resource-usage-mcexpr.ll
Log Message:
-----------
Revert "[AMDGPU] Avoid resource propagation for recursion through multiple functions" (#112013)
Reverts llvm/llvm-project#111004
Commit: 2c01b278580212914ec037bb5dd9b73702dfe7f1
https://github.com/llvm/llvm-project/commit/2c01b278580212914ec037bb5dd9b73702dfe7f1
Author: Sunho Kim <ksunhokim123 at gmail.com>
Date: 2024-10-12 (Sat, 12 Oct 2024)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
A llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
A llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
A llvm/lib/ExecutionEngine/Orc/RedirectionManager.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/JITLinkRedirectionManagerTest.cpp
Log Message:
-----------
[ORC] Introduce RedirectionManager interface and implementation using JITLink.
Commit: 04af63b267c391a4b0a0fb61060f724f8b5bc2be
https://github.com/llvm/llvm-project/commit/04af63b267c391a4b0a0fb61060f724f8b5bc2be
Author: Sunho Kim <ksunhokim123 at gmail.com>
Date: 2024-10-12 (Sat, 12 Oct 2024)
Changed paths:
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h
M llvm/examples/SpeculativeJIT/SpeculativeJIT.cpp
M llvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h
A llvm/include/llvm/ExecutionEngine/Orc/IRPartitionLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileOnDemandLayer.cpp
A llvm/lib/ExecutionEngine/Orc/IRPartitionLayer.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
M llvm/tools/lli/lli.cpp
Log Message:
-----------
[ORC] Introduce IRPartitionLayer for common partition functionality.
Commit: 188ede28e046c911cb8e604fd1adc2b5cc1f264b
https://github.com/llvm/llvm-project/commit/188ede28e046c911cb8e604fd1adc2b5cc1f264b
Author: Sunho Kim <ksunhokim123 at gmail.com>
Date: 2024-10-12 (Sat, 12 Oct 2024)
Changed paths:
M compiler-rt/lib/orc/common.h
M compiler-rt/lib/orc/elfnix_platform.cpp
M llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
A llvm/include/llvm/ExecutionEngine/Orc/ReOptimizeLayer.h
M llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
A llvm/lib/ExecutionEngine/Orc/ReOptimizeLayer.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
M llvm/unittests/ExecutionEngine/Orc/JITLinkRedirectionManagerTest.cpp
A llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC] Implement basic reoptimization.
Commit: 03447ab98d33ad946fcffe212eb3235b41d09b59
https://github.com/llvm/llvm-project/commit/03447ab98d33ad946fcffe212eb3235b41d09b59
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
A llvm/test/CodeGen/X86/vector-shift-lut.ll
Log Message:
-----------
[X86] Add test coverage for #110317
Add tests showing potential to use PSHUFB for shifts of constant uniform values by using a pre-computed LUT of all legal shift amounts
Commit: 64bcb27d97137a1fd4f2f85025d414201c67b2d2
https://github.com/llvm/llvm-project/commit/64bcb27d97137a1fd4f2f85025d414201c67b2d2
Author: Caio Oliveira <caio.oliveira at intel.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/utils/spirv/gen_spirv_dialect.py
Log Message:
-----------
[mlir][spirv] Make gen_spirv_dialect.py more precise when finding inst_category (#111777)
Use a word boundary, current code was currently failing when parsing the
definition of because it would also match
`CooperativeMatrixOp` from a later mention of
`SPIRV_KHR_CooperativeMatrixOperandsAttr`.
Commit: 697d65ded678f405b637e769f1b0bcc755c8461a
https://github.com/llvm/llvm-project/commit/697d65ded678f405b637e769f1b0bcc755c8461a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Lower/OpenMP/Todo/map-modifiers-close.f90
A flang/test/Lower/OpenMP/Todo/map-modifiers-ompxhold.f90
A flang/test/Lower/OpenMP/Todo/map-modifiers-present.f90
A flang/test/Parser/OpenMP/map-modifiers.f90
A flang/test/Semantics/OpenMP/map-modifiers.f90
Log Message:
-----------
[flang][OpenMP] Parsing support for map type modifiers (#111860)
This commit adds parsing of type modifiers for the MAP clause: CLOSE,
OMPX_HOLD, and PRESENT. The support for ALWAYS has already existed.
The new modifiers are not yet handled in lowering: when present, a TODO
message is emitted and compilation stops.
Commit: 222d8fadb458d9b27c27e3314337ac3771b1d33b
https://github.com/llvm/llvm-project/commit/222d8fadb458d9b27c27e3314337ac3771b1d33b
Author: Sunho Kim <ksunhokim123 at gmail.com>
Date: 2024-10-12 (Sat, 12 Oct 2024)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/JITLinkRedirectionManagerTest.cpp
Log Message:
-----------
[ORC] Try to skip unsupported targets in reoptimization test.
Many build bots are getting failures because of this:
https://lab.llvm.org/buildbot/#/builders/140/builds/8600
https://lab.llvm.org/buildbot/#/builders/137/builds/6824
https://lab.llvm.org/buildbot/#/builders/140/builds/8600
Commit: 7fea5c034ca1e08403da39d64f20b08a6e7542bd
https://github.com/llvm/llvm-project/commit/7fea5c034ca1e08403da39d64f20b08a6e7542bd
Author: Sunho Kim <ksunhokim123 at gmail.com>
Date: 2024-10-12 (Sat, 12 Oct 2024)
Changed paths:
M llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
Log Message:
-----------
[ORC] Try to skip unsupported targets in another reoptimization test.
Skipping another reoptimization test when target is not found.
Commit: 756ef97eeb7fccd45d1120023f6489961a4f8938
https://github.com/llvm/llvm-project/commit/756ef97eeb7fccd45d1120023f6489961a4f8938
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 04af63b267c3
Commit: 4ef737a43e1677626ec2c2f1c024472dde3051b9
https://github.com/llvm/llvm-project/commit/4ef737a43e1677626ec2c2f1c024472dde3051b9
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
Log Message:
-----------
[gn build] Port 089227feaf0e
Commit: 91627546cdc22467d65884f67009f559739b16b1
https://github.com/llvm/llvm-project/commit/91627546cdc22467d65884f67009f559739b16b1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 188ede28e046
Commit: 7f1b465c6ae476e59dc90652d58fc648932d23b1
https://github.com/llvm/llvm-project/commit/7f1b465c6ae476e59dc90652d58fc648932d23b1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
Log Message:
-----------
[gn build] Port 2c01b2785802
Commit: 2aa1dbf9c92e3b27954ba9166c927616625073e8
https://github.com/llvm/llvm-project/commit/2aa1dbf9c92e3b27954ba9166c927616625073e8
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/unittests/SandboxIR/RegionTest.cpp
Log Message:
-----------
[SandboxIR] Add a test for creating non-contiguous Regions. (#112027)
It checks that a Region can have non-contiguous instructions, and that
when iterating through it you don't get the instructions in-between that
aren't part of the Region.
Commit: 48bda00b281a432d6de5e5e5dde6c5d66b992ac8
https://github.com/llvm/llvm-project/commit/48bda00b281a432d6de5e5e5dde6c5d66b992ac8
Author: Sirraide <aeternalmail at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ComputeDependence.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/Sema/ScopeInfo.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/Template.h
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks.mm
A clang/test/SemaCXX/block-packs.cpp
Log Message:
-----------
[Clang] [Sema] Don't crash on unexpanded pack in invalid block literal (#110762)
Consider #109148:
```c++
template <typename ...Ts>
void f() {
[] {
(^Ts);
};
}
```
When we encounter `^Ts`, we try to parse a block and subsequently call
`DiagnoseUnexpandedParameterPack()` (in `ActOnBlockArguments()`), which
sees `Ts` and sets `ContainsUnexpandedParameterPack` to `true` in the
`LambdaScopeInfo` of the enclosing lambda. However, the entire block is
subsequently discarded entirely because it isn’t even syntactically
well-formed. As a result, `ContainsUnexpandedParameterPack` is `true`
despite the lambda’s body no longer containing any unexpanded packs,
which causes an assertion the next time
`DiagnoseUnexpandedParameterPack()` is called.
This pr moves handling of unexpanded parameter packs into
`CapturingScopeInfo` instead so that the same logic is used for both
blocks and lambdas. This fixes this issue since the
`ContainsUnexpandedParameterPack` flag is now part of the block (and
before that, its `CapturingScopeInfo`) and no longer affects the
surrounding lambda directly when the block is parsed. Moreover, this
change makes blocks actually usable with pack expansion.
This fixes #109148.
Commit: 2bb3d3a3f32ffaef3d9b6a27db7f1941f0cb1136
https://github.com/llvm/llvm-project/commit/2bb3d3a3f32ffaef3d9b6a27db7f1941f0cb1136
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
A clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/Modules/cxx-templates.cpp
Log Message:
-----------
Reapply "[Clang][Sema] Refactor collection of multi-level template argument lists (#106585, #111173)" (#111852)
This patch reapplies #111173, fixing a bug when instantiating dependent
expressions that name a member template that is later explicitly
specialized for a class specialization that is implicitly instantiated.
The bug is addressed by adding the `hasMemberSpecialization` function,
which return `true` if _any_ redeclaration is a member specialization.
This is then used when determining the instantiation pattern for a
specialization of a template, and when collecting template arguments for
a specialization of a template.
Commit: f0909e3a991c7b6515cafe2ce0a069a856fe675f
https://github.com/llvm/llvm-project/commit/f0909e3a991c7b6515cafe2ce0a069a856fe675f
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/unittests/SandboxIR/UtilsTest.cpp
Log Message:
-----------
[SandboxIR] Add utility function to find the base Value for Mem instructions (#112030)
Commit: bc53359b92e0fa3e1cf70505e1f2399f07c850d5
https://github.com/llvm/llvm-project/commit/bc53359b92e0fa3e1cf70505e1f2399f07c850d5
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
Update the C status page with papers adopted in Minneapolis
Commit: 31b85c6ead3e0e2979272046548f3ae8a51db289
https://github.com/llvm/llvm-project/commit/31b85c6ead3e0e2979272046548f3ae8a51db289
Author: vporpo <vporpodas at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Interval.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/IntervalTest.cpp
Log Message:
-----------
[SandboxVec][Interval] Implement Interval::comesBefore() (#112026)
This patch implements `Interval::comesBefore(const Interval &Other)`
which returns true if this interval is strictly before Other in program
order. The function asserts that the intervals are disjoint.
Commit: adaa603224fee842b4f71824617adb3b0c7d9cf1
https://github.com/llvm/llvm-project/commit/adaa603224fee842b4f71824617adb3b0c7d9cf1
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/MachineVerifier.cpp
A llvm/test/MachineVerifier/test_multiple_errors.mir
Log Message:
-----------
[MachineVerifier] Report errors from one thread at a time (#111605)
Create the `ReportedErrors` class to track the number of reported errors
during verification. The class will block reporting errors if some other
thread is currently reporting an error.
I've encountered a case where there were many different verifications
reporting errors at the same time on different threads. This ensures
that we don't start printing the error from one case until we are
completely done printing errors from other cases. Most of the time
`AbortOnError = true` so we usually abort after reporting the first
error.
Depends on https://github.com/llvm/llvm-project/pull/111602.
Commit: 58d97034c9c149d175c66440d31f46e9dfd4b760
https://github.com/llvm/llvm-project/commit/58d97034c9c149d175c66440d31f46e9dfd4b760
Author: Fabian Mora <fmora.dev at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M mlir/include/mlir/Conversion/OpenMPToLLVM/ConvertOpenMPToLLVM.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
Log Message:
-----------
[mlir][OpenMP] Implement the ConvertToLLVMPatternInterface (#101997)
This patch implements the `ConvertToLLVMPatternInterface` for the OpenMP
dialect, allowing `convert-to-llvm` to act on the OpenMP dialect.
Commit: cc8edbca7de9204915c84477b8c03a33abeb7775
https://github.com/llvm/llvm-project/commit/cc8edbca7de9204915c84477b8c03a33abeb7775
Author: vporpo <vporpodas at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Interval.h
Log Message:
-----------
[SandboxVec][Interval][NFC] Rename From/To to Top/Bottom (#112034)
The API was already using top()/bottom() but internally we were still
using From/To. This patch fixes this.
Top/Bottom seems a better choice because implies program order, whereas
From/To does not.
Commit: 2967e5f8007d873a3e9d97870d2461d0827a3976
https://github.com/llvm/llvm-project/commit/2967e5f8007d873a3e9d97870d2461d0827a3976
Author: Alex Bradbury <asb at igalia.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/alloca.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64e.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-float.ll
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/fastcc-bf16.ll
M llvm/test/CodeGen/RISCV/fastcc-float.ll
M llvm/test/CodeGen/RISCV/fastcc-half.ll
M llvm/test/CodeGen/RISCV/fastcc-int.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/frame.ll
M llvm/test/CodeGen/RISCV/get-setcc-result-type.ll
M llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/legalize-fneg.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memset-inline.ll
M llvm/test/CodeGen/RISCV/misched-load-clustering.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/riscv-shifted-extend.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/combine-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-expandload-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
M llvm/test/CodeGen/RISCV/rvv/vaadd.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vadc.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vadd.ll
M llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vand.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn.ll
M llvm/test/CodeGen/RISCV/rvv/vasub.ll
M llvm/test/CodeGen/RISCV/rvv/vasubu.ll
M llvm/test/CodeGen/RISCV/rvv/vclmul.ll
M llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc.ll
M llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in.ll
M llvm/test/CodeGen/RISCV/rvv/vmadc.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbc.ll
M llvm/test/CodeGen/RISCV/rvv/vmseq.ll
M llvm/test/CodeGen/RISCV/rvv/vmsge.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgeu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgt.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgtu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsle.ll
M llvm/test/CodeGen/RISCV/rvv/vmsleu.ll
M llvm/test/CodeGen/RISCV/rvv/vmslt.ll
M llvm/test/CodeGen/RISCV/rvv/vmsltu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsne.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhu.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.x.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsub.ll
M llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vor.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vsbc.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-int.ll
M llvm/test/CodeGen/RISCV/rvv/vsmul.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vxor.ll
M llvm/test/CodeGen/RISCV/select-optimize-multiple.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/split-offsets.ll
M llvm/test/CodeGen/RISCV/split-store.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/stack-slot-size.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xtheadmempair.ll
Log Message:
-----------
[RISCV] Enable store clustering by default (#73796)
Builds on #73789, enabling store clustering by default using the same
heuristic.
Commit: 77aa8257acbd773c0c430cd962da1bcfbd5ee94b
https://github.com/llvm/llvm-project/commit/77aa8257acbd773c0c430cd962da1bcfbd5ee94b
Author: Brian Cain <bcain at quicinc.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M lld/ELF/Arch/Hexagon.cpp
M lld/test/ELF/hexagon-shared.s
Log Message:
-----------
[lld][Hexagon] Support predicated-add GOT_16_X mask lookup (#111896)
When encountering an instruction like `if (p0) r0 = add(r0,##bar at GOT)`,
lld would fail with:
```
ld.lld: error: unrecognized instruction for 16_X type: 0x7400C000
```
This issue was encountered while building libreadline with clang 19.1.0.
Fixes: #111876
Commit: 16c8056ca9d3c28ca5e409162a0c82d5726ea655
https://github.com/llvm/llvm-project/commit/16c8056ca9d3c28ca5e409162a0c82d5726ea655
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
Log Message:
-----------
[AMDGPU][test] update test with update_mc_test_check (#111913)
a non-functional change
Update test script with update_mc_test_check script and sort the
testline to be alphabetic order. This helps to maintain the test file in
a clean state
Commit: 3ed8acf2f077fe250773f2ada986c7114adcbb85
https://github.com/llvm/llvm-project/commit/3ed8acf2f077fe250773f2ada986c7114adcbb85
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Simplify check for external user parent basic block, NFC.
Commit: 111b062f63ba52552f41e425449ba1db048dc51a
https://github.com/llvm/llvm-project/commit/111b062f63ba52552f41e425449ba1db048dc51a
Author: Shourya Goel <shouryagoel10000 at gmail.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M libc/src/__support/CPP/string_view.h
M libc/src/__support/CPP/utility/in_place.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/test/src/math/RoundToIntegerTest.h
Log Message:
-----------
[libc] Fix for adding macro I (#111872)
We have two (EDIT: 4) files in which we are using `I`. This PR replaces
them with alternatives like `i` and `IDX` etc.
Commit: 1de71652fd232163dadfee68e2f2b3f0d6dfb1e1
https://github.com/llvm/llvm-project/commit/1de71652fd232163dadfee68e2f2b3f0d6dfb1e1
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/Transforms/IPO/MemProfContextDisambiguation.h
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
A llvm/test/ThinLTO/X86/memprof-icp.ll
Log Message:
-----------
[MemProf] Support cloning for indirect calls with ThinLTO (#110625)
This patch enables support for cloning in indirect callsites.
This is done by synthesizing callsite records for each virtual call
target from the profile metadata. In the thin link all the synthesized
records for a particular indirect callsite initially share the same
context node, but support is added to partition the callsites and
outgoing edges based on the callee function, creating a separate node
for each target.
In the LTO backend, when cloning is needed we first perform indirect
call promotion, then change the target of the new direct call to the
desired clone.
Note this is ThinLTO-specific, since for regular LTO indirect call
promotion should have already occurred.
Commit: 38b010258baa8f543210f06b2e448ce9cbb3915a
https://github.com/llvm/llvm-project/commit/38b010258baa8f543210f06b2e448ce9cbb3915a
Author: Florian Mayer <fmayer at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/test/MC/AArch64/global-tagging.ll
Log Message:
-----------
[MTE] Also test alignment and size of MTE globals (#112039)
Commit: 9a97a57d9ee9dbaa4f7ecfdaba565171ea49b7ac
https://github.com/llvm/llvm-project/commit/9a97a57d9ee9dbaa4f7ecfdaba565171ea49b7ac
Author: Eric Astor <epastor at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang/docs/ClangPlugins.rst
M clang/docs/ReleaseNotes.rst
M clang/examples/Attribute/Attribute.cpp
M clang/include/clang/Basic/ParsedAttrInfo.h
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/test/Frontend/plugin-attribute.cpp
Log Message:
-----------
[clang][frontend] Add support for attribute plugins for statement attributes (#110334)
We already have support for declaration attributes; this is just a matter of extending the plugin infrastructure to cover one more case.
Commit: 8b46d40221f3c302e9c28e3ad7c79767f905a862
https://github.com/llvm/llvm-project/commit/8b46d40221f3c302e9c28e3ad7c79767f905a862
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/orc-b-patterns.ll
Log Message:
-----------
[RISCV] Re-generate orc-b-patterns.ll for store clustering. NFC
The patch added orc-b-patterns.ll landed while store clustering was
still in review.
Commit: 82b40fd4fd2f3f723d30b666f8766973da4166db
https://github.com/llvm/llvm-project/commit/82b40fd4fd2f3f723d30b666f8766973da4166db
Author: Tex Riddell <texr at microsoft.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
Log Message:
-----------
Fix scalar overload name constructed by ReplaceWithVeclib.cpp (#111095)
ReplaceWithVeclib.cpp would construct overload name using all the
arguments in the intrinsic, but overloads should only be constructed
from arguments for which isVectorIntrinsicWithOverloadTypeAtArg returns
true, including the return type first (index -1).
Additionally,
- skip when `Intrinsic::not_intrinsic`, otherwise
`isVectorIntrinsicWithOverloadTypeAtArg` asserts for some
IntrinsicCalls.
Unblocks translation for pow and atan2 intrinsics.
Fixes #111093
Commit: abe148a09f61fa341f80376c763ea4706cfca30e
https://github.com/llvm/llvm-project/commit/abe148a09f61fa341f80376c763ea4706cfca30e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M compiler-rt/lib/asan/asan_fuchsia.cpp
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/asan/asan_thread.h
M compiler-rt/lib/memprof/memprof_thread.cpp
M compiler-rt/lib/memprof/memprof_thread.h
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_registry.h
M compiler-rt/lib/sanitizer_common/tests/sanitizer_thread_registry_test.cpp
Log Message:
-----------
[NFC][sanitizer][asan] Promote stack_id into ThreadContextBase (#111917)
`parent_id` and `stack_id` represent location
where the thread was created, so it's reasonable
to keep them togeter.
For now, only Asan and MemProf use `stack_id`,
but it will be halpfull to print thread origin from
other sanitizers as well.
For #111948
Commit: ff5148a21cc61491ddb3db1ff38aafc8614b99bc
https://github.com/llvm/llvm-project/commit/ff5148a21cc61491ddb3db1ff38aafc8614b99bc
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-10-11 (Fri, 11 Oct 2024)
Changed paths:
M clang-tools-extra/clangd/Headers.cpp
M clang-tools-extra/clangd/XRefs.cpp
M clang/docs/ClangPlugins.rst
M clang/docs/ReleaseNotes.rst
M clang/examples/Attribute/Attribute.cpp
M clang/include/clang/AST/ComputeDependence.h
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/OpenACCClause.h
M clang/include/clang/AST/PrettyPrinter.h
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/OpenACCClauses.def
M clang/include/clang/Basic/OpenACCKinds.h
M clang/include/clang/Basic/ParsedAttrInfo.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/ScopeInfo.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaOpenACC.h
M clang/include/clang/Sema/Template.h
M clang/include/clang/Sema/TemplateDeduction.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
M clang/lib/AST/ComputeDependence.cpp
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/OpenACCClause.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/ASTMatchers/ASTMatchersInternal.cpp
M clang/lib/Basic/IdentifierTable.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/Targets/SystemZ.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Lex/Preprocessor.cpp
M clang/lib/Parse/ParseOpenACC.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaInit.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaStmtAttr.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
M clang/lib/StaticAnalyzer/Checkers/PointerSubChecker.cpp
M clang/test/AST/ByteCode/cxx1z.cpp
M clang/test/AST/ast-print-openacc-loop-construct.cpp
M clang/test/Analysis/pointer-sub.c
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg25xx.cpp
M clang/test/CXX/expr/expr.prim/expr.prim.lambda/blocks.mm
M clang/test/CXX/lex/lex.literal/lex.ext/p1.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p10.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p11.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p3.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p4.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p5.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p6.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p7.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p8.cpp
M clang/test/CXX/lex/lex.literal/lex.ext/p9.cpp
M clang/test/CXX/over/over.oper/over.literal/p2.cpp
M clang/test/CXX/over/over.oper/over.literal/p3.cpp
M clang/test/CXX/over/over.oper/over.literal/p5.cpp
M clang/test/CXX/over/over.oper/over.literal/p6.cpp
M clang/test/CXX/over/over.oper/over.literal/p7.cpp
M clang/test/CXX/over/over.oper/over.literal/p8.cpp
M clang/test/CXX/temp/temp.arg/temp.arg.template/p3-0x.cpp
A clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
M clang/test/CXX/temp/temp.param/p12.cpp
A clang/test/CXX/temp/temp.spec/temp.expl.spec/p7.cpp
M clang/test/FixIt/fixit-c++11.cpp
M clang/test/Frontend/plugin-attribute.cpp
A clang/test/Headers/import_header_unit_after_pragma.cpp
M clang/test/Modules/cxx-templates.cpp
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/ParserOpenACC/parse-clauses.c
M clang/test/Sema/builtin-assume-aligned.c
A clang/test/SemaCXX/block-packs.cpp
M clang/test/SemaCXX/builtin-assume-aligned.cpp
M clang/test/SemaCXX/cxx11-user-defined-literals-unused.cpp
M clang/test/SemaCXX/cxx11-user-defined-literals.cpp
M clang/test/SemaCXX/cxx2a-consteval.cpp
M clang/test/SemaCXX/cxx98-compat.cpp
M clang/test/SemaCXX/literal-operators.cpp
M clang/test/SemaCXX/make_integer_seq.cpp
M clang/test/SemaCXX/no-warn-user-defined-literals-in-system-headers.cpp
M clang/test/SemaCXX/reserved-identifier.cpp
M clang/test/SemaCXX/warn-xor-as-pow.cpp
M clang/test/SemaOpenACC/compute-construct-device_type-clause.c
M clang/test/SemaOpenACC/loop-construct-auto_seq_independent-clauses.c
M clang/test/SemaOpenACC/loop-construct-device_type-clause.c
A clang/test/SemaOpenACC/loop-construct-gang-ast.cpp
A clang/test/SemaOpenACC/loop-construct-gang-clause.cpp
M clang/test/SemaTemplate/cwg2398.cpp
M clang/test/SemaTemplate/temp_arg_nontype.cpp
M clang/test/SemaTemplate/temp_arg_template.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/test/Templight/templight-empty-entries-fix.cpp
M clang/test/Templight/templight-prior-template-arg.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M compiler-rt/lib/orc/common.h
M compiler-rt/lib/orc/elfnix_platform.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_thread_history.cpp
M compiler-rt/lib/sanitizer_common/tests/sanitizer_thread_registry_test.cpp
M flang/examples/FeatureList/FeatureList.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.cpp
M flang/examples/FlangOmpReport/FlangOmpReportVisitor.h
M flang/include/flang/Parser/dump-parse-tree.h
M flang/include/flang/Parser/parse-tree.h
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Clauses.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Analysis/CMakeLists.txt
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/openmp-parsers.cpp
M flang/lib/Parser/unparse.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-1.fir
A flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-2.fir
A flang/test/Lower/OpenMP/Todo/map-modifiers-close.f90
A flang/test/Lower/OpenMP/Todo/map-modifiers-ompxhold.f90
A flang/test/Lower/OpenMP/Todo/map-modifiers-present.f90
A flang/test/Lower/OpenMP/Todo/reduction-inscan.f90
A flang/test/Lower/OpenMP/Todo/reduction-task.f90
A flang/test/Lower/OpenMP/Todo/target-inreduction.f90
A flang/test/Lower/OpenMP/Todo/task-inreduction.f90
M flang/test/Lower/OpenMP/Todo/task_mergeable.f90
A flang/test/Lower/OpenMP/Todo/taskgroup-task-reduction.f90
A flang/test/Lower/OpenMP/Todo/taskloop.f90
A flang/test/Lower/OpenMP/Todo/taskwait-depend.f90
A flang/test/Lower/OpenMP/Todo/taskwait-nowait.f90
A flang/test/Parser/OpenMP/map-modifiers.f90
A flang/test/Semantics/OpenMP/map-modifiers.f90
M libc/src/__support/CPP/string_view.h
M libc/src/__support/CPP/utility/in_place.h
M libc/src/__support/FPUtil/NearestIntegerOperations.h
M libc/src/math/generic/cos.cpp
M libc/src/math/generic/range_reduction_double_common.h
M libc/test/src/math/RoundToIntegerTest.h
M libcxx/utils/ci/run-buildbot
M libcxxabi/CMakeLists.txt
M lld/ELF/AArch64ErrataFix.cpp
M lld/ELF/ARMErrataFix.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/Hexagon.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/DWARF.cpp
M lld/ELF/Driver.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/InputSection.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/OutputSections.h
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
M lld/test/ELF/hexagon-shared.s
A lld/test/ELF/linkerscript/provide-defined.s
M lldb/include/lldb/Expression/DiagnosticManager.h
M lldb/include/lldb/Interpreter/CommandReturnObject.h
M lldb/include/lldb/Utility/Args.h
A lldb/include/lldb/Utility/DiagnosticsRendering.h
M lldb/include/lldb/Utility/Status.h
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Commands/CommandObjectExpression.cpp
R lldb/source/Commands/DiagnosticRendering.h
M lldb/source/Expression/DiagnosticManager.cpp
M lldb/source/Expression/FunctionCaller.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Interpreter/CommandReturnObject.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Utility/Args.cpp
M lldb/source/Utility/CMakeLists.txt
A lldb/source/Utility/DiagnosticsRendering.cpp
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/expression/diagnostics/TestExprDiagnostics.py
M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
A lldb/test/Shell/Commands/command-dwim-print.test
A lldb/test/Shell/Commands/command-options.test
R lldb/test/Shell/SymbolFile/DWARF/no_unique_address-with-bitfields.cpp
A lldb/test/Shell/SymbolFile/DWARF/x86/no_unique_address-with-bitfields.cpp
M lldb/unittests/Interpreter/CMakeLists.txt
R lldb/unittests/Interpreter/TestCommandObjectExpression.cpp
M lldb/unittests/Utility/CMakeLists.txt
A lldb/unittests/Utility/DiagnosticsRenderingTest.cpp
M lldb/utils/lldb-dotest/CMakeLists.txt
M lldb/utils/lldb-dotest/lldb-dotest.in
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CodingStandards.rst
M llvm/docs/LangRef.rst
M llvm/docs/ReleaseNotes.md
M llvm/examples/BrainF/BrainF.cpp
M llvm/examples/Kaleidoscope/BuildingAJIT/Chapter3/KaleidoscopeJIT.h
M llvm/examples/SpeculativeJIT/SpeculativeJIT.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/Analysis/InlineAdvisor.h
M llvm/include/llvm/Analysis/InlineCost.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/ExecutionEngine/Orc/CompileOnDemandLayer.h
A llvm/include/llvm/ExecutionEngine/Orc/IRPartitionLayer.h
A llvm/include/llvm/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.h
M llvm/include/llvm/ExecutionEngine/Orc/LLJIT.h
A llvm/include/llvm/ExecutionEngine/Orc/ReOptimizeLayer.h
A llvm/include/llvm/ExecutionEngine/Orc/RedirectionManager.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/MatrixBuilder.h
M llvm/include/llvm/IR/ModuleSummaryIndex.h
M llvm/include/llvm/SandboxIR/Context.h
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/include/llvm/Transforms/IPO/MemProfContextDisambiguation.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Interval.h
M llvm/lib/Analysis/InlineAdvisor.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/ModuleSummaryAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/ExpandLargeFpConvert.cpp
M llvm/lib/CodeGen/ExpandMemCmp.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/HardwareLoops.cpp
M llvm/lib/CodeGen/IntrinsicLowering.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/ReplaceWithVeclib.cpp
M llvm/lib/CodeGen/SafeStack.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/DebugInfo/LogicalView/Readers/LVCodeViewVisitor.cpp
M llvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
M llvm/lib/ExecutionEngine/Orc/CMakeLists.txt
M llvm/lib/ExecutionEngine/Orc/CompileOnDemandLayer.cpp
A llvm/lib/ExecutionEngine/Orc/IRPartitionLayer.cpp
A llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/LLJIT.cpp
A llvm/lib/ExecutionEngine/Orc/ReOptimizeLayer.cpp
A llvm/lib/ExecutionEngine/Orc/RedirectionManager.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/DIBuilder.cpp
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/IntrinsicInst.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64StackTagging.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/SMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUImageIntrinsicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULibCalls.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSplitModule.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMParallelDSP.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/BPF/BPFAbstractMemberAccess.cpp
M llvm/lib/Target/BPF/BPFAdjustOpt.cpp
M llvm/lib/Target/BPF/BPFPreserveStaticOffset.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/Hexagon/HexagonGenExtract.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCLowerMASSVEntries.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
A llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SystemZ/SystemZTDC.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerRefTypesIntPtrConv.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86PartialReduction.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
M llvm/lib/Transforms/IPO/CrossDSOCFI.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/IPO/SampleProfileProbe.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/BoundsChecking.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/KCFI.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Instrumentation/ThreadSanitizer.cpp
M llvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LoopDataPrefetch.cpp
M llvm/lib/Transforms/Scalar/LoopFlatten.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LowerGuardIntrinsic.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MakeGuardsExplicit.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/AssumeBundleBuilder.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/EntryExitInstrumenter.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/LowerGlobalDtors.cpp
M llvm/lib/Transforms/Utils/MemoryTaggingSupport.cpp
M llvm/lib/Transforms/Utils/PredicateInfo.cpp
M llvm/lib/Transforms/Utils/PromoteMemoryToRegister.cpp
M llvm/lib/Transforms/Utils/RelLookupTableConverter.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Bitcode/compatibility.ll
M llvm/test/Bitcode/operand-bundles.ll
A llvm/test/CodeGen/AArch64/consecutive-stores-of-faddv.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-armpl.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef-scalable.ll
M llvm/test/CodeGen/AArch64/replace-with-veclib-sleef.ll
M llvm/test/CodeGen/AArch64/statepoint-twoaddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-demote-scc-branches.ll
M llvm/test/CodeGen/AMDGPU/branch-condition-and.ll
M llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
M llvm/test/CodeGen/AMDGPU/else.ll
M llvm/test/CodeGen/AMDGPU/expand-variadic-call.ll
M llvm/test/CodeGen/AMDGPU/flat-address-space.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
A llvm/test/CodeGen/AMDGPU/insert-handle-flat-vmem-ds.mir
R llvm/test/CodeGen/AMDGPU/insert-skips-flat-vmem-ds.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx10.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gfx12.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-gws.mir
M llvm/test/CodeGen/AMDGPU/insert-skips-ignored-insts.mir
M llvm/test/CodeGen/AMDGPU/itofp.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umax.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.umin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy-libcall.ll
M llvm/test/CodeGen/AMDGPU/memcpy-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memmove-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-gpr-idx-mode.mir
M llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-special-instructions.mir
M llvm/test/CodeGen/AMDGPU/ret_jump.ll
M llvm/test/CodeGen/AMDGPU/sdwa-commute.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/skip-branch-taildup-ret.mir
M llvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
M llvm/test/CodeGen/NVPTX/i8x4-instructions.ll
M llvm/test/CodeGen/NVPTX/sext-setcc.ll
M llvm/test/CodeGen/RISCV/GlobalISel/vararg.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/add-before-shl.ll
M llvm/test/CodeGen/RISCV/alloca.ll
M llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
M llvm/test/CodeGen/RISCV/callee-saved-gprs.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/calling-conv-lp64e.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32.ll
M llvm/test/CodeGen/RISCV/calling-conv-rv32f-ilp32e.ll
M llvm/test/CodeGen/RISCV/calling-conv-vector-float.ll
M llvm/test/CodeGen/RISCV/calls.ll
M llvm/test/CodeGen/RISCV/double-calling-conv.ll
M llvm/test/CodeGen/RISCV/double-convert-strict.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/fastcc-bf16.ll
M llvm/test/CodeGen/RISCV/fastcc-float.ll
M llvm/test/CodeGen/RISCV/fastcc-half.ll
M llvm/test/CodeGen/RISCV/fastcc-int.ll
M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
M llvm/test/CodeGen/RISCV/fold-addi-loadstore.ll
M llvm/test/CodeGen/RISCV/forced-atomics.ll
M llvm/test/CodeGen/RISCV/fp128.ll
M llvm/test/CodeGen/RISCV/frame.ll
M llvm/test/CodeGen/RISCV/get-setcc-result-type.ll
M llvm/test/CodeGen/RISCV/hoist-global-addr-base.ll
M llvm/test/CodeGen/RISCV/intrinsic-cttz-elts-vscale.ll
M llvm/test/CodeGen/RISCV/legalize-fneg.ll
M llvm/test/CodeGen/RISCV/llvm.exp10.ll
M llvm/test/CodeGen/RISCV/llvm.frexp.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memset-inline.ll
M llvm/test/CodeGen/RISCV/misched-load-clustering.ll
M llvm/test/CodeGen/RISCV/neg-abs.ll
M llvm/test/CodeGen/RISCV/nontemporal.ll
A llvm/test/CodeGen/RISCV/orc-b-patterns.ll
M llvm/test/CodeGen/RISCV/overflow-intrinsics.ll
M llvm/test/CodeGen/RISCV/pr63816.ll
M llvm/test/CodeGen/RISCV/push-pop-popret.ll
M llvm/test/CodeGen/RISCV/riscv-codegenprepare-asm.ll
M llvm/test/CodeGen/RISCV/riscv-shifted-extend.ll
M llvm/test/CodeGen/RISCV/rv32zbb.ll
M llvm/test/CodeGen/RISCV/rvv/binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/combine-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-binop-splats.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitreverse.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bswap.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctlz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ctpop-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-cttz-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-expandload-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp2i.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-lrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-reduction-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1down.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shuffle-vslide1up.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-shufflevector-vnsrl.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwadd.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwaddu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulsu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsub.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwsubu.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fpclamptosat_vec.ll
M llvm/test/CodeGen/RISCV/rvv/masked-tama.ll
M llvm/test/CodeGen/RISCV/rvv/memset-inline.ll
M llvm/test/CodeGen/RISCV/rvv/no-reserved-frame.ll
M llvm/test/CodeGen/RISCV/rvv/pr104480.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-args-by-mem.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/setcc-integer.ll
M llvm/test/CodeGen/RISCV/rvv/splat-vector-split-i64-vl-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/stepvector.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-ta.ll
M llvm/test/CodeGen/RISCV/rvv/unmasked-tu.ll
M llvm/test/CodeGen/RISCV/rvv/vaadd.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vaaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vadc.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vadd.ll
M llvm/test/CodeGen/RISCV/rvv/vand-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vand.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vandn-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vandn.ll
M llvm/test/CodeGen/RISCV/rvv/vasub.ll
M llvm/test/CodeGen/RISCV/rvv/vasubu.ll
M llvm/test/CodeGen/RISCV/rvv/vclmul.ll
M llvm/test/CodeGen/RISCV/rvv/vclmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdiv.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vdivu.ll
M llvm/test/CodeGen/RISCV/rvv/vec3-setcc-crash.ll
A llvm/test/CodeGen/RISCV/rvv/vl-opt-instrs.ll
M llvm/test/CodeGen/RISCV/rvv/vl-opt-op-info.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmacc.ll
M llvm/test/CodeGen/RISCV/rvv/vmadc.carry.in.ll
M llvm/test/CodeGen/RISCV/rvv/vmadc.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmadd.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in.ll
M llvm/test/CodeGen/RISCV/rvv/vmsbc.ll
M llvm/test/CodeGen/RISCV/rvv/vmseq.ll
M llvm/test/CodeGen/RISCV/rvv/vmsge.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgeu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgt.ll
M llvm/test/CodeGen/RISCV/rvv/vmsgtu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsle.ll
M llvm/test/CodeGen/RISCV/rvv/vmsleu.ll
M llvm/test/CodeGen/RISCV/rvv/vmslt.ll
M llvm/test/CodeGen/RISCV/rvv/vmsltu.ll
M llvm/test/CodeGen/RISCV/rvv/vmsne.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmul.ll
M llvm/test/CodeGen/RISCV/rvv/vmulh.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhsu.ll
M llvm/test/CodeGen/RISCV/rvv/vmulhu.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.s.x.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.x.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsac.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vnmsub.ll
M llvm/test/CodeGen/RISCV/rvv/vor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vor.ll
M llvm/test/CodeGen/RISCV/rvv/vp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vreductions-int-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrem-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrem.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vremu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vremu.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vrsub.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsadd.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsaddu.ll
M llvm/test/CodeGen/RISCV/rvv/vsbc.ll
M llvm/test/CodeGen/RISCV/rvv/vselect-int.ll
M llvm/test/CodeGen/RISCV/rvv/vsmul.ll
M llvm/test/CodeGen/RISCV/rvv/vsplats-i64.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssub.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vssubu.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vsub.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vxor-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vxor.ll
M llvm/test/CodeGen/RISCV/select-optimize-multiple.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/split-offsets.ll
M llvm/test/CodeGen/RISCV/split-store.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/stack-slot-size.ll
M llvm/test/CodeGen/RISCV/stack-store-check.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
M llvm/test/CodeGen/RISCV/unaligned-load-store.ll
M llvm/test/CodeGen/RISCV/urem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
M llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
M llvm/test/CodeGen/RISCV/vararg.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/xtheadmempair.ll
M llvm/test/CodeGen/X86/tls-align.ll
A llvm/test/CodeGen/X86/vector-shift-lut.ll
M llvm/test/MC/AArch64/global-tagging.ll
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
M llvm/test/MC/RISCV/insn.s
A llvm/test/MachineVerifier/test_multiple_errors.mir
A llvm/test/ThinLTO/X86/memprof-icp.ll
A llvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-only-one-live-use.ll
M llvm/test/Transforms/InstCombine/ispow2.ll
A llvm/test/Transforms/LoopVectorize/AArch64/low_trip_count_predicates.ll
A llvm/test/Transforms/LoopVectorize/RISCV/blend-any-of-reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
A llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-forwarding.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-profdata/memprof-merge-versions.test
A llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm-debug.ll
A llvm/test/tools/llvm-split/AMDGPU/indirect-call-inline-asm.ll
R llvm/test/tools/llvm-split/AMDGPU/kernels-alias-dependencies.ll
M llvm/test/tools/llvm-split/AMDGPU/kernels-dependency-indirect.ll
M llvm/tools/lli/lli.cpp
M llvm/tools/llvm-profdata/llvm-profdata.cpp
M llvm/tools/llvm-reduce/deltas/ReduceOpcodes.cpp
M llvm/unittests/Analysis/AssumeBundleQueriesTest.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/ExecutionEngine/Orc/CMakeLists.txt
A llvm/unittests/ExecutionEngine/Orc/JITLinkRedirectionManagerTest.cpp
A llvm/unittests/ExecutionEngine/Orc/ReOptimizeLayerTest.cpp
M llvm/unittests/IR/BasicBlockTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/IR/IntrinsicsTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/IR/VPIntrinsicTest.cpp
M llvm/unittests/SandboxIR/RegionTest.cpp
M llvm/unittests/SandboxIR/UtilsTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/IntervalTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTest.cpp
M llvm/utils/gn/secondary/lldb/source/Utility/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M mlir/include/mlir/Analysis/DataFlow/DeadCodeAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/DenseAnalysis.h
M mlir/include/mlir/Analysis/DataFlow/SparseAnalysis.h
M mlir/include/mlir/Analysis/DataFlowFramework.h
M mlir/include/mlir/Conversion/OpenMPToLLVM/ConvertOpenMPToLLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.h
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgNamedStructuredOps.yaml
M mlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
M mlir/include/mlir/IR/AsmState.h
M mlir/include/mlir/IR/Block.h
M mlir/include/mlir/InitAllExtensions.h
M mlir/lib/Analysis/DataFlow/DeadCodeAnalysis.cpp
M mlir/lib/Analysis/DataFlow/DenseAnalysis.cpp
M mlir/lib/Analysis/DataFlow/IntegerRangeAnalysis.cpp
M mlir/lib/Analysis/DataFlow/LivenessAnalysis.cpp
M mlir/lib/Analysis/DataFlow/SparseAnalysis.cpp
M mlir/lib/Analysis/DataFlowFramework.cpp
M mlir/lib/Conversion/MemRefToEmitC/MemRefToEmitC.cpp
M mlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgInterfaces.cpp
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Specialize.cpp
M mlir/lib/Dialect/Linalg/Transforms/TransposeMatmul.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Linalg/Transforms/WinogradConv2D.cpp
M mlir/lib/Dialect/NVGPU/TransformOps/NVGPUTransformOps.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/python/mlir/dialects/linalg/opdsl/ops/core_named_ops.py
M mlir/test/Conversion/MemRefToEmitC/memref-to-emitc-failed.mlir
M mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Linalg/generalize-named-ops.mlir
M mlir/test/Dialect/Linalg/invalid.mlir
M mlir/test/Dialect/Linalg/named-ops.mlir
A mlir/test/Dialect/Linalg/roundtrip-broadcast.mlir
A mlir/test/Dialect/Linalg/roundtrip-transpose.mlir
A mlir/test/Dialect/Linalg/specialize-generic-ops-fail.mlir
M mlir/test/Dialect/Linalg/transform-op-specialize.mlir
M mlir/test/Dialect/Linalg/transform-tile-and-winograd-rewrite.mlir
M mlir/test/Dialect/Linalg/transform-tile-winograd.mlir
M mlir/test/Dialect/Linalg/winograd-conv2d-rewrite.mlir
M mlir/test/Dialect/SparseTensor/codegen.mlir
A mlir/test/Dialect/SparseTensor/no_lowering.mlir
M mlir/test/lib/Analysis/DataFlow/TestDeadCodeAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestDenseForwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/DataFlow/TestSparseBackwardDataFlowAnalysis.cpp
M mlir/test/lib/Analysis/TestDataFlowFramework.cpp
M mlir/test/python/dialects/linalg/ops.py
M mlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-yaml-gen.cpp
M mlir/unittests/IR/AttributeTest.cpp
M mlir/utils/spirv/gen_spirv_dialect.py
M polly/lib/CodeGen/IslExprBuilder.cpp
M polly/lib/CodeGen/PerfMonitor.cpp
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/cd2a0b3c9dab...ff5148a21cc6
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