[all-commits] [llvm/llvm-project] 7b0d56: AMDGPU/GlobalISel: Fix inst-selection of ballot (#...

[Petar Avramovic via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7b0d56be1d002e9cf0d8dda8ecaee99c5dbc88cf
      https://github.com/llvm/llvm-project/commit/7b0d56be1d002e9cf0d8dda8ecaee99c5dbc88cf
  Author: Petar Avramovic <Petar.Avramovic at amd.com>
  Date:   2024-10-11 (Fri, 11 Oct 2024)

  Changed paths:
    M llvm/docs/AMDGPUUsage.rst
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.wave32.ll

  Log Message:
  -----------
  AMDGPU/GlobalISel: Fix inst-selection of ballot (#109986)

Both input and output of ballot are lane-masks:
result is lane-mask with 'S32/S64 LLT and SGPR bank'
input is lane-mask with 'S1 LLT and VCC reg bank'.
Ballot copies bits from input lane-mask for
all active lanes and puts 0 for inactive lanes.
GlobalISel did not set 0 in result for inactive lanes
for non-constant input.



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