[all-commits] [llvm/llvm-project] 8d35ab: AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support...

[YunQiang Su via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8d35ab80fc7a856ac6a60cf9074210f3983206ac
      https://github.com/llvm/llvm-project/commit/8d35ab80fc7a856ac6a60cf9074210f3983206ac
  Author: YunQiang Su <yunqiang at isrc.iscas.ac.cn>
  Date:   2024-10-10 (Thu, 10 Oct 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/combine_andor_with_cmps.ll
    A llvm/test/CodeGen/AArch64/fp-maximumnum-minimumnum.ll

  Log Message:
  -----------
  AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (#107855)

FMINNM/FMAXNM instructions of AArch64 follow IEEE754-2008. We can use
them to canonicalize a floating point number. And
FMINNUM_IEEE/FMAXNUM_IEEE is used by something like expanding
FMINIMUMNUM/FMAXIMUMNUM, so let's define them.

Update combine_andor_with_cmps.ll.
Add fp-maximumnum-minimumnum.ll, with nnan testcases only.

V1F64 is not supported yet.
If we set v1f64 as legal, FMINNUM/FMAXNUM will have some problem:
   both of them use `if (isOperationLegalOrCustom(FMAXNUM_IEEE, VT))`.

AArch64 depends on `expandFMINNUM_FMAXNUM` returning `SDValue()`
for FMAXNUM and FMINNUM.

We should fix this problem, while it will be in future patch.



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