[all-commits] [llvm/llvm-project] f020bf: [SLP]Initial support for non-power-of-2 (but whole...

[Alexey Bataev via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: f020bf15263f71e76e8b64fd0c333fff9744beae
      https://github.com/llvm/llvm-project/commit/f020bf15263f71e76e8b64fd0c333fff9744beae
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-10-09 (Wed, 09 Oct 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/long-full-reg-stores.ll

  Log Message:
  -----------
  [SLP]Initial support for non-power-of-2 (but whole reg) vectorization for stores

Allows non-power-of-2 vectorization for stores, but still requires, that
vectorized number of elements forms full vector registers.

Reviewers: RKSimon

Reviewed By: RKSimon

Pull Request: https://github.com/llvm/llvm-project/pull/111194



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