[all-commits] [llvm/llvm-project] ccc7a0: [BOLT] Drop blocks without profile in BAT YAML (#1...

Amir Ayupov via All-commits all-commits at lists.llvm.org
Thu Sep 26 12:26:33 PDT 2024


  Branch: refs/heads/users/shawbyoung/spr/main.bolt-match-blocks-with-pseudo-probes
  Home:   https://github.com/llvm/llvm-project
  Commit: ccc7a072db05592cc42c0caac835b22f9a01a89f
      https://github.com/llvm/llvm-project/commit/ccc7a072db05592cc42c0caac835b22f9a01a89f
  Author: Amir Ayupov <aaupov at fb.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M bolt/lib/Profile/DataAggregator.cpp

  Log Message:
  -----------
  [BOLT] Drop blocks without profile in BAT YAML (#107970)

Align BAT YAML (DataAggregator) to YAMLProfileWriter which drops blocks
without profile:

https://github.com/llvm/llvm-project/blob/61372fc5db9b14fd612be8a58a76edd7f0ee38aa/bolt/lib/Profile/YAMLProfileWriter.cpp#L162-L176

Test Plan: NFCI


  Commit: 828783177f71d95522763fba92ef1e42dc6101c7
      https://github.com/llvm/llvm-project/commit/828783177f71d95522763fba92ef1e42dc6101c7
  Author: Henrik G. Olsson <hnrklssn at gmail.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/utils/lit/lit/TestRunner.py
    A llvm/utils/lit/tests/Inputs/escape-color/color-escaped.txt
    A llvm/utils/lit/tests/Inputs/escape-color/color.txt
    A llvm/utils/lit/tests/Inputs/escape-color/lit.cfg
    A llvm/utils/lit/tests/escape-color.py

  Log Message:
  -----------
  Reland "[llvm-lit] Process ANSI color codes in test output when forma… (#108107)

…tting" (#108104)"

This recommits 0f56ba13bff7ab72bfafcf7c5cf9e5b8bd16d895 (reverted by
6007ad79afeffb1288781b4a7241290386293aff). In the original patch
llvm/utils/lit/tests/escape-color.py failed on Windows because it diffed
llvm-lit output with a file containing '\n' newlines rather than '\r\n'.
This issue is avoided by calling 'diff --strip-trailing-cr'.

Original description below:
Test output that carried color across newlines previously resulted in
the formatting around the output also being colored. Detect the current
ANSI color and reset it when printing formatting, and then reapply it.
As an added bonus an unterminated color code is also detected,
preventing it from leaking out into the rest of the terminal.

Fixes #106633


  Commit: 3cd01371e007b2a8fe32e5d8ce1154057e5e1c2e
      https://github.com/llvm/llvm-project/commit/3cd01371e007b2a8fe32e5d8ce1154057e5e1c2e
  Author: Pranav Kant <prka at google.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M clang/include/clang/Serialization/ASTReader.h
    M clang/lib/Serialization/ASTReader.cpp
    M clang/lib/Serialization/ASTReaderDecl.cpp
    M clang/lib/Serialization/ASTWriterDecl.cpp
    R clang/test/Headers/crash-instantiated-in-scope-cxx-modules.cpp
    R clang/test/Headers/crash-instantiated-in-scope-cxx-modules2.cpp

  Log Message:
  -----------
  Revert "[RFC][C++20][Modules] Fix crash when function and lambda insi… (#108311)

…de loaded from different modules (#104512)"

This reverts commit d778689fdc812033e7142ed87e4ee13c4997b3f9.


  Commit: 480f07ff6c7ac2d928b6f1862698dbd51069735c
      https://github.com/llvm/llvm-project/commit/480f07ff6c7ac2d928b6f1862698dbd51069735c
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfwmaccbf16.ll

  Log Message:
  -----------
  [RISCV] Add fixed length vector patterns for vfwmaccbf16.vv (#108204)

This adds VL patterns for vfwmaccbf16.vv so that we can handle fixed
length vectors.

It does this by teaching combineOp_VLToVWOp_VL to emit
RISCVISD::VFWMADD_VL for bf16. The change in getOrCreateExtendedOp is
needed because getNarrowType is based off of the bitwidth so returns
f16. We need to explicitly check for bf16.

Note that the .vf patterns don't work yet, since the build_vector splat
gets lowered to a (vmv_v_x_vl (fmv_x_anyexth x)) instead of a vfmv.v.f,
which SplatFP doesn't pick up, see #106637.


  Commit: 44d122188e0edf4a834bcd97256cf4af0de05890
      https://github.com/llvm/llvm-project/commit/44d122188e0edf4a834bcd97256cf4af0de05890
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/load-bf16.ll
    A llvm/test/CodeGen/RISCV/rvv/store-bf16.ll

  Log Message:
  -----------
  [RISCV] Expand bf16 vector truncstores and extloads (#108235)

Previously they were legal by default, so the truncstore/extload test
cases would get combined and crash during selection.
These are set to expand for f16 so do the same for bf16.


  Commit: 1a431bcea7c2606ebaab47b58e5bba082189675c
      https://github.com/llvm/llvm-project/commit/1a431bcea7c2606ebaab47b58e5bba082189675c
  Author: Longsheng Mou <longshengmou at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
    M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
    M mlir/include/mlir/IR/CommonAttrConstraints.td
    M mlir/test/Dialect/Tosa/invalid.mlir

  Log Message:
  -----------
  [mlir][Tosa] Fix attr type of out_shape for `tosa.transpose_conv2d` (#108041)

This patch fixes attr type of out_shape, which is i64 dense array
attribute with exactly 4 elements.

- Fix description of DenseArrayMaxCt
- Add DenseArrayMinCt and move it to CommonAttrConstraints.td
- Change type of out_shape to Tosa_IntArrayAttr4

Fixes #107804.


  Commit: 757d8b3efdd82a02973d0ab4ebaa2e05e9ab7ae0
      https://github.com/llvm/llvm-project/commit/757d8b3efdd82a02973d0ab4ebaa2e05e9ab7ae0
  Author: Jim Lin <jim at andestech.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Driver/ToolChains/CommonArgs.cpp
    M clang/test/Driver/riscv-mcmodel.c

  Log Message:
  -----------
  [RISCV] Allow -mcmodel= to accept large for RV64 (#107817)


  Commit: 3d129016b1a0cb00a26bfab521350ef824d6d76d
      https://github.com/llvm/llvm-project/commit/3d129016b1a0cb00a26bfab521350ef824d6d76d
  Author: Justin Bogner <mail at justinbogner.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
    M llvm/lib/Target/DirectX/DXILOpBuilder.h
    M llvm/lib/Target/DirectX/DXILOpLowering.cpp
    M llvm/test/CodeGen/DirectX/CreateHandleFromBinding.ll

  Log Message:
  -----------
  [DirectX] Preserve value names in DXILOpLowering. NFC (#108089)

If the value we're replacing has a name, we might as well preserve it.


  Commit: 39751e7ff998266bdefeaaf3b3bf3cdba26b0322
      https://github.com/llvm/llvm-project/commit/39751e7ff998266bdefeaaf3b3bf3cdba26b0322
  Author: Congcong Cai <congcongcai0907 at 163.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang-tools-extra/clang-tidy/add_new_check.py

  Log Message:
  -----------
  [clang-tidy][NFC] fix add_new_check python3.8 incompatibility (#107871)

Fixes: #107846


  Commit: c9ab69798ff92f1fcd150a0e1988d08fb8c2a59d
      https://github.com/llvm/llvm-project/commit/c9ab69798ff92f1fcd150a0e1988d08fb8c2a59d
  Author: vporpo <vporpodas at google.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp

  Log Message:
  -----------
  [SandboxIR] Implement ConstantTokenNone (#108106)

This patch implements sandboxir::ConstantTokenNone mirroring
llvm::ConstantTokenNone.


  Commit: 2d4bdfba96d4cf88b12226b2b511bf55ee5e6559
      https://github.com/llvm/llvm-project/commit/2d4bdfba96d4cf88b12226b2b511bf55ee5e6559
  Author: Yun-Fly <yunfei.song at intel.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
    M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir

  Log Message:
  -----------
  [mlir][scf] Extend consumer fuse to single nested `scf.for` (#94190)

Refactor current consumer fusion based on `addInitOperandsToLoopNest` to support single nested `scf.for`, E.g.

```
%0 = scf.for() {
  %1 = scf.for() {
     tiledProducer
  }
  yield %1
}
%2 = consumer ins(%0)
```


  Commit: 335538c271c9c71ef3f2e23680265e7b77595be0
      https://github.com/llvm/llvm-project/commit/335538c271c9c71ef3f2e23680265e7b77595be0
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
    M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir

  Log Message:
  -----------
  Revert "[mlir][scf] Extend consumer fuse to single nested `scf.for` (#94190)"

This reverts commit 2d4bdfba96d4cf88b12226b2b511bf55ee5e6559.

A build breakage is reported at:

https://lab.llvm.org/buildbot/#/builders/138/builds/3524


  Commit: 8168088f0a9015bc6d930e8bc1c639dee06ca82c
      https://github.com/llvm/llvm-project/commit/8168088f0a9015bc6d930e8bc1c639dee06ca82c
  Author: Owen Pan <owenpiano at gmail.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M clang/lib/Format/ContinuationIndenter.cpp
    M clang/unittests/Format/FormatTestJS.cpp

  Log Message:
  -----------
  [clang-format] Fix regressions in BAS_AlwaysBreak (#107506)

Fixes #107401.
Fixes #107574.


  Commit: 5e80fc88f484b471ec61ac28894698a946c4fb89
      https://github.com/llvm/llvm-project/commit/5e80fc88f484b471ec61ac28894698a946c4fb89
  Author: Lang Hames <lhames at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/tools/opt/CMakeLists.txt

  Log Message:
  -----------
  [opt] Fix opt for LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.

Building with -DLLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off should not
prevent use of opt plugins.

This fix uses the approach implemented in
https://github.com/llvm/llvm-project/pull/101741.

rdar://135841478


  Commit: 2740273505ab27c0d8531d35948f0647309842cd
      https://github.com/llvm/llvm-project/commit/2740273505ab27c0d8531d35948f0647309842cd
  Author: Amy Wang <kai.ting.wang at huawei.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M mlir/include/mlir/Analysis/Presburger/Utils.h
    M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
    M mlir/lib/Analysis/Presburger/Matrix.cpp
    M mlir/lib/Analysis/Presburger/Simplex.cpp

  Log Message:
  -----------
  [MLIR][Presburger] Make printing aligned to assist in debugging (#107648)

Hello Arjun! Please allow me to contribute this patch as it helps me
debugging significantly! When the 1's and 0's don't line up when
debugging farkas lemma of numerous polyhedrons using simplex lexmin
solver, it is truly straining on the eyes. Hopefully this patch can help
others!

The unfortunate part is the lack of testcase as I'm not sure how to add
testcase for debug dumps. :) However, you can add this testcase to the
SimplexTest.cpp to witness the nice printing!

```c++
TEST(SimplexTest, DumpTest) {
  int COLUMNS = 2;
  int ROWS = 2;
  LexSimplex simplex(COLUMNS * 2);
  IntMatrix m1(ROWS, COLUMNS * 2 + 1);
  // Adding LHS columns.
  for (int i = 0; i < ROWS; i++) {
    // an arbitrary formula to test all kinds of integers
    for (int j = 0; j < COLUMNS; j++) 
      m1(i, j) = i + (2 << (i % 3)) * (-1 * ((i + j) % 2));
  }
  // Adding RHS columns.
  for (int i = 0; i < ROWS; i++) {
    for (int j = 0; j < COLUMNS; j++)
      m1(i, j + COLUMNS) = j - (3 << (j % 4)) * (-1 * ((i + j * 2) % 2));
  }
  for (int i = 0; i < m1.getNumRows(); i++) {
    ArrayRef<DynamicAPInt> curRow = m1.getRow(i);
    simplex.addInequality(curRow);
  }
  IntegerRelation rel =
      parseRelationFromSet("(x, y, z)[] : (z - x - 17 * y == 0, x - 11 * z >= 1)",2);
  simplex.dump();
  m1.dump();
  rel.dump();
}
```

```
rows = 2, columns = 7
var: c3, c4, c5, c6
con: r0 [>=0], r1 [>=0]
r0: -1, r1: -2
c0: denom, c1: const, c2: 2147483647, c3: 0, c4: 1, c5: 2, c6: 3
  1  0  1  0 -2  0  1
  1  0 -8 -3  1  3  7

  0 -2  0  1  0
 -3  1  3  7  0
Domain: 2, Range: 1, Symbols: 0, Locals: 0
2 constraints
 -1  -17  1   0   = 0
  1   0  -11 -1  >= 0

```


  Commit: 94698369e9cc211b4d1e666b82dc5848c40ab5ce
      https://github.com/llvm/llvm-project/commit/94698369e9cc211b4d1e666b82dc5848c40ab5ce
  Author: Owen Pan <owenpiano at gmail.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M clang/unittests/Format/TokenAnnotatorTest.cpp

  Log Message:
  -----------
  [clang-format][NFC] Minor clean of TokenAnnotatorTest


  Commit: ded080152acceca5d68014d63f5027a6d8266cbb
      https://github.com/llvm/llvm-project/commit/ded080152acceca5d68014d63f5027a6d8266cbb
  Author: Sirui Mu <msrlancern at gmail.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M libc/cmake/modules/LLVMLibCArchitectures.cmake
    M libc/include/llvm-libc-macros/float16-macros.h
    M libc/include/llvm-libc-macros/stdckdint-macros.h
    M libc/src/__support/CPP/CMakeLists.txt
    M libc/src/__support/CPP/new.cpp
    M libc/src/__support/CPP/new.h
    M libc/src/__support/OSUtil/io.h
    A libc/src/__support/OSUtil/windows/CMakeLists.txt
    A libc/src/__support/OSUtil/windows/exit.cpp
    A libc/src/__support/OSUtil/windows/io.cpp
    A libc/src/__support/OSUtil/windows/io.h
    M libc/src/__support/macros/properties/types.h
    M libc/test/src/__support/CMakeLists.txt
    M libc/test/src/__support/FPUtil/CMakeLists.txt
    M libc/test/src/__support/FPUtil/fpbits_test.cpp
    M libc/test/src/__support/arg_list_test.cpp
    M libc/test/src/fenv/CMakeLists.txt
    M libc/test/src/fenv/getenv_and_setenv_test.cpp
    M libc/test/src/math/smoke/AddTest.h
    M libc/test/src/math/smoke/CMakeLists.txt
    M libc/test/src/math/smoke/SubTest.h
    M libc/test/src/string/memory_utils/CMakeLists.txt
    M libc/test/src/string/memory_utils/op_tests.cpp

  Log Message:
  -----------
  [libc] Add osutils for Windows and make libc and its tests build on Windows target (#104676)

This PR first adds osutils for Windows, and changes some libc code to
make libc and its tests build on the Windows target. It then temporarily
disables some libc tests that are currently problematic on Windows.

Specifically, the changes besides the addition of osutils include:

- Macro `LIBC_TYPES_HAS_FLOAT16` is disabled on Windows. `clang-cl`
generates calls to functions in `compiler-rt` to handle float16
arithmetic and these functions are currently not linked in on Windows.
- Macro `LIBC_TYPES_HAS_INT128` is disabled on Windows.
- The invocation to `::aligned_malloc` is changed to an invocation to
`::_aligned_malloc`.
- The following unit tests are temporarily disabled because they
currently fail on Windows:
  - `test.src.__support.big_int_test`
  - `test.src.__support.arg_list_test`
  - `test.src.fenv.getenv_and_setenv_test`
- Tests involving `__m128i`, `__m256i`, and `__m512i` in
`test.src.string.memory_utils.op_tests.cpp`
- `test_range_errors` in `libc/test/src/math/smoke/AddTest.h` and
`libc/test/src/math/smoke/SubTest.h`


  Commit: b7167c784486581dad3f3188232951b79c6d0fd9
      https://github.com/llvm/llvm-project/commit/b7167c784486581dad3f3188232951b79c6d0fd9
  Author: Jie Fu <jiefu at tencent.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/include/mlir/Analysis/Presburger/Utils.h

  Log Message:
  -----------
  [mlir] Fix incorrect comparison due to -Wtautological-constant-out-of-range-compare (NFC)

/llvm-project/mlir/include/mlir/Analysis/Presburger/Utils.h:320:26:
error: result of comparison of constant 18446744073709551615 with expression of type 'unsigned int' is always true [-Werror,-Wtautological-constant-out-of-range-compare]
  preIndent = (preIndent != std::string::npos) ? preIndent + 1 : 0;
               ~~~~~~~~~ ^  ~~~~~~~~~~~~~~~~~
/llvm-project/mlir/include/mlir/Analysis/Presburger/Utils.h:335:28:
error: result of comparison of constant 18446744073709551615 with expression of type 'unsigned int' is always true [-Werror,-Wtautological-constant-out-of-range-compare]
    preIndent = (preIndent != std::string::npos) ? preIndent + 1 : 0;
                 ~~~~~~~~~ ^  ~~~~~~~~~~~~~~~~~
2 errors generated.


  Commit: a9ba1b6dd5133aa4432759c203e807d8039b4cbd
      https://github.com/llvm/llvm-project/commit/a9ba1b6dd5133aa4432759c203e807d8039b4cbd
  Author: Yun-Fly <yunfei.song at intel.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
    M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir

  Log Message:
  -----------
  [mlir][scf] Extend consumer fuse to single nested `scf.for` (#108318)

Refactor current consumer fusion based on `addInitOperandsToLoopNest` to support single nested `scf.for`, E.g.

```
%0 = scf.for() {
  %1 = scf.for() {
     tiledProducer
  }
  yield %1
}
%2 = consumer ins(%0)
```

Compared with #94190, this PR fix build failure by making C++17 happy.


  Commit: 08740a6157375c4173023f28fc9e90689afee5ba
      https://github.com/llvm/llvm-project/commit/08740a6157375c4173023f28fc9e90689afee5ba
  Author: Peilin Ye <yepeilin at google.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/ISDOpcodes.h

  Log Message:
  -----------
  [CodeGen] Fix documentation for ISD::ATOMIC_STORE. NFC (#108126)

Update ISDOpcodes.h documentation according to commit ad9d13d
("SelectionDAG: Swap operands of atomic_store") for less confusion.


  Commit: 8c17ed1512239a5a9b1320f678a8cd89db8b0981
      https://github.com/llvm/llvm-project/commit/8c17ed1512239a5a9b1320f678a8cd89db8b0981
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll

  Log Message:
  -----------
  [RISCV] Generalize RISCVDAGToDAGISel::selectFPImm to handle bitcasts from int to FP. (#108284)

selectFPImm previously handled cases where an FPImm could be
materialized in an integer register.

We can generalize this to cases where a value was in an integer register
and then copied to a scalar FP register to be used by a vector
instruction.

In the affected test, the call lowering code used up all of the FP
argument registers and started using GPRs. Now we use integer vector
instructions to consume those GPRs instead of moving them to scalar FP
first.


  Commit: 1211d97922d62470ac8bc658f7bfe57e8b46a107
      https://github.com/llvm/llvm-project/commit/1211d97922d62470ac8bc658f7bfe57e8b46a107
  Author: David Majnemer <david.majnemer at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/vector-shift-lshr-128.ll
    M llvm/test/CodeGen/X86/vector-shift-lshr-256.ll
    M llvm/test/CodeGen/X86/vector-shift-lshr-512.ll

  Log Message:
  -----------
  [X86] Use SWAR techniques for some vector i8 shifts

SSE & AVX do not include instructions for shifting i8 vectors. Instead,
they must be synthesized via other instructions.

If pairs of i8 vectors share a shift amount, we can use SWAR techniques
to substantially reduce the amount of code generated.

Say we were going to execute this shift right:
  x >> {0, 0, 0, 0, 4, 4, 4, 4, 0, 0, 0, 0, ...}

LLVM would previously generate:
        vpxor   %xmm1, %xmm1, %xmm1
        vpunpckhbw      %ymm0, %ymm1, %ymm2
        vpunpckhbw      %ymm1, %ymm0, %ymm3
        vpsllw  $4, %ymm3, %ymm3
        vpblendd        $204, %ymm3, %ymm2, %ymm2
        vpsrlw  $8, %ymm2, %ymm2
        vpunpcklbw      %ymm0, %ymm1, %ymm3
        vpunpcklbw      %ymm1, %ymm0, %ymm0
        vpsllw  $4, %ymm0, %ymm0
        vpblendd        $204, %ymm0, %ymm3, %ymm0
        vpsrlw  $8, %ymm0, %ymm0
        vpackuswb       %ymm2, %ymm0, %ymm0

Instead, we can reinterpret a pair of i8 elements as an i16 and shift
use the same shift amount. The only thing we need to do is mask out any
bits which crossed the boundary from the top i8 to the bottom i8.

This SWAR-style technique achieves:
        vpsrlw  $4, %ymm0, %ymm1
        vpblendd        $170, %ymm1, %ymm0, %ymm0
        vpand   .LCPI0_0(%rip), %ymm0, %ymm0

This is implemented for both left and right logical shift operations.
Arithmetic shifts are less well behaved here because the shift cannot
also perform the sign extension for the lower 8 bits.


  Commit: d5f0969c96224a44062715751da3c369ce5ea3f8
      https://github.com/llvm/llvm-project/commit/d5f0969c96224a44062715751da3c369ce5ea3f8
  Author: MaheshRavishankar <1663364+MaheshRavishankar at users.noreply.github.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/Linalg/Utils/Utils.h
    M mlir/include/mlir/Dialect/SCF/Transforms/TileUsingInterface.h
    M mlir/include/mlir/Interfaces/TilingInterface.h
    M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
    M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
    M mlir/lib/Dialect/Linalg/Utils/Utils.cpp
    M mlir/lib/Dialect/SCF/Transforms/TileUsingInterface.cpp
    M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
    M mlir/test/Interfaces/TilingInterface/tile-and-fuse-using-interface.mlir
    M mlir/test/lib/Interfaces/TilingInterface/TestTilingInterfaceTransformOps.cpp

  Log Message:
  -----------
  [mlir][TilingInterface] Avoid looking at operands for getting slices to continue tile + fuse. (#107882)

Current implementation of `scf::tileConsumerAndFuseProducerUsingSCF`
looks at operands of tiled/tiled+fused operations to see if they are
produced by `extract_slice` operations to populate the worklist used to
continue fusion. This implicit assumption does not always work. Instead
make the implementations of `getTiledImplementation` return the slices
to use to continue fusion.

This is a breaking change

- To continue to get the same behavior of
`scf::tileConsumerAndFuseProducerUsingSCF`, change all out-of-tree
implementation of `TilingInterface::getTiledImplementation` to return
the slices to continue fusion on. All in-tree implementations have been
adapted to this.
- This change touches parts that required a simplification to the
`ControlFn` in `scf::SCFTileAndFuseOptions`. It now returns a
`std::optional<scf::SCFTileAndFuseOptions::ControlFnResult>` object that
should be `std::nullopt` if fusion is not to be performed.

Signed-off-by: MaheshRavishankar <mahesh.revishankar at gmail.com>


  Commit: 2e18f636fd39b59a85194c2a8f10732138a0f8ec
      https://github.com/llvm/llvm-project/commit/2e18f636fd39b59a85194c2a8f10732138a0f8ec
  Author: Lang Hames <lhames at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/unittests/Passes/Plugins/CMakeLists.txt
    M llvm/unittests/Support/DynamicLibrary/CMakeLists.txt

  Log Message:
  -----------
  Fix some unit tests for LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.

Building with -DLLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off should not
prevent the PluginsTests and DynamicLibraryTests unit tests from working.

This fix uses the approach implemented in
https://github.com/llvm/llvm-project/pull/101741.

rdar://135849875


  Commit: cbcf5313e8da5446d808b73e91b64e4c6e0da0c3
      https://github.com/llvm/llvm-project/commit/cbcf5313e8da5446d808b73e91b64e4c6e0da0c3
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    A llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode-bf16.ll
    A llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode-bf16.ll
    A llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode-bf16.ll

  Log Message:
  -----------
  [RISCV] Expand bf16 FNEG/FABS/FCOPYSIGN (#108245)

The motivation for this is to start promoting bf16 ops to f32 so that we
can mark bf16 as a supported type in
RISCVTTIImpl::isElementTypeLegalForScalableVector and scalably-vectorize
it.

This starts with expanding the nodes that can't be promoted to f32 due
to canonicalizing NaNs, similarly to f16 in #106652.


  Commit: 35a0fd507f8975a97edeeeccbddcc7e8608fe5ca
      https://github.com/llvm/llvm-project/commit/35a0fd507f8975a97edeeeccbddcc7e8608fe5ca
  Author: Lang Hames <lhames at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/unittests/Analysis/CMakeLists.txt

  Log Message:
  -----------
  Fix some another unit test for LLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off.

Building with -DLLVM_ENABLE_EXPORTED_SYMBOLS_IN_EXECUTABLES=Off should not
prevent the AnalysisTests unit test from working.

This fix uses the approach implemented in
https://github.com/llvm/llvm-project/pull/101741.

rdar://135849875


  Commit: b2e8b8fac031127ab513da6a6677f64c0a9ad2e4
      https://github.com/llvm/llvm-project/commit/b2e8b8fac031127ab513da6a6677f64c0a9ad2e4
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/setcc-fp-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/setcc-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfadd-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfdiv-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmadd-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmadd-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmax-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmin-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfmul-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-constrained-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vfsub-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmacc-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwmsac-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmacc-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vfwnmsac-vp.ll
    M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode-bf16.ll
    M llvm/test/CodeGen/RISCV/rvv/vpmerge-sdnode.ll
    M llvm/test/CodeGen/RISCV/rvv/vselect-bf16.ll
    M llvm/test/CodeGen/RISCV/rvv/vselect-fp.ll
    M llvm/test/CodeGen/RISCV/rvv/vsplats-bf16.ll
    A llvm/test/CodeGen/RISCV/rvv/vsplats-f16.ll
    M llvm/test/CodeGen/RISCV/rvv/vsplats-fp.ll

  Log Message:
  -----------
  [RISCV] Lower f16/bf16 splat_vector by bitcasting to i16 instead of promoting to f32. (#108298)

If f16/bf16 scalar types are not legal we also need to custom legalize
to prevent a crash. We do similar lowering for build_vector.


  Commit: de6d7a6c3093f725bec6980e925166f0f363687a
      https://github.com/llvm/llvm-project/commit/de6d7a6c3093f725bec6980e925166f0f363687a
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.h
    M llvm/lib/Target/RISCV/RISCVInstrInfoZfa.td
    M llvm/test/CodeGen/RISCV/double-zfa.ll
    M llvm/test/CodeGen/RISCV/float-zfa.ll
    M llvm/test/CodeGen/RISCV/half-zfa.ll

  Log Message:
  -----------
  [RISCV] Expand Zfa fli+fneg cases during lowering instead of during isel. (#108316)

Most of the constants fli can generate are positive numbers. We can use
fli+fneg to generate their negative versions.

Previously, we considered such negative constants as "legal" and let
isel generate the fli+fneg. However, it is useful to expose the fneg to
DAG combines to fold with fadd to produce fsub or with fma to produce
fnmadd, fnmsub, or fmsub.

This patch moves the fneg creation to lowering so that the fneg will be
visible to the last DAG combine.

I might move the rest of Zfa handling from isel to lowering as a follow
up.

Fixes #107772.


  Commit: c7cf2cc59e402cfeaece5f58c70cfdda72a1be99
      https://github.com/llvm/llvm-project/commit/c7cf2cc59e402cfeaece5f58c70cfdda72a1be99
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Remove unneeded customization of bf16 bitcast. NFC

We custom legalize the bitcast using the i16 type not the bf16 type.


  Commit: 9c56a611057692007aab22ef6abde0a02b9a40da
      https://github.com/llvm/llvm-project/commit/9c56a611057692007aab22ef6abde0a02b9a40da
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp

  Log Message:
  -----------
  [RISCV] Combine two hasStdExtZfhminOrZhinxmin() blocks in RISCVTargetLowering constructor. NFC


  Commit: e31efd8f6fbc27000a4933f889e0deb922411006
      https://github.com/llvm/llvm-project/commit/e31efd8f6fbc27000a4933f889e0deb922411006
  Author: Charlie Barto <chbarto at microsoft.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.h

  Log Message:
  -----------
  [asan][windows] use __builtin_function_address to avoid problematic codegen in weak function registration (#108327)

Previously we were relying on optnone for this, but that didn't seem to
be sufficient.


  Commit: 447b32fb192b90be00164a027f990e16c0325de3
      https://github.com/llvm/llvm-project/commit/447b32fb192b90be00164a027f990e16c0325de3
  Author: Charlie Barto <chbarto at microsoft.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M compiler-rt/lib/asan/CMakeLists.txt

  Log Message:
  -----------
  [asan] add the new/delete code back to RTAsan_dynamic (#108329)

the new/delete code was removed from RTAsan_dynamic in
https://github.com/llvm/llvm-project/pull/107899, but that broke things
on macos. This reverts the offending change.


  Commit: e2723c2a8af69677d68e9c11a394f08e6c205153
      https://github.com/llvm/llvm-project/commit/e2723c2a8af69677d68e9c11a394f08e6c205153
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/CodeGen/InitUndef.cpp

  Log Message:
  -----------
  [InitUndef] Only compute DeadLaneDetector if subreg liveness enabled (NFC) (#108279)

InitUndef currently always computes DeadLaneDetector, but only actually
uses it if subreg liveness is enabled for the target. Make the
calculation optional to avoid an unnecessary compile-time impact for
targets that don't enable subreg liveness.


  Commit: c22b68c225a8dcdffa7b30c3acf315e308b16f7c
      https://github.com/llvm/llvm-project/commit/c22b68c225a8dcdffa7b30c3acf315e308b16f7c
  Author: Viktoriia Bakalova <115406782+VitaNuo at users.noreply.github.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M libcxxabi/src/demangle/ItaniumDemangle.h
    M libcxxabi/test/test_demangle.pass.cpp
    M llvm/include/llvm/Demangle/ItaniumDemangle.h

  Log Message:
  -----------
  [ItaniumDemangle] Set `InConstraintExpr` to `true` when demangling a constraint expression (#107385)

This prevents demangler failures until the TODO in the
[demangler](https://github.com/llvm/llvm-project/blob/3e070906eff720dc44aee86e533e12aafc8bb14b/llvm/include/llvm/Demangle/ItaniumDemangle.h#L5678)
is implemented.

This is a temporary fix for
[#89914](https://github.com/llvm/llvm-project/issues/89914).


  Commit: f0c6d30a5d80dd42cb298f857987aa2c8f01e63e
      https://github.com/llvm/llvm-project/commit/f0c6d30a5d80dd42cb298f857987aa2c8f01e63e
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h

  Log Message:
  -----------
  [lldb][DWARFASTParserClang][NFC] Factor out unnamed bitfield creation into helper (#108196)

This logic will need adjusting soon for
https://github.com/llvm/llvm-project/pull/108155

This patch pulls out the logic for detecting/creating unnamed bitfields
out of `ParseSingleMember` to make the latter (in my opinion) more
readable. Otherwise we have a large number of similarly named variables
in scope.


  Commit: 703ebca869e1e684147d316b7bdb15437c12206a
      https://github.com/llvm/llvm-project/commit/703ebca869e1e684147d316b7bdb15437c12206a
  Author: Diana Picus <Diana-Magda.Picus at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
    A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
    M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
    A llvm/test/CodeGen/AMDGPU/si-init-whole-wave.mir
    M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll

  Log Message:
  -----------
  Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)" (#108173)

This reverts commit
https://github.com/llvm/llvm-project/commit/c7a7767fca736d0447832ea4d4587fb3b9e797c2.

The buildbots failed because I removed a MI from its parent before
updating LIS. This PR should fix that.


  Commit: 0683c4e839524c37fe4ddfa1bce1e31ba556041b
      https://github.com/llvm/llvm-project/commit/0683c4e839524c37fe4ddfa1bce1e31ba556041b
  Author: Haojian Wu <hokein.wu at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/include/clang/Basic/AttrDocs.td
    M clang/lib/Sema/CheckExprLifetime.cpp
    M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp

  Log Message:
  -----------
  Revert "[clang] Diagnose dangling issues for the "Container<GSLPointer>" case. (#107213)"

This reverts commit e50131aa068f74daa70d4135c92020aadae3af33.

It introduces a new false positive, see comment https://github.com/llvm/llvm-project/pull/107213#issuecomment-2345465256


  Commit: b07f1be92c1350d8d5b0952f49a2c3aeedcccb2f
      https://github.com/llvm/llvm-project/commit/b07f1be92c1350d8d5b0952f49a2c3aeedcccb2f
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M compiler-rt/lib/asan/asan_malloc_linux.cpp
    M compiler-rt/lib/dfsan/dfsan_interceptors.cpp
    M compiler-rt/lib/hwasan/hwasan_allocation_functions.cpp
    M compiler-rt/lib/lsan/lsan_interceptors.cpp
    M compiler-rt/lib/memprof/memprof_malloc_linux.cpp
    M compiler-rt/lib/msan/msan_interceptors.cpp
    M compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp
    M compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.h

  Log Message:
  -----------
  [sanitizer] Remove DTLS_on_libc_memalign (#108120)

`DTLS_on_libc_memalign` is called from primary
allocator, so `__sanitizer_get_allocated_begin`
should also be aware of allocation,
and correctly handled by `GetDTLSRange`.


  Commit: 18b39497957a597a630a8daa4b4691b23f0d52c3
      https://github.com/llvm/llvm-project/commit/18b39497957a597a630a8daa4b4691b23f0d52c3
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/TableGen/CodeGenHelpers.cpp

  Log Message:
  -----------
  [TableGen] Avoid repeated hash lookups (NFC) (#108321)


  Commit: 85c97c1cec63da27d9f16b0b7c44d65a0e3da0a4
      https://github.com/llvm/llvm-project/commit/85c97c1cec63da27d9f16b0b7c44d65a0e3da0a4
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/Bytecode/Reader/BytecodeReader.cpp

  Log Message:
  -----------
  [Bytecode] Avoid repeated hash lookups (NFC) (#108320)


  Commit: 67e7f05aa0efb1fd61f74efb6e95b7720f94bcdd
      https://github.com/llvm/llvm-project/commit/67e7f05aa0efb1fd61f74efb6e95b7720f94bcdd
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/Dialect/Transform/IR/TransformOps.cpp

  Log Message:
  -----------
  [Dialect] Avoid repeated hash lookups (NFC) (#108319)


  Commit: 42494e51753823f6e2bd8f9abf665006a9bdc445
      https://github.com/llvm/llvm-project/commit/42494e51753823f6e2bd8f9abf665006a9bdc445
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/Transforms/Mem2Reg.cpp

  Log Message:
  -----------
  [Transforms] Avoid repeated hash lookups (NFC) (#108322)


  Commit: 7792b4ae79e5ac9355ee13b01f16e25455f8427f
      https://github.com/llvm/llvm-project/commit/7792b4ae79e5ac9355ee13b01f16e25455f8427f
  Author: Diana Picus <Diana-Magda.Picus at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
    M llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
    M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
    M llvm/lib/Target/AMDGPU/SIInstructions.td
    M llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
    M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
    R llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w64.ll
    M llvm/test/CodeGen/AMDGPU/pei-amdgpu-cs-chain.mir
    R llvm/test/CodeGen/AMDGPU/si-init-whole-wave.mir
    M llvm/test/CodeGen/MIR/AMDGPU/long-branch-reg-all-sgpr-used.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-after-pei.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg-debug.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
    M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll

  Log Message:
  -----------
  Revert "Reland "[amdgpu] Add llvm.amdgcn.init.whole.wave intrinsic" (#108054)"" (#108341)

Reverts llvm/llvm-project#108173

si-init-whole-wave.mir crashes on some buildbots (although it passed
both locally with sanitizers enabled and in pre-merge tests).
Investigating.


  Commit: ed41497498a40ff0441df34aef0c92f5467c8c42
      https://github.com/llvm/llvm-project/commit/ed41497498a40ff0441df34aef0c92f5467c8c42
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
    M llvm/test/Transforms/LoopVectorize/runtime-checks-difference.ll

  Log Message:
  -----------
  [LAA] Also reset CanUseDiffCheck in RTPointerChecking::reset().

RuntimePointerChecking::reset() is used to reset its state between
subsequent analysis invocations. Also reset CanUseDiffCheck to its
default (true). Otherwise it might have been set to false during a
previous analysis invocation, which unnecessarily pessimizes the
subsequent analysis invocations with a pruned set of dependences.

This is in line with the other fields being reset.


  Commit: 2149914ea10c05c17fc6e994af5cc96b6b312f1b
      https://github.com/llvm/llvm-project/commit/2149914ea10c05c17fc6e994af5cc96b6b312f1b
  Author: Younan Zhang <zyn7109 at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/SemaTemplate.cpp
    M clang/test/Parser/cxx1z-class-template-argument-deduction.cpp

  Log Message:
  -----------
  [Clang][Parser] Build up QualifiedTemplateName for typo correction (#108148)

Since #93433, we have switched to `QualifiedTemplateName`s in more
situations to preserve sugars in diagnostics. However, there is one
missed case in typo correction that might not meet the expectation in
`CheckDeductionGuideDeclarator()`.

Fixes https://github.com/llvm/llvm-project/issues/107887


  Commit: 7294396a0878a6bd179fac9aa5c3743832c799f4
      https://github.com/llvm/llvm-project/commit/7294396a0878a6bd179fac9aa5c3743832c799f4
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/lldbtest.py

  Log Message:
  -----------
  [lldb][test] Handle failure to get /proc/cpuinfo from a remote Linux platform (#108183)

I've been testing against qemu-aarch64 using the qemu-user platform,
which doesn't support get-file:
```
AssertionError: False is not true : Command 'platform get-file "/proc/cpuinfo" <...>/TestAArch64LinuxMTEMemoryRegion.test_mte_regions/cpuinfo
Command output:
get-file failed: unimplemented
' did not return successfully
```

QEMU itself does support overriding cpuinfo for the emulated process
(https://gitlab.com/qemu-project/qemu/-/commit/a55b9e72267085957cadb0af0a8811cfbd7c61a9)
however we'd need to be able to read the cpuinfo before the process
starts, so I'm not attempting to use this feature.

Instead if the get-file fails, assume empty cpuinfo so we can at least
carry on testing. I've logged the failure and the reason to the trace so
developers can find it.

```
runCmd: platform get-file "/proc/cpuinfo" <...>/TestAArch64LinuxMTEMemoryRegion.test_mte_regions/cpuinfo
check of return status not required

runCmd failed!

Failed to get /proc/cpuinfo from remote: "get-file failed: unimplemented"
All cpuinfo feature checks will fail.
```

For now this only helps AArch64 but I suspect that RISC-V, being even
more mix and match when it comes to extensions, may need this in future.
And I know we have some folks testing against qemu-riscv at the moment.


  Commit: 128bb29e6d9f0aec03ea34e1477efeb561d97f8f
      https://github.com/llvm/llvm-project/commit/128bb29e6d9f0aec03ea34e1477efeb561d97f8f
  Author: GkvJwa <gkvjwa at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/utils/gn/build/BUILD.gn

  Log Message:
  -----------
  [gn] Add "/Zc:preprocessor" build flag on windows when using cl.exe (#108252)

Add ```/Zc:preprocessor``` to fix the ```__VA_ARGS__``` expansion error 
encountered when building with gn and cl.exe(msvc)


  Commit: 958a3371324917c5816b6d0999373a2ae2a1ac2e
      https://github.com/llvm/llvm-project/commit/958a3371324917c5816b6d0999373a2ae2a1ac2e
  Author: Igor Kirillov <igor.kirillov at arm.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
    M llvm/test/Transforms/VectorCombine/AArch64/shrink-types.ll

  Log Message:
  -----------
  [VectorCombine] Fix trunc generated between PHINodes (#108228)


  Commit: a71407ed3a5f11e9f7ab2060f2557384c643eff4
      https://github.com/llvm/llvm-project/commit/a71407ed3a5f11e9f7ab2060f2557384c643eff4
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/CodeGen/AArch64/arm64-ldxr-stxr.ll

  Log Message:
  -----------
  [AArch64] Regenerate test checks (NFC)


  Commit: 37cf39fdd7ab6dcfbce4633ea5fe743daf2ab358
      https://github.com/llvm/llvm-project/commit/37cf39fdd7ab6dcfbce4633ea5fe743daf2ab358
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/CodeGen/AArch64/arm64-ldxr-stxr.ll

  Log Message:
  -----------
  [AArch64] Add test for incorrect stxp register allocation (NFC)

This is a variant of https://github.com/llvm/llvm-project/issues/106380
without inline assembly.


  Commit: 63dab72fd5b96cd98bba6d041d08bb2a6f3aaa0a
      https://github.com/llvm/llvm-project/commit/63dab72fd5b96cd98bba6d041d08bb2a6f3aaa0a
  Author: Mikael Holmen <mikael.holmen at ericsson.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/lib/Sema/SemaOverload.cpp

  Log Message:
  -----------
  [Sema] Remove unused variable 'FromExtType' [NFC]

Last use of the variable was removed in a29afb754fb4
 [HLSL] Allow truncation to scalar (#104844)

gcc warned about this:
  ../../clang/lib/Sema/SemaOverload.cpp:2070:15: warning: unused variable 'FromExtType' [-Wunused-variable]
  2070 |     if (auto *FromExtType = FromType->getAs<ExtVectorType>()) {
       |               ^~~~~~~~~~~


  Commit: 59731eebf8f24e3e90dc77e91a08d068b529cfc5
      https://github.com/llvm/llvm-project/commit/59731eebf8f24e3e90dc77e91a08d068b529cfc5
  Author: Mikhail Goncharov <goncharov.mikhail at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/test/src/__support/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/test/src/__support/FPUtil/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/test/src/fenv/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl

  Log Message:
  -----------
  [bazel] port ded080152acceca5d68014d63f5027a6d8266cbb


  Commit: ffcebcdb96c7575d3dc8e6afe70d83d56c241f02
      https://github.com/llvm/llvm-project/commit/ffcebcdb96c7575d3dc8e6afe70d83d56c241f02
  Author: Lu Weining <luweining at loongson.cn>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
    M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
    M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
    A llvm/test/CodeGen/LoongArch/statepoint-call-lowering-r1.ll
    A llvm/test/CodeGen/LoongArch/statepoint-call-lowering.ll
    M llvm/unittests/Target/LoongArch/InstSizes.cpp

  Log Message:
  -----------
  [LoongArch] Implement Statepoint lowering (#108212)

The functionality has been validated in OpenHarmony's arkcompiler.


  Commit: adde85e7c3ade54b22c99d405fc9c3add869db0a
      https://github.com/llvm/llvm-project/commit/adde85e7c3ade54b22c99d405fc9c3add869db0a
  Author: David Spickett <david.spickett at linaro.org>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    A lldb/test/API/functionalities/watchpoint/categories

  Log Message:
  -----------
  [lldb][test] Mark some more watchpoint tests

Noticed when testing with qemu-aarch64 that does not support watchpoints.


  Commit: ecf260e1dd8fb1c3d81e6f8af99907ae250058cb
      https://github.com/llvm/llvm-project/commit/ecf260e1dd8fb1c3d81e6f8af99907ae250058cb
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    R llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode-bf16.ll
    M llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode-bf16.ll
    M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
    R llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode-bf16.ll
    M llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll

  Log Message:
  -----------
  [RISCV] Merge bf16 tests into respective tests. NFC

I added these in #108245, but given the sheer number of tests that
will need to be added to cover bf16 promotion to f32 it seems better
to keep them in one place to avoid an explosion of files.


  Commit: 89c10e27d8b4d5f44998aad9abd2590d9f96c5df
      https://github.com/llvm/llvm-project/commit/89c10e27d8b4d5f44998aad9abd2590d9f96c5df
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
    M llvm/test/Analysis/CostModel/RISCV/fp-min-max-abs.ll
    M llvm/test/Analysis/CostModel/RISCV/fround.ll
    M llvm/test/Analysis/CostModel/RISCV/scalable-gather.ll
    M llvm/test/Analysis/CostModel/RISCV/scalable-scatter.ll
    M llvm/test/Analysis/CostModel/RISCV/shuffle-broadcast.ll
    M llvm/test/Analysis/CostModel/RISCV/shuffle-permute.ll
    M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
    M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
    M llvm/test/Analysis/CostModel/RISCV/splice.ll

  Log Message:
  -----------
  [RISCV] Add zvfhmin cost model test coverage. NFC

This adds tests coverage for zvfhmin and halfs in general in the cost
model tests.

Some existing half tests were split into separate functions so that if
the check prefixes diverge it won't affect the rest of the non-half
instructions.

Whilst we're here, also remove the redundant
-riscv-vector-bits-min=128 and declares.


  Commit: 849d1b8b1f1fc16dc28b07da358515a52b79ea81
      https://github.com/llvm/llvm-project/commit/849d1b8b1f1fc16dc28b07da358515a52b79ea81
  Author: Utkarsh Saxena <usx at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/docs/ReleaseNotes.rst
    M clang/lib/Sema/TreeTransform.h
    M clang/test/SemaTemplate/pack-deduction.cpp

  Log Message:
  -----------
  [clang] Do not substitute parameter pack while retaining the pack expansion (#108197)

(In reference to https://github.com/llvm/llvm-project/pull/108197/commits/5901d82ea0543074853b963f7dc9106a6fe3bcee)
Consider when `Input[I]` is a `VarDecl` with parameter pack. We would
have already expanded the pack before the code change in the loop`for
(unsigned I = 0; I != *NumExpansions; ++I) {`.

Now in `if (RetainExpansion) {`, without this change, we continue to
substitute the pack in the pattern even when we do not have meaningful
`ArgumentPackSubstitutionIndex` set.

This leads to use of an invalid pack substitution index in
`TemplateInstantiator::TransformFunctionParmPackRefExpr` in
`TransformedDecl = (*Pack)[getSema().ArgumentPackSubstitutionIndex];`

This change sets `ArgumentPackSubstitutionIndex` to `-1` while retaining
expansion to instruct `TransformFunctionParmPackRefExpr` to build
`FunctionParmPackExpr` instead of substituting the param pack.

---

There are other instances of `RetainExpansion` and IIUC, they should
also unset the `ArgumentPackSubstitutionIndex`. It would be great if
someone can verify my understanding. If this is correct then we could
instead have a `ArgumentPackSubstitutionIndexRAII` as part of
`ForgetPartiallySubstitutedPackRAII`.

EDIT: I have moved this to `ForgetPartiallySubstitutedPackRAII`.

Fixes https://github.com/llvm/llvm-project/issues/63819
Fixes https://github.com/llvm/llvm-project/issues/107560


  Commit: f22a8d18229fe94fe340afbf02ad9592ca199784
      https://github.com/llvm/llvm-project/commit/f22a8d18229fe94fe340afbf02ad9592ca199784
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/test/AST/ByteCode/cxx11.cpp

  Log Message:
  -----------
  [clang][bytecode] Fix modify_global diagnostics in C++11 (#108358)

We shouldn't emit this until C++14.


  Commit: ddd2af3c5a076f2c5f2024019067b206d1b411b4
      https://github.com/llvm/llvm-project/commit/ddd2af3c5a076f2c5f2024019067b206d1b411b4
  Author: Hans <hans at hanshq.net>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/tools/CMakeLists.txt
    R clang/tools/clang-format-vs/.gitignore
    R clang/tools/clang-format-vs/CMakeLists.txt
    R clang/tools/clang-format-vs/ClangFormat.sln
    R clang/tools/clang-format-vs/ClangFormat/ClangFormat.csproj
    R clang/tools/clang-format-vs/ClangFormat/ClangFormat.vsct
    R clang/tools/clang-format-vs/ClangFormat/ClangFormatPackage.cs
    R clang/tools/clang-format-vs/ClangFormat/GlobalSuppressions.cs
    R clang/tools/clang-format-vs/ClangFormat/Guids.cs
    R clang/tools/clang-format-vs/ClangFormat/PkgCmdID.cs
    R clang/tools/clang-format-vs/ClangFormat/Properties/AssemblyInfo.cs
    R clang/tools/clang-format-vs/ClangFormat/Resources.Designer.cs
    R clang/tools/clang-format-vs/ClangFormat/Resources.resx
    R clang/tools/clang-format-vs/ClangFormat/Resources/Images_32bit.bmp
    R clang/tools/clang-format-vs/ClangFormat/Resources/Package.ico
    R clang/tools/clang-format-vs/ClangFormat/RunningDocTableEventsDispatcher.cs
    R clang/tools/clang-format-vs/ClangFormat/VSPackage.resx
    R clang/tools/clang-format-vs/ClangFormat/Vsix.cs
    R clang/tools/clang-format-vs/ClangFormat/license.txt
    R clang/tools/clang-format-vs/ClangFormat/packages.config
    R clang/tools/clang-format-vs/README.txt
    R clang/tools/clang-format-vs/source.extension.vsixmanifest.in
    M llvm/utils/release/build_llvm_release.bat

  Log Message:
  -----------
  Delete the clang-format Visual Studio plugin code (#108342)

This was obsoleted by Visual Studio providing built-in support for
running clang-format in VS2017.

We haven't shipped it for years (since
10d2195305ac49605f2b7b6a25a4076c31923191), never got it working with
VS2019, and never even tried with VS2022.

It's time to retire the code.


  Commit: d5d6b447840f80a78047cf5ba769e4a09b44b83e
      https://github.com/llvm/llvm-project/commit/d5d6b447840f80a78047cf5ba769e4a09b44b83e
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/Support/FormatVariadic.h
    M llvm/lib/Support/FormatVariadic.cpp
    M llvm/unittests/Support/FormatVariadicTest.cpp

  Log Message:
  -----------
  [Support] Add automatic index assignment in formatv (#107459)

Make index in replacement field optional. It will be automatically
assigned in incremental order by formatv.

Make mixed use of automatic and explicit indices an error that will fail
validation.
Adopt uses of formatv() within FormatVariadic to use automatic index.


  Commit: ebb979d6363be97ece020bb52477430025996962
      https://github.com/llvm/llvm-project/commit/ebb979d6363be97ece020bb52477430025996962
  Author: Nico Weber <thakis at chromium.org>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/utils/gn/secondary/libcxx/include/BUILD.gn

  Log Message:
  -----------
  [gn] port 118f120eaab8d


  Commit: 36ad0720de623221e3cc17d30f4173331c099a72
      https://github.com/llvm/llvm-project/commit/36ad0720de623221e3cc17d30f4173331c099a72
  Author: Aditi Medhane <Aditi.Medhane at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir

  Log Message:
  -----------
  [AMDGPU] Autogenerate checks for phi-vgpr-input-moveimm.mir (#108372)

Update the MIR checks for phi-vgpr-input-moveimm testcase.


  Commit: 36adf8ecedb64047021265a1e1730773d3b3a9e8
      https://github.com/llvm/llvm-project/commit/36adf8ecedb64047021265a1e1730773d3b3a9e8
  Author: David Sherwood <david.sherwood at arm.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll

  Log Message:
  -----------
  [NFC][Analysis] Add more SCEV tests for ptr inductions (#108210)

I've added more tests to

Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll

to cover more cases of ptr inductions, in particular highlighting what
seems to be a disparity between single exit and multiple exit loops.


  Commit: c657a6f6aa7e802d65aba84b8b3fe2eb5e2459d8
      https://github.com/llvm/llvm-project/commit/c657a6f6aa7e802d65aba84b8b3fe2eb5e2459d8
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    A llvm/test/CodeGen/AMDGPU/load-constant-always-uniform.ll

  Log Message:
  -----------
  [AMDGPU] Fix selection of s_load_b96 on GFX11 (#108029)

Fix a bug which resulted in selection of s_load_b96 on GFX11, which only
exists in GFX12.

The root cause was a mismatch between legalization and selection. The
condition used to check that the load was uniform in legalization
(SITargetLowering::LowerLOAD) was "!Op->isDivergent()". The condition
used to detect a non-uniform load during selection
(AMDGPUDAGToDAGISel::isUniformLoad()) was
"N->isDivergent() && !AMDGPUInstrInfo::isUniformMMO(MMO)". This makes a
difference when IR uniformity analysis has more information than SDAG's
built in analysis. In the test case this is because IR UA reports that
everything is uniform if isSingleLaneExecution() returns true, e.g. if
the specified max flat workgroup size is 1, but SDAG does not have this
optimization.

The immediate fix is to use the same condition to detect uniform loads
in legalization and selection. In future SDAG should learn about
isSingleLaneExecution(), and then it could probably stop relying on IR
metadata to detect uniform loads.


  Commit: bf8101e4fd1a532aed4c6b6a33d202e143ce303f
      https://github.com/llvm/llvm-project/commit/bf8101e4fd1a532aed4c6b6a33d202e143ce303f
  Author: Joe Faulls <67795994+joe-img at users.noreply.github.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/CodeGen/InitUndef.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll

  Log Message:
  -----------
  [CodeGen] Clear InitUndef pass new register cache between pass runs (#90967)

Multiple invocations of the pass could interfere with eachother,
preventing some undefs being initialised.

I found it very difficult to create a unit test for this due to it being
dependent on particular allocations of a previous function. However, the
bug can be observed here: https://godbolt.org/z/7xnMo41Gv with the
creation of the illegal instruction `vnsrl.wi v9, v8, 0`


  Commit: 229f391f836c9250b7e0c3824e7152748bab220e
      https://github.com/llvm/llvm-project/commit/229f391f836c9250b7e0c3824e7152748bab220e
  Author: rjmansfield <rjmansfield at users.noreply.github.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/tools/dsymutil/Options.td

  Log Message:
  -----------
  [dsymutil] Fix whitespace issues and typo in HelpText. (#108310)

Co-authored-by: Ryan Mansfield <ryan_mansfield at apple.com>


  Commit: 6093c26ac9e1f6ba919c0c3e18c6425ba1a625f8
      https://github.com/llvm/llvm-project/commit/6093c26ac9e1f6ba919c0c3e18c6425ba1a625f8
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/Transforms/Utils/DialectConversion.cpp
    M mlir/test/Transforms/test-legalize-erased-op-with-uses.mlir

  Log Message:
  -----------
  [mlir][Transforms] Dialect conversion: Align handling of dropped values (#106760)

Handle dropped block arguments and dropped op results in the same way:
build a source materialization (that may fold away if unused). This
simplifies the code base a bit and makes it possible to merge
`legalizeConvertedArgumentTypes` and `legalizeConvertedOpResultTypes` in
a future commit. These two functions are almost doing the same thing
now.

As a side effect, this commit also changes the dialect conversion such
that temporary circular cast ops are no longer generated. (There was a
workaround in #107109 that can now be removed again.) Example:
```
%0 = "builtin.unrealized_conversion_cast"(%1) : (!a) -> !b
%1 = "builtin.unrealized_conversion_cast"(%0) : (!b) -> !a
// No further uses of %0, %1.
```

This happened when:
1. An op was erased. (No replacement values provided.)
2. A conversion pattern for another op builds a replacement value for
the erased op's results (first cast op) during `remapValues`, but that
SSA value is not used during the pattern application.
3. During the finalization phase, `legalizeConvertedOpResultTypes`
thinks that the erased op is alive because of the cast op that was built
in Step 2. It builds a cast from that replacement value to the original
type.
4. During the commit phase, all uses of the original op are replaced
with the casted value produced in Step 3. We have generated circular IR.

This problem can be avoided by making sure that source materializations
are generated for all dropped results. This ensures that we always have
some replacement SSA value in the mapping. Previously, we sometimes had
a value mapped and sometimes not. (No more special casing is needed
anymore to distinguish between "value dropped" or "value replaced with
SSA value".)


  Commit: b9674cb10fbe34d54bdfaa584e2eb89b65034e91
      https://github.com/llvm/llvm-project/commit/b9674cb10fbe34d54bdfaa584e2eb89b65034e91
  Author: Matthias Springer <me at m-sp.org>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/test/Conversion/VectorToSPIRV/vector-to-spirv.mlir

  Log Message:
  -----------
  [mlir][SPIRV] Make test case more robust (#108388)

This commit is in preparation of #108381, which changes the insertion
point source materializations during a block type conversion slightly.


  Commit: 7c82b56116d402aa6b86d734ea481a1e90a2f1c3
      https://github.com/llvm/llvm-project/commit/7c82b56116d402aa6b86d734ea481a1e90a2f1c3
  Author: Jacek Caban <jacek at codeweavers.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M lld/COFF/Chunks.h

  Log Message:
  -----------
  [LLD][COFF] Define importThunkARM64EC as uint8_t array to fix big-endian hosts.

Fixes #107931, spotted by Nikita Popov.


  Commit: 5237f0dbcbb3883d81cb872d386547c7ff416894
      https://github.com/llvm/llvm-project/commit/5237f0dbcbb3883d81cb872d386547c7ff416894
  Author: Aditi Medhane <Aditi.Medhane at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/phi-vgpr-input-moveimm.mir

  Log Message:
  -----------
  [AMDGPU] Precommit and Modify `phi_moveimm_subreg_input` testcase (#108389)

- Updated `phi_moveimm_subreg_input` test case to introduce
sub-registers as PHI input operands.
Currently subreg is making the testcase in non-SSA format, need to fix
this by giving subreg as an input operand to PHI instead defining the
subreg register.

This change is relevant for : [[AMDGPU] Add MachineVerifier check to
detect illegal copies from vector register to SGPR
](https://github.com/llvm/llvm-project/pull/105494)


  Commit: b43302372f592fd48a22d32b2603f8efee40a88e
      https://github.com/llvm/llvm-project/commit/b43302372f592fd48a22d32b2603f8efee40a88e
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/tools/libclang/CXStoredDiagnostic.cpp

  Log Message:
  -----------
   [Clang][NFC] Remove trailing whitespace from clang/tools/libclang/CXStoredDIagnostic.cpp


  Commit: 1642f64b525e1d73ca5a0456a187433c7f0eff4c
      https://github.com/llvm/llvm-project/commit/1642f64b525e1d73ca5a0456a187433c7f0eff4c
  Author: David Green <david.green at arm.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64SchedNeoverseN2.td
    M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td

  Log Message:
  -----------
  [AArch64] Replace _Ncyc_ with _Nc_ in Neoverse scheduling models.

This brings them in line with the other Neoverse scheduling models, reducing
the amount of differences between them.


  Commit: 99174842aedf9aa571bdb23d07566965ff3c21e3
      https://github.com/llvm/llvm-project/commit/99174842aedf9aa571bdb23d07566965ff3c21e3
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M libcxx/docs/ReleaseNotes/20.rst
    M libcxx/docs/Status/Cxx20Papers.csv
    M libcxx/docs/UserDocumentation.rst
    M libcxx/include/__config
    M libcxx/include/__stop_token/atomic_unique_lock.h
    M libcxx/include/__stop_token/stop_callback.h
    M libcxx/include/__stop_token/stop_source.h
    M libcxx/include/__stop_token/stop_token.h
    M libcxx/include/__thread/jthread.h
    M libcxx/include/condition_variable
    M libcxx/include/version
    M libcxx/modules/std/stop_token.inc
    M libcxx/modules/std/thread.inc
    M libcxx/test/libcxx/experimental/fexperimental-library.compile.pass.cpp
    M libcxx/test/std/language.support/support.limits/support.limits.general/stop_token.version.compile.pass.cpp
    M libcxx/test/std/language.support/support.limits/support.limits.general/thread.version.compile.pass.cpp
    M libcxx/test/std/language.support/support.limits/support.limits.general/version.version.compile.pass.cpp
    M libcxx/test/std/thread/thread.condition/thread.condition.condvarany/wait_terminates.sh.cpp
    M libcxx/test/support/make_test_thread.h
    M libcxx/utils/generate_feature_test_macro_components.py

  Log Message:
  -----------
  [libc++] Make std::jthread supported in non-experimental mode (#107900)

We waited before supporting std::jthread fully because we wanted to
investigate other implementation strategies (in particular one involving
std::mutex). Since then, we did some benchmarking and decided that we
wouldn't be moving forward with std::mutex. Hence, there is no real
reason to punt on making std::jthread & friends non-experimental.


  Commit: dbc90b55e832695c96d8dc1427e9df3bfeb73e5a
      https://github.com/llvm/llvm-project/commit/dbc90b55e832695c96d8dc1427e9df3bfeb73e5a
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/utils/TableGen/ClangAttrEmitter.cpp
    M clang/utils/TableGen/TableGenBackends.h

  Log Message:
  -----------
  [clang][TableGen] Change AttrEmitter to use const RecordKeeper (#108269)

Change AttrEmitter to use const RecordKeeper.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089


  Commit: b6ff8ed5d4d03b28e41b73ef8e76ce94a8fa76f0
      https://github.com/llvm/llvm-project/commit/b6ff8ed5d4d03b28e41b73ef8e76ce94a8fa76f0
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/utils/TableGen/ClangASTNodesEmitter.cpp
    M clang/utils/TableGen/TableGenBackends.h

  Log Message:
  -----------
  [clang][TableGen] Change AST Nodes Emitter to use const RecordKeeper (#108270)

Change AST Nodes Emitter to use const RecordKeeper.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089


  Commit: 7e74472801486cc702fba3e831c8fcd77c120142
      https://github.com/llvm/llvm-project/commit/7e74472801486cc702fba3e831c8fcd77c120142
  Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/lldbutil.py

  Log Message:
  -----------
  [lldb][testing] Check all stop reasons in get_threads_stopped_at_breakpoint_id (#108281)

If multiple breakpoints are hit at the same time, multiple stop reasons
are reported, one per breakpoint.

Currently, `get_threads_stopped_at_breakpoint_id` only checks the first
such reason.


  Commit: c0b3e491cc9afe10c310334ceac1971482bb0410
      https://github.com/llvm/llvm-project/commit/c0b3e491cc9afe10c310334ceac1971482bb0410
  Author: Alex Rønne Petersen <alex at alexrp.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/Mips/MipsFastISel.cpp
    A llvm/test/CodeGen/Mips/Fast-ISel/underaligned-load-store.ll

  Log Message:
  -----------
  [llvm][Mips] Bail on underaligned loads/stores in FastISel. (#106231)

We encountered this problem in Zig, causing all of our
`mips(el)-linux-gnueabi*` tests to fail:
https://github.com/ziglang/zig/issues/21215

For these unusual cases, let's just bail in `MipsFastISel` since
`MipsTargetLowering` can handle them fine.

Note: I don't have commit access.


  Commit: 64dba97a981393c21cff8bddc0d2272535da45d5
      https://github.com/llvm/llvm-project/commit/64dba97a981393c21cff8bddc0d2272535da45d5
  Author: Michael Park <mcypark at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/lib/Parse/ParseStmt.cpp

  Log Message:
  -----------
  [NFC] Fix an inaccurate comment about typo-correction. (#108143)

The comment describes "If the identifier was typo-corrected", but it
doesn't need to have been typo-corrected, just being annotated is enough
to retry.


  Commit: ef7a847be2db0325fe8bbad7febac9e42c96d232
      https://github.com/llvm/llvm-project/commit/ef7a847be2db0325fe8bbad7febac9e42c96d232
  Author: Amr Hesham <amr96 at programmer.net>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp

  Log Message:
  -----------
  [LoopUnswitch] Remove redundant condition. (NFC) (#107893)

Remove redundant condition from  '!A || (A && B)' to '!A || B' 

Fixes: #99799


  Commit: a409ebc1fc136be4004073a12cd7f847a5f3a588
      https://github.com/llvm/llvm-project/commit/a409ebc1fc136be4004073a12cd7f847a5f3a588
  Author: Malay Sanghi <malay.sanghi at intel.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsX86.def
    M clang/include/clang/Basic/BuiltinsX86_64.def
    M clang/lib/Headers/CMakeLists.txt
    A clang/lib/Headers/avx10_2_512satcvtdsintrin.h
    A clang/lib/Headers/avx10_2satcvtdsintrin.h
    M clang/lib/Headers/immintrin.h
    M clang/lib/Sema/SemaX86.cpp
    A clang/test/CodeGen/X86/avx10_2_512satcvtds-builtins-errors.c
    A clang/test/CodeGen/X86/avx10_2_512satcvtds-builtins-x64-error.c
    A clang/test/CodeGen/X86/avx10_2_512satcvtds-builtins-x64.c
    A clang/test/CodeGen/X86/avx10_2_512satcvtds-builtins.c
    A clang/test/CodeGen/X86/avx10_2satcvtds-builtins-errors.c
    A clang/test/CodeGen/X86/avx10_2satcvtds-builtins-x64.c
    A clang/test/CodeGen/X86/avx10_2satcvtds-builtins.c
    M llvm/include/llvm/IR/IntrinsicsX86.td
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86ISelLowering.h
    M llvm/lib/Target/X86/X86InstrAVX10.td
    M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
    M llvm/lib/Target/X86/X86IntrinsicsInfo.h
    A llvm/test/CodeGen/X86/avx10_2_512satcvtds-intrinsics.ll
    A llvm/test/CodeGen/X86/avx10_2fptosi_satcvtds.ll
    A llvm/test/CodeGen/X86/avx10_2satcvtds-intrinsics.ll
    A llvm/test/CodeGen/X86/avx10_2satcvtds-x64-intrinsics.ll
    A llvm/test/MC/Disassembler/X86/avx10.2-satcvtds-32.txt
    A llvm/test/MC/Disassembler/X86/avx10.2-satcvtds-64.txt
    A llvm/test/MC/X86/avx10_2satcvtds-32-att.s
    A llvm/test/MC/X86/avx10_2satcvtds-32-intel.s
    A llvm/test/MC/X86/avx10_2satcvtds-64-att.s
    A llvm/test/MC/X86/avx10_2satcvtds-64-intel.s
    M llvm/test/TableGen/x86-fold-tables.inc

  Log Message:
  -----------
  [X86][AVX10.2] Support AVX10.2-SATCVT-DS new instructions. (#102592)

Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965


  Commit: 90a0be9482ad00acc1772440f13656190ec1ac22
      https://github.com/llvm/llvm-project/commit/90a0be9482ad00acc1772440f13656190ec1ac22
  Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
    M mlir/lib/Conversion/GPUCommon/IndexIntrinsicsOpLowering.h
    M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
    M mlir/lib/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.cpp
    M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
    M mlir/test/Target/LLVMIR/rocdl.mlir

  Log Message:
  -----------
  [mlir][LLVM] Refactor how range() annotations are handled for ROCDL intrinsics (#107658)

This commit introduces a ConstantRange attribute to match the
ConstantRange attribute type present in LLVM IR.

It then refactors the LLVM_IntrOpBase so that the basic part of the
intrinsic builder code can be re-used without needing to copy it or
get rid of important context. This, along with adding code for
handling an optional `range` attribute to that same base, allows us to
make the support for range() annotations generic without adding
another bit to IntrOpBase.

This commit then updates the lowering of index intrinsic operations to
use the new ConstantRange attribute and fixes a bug (where we'd be
subtracting 1 from upper bounds instead of adding it on operations
like gpu.block_dim) along the way.

The point of these changes is to enable these range annotations to be
used for the corresponding NVVM operations in a future commit.


  Commit: 9596e83b2aa9017f4ebec3c150ca3aadd047762b
      https://github.com/llvm/llvm-project/commit/9596e83b2aa9017f4ebec3c150ca3aadd047762b
  Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
    M mlir/include/mlir/Dialect/AMDGPU/Transforms/Passes.td
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Dialect/AMDGPU/Transforms/CMakeLists.txt
    M mlir/lib/Dialect/AMDGPU/Transforms/EmulateAtomics.cpp
    M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
    M mlir/test/Dialect/AMDGPU/amdgpu-emulate-atomics.mlir

  Log Message:
  -----------
  [mlir][AMDGPU] Enable emulating vector buffer_atomic_fadd on gfx11 (#108312)

* Fix a bug introduced by the Chipset refactoring in #107720 where
atomics emulation for adds was mistakenly applied to gfx11+
* Add the case needed for gfx11+ atomic emulation, namely that gfx11
doesn't support atomically adding a v2f16 or v2bf16, thus requiring
MLIR-level legalization for buffer intrinsics that attempt to do such an
addition
* Add tests, including tests for gfx11 atomic emulation

Co-authored-by: Manupa Karunaratne <manupa.karunaratne at amd.com>


  Commit: 8cf3eb49a5d9831620b290b9a0686149bd438267
      https://github.com/llvm/llvm-project/commit/8cf3eb49a5d9831620b290b9a0686149bd438267
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn

  Log Message:
  -----------
  [gn build] Port a409ebc1fc13


  Commit: 2e30f8d114e1406b35dc63868a92f4279330251b
      https://github.com/llvm/llvm-project/commit/2e30f8d114e1406b35dc63868a92f4279330251b
  Author: Balazs Benics <benicsbalazs at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/lib/StaticAnalyzer/Checkers/StreamChecker.cpp
    M clang/test/Analysis/fread.c

  Log Message:
  -----------
  [analyzer] Fix StreamChecker crash in fread modeling (#108393)

In #93408
https://github.com/llvm/llvm-project/commit/69bc159142c6e4ed168e32a6168392d396f891de
I refined how invalidation is done for `fread`. It can crash, if the
"size" or "count" parameters of "fread" is a perfectly constrained
negative value. In such cases, when it will try to allocate a
SmallVector with a negative size, which will cause a crash.

To mitigate this issue, let's just guard against negative values.

CPP-3247


  Commit: 43fd2c401edd4f3ca0c687dd6937c2603fb15f71
      https://github.com/llvm/llvm-project/commit/43fd2c401edd4f3ca0c687dd6937c2603fb15f71
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/Pointer.cpp
    M clang/lib/AST/ByteCode/Pointer.h
    A clang/test/AST/ByteCode/const-base-cast.cpp
    M clang/test/CodeGenCXX/const-base-cast.cpp

  Log Message:
  -----------
  [clang][bytecode] Implement base casts on integral pointers (#108340)

Get the right offset to apply from the RecordLayout.


  Commit: bd8d432d7bd0891132ae69daa70e18ba387df43f
      https://github.com/llvm/llvm-project/commit/bd8d432d7bd0891132ae69daa70e18ba387df43f
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Program.cpp
    M clang/lib/AST/ByteCode/Program.h
    M clang/test/CodeGenObjC/boxing.m

  Log Message:
  -----------
  [clang][bytecode] Add support for creating dummies for expressions (#108394)

And use that to fix VisitObjCBoxedExprs.


  Commit: 8c0551503219b8e1da7dd6c24de1d9e79cb7cae6
      https://github.com/llvm/llvm-project/commit/8c0551503219b8e1da7dd6c24de1d9e79cb7cae6
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/test/CodeGen/RISCV/half-convert.ll

  Log Message:
  -----------
  [LegalizeIntegerTypes] Simplify ExpandIntRes_FP_TO_XINT when operand needs to be SoftPromoted. (#107634)

Create an FP_EXTEND instead of handling the soft promote directly. This
FP_EXTEND will be visited and soft promoted itself.

This removes a zero extend from the generated code when the f32 type is
itself softened. Previously we softened it as an fp16_to_fp which sees
the operand as an integer type so we extend it. When we soften the
result as an fp_extend we see the source as f16 and don't extend. It
only becomes an integer inside call lowering not by type legalization.

If this extend is really necessary, then we have an issue when an
f16->f32 fp_extend exists in the source and f32 needs to be softened.

This simplifies part of #102503.


  Commit: 859b785bb6a1ee20ffca58102d877fc9a4a639e4
      https://github.com/llvm/llvm-project/commit/859b785bb6a1ee20ffca58102d877fc9a4a639e4
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVCallingConv.cpp

  Log Message:
  -----------
  [RISCV] Restructure CC_RISCV_FastCC to reduce code duplication. NFC (#107671)

Move GPR handling closer to the end so we can share it with the indirect
handling for vector. Use a single block for storing any type to the
stack.


  Commit: e42f4734c61ac139eba6f880e204c5231b431b9b
      https://github.com/llvm/llvm-project/commit/e42f4734c61ac139eba6f880e204c5231b431b9b
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    A llvm/test/CodeGen/NVPTX/copysign.ll
    M llvm/test/CodeGen/NVPTX/math-intrins.ll

  Log Message:
  -----------
  Reland "[NVPTX] Support copysign PTX instruction" (#108125)

Lower `fcopysign` SDNodes into `copysign` PTX instructions where
possible. See [PTX ISA: 9.7.3.2. Floating Point Instructions: copysign]
(https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#floating-point-instructions-copysign).

Copysign SDNodes with mismatched types are expanded as before, since the
PTX instruction requires the types to match.


  Commit: 73535076f2c517fd04c43cccab4c47bd38b39d49
      https://github.com/llvm/llvm-project/commit/73535076f2c517fd04c43cccab4c47bd38b39d49
  Author: Saleem Abdulrasool <abdulras at thebrowser.company>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M compiler-rt/lib/builtins/cpu_model/aarch64.h

  Log Message:
  -----------
  builtins: replicate `aarch64.c` change into `aarch64.h`

Perform the same macro expansion in the header to improve handling
the various ARM64 environments which use different CPU architecture
identification macro spellings.


  Commit: 1ad84d7961ec3ddab9233370066110ecaa5eb329
      https://github.com/llvm/llvm-project/commit/1ad84d7961ec3ddab9233370066110ecaa5eb329
  Author: yingopq <115543042+yingopq at users.noreply.github.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M llvm/lib/Target/Mips/MipsISelLowering.cpp
    A llvm/test/CodeGen/Mips/ins.ll

  Log Message:
  -----------
  [Mips] Optimize `or (and $src1, mask), (shl $src2, shift)` to `ins` (#103017)

Optimize `$dst = or (and $src1, (2**size0 - 1)), (shl $src2, size0)` to
`ins $src1, $src2, pos, size`,
where `pos = size0, size = 32 - pos`.

Fix #90325


  Commit: fc1c481cf45b41137a08a753c543d8a69d393671
      https://github.com/llvm/llvm-project/commit/fc1c481cf45b41137a08a753c543d8a69d393671
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M flang/lib/Parser/preprocessor.cpp
    M flang/lib/Parser/prescan.cpp
    M flang/lib/Parser/prescan.h
    M flang/module/__fortran_builtins.f90
    M flang/module/__fortran_ieee_exceptions.f90
    M flang/module/ieee_arithmetic.f90
    M flang/module/iso_fortran_env.f90
    M flang/test/Driver/include-header.f90
    A flang/test/Preprocessing/include-file.h
    A flang/test/Preprocessing/include-line.F90

  Log Message:
  -----------
  [flang][preprocessor] Change handling of macros in text from Fortran … (#108113)

…INCLUDE lines

The compiler current treats an INCLUDE line as essentially a synonym for
a preprocessing #include directive. The causes macros that have been
defined at the point where the INCLUDE line is processed to be replaced
within the text of the included file.

This behavior is surprising to users who expect an INCLUDE line to be
expanded into its contents *after* preprocessing has been applied to the
original source file, with no further macro expansion.

Change INCLUDE line processing to use a fresh instance of Preprocessor
containing no macro definitions except _CUDA in CUDA Fortran
compilations and, if the original file was being preprocessed, the
standard definitions of __FILE__, __LINE__, and so forth.


  Commit: c6ca13db41e135d593e33f85cf955d2c041580c3
      https://github.com/llvm/llvm-project/commit/c6ca13db41e135d593e33f85cf955d2c041580c3
  Author: Luke Lau <luke at igalia.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave.ll
    M llvm/test/CodeGen/RISCV/rvv/vector-interleave.ll

  Log Message:
  -----------
  [RISCV] Lower interleave + deinterleave for zvfhmin and zvfbfmin (#108404)

Fortunately f16 and bf16 are always < EEW, so we can always lower via
widening or narrowing. This means we don't need to add patterns for
vrgather_vv_vl just yet.


  Commit: 8ed8210690816084159a166bf698c16ce9ed6a9b
      https://github.com/llvm/llvm-project/commit/8ed8210690816084159a166bf698c16ce9ed6a9b
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M flang/lib/Semantics/check-declarations.cpp
    M flang/test/Semantics/local-vs-global.f90

  Log Message:
  -----------
  [flang] Downgrade error message to warning (#108115)

It is a non-mandatory error to reference an external procedure via an
implicit interface declaration (EXTERNAL or PROCEDURE()) when the
external procedure has an interface that requires the presence of an
explicit interface to be called.

Until now, the compiler has issued a fatal error message from semantics
for this situation. But (1) there are situations, such as passing such
an EXTERNAL as an actual argument, or as the target of a procedure
pointer assignment, where little or no harm is done, (2) other compilers
don't/can't detect this error, even when the procedure's definition is
in the same source file, and (3) it shows up in some real applications.

So downgrade this error to a stern warning. Perhaps in the future the
compiler could resume emission of a hard error in the cases where the
EXTERNAL procedure is actually known to be called via its implicit
interface.


  Commit: eb8cc89295fca2d6436afc38938ca5365a82707c
      https://github.com/llvm/llvm-project/commit/eb8cc89295fca2d6436afc38938ca5365a82707c
  Author: cchen <chichun.chen at hpe.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/docs/OpenMPSupport.rst

  Log Message:
  -----------
  [NFC] Claim OpenMP feature - target_device selector set


  Commit: 1d3bcf99bd0698fb5ebf5fccc24cebf2596dce0a
      https://github.com/llvm/llvm-project/commit/1d3bcf99bd0698fb5ebf5fccc24cebf2596dce0a
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M flang/lib/Evaluate/intrinsics.cpp
    A flang/test/Semantics/kinds06.f90

  Log Message:
  -----------
  [flang] Better error recovery for REAL(x, [KIND=]bad) (#108222)

There's two entries in the intrinsic table for REAL; the first handles
the REAL(z) case of a COMPLEX argument, and the second handles the data
type/kind conversion case.

In the case of REAL(x,bad) with a bad or unsupported kind of REAL,
neither table entry was matching. In the event of an unrecognized
intrinsic function, the compiler emits the first error message that
resulted, which was confusing here because it was a complaint about
having too many arguments.

Reversing the order of the intrinsic table entries would fix the error
message, but would also have broken REAL(z) with a complex argument,
since it would then be treated as REAL(z,KIND=KIND(0.)) rather than
REAL(z,KIND=KIND(z)).

The fix is to let the second entry "hit" with improved error recovery.


  Commit: 1595ca435ca9e85a3f693267b5f928bf3cfc2cc1
      https://github.com/llvm/llvm-project/commit/1595ca435ca9e85a3f693267b5f928bf3cfc2cc1
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M flang/lib/Semantics/check-call.cpp
    A flang/test/Semantics/elemental02.f90

  Log Message:
  -----------
  [flang] Catch whole assumed-size array passed to elemental (#108239)

A whole assumed-size array is not a valid argument to an elemental
procedure (intrinsic or otherwise).


  Commit: 524201881562d696841561e44f0a70a7cc7dc18d
      https://github.com/llvm/llvm-project/commit/524201881562d696841561e44f0a70a7cc7dc18d
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M flang/include/flang/Semantics/expression.h
    M flang/lib/Semantics/expression.cpp
    M flang/test/Semantics/expr-errors06.f90

  Log Message:
  -----------
  [flang] Catch attempts to subscribe empty arrays (#108246)

An array that has one or more empty dimensions cannot have subscripts
unless there's a possibility that they constitute an empty array
section.

We previously only checked that constant subscripts are in bounds.


  Commit: 7aad87312a00a6ce4cdf7fd5bd5d597ff413a600
      https://github.com/llvm/llvm-project/commit/7aad87312a00a6ce4cdf7fd5bd5d597ff413a600
  Author: Peter Klausler <pklausler at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M flang/runtime/edit-input.cpp
    M flang/unittests/Runtime/Namelist.cpp

  Log Message:
  -----------
  [flang][runtime] Accept some real input for integer NAMELIST (#108268)

A few other Fortran compilers silently accept real values for integer
variables in NAMELIST input. Handling an exponent would be difficult,
but it's easy to skip and ignore a fractional part when one is present.


  Commit: a16164d0c258b284117f8c150efaef891e9aa057
      https://github.com/llvm/llvm-project/commit/a16164d0c258b284117f8c150efaef891e9aa057
  Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
    M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [MLIR][ROCDL] Add dynamically legal ops to LowerGpuOpsToROCDLOpsPass (#108302)

Similar to https://github.com/llvm/llvm-project/pull/108266
After https://github.com/llvm/llvm-project/pull/102971
It is legal to generate `LLVM::ExpOp` and `LLVM::LogOp` if the type is
is a float16 or float32


  Commit: a6a547f18d99f0b0bf5ffac55443d687200f972d
      https://github.com/llvm/llvm-project/commit/a6a547f18d99f0b0bf5ffac55443d687200f972d
  Author: Michael Buch <michaelbuch12 at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
    M lldb/test/Shell/SymbolFile/DWARF/no_unique_address-with-bitfields.cpp

  Log Message:
  -----------
  [lldb][DWARFASTParserClang] Prevent unnamed bitfield creation in the presence of overlapping fields (#108343)

This bug surfaced after https://github.com/llvm/llvm-project/pull/105865
(currently reverted, but blocked on this to be relanded).

Because Clang doesn't emit `DW_TAG_member`s for unnamed bitfields, LLDB
has to make an educated guess about whether they existed in the source.
It does so by checking whether there is a gap between where the last
field ended and the currently parsed field starts. In the example test
case, the empty field `padding` was folded into the storage of `data`.
Because the `bit_offset` of `padding` is `0x0` and its `DW_AT_byte_size`
is `0x1`, LLDB thinks the field ends at `0x1` (not quite because we
first round the size to a word size, but this is an implementation
detail), erroneously deducing that there's a gap between `flag` and
`padding`.

This patch adds the notion of "effective field end", which accounts for
fields that share storage. It is set to the end of the storage that the
two fields occupy. Then we use this to check for gaps in the unnamed
bitfield creation logic.


  Commit: ee40ffd1ee3a13f504cfca6bae5e65c868a5b762
      https://github.com/llvm/llvm-project/commit/ee40ffd1ee3a13f504cfca6bae5e65c868a5b762
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/X86/X86ScheduleZnver4.td
    M llvm/test/tools/llvm-mca/X86/Znver4/zero-idioms.s

  Log Message:
  -----------
  [X86] Recognize VPXORDZrr as a zero-idiom on Znver4 (#108314)

This patch adds information about VPXORDZrr to the znver4 scheduling
model, particularly that it is a zero-idiom.

This fixes a proximal cause of #108157.


  Commit: ab96409180aaad5417030f06a386253722a99d71
      https://github.com/llvm/llvm-project/commit/ab96409180aaad5417030f06a386253722a99d71
  Author: Tom Stellard <tstellar at redhat.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M .github/workflows/release-binaries.yml

  Log Message:
  -----------
  workflows/release-binaries: Fix automatic upload (#107315)


  Commit: 6eb3519fd70bb50bc3773fdf0bf9435dae2abfe7
      https://github.com/llvm/llvm-project/commit/6eb3519fd70bb50bc3773fdf0bf9435dae2abfe7
  Author: Chris B <chris.bieneman at me.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/lib/Sema/SemaInit.cpp
    M clang/test/AST/HLSL/vector-constructors.hlsl

  Log Message:
  -----------
  [HLSL] Allow narrowing in initialization lists (#108035)

HLSL's initialization lists are _extremely_ generous about allowing
conversions. This change demotes the C++11 warning to the legacy warning
when in HLSL mode.

Required for #56067


  Commit: bea2f2511b69521dc73766b8e3503f11e378113b
      https://github.com/llvm/llvm-project/commit/bea2f2511b69521dc73766b8e3503f11e378113b
  Author: Arthur Eubanks <aeubanks at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/utils/gn/build/toolchain/target_flags.gni
    M llvm/utils/gn/secondary/compiler-rt/lib/BUILD.gn
    M llvm/utils/gn/secondary/compiler-rt/lib/asan/BUILD.gn

  Log Message:
  -----------
  [gn build] Port win asan runtime rules (#108293)

Windows doesn't have a static runtime after #107899.


  Commit: 9e2bb418b4a21fb8ca1fe83fb01a26e3f72d59a1
      https://github.com/llvm/llvm-project/commit/9e2bb418b4a21fb8ca1fe83fb01a26e3f72d59a1
  Author: Marc Auberer <marc.auberer at chillibits.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/ADT/DenseMap.h

  Log Message:
  -----------
  [ADT][NFC] Remove unused parameter from DenseMap::InsertIntoBucketImpl (#108382)

Remove unused parameter `Key` from `InsertIntoBucketImpl`


  Commit: 2d47a0baba6f18b5cdf14c007e01b79e37d15c72
      https://github.com/llvm/llvm-project/commit/2d47a0baba6f18b5cdf14c007e01b79e37d15c72
  Author: Joshua Batista <jbatista at microsoft.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/include/clang/Basic/Builtins.td
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/Headers/hlsl/hlsl_intrinsics.h
    M clang/lib/Sema/SemaHLSL.cpp
    A clang/test/CodeGenHLSL/builtins/step.hlsl
    A clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/include/llvm/IR/IntrinsicsSPIRV.td
    M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    A llvm/test/CodeGen/DirectX/step.ll
    A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/step.ll

  Log Message:
  -----------
  Add step builtins and step HLSL function to DirectX and SPIR-V backend (#106471)

This PR adds the step intrinsic and an HLSL function that uses it.
The SPIRV backend is also implemented.

Used https://github.com/llvm/llvm-project/pull/102683 as a reference.
Fixes https://github.com/llvm/llvm-project/issues/99157


  Commit: ee9264522caacad34c5dc2bfb239c223229b870d
      https://github.com/llvm/llvm-project/commit/ee9264522caacad34c5dc2bfb239c223229b870d
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp

  Log Message:
  -----------
  [sanitizer] Change GetDTLSRange (#108345)

We only need to change size, tls_beg should be unchanged.


  Commit: a30b1d5a38fb7c371293c2b90d0200d0353a3be1
      https://github.com/llvm/llvm-project/commit/a30b1d5a38fb7c371293c2b90d0200d0353a3be1
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp

  Log Message:
  -----------
  [SelectionDAG] Use Register in a few places in InstrEmitter. NFC


  Commit: 81935c5e96ef9310bb16a18ea1d74fb64eaf43da
      https://github.com/llvm/llvm-project/commit/81935c5e96ef9310bb16a18ea1d74fb64eaf43da
  Author: Charlie Barto <chbarto at microsoft.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M compiler-rt/cmake/base-config-ix.cmake
    M compiler-rt/test/lit.common.cfg.py

  Log Message:
  -----------
  [compiler-rt] [MSVC] Detect MSVC as a compiler-id for lit. (#108255)

This is only for "real" msvc and is to support running sanitizer tests
with "real" MSVC. Most compiler-rt tests do not yet pass with msvc,
which will be addressed in future PRs for asan, sanitizer_common, and
the fuzzer.

We've been using these changes to lit to run CI for the version of
address sanitizer that ships with MSVC, by upstreaming them we can avoid
being broken by future lit changes and allow contributors (importantly
_us_) to run the MSVC tests on changes developed in the open.


  Commit: 885ac29910a23db923292fe3fc09d0ec105186dc
      https://github.com/llvm/llvm-project/commit/885ac29910a23db923292fe3fc09d0ec105186dc
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/CtxProfAnalysis.h
    M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
    M llvm/lib/ProfileData/PGOCtxProfReader.cpp
    M llvm/lib/Transforms/IPO/FunctionImport.cpp

  Log Message:
  -----------
  [nfc][ctx_prof] Change some internal "set" types

- the set used for targets under a callsite is simpler to use if iterators
  are stable (it gets manipulated during updates)
- the set used to fetch the transitive closure of GUIDs under a node can
  be left as a choice to the user.


  Commit: 04d3a6be62d338600f72d4dc2c7b24508cecd541
      https://github.com/llvm/llvm-project/commit/04d3a6be62d338600f72d4dc2c7b24508cecd541
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M libcxx/include/CMakeLists.txt
    A libcxx/include/__fwd/get.h
    A libcxx/include/__fwd/variant.h
    M libcxx/include/__ranges/elements_view.h
    M libcxx/include/module.modulemap
    M libcxx/include/variant

  Log Message:
  -----------
  [libc++][modules] Add a header to forward-declare std::get (#108285)

This is necessary because e.g. ranges::elements_view uses std::get but
it needs to have in scope the declaration of all the versions of
std::get that exist in the library. This need is what had originally led
to elements_view.h gaining an include of __fwd/complex.h, but in reality
it is a more general issue that requires a canonical declration point
for all the std::get variations.


  Commit: 7a6945fcf65f58ac6e4800c92f1e6d47930ec648
      https://github.com/llvm/llvm-project/commit/7a6945fcf65f58ac6e4800c92f1e6d47930ec648
  Author: Sushant Gokhale <sgokhale at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll

  Log Message:
  -----------
  [AArch64][SLP] Add NFC test cases for floating point reductions (#106507)

A successive patch would be added to fix some of the tests.

Pull request: #106507


  Commit: 0446b403b04ad3df709f23a63c2e1cea087459b3
      https://github.com/llvm/llvm-project/commit/0446b403b04ad3df709f23a63c2e1cea087459b3
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp

  Log Message:
  -----------
  [NFC][AMDGPU][Attributor] Only iterate over filtered functions when creating AAs (#108417)


  Commit: 5d17293caaf0f62ea94fecc137b9b6f07c659dac
      https://github.com/llvm/llvm-project/commit/5d17293caaf0f62ea94fecc137b9b6f07c659dac
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp

  Log Message:
  -----------
  [lldb] Fix a warning

This patch fixes:

  lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp:2935:31:
  error: designated initializers are a C++20 extension
  [-Werror,-Wc++20-designator]


  Commit: 853bff2122e1f42398587f76234c05d56f16318e
      https://github.com/llvm/llvm-project/commit/853bff2122e1f42398587f76234c05d56f16318e
  Author: Yuxuan Chen <ych at fb.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
    A llvm/test/Transforms/Coroutines/gh107139-split-in-scc.ll

  Log Message:
  -----------
  [Coroutines] properly update CallGraph in CoroSplit (#107935)

Fixes https://github.com/llvm/llvm-project/issues/107139.

We weren't updating the call graph properly in CoroSplit. This crash is
due to the await_suspend() function calling the coroutine, forming a
multi-node SCC. The issue bisected to
https://github.com/llvm/llvm-project/pull/79712 but I think this is red
herring. We haven't been properly updating the call graph.

Added an example of such code as a test case.


  Commit: adc1ab33a4db93be74487663259617c9346ef1d2
      https://github.com/llvm/llvm-project/commit/adc1ab33a4db93be74487663259617c9346ef1d2
  Author: Mircea Trofin <mtrofin at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp

  Log Message:
  -----------
  Add missing include to `PGOCtxProfReaderWriterTest.cpp`


  Commit: 0989a775ae779c7df783537a2b796ac7707e13e4
      https://github.com/llvm/llvm-project/commit/0989a775ae779c7df783537a2b796ac7707e13e4
  Author: Tyler Nowicki <tyler.nowicki at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
    M llvm/lib/Transforms/Coroutines/SuspendCrossingInfo.cpp

  Log Message:
  -----------
  [Coroutines] Verify normalization was not missed (#108096)

* Add asserts to verify normalization of the coroutine happened.
* This will be important when normalization becomes part of an ABI
object.

--- From a previous discussion here
https://github.com/llvm/llvm-project/pull/108076

Normalization performs these important steps:

split around each suspend, this adds BBs before/after each suspend so
each suspend now exists in its own block.
split around coro.end (similar to above)
break critical edges and add single-edge phis in the new blocks (also
removing other single-edge phis).
Each of these things can individually be tested
A) Check that each suspend is the only inst in its BB
B) Check that coro.end is the only inst in its BB
C) Check that each edge of a multi-edge phis is preceded by single-edge
phi in an immediate pred

For 1) and 2) I believe the purpose of the transform is in part for
suspend crossing info's analysis so it can specifically 'mark' the
suspend blocks and identify the end of the coroutine. There are some
existing places within suspend crossing info that visit the CoroSuspends
and CoroEnds so we could check A) and B) there.

For 3) I believe the purpose of this transform is for insertSpills to
work properly. Infact there is already a check for the result of this
transform!

assert(PN->getNumIncomingValues() == 1 &&
           "unexpected number of incoming "
           "values in the PHINode");

I think to verify the result of normalization we just need to add checks
A) and B) to suspend crossing info.


  Commit: 2670565afc4ec855fa406b8f582dde44ce1739fb
      https://github.com/llvm/llvm-project/commit/2670565afc4ec855fa406b8f582dde44ce1739fb
  Author: Tyler Nowicki <tyler.nowicki at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Coroutines/CMakeLists.txt
    M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
    M llvm/lib/Transforms/Coroutines/CoroInternal.h
    M llvm/lib/Transforms/Coroutines/Coroutines.cpp
    A llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
    A llvm/lib/Transforms/Coroutines/MaterializationUtils.h
    M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
    M llvm/lib/Transforms/Coroutines/SpillUtils.h

  Log Message:
  -----------
  [Coroutines] Move materialization code into its own utils (#108240)

* Move materialization out of CoroFrame to MaterializationUtils.h
* Move spill related utilities that were used by materialization to
SpillUtils
* Move isSuspendBlock (needed by materialization) to CoroInternal

See RFC for more info:
https://discourse.llvm.org/t/rfc-abi-objects-for-coroutines/81057


  Commit: 030c6da7af826b641db005be925b20f956c3a6bb
      https://github.com/llvm/llvm-project/commit/030c6da7af826b641db005be925b20f956c3a6bb
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang-tools-extra/clangd/Diagnostics.cpp
    M clang-tools-extra/clangd/Diagnostics.h
    M clang-tools-extra/clangd/ParsedAST.cpp
    M clang-tools-extra/clangd/Preamble.cpp
    M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/Diagnostic.h
    M clang/include/clang/Basic/DiagnosticCategories.h
    M clang/include/clang/Basic/DiagnosticIDs.h
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/lib/Basic/Diagnostic.cpp
    M clang/lib/Basic/DiagnosticIDs.cpp
    M clang/lib/Frontend/LogDiagnosticPrinter.cpp
    M clang/lib/Frontend/SerializedDiagnosticPrinter.cpp
    M clang/lib/Frontend/TextDiagnosticPrinter.cpp
    M clang/lib/Sema/Sema.cpp
    M clang/lib/Sema/SemaCUDA.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
    M clang/lib/Serialization/ASTReader.cpp
    M clang/lib/Serialization/ASTWriter.cpp
    M clang/lib/StaticAnalyzer/Core/TextDiagnostics.cpp
    M clang/test/Sema/diagnose_if.c
    A clang/test/SemaCXX/diagnose_if-warning-group.cpp
    M clang/tools/diagtool/ListWarnings.cpp
    M clang/tools/diagtool/ShowEnabledWarnings.cpp
    M clang/tools/libclang/CXStoredDiagnostic.cpp

  Log Message:
  -----------
  [clang] Extend diagnose_if to accept more detailed warning information (#70976)

This implements parts of the extension proposed in
https://discourse.llvm.org/t/exposing-the-diagnostic-engine-to-c/73092/7.

Specifically, this makes it possible to specify a diagnostic group in an
optional third argument.


  Commit: 33325524f5e80a898a7ae875e208a54af132001b
      https://github.com/llvm/llvm-project/commit/33325524f5e80a898a7ae875e208a54af132001b
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M libcxx/include/type_traits
    M libcxx/test/std/containers/sequences/vector.bool/enabled_hash.pass.cpp
    M libcxx/test/std/diagnostics/syserr/syserr.hash/enabled_hash.pass.cpp
    M libcxx/test/std/experimental/memory/memory.observer.ptr/hash.pass.cpp
    M libcxx/test/std/input.output/filesystems/class.path/path.member/path.hash_enabled.pass.cpp
    M libcxx/test/std/strings/basic.string.hash/enabled_hashes.pass.cpp
    M libcxx/test/std/strings/string.view/string.view.hash/enabled_hashes.pass.cpp
    M libcxx/test/std/thread/thread.threads/thread.thread.class/thread.thread.id/enabled_hashes.pass.cpp
    M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.hash/hash_shared_ptr.pass.cpp
    M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.hash/hash_unique_ptr.pass.cpp
    M libcxx/test/std/utilities/optional/optional.hash/hash.pass.cpp
    M libcxx/test/std/utilities/template.bitset/bitset.hash/enabled_hash.pass.cpp
    M libcxx/test/std/utilities/type.index/type.index.synopsis/hash_type_index.pass.cpp
    M libcxx/test/std/utilities/variant/variant.hash/hash.pass.cpp
    M libcxx/test/support/poisoned_hash_helper.h
    R libcxx/test/support/test.support/test_poisoned_hash_helper.pass.cpp

  Log Message:
  -----------
  [libc++][modules] Refactor poisoned_hash_helper (#108296)

The poisoned_hash_helper header was relying on an implicit forward
declaration of std::hash located in <type_traits>. When we improve the
modularization of the library, that causes issues, in addition to being
a fundamentally non-portable assumption in the test suite.

It turns out that the reason for relying on a forward declaration is to
be able to test that std::hash is *not* provided if we don't include any
header that provides it. But testing that is actually both non-portable
and not really useful.

Indeed, what harm does it make if additional headers provide std::hash
specializations? That would certainly be conforming -- the Standard
never requires an implementation to avoid providing a declaration when a
given header is included, instead it mandates what *must* be provided
for sure. In that spirit, it would be conforming for e.g. `<cstddef>` to
define the hash specializations if that was our desire. I also don't
read https://wg21.link/P0513R0 as going against that statement. Hence,
this patch just removes that test which doesn't carry its weight.

Fixes #56938


  Commit: c6b2aa1896e44c3b96a77f9f6ae1b1df6294cf2e
      https://github.com/llvm/llvm-project/commit/c6b2aa1896e44c3b96a77f9f6ae1b1df6294cf2e
  Author: Robin Caloudis <robin.caloudis at gmx.de>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M libcxx/include/__math/traits.h
    M libcxx/test/std/numerics/c.math/signbit.pass.cpp

  Log Message:
  -----------
  [libc++][math] Provide overloads for cv-unqualified floating point types for `std::signbit` (#106566)

## Why
Following up on https://github.com/llvm/llvm-project/pull/105946, this
patch provides the floating point overloads for `std::signbit` as
defined by
[P0533R9](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf).

## What
* Test and add overloads for cv-unqualified floating point types
* Remove constrained overload as it is not needed anymore
* Make use of `template<class = void>` as the universal C runtime (UCRT)
needed for Clang-Cl comes with overloads for all cv-unqualified floating
point types (float, double, long double) for `std::signbit()` by itself
[in the
WinSDK](https://github.com/microsoft/win32metadata/blob/e012b29924c53aa941fc010850b68331b0c3ea80/generation/WinSDK/RecompiledIdlHeaders/ucrt/corecrt_math.h#L309-L322).
In a certain way, this can be seen as a deviation from the C standard.
We need to work around it as the compilation would otherwise error out
due to duplicated definitions.


  Commit: 17e0686ab1107a1a675d8783383dedf70fa24033
      https://github.com/llvm/llvm-project/commit/17e0686ab1107a1a675d8783383dedf70fa24033
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M libcxx/.clang-format
    M libcxx/include/__algorithm/adjacent_find.h
    M libcxx/include/__algorithm/all_of.h
    M libcxx/include/__algorithm/any_of.h
    M libcxx/include/__algorithm/binary_search.h
    M libcxx/include/__algorithm/count.h
    M libcxx/include/__algorithm/count_if.h
    M libcxx/include/__algorithm/equal.h
    M libcxx/include/__algorithm/equal_range.h
    M libcxx/include/__algorithm/find.h
    M libcxx/include/__algorithm/find_end.h
    M libcxx/include/__algorithm/find_first_of.h
    M libcxx/include/__algorithm/find_if.h
    M libcxx/include/__algorithm/find_if_not.h
    M libcxx/include/__algorithm/includes.h
    M libcxx/include/__algorithm/is_heap.h
    M libcxx/include/__algorithm/is_heap_until.h
    M libcxx/include/__algorithm/is_partitioned.h
    M libcxx/include/__algorithm/is_permutation.h
    M libcxx/include/__algorithm/is_sorted.h
    M libcxx/include/__algorithm/is_sorted_until.h
    M libcxx/include/__algorithm/lexicographical_compare.h
    M libcxx/include/__algorithm/lower_bound.h
    M libcxx/include/__algorithm/max.h
    M libcxx/include/__algorithm/max_element.h
    M libcxx/include/__algorithm/min.h
    M libcxx/include/__algorithm/min_element.h
    M libcxx/include/__algorithm/minmax.h
    M libcxx/include/__algorithm/minmax_element.h
    M libcxx/include/__algorithm/mismatch.h
    M libcxx/include/__algorithm/none_of.h
    M libcxx/include/__algorithm/pstl.h
    M libcxx/include/__algorithm/remove.h
    M libcxx/include/__algorithm/remove_if.h
    M libcxx/include/__algorithm/search.h
    M libcxx/include/__algorithm/search_n.h
    M libcxx/include/__algorithm/set_intersection.h
    M libcxx/include/__algorithm/simd_utils.h
    M libcxx/include/__algorithm/unique.h
    M libcxx/include/__algorithm/upper_bound.h
    M libcxx/include/__bit/bit_cast.h
    M libcxx/include/__bit/countl.h
    M libcxx/include/__bit/countr.h
    M libcxx/include/__chrono/leap_second.h
    M libcxx/include/__config
    M libcxx/include/__filesystem/path.h
    M libcxx/include/__functional/identity.h
    M libcxx/include/__math/abs.h
    M libcxx/include/__math/copysign.h
    M libcxx/include/__math/min_max.h
    M libcxx/include/__math/roots.h
    M libcxx/include/__math/rounding_functions.h
    M libcxx/include/__math/traits.h
    M libcxx/include/__memory/allocate_at_least.h
    M libcxx/include/__memory/allocator.h
    M libcxx/include/__memory/allocator_traits.h
    M libcxx/include/__memory/assume_aligned.h
    M libcxx/include/__memory/temporary_buffer.h
    M libcxx/include/__mutex/lock_guard.h
    M libcxx/include/__mutex/unique_lock.h
    M libcxx/include/__utility/forward.h
    M libcxx/include/__utility/move.h
    M libcxx/include/array
    M libcxx/include/barrier
    M libcxx/include/deque
    M libcxx/include/forward_list
    M libcxx/include/future
    M libcxx/include/limits
    M libcxx/include/list
    M libcxx/include/map
    M libcxx/include/math.h
    M libcxx/include/new
    M libcxx/include/queue
    M libcxx/include/regex
    M libcxx/include/scoped_allocator
    M libcxx/include/set
    M libcxx/include/stack
    M libcxx/include/stdlib.h
    M libcxx/include/string
    M libcxx/include/string_view
    M libcxx/include/unordered_map
    M libcxx/include/unordered_set
    M libcxx/include/vector

  Log Message:
  -----------
  [libc++][NFC] Use [[__nodiscard__]] unconditionally (#80454)

`__has_cpp_attribute(__nodiscard__)` is always true now, so we might as
well replace `_LIBCPP_NODISCARD`. It's one less macro that can result in
bad diagnostics.


  Commit: e0cd11eba526234ca14a0b91f5598ca3363b6aca
      https://github.com/llvm/llvm-project/commit/e0cd11eba526234ca14a0b91f5598ca3363b6aca
  Author: Kazu Hirata <kazu at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang-tools-extra/clangd/Diagnostics.cpp
    M clang-tools-extra/clangd/Diagnostics.h
    M clang-tools-extra/clangd/ParsedAST.cpp
    M clang-tools-extra/clangd/Preamble.cpp
    M clang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
    M clang/include/clang/Basic/Attr.td
    M clang/include/clang/Basic/Diagnostic.h
    M clang/include/clang/Basic/DiagnosticCategories.h
    M clang/include/clang/Basic/DiagnosticIDs.h
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/lib/Basic/Diagnostic.cpp
    M clang/lib/Basic/DiagnosticIDs.cpp
    M clang/lib/Frontend/LogDiagnosticPrinter.cpp
    M clang/lib/Frontend/SerializedDiagnosticPrinter.cpp
    M clang/lib/Frontend/TextDiagnosticPrinter.cpp
    M clang/lib/Sema/Sema.cpp
    M clang/lib/Sema/SemaCUDA.cpp
    M clang/lib/Sema/SemaDeclAttr.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
    M clang/lib/Serialization/ASTReader.cpp
    M clang/lib/Serialization/ASTWriter.cpp
    M clang/lib/StaticAnalyzer/Core/TextDiagnostics.cpp
    M clang/test/Sema/diagnose_if.c
    R clang/test/SemaCXX/diagnose_if-warning-group.cpp
    M clang/tools/diagtool/ListWarnings.cpp
    M clang/tools/diagtool/ShowEnabledWarnings.cpp
    M clang/tools/libclang/CXStoredDiagnostic.cpp

  Log Message:
  -----------
  Revert "[clang] Extend diagnose_if to accept more detailed warning information (#70976)"

This reverts commit 030c6da7af826b641db005be925b20f956c3a6bb.

Several build bots are failing:
https://lab.llvm.org/buildbot/#/builders/89/builds/6211
https://lab.llvm.org/buildbot/#/builders/157/builds/7578
https://lab.llvm.org/buildbot/#/builders/140/builds/6429


  Commit: 87e1104cf0e2de0d04bee2944893fa7897277b2f
      https://github.com/llvm/llvm-project/commit/87e1104cf0e2de0d04bee2944893fa7897277b2f
  Author: Martin Storsjö <martin at martin.st>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    A clang/test/ClangScanDeps/implicit-target.c
    M clang/tools/clang-scan-deps/ClangScanDeps.cpp

  Log Message:
  -----------
  [clang-scan-deps] Infer the target from the executable name (#108189)

This allows clang-scan-deps to work correctly when using cross compilers
with names like <triple>-clang.


  Commit: d37d05795dbbdd1b7e629e966013df5967d2da5b
      https://github.com/llvm/llvm-project/commit/d37d05795dbbdd1b7e629e966013df5967d2da5b
  Author: Sushant Gokhale <sgokhale at nvidia.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll

  Log Message:
  -----------
  [SLP][AArch64] Fix test failure for PR #106507 (#108442)

Updating the failing test in this patch.


  Commit: a81a4b2a7ac2d0b8195bb008b2c0f464cfbda223
      https://github.com/llvm/llvm-project/commit/a81a4b2a7ac2d0b8195bb008b2c0f464cfbda223
  Author: Martin Storsjö <martin at martin.st>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M lldb/include/lldb/Core/SourceManager.h

  Log Message:
  -----------
  [lldb] Fix building with lldb::once_flag != std::once_flag

This fixes build breakage on e.g. mingw platforms since
ffa2f539ae2a4e79c01b3d54f8b12c63d8781a0c.

The Debugger::ReportWarning function takes a pointer to a
std::once_flag. On many platforms, llvm::once_flag is a typedef
for std::once_flag, but on others, llvm::once_flag is a custom
reimplementation.


  Commit: 159e5b3fdf26325403ad3756d43e625b7d59443a
      https://github.com/llvm/llvm-project/commit/159e5b3fdf26325403ad3756d43e625b7d59443a
  Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp

  Log Message:
  -----------
  MemCpyOpt: avoid unnecessary getMemorySSA (NFC) (#108405)


  Commit: 085c88c3ad4a9802fb6ad3d96db4af6d66b4d588
      https://github.com/llvm/llvm-project/commit/085c88c3ad4a9802fb6ad3d96db4af6d66b4d588
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/utils/gn/secondary/libcxx/include/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 04d3a6be62d3


  Commit: 3733528e521b7ee6af3950c65c3ff421c8fd0af6
      https://github.com/llvm/llvm-project/commit/3733528e521b7ee6af3950c65c3ff421c8fd0af6
  Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Transforms/Coroutines/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 2670565afc4e


  Commit: c05e29bff036060f0811b887a92715104abdceb5
      https://github.com/llvm/llvm-project/commit/c05e29bff036060f0811b887a92715104abdceb5
  Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/LinkAllPasses.h
    M llvm/include/llvm/Transforms/Scalar/Scalarizer.h
    M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
    M llvm/lib/Transforms/Scalar/Scalar.cpp
    M llvm/lib/Transforms/Scalar/Scalarizer.cpp
    M llvm/test/CodeGen/DirectX/acos.ll
    M llvm/test/CodeGen/DirectX/asin.ll
    M llvm/test/CodeGen/DirectX/atan.ll
    M llvm/test/CodeGen/DirectX/ceil.ll
    M llvm/test/CodeGen/DirectX/cos.ll
    M llvm/test/CodeGen/DirectX/cosh.ll
    M llvm/test/CodeGen/DirectX/exp2.ll
    M llvm/test/CodeGen/DirectX/fabs.ll
    M llvm/test/CodeGen/DirectX/floor.ll
    M llvm/test/CodeGen/DirectX/isinf.ll
    A llvm/test/CodeGen/DirectX/llc-pipeline.ll
    M llvm/test/CodeGen/DirectX/reversebits.ll
    M llvm/test/CodeGen/DirectX/round.ll
    M llvm/test/CodeGen/DirectX/saturate.ll
    A llvm/test/CodeGen/DirectX/scalar-store.ll
    A llvm/test/CodeGen/DirectX/scalarize-two-calls.ll
    M llvm/test/CodeGen/DirectX/sin.ll
    M llvm/test/CodeGen/DirectX/sinh.ll
    M llvm/test/CodeGen/DirectX/sqrt.ll
    M llvm/test/CodeGen/DirectX/tan.ll
    M llvm/test/CodeGen/DirectX/tanh.ll
    M llvm/test/CodeGen/DirectX/trunc.ll
    M llvm/tools/opt/optdriver.cpp

  Log Message:
  -----------
  [LegacyPM][DirectX] Add legacy scalarizer back for use in the DirectX backend (#107427)

As discussed in this
[proposal](https://github.com/llvm/wg-hlsl/pull/62/files?short_path=ac6e592#diff-ac6e59276afe8016e307eedc5c835f534c0cb353707760b44df0fa9d905a5cf8).
We had to bring back the legacy pass manager interface for the
scalarizer pass. Two reasons for this:
1. The DirectX backend is still using the legacy pass manager
2. The new PM isn't hooked up in clang yet via `BackendUtil.cpp`'s
`AddEmitPasses` That means even if we add a `buildCodeGenPipeline` we
won't be able to benefit from the new pass manager's scalarizer pass
interface.

The remaining changes are hooking up the scalarizer pass to the DirectX
backend, updating the DirectX test cases,
and allowing the `optdriver` to not block the legacy invocation of the
scalarizer pass.

Future work still needs to be done to allow the scalarizer pass to
handle target specific intrinsics.

closes #105178


  Commit: ad3ad15229cc65874eae173137e47b5c817d77ea
      https://github.com/llvm/llvm-project/commit/ad3ad15229cc65874eae173137e47b5c817d77ea
  Author: David Green <david.green at arm.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    A llvm/test/Transforms/InstCombine/fmod.ll
    M llvm/test/Transforms/InstCombine/pow-1.ll

  Log Message:
  -----------
  [InstCombine] Test for fmod -> frem folding. NFC


  Commit: aa3465793a250faa5426ac626989375465256658
      https://github.com/llvm/llvm-project/commit/aa3465793a250faa5426ac626989375465256658
  Author: Martin Storsjö <martin at martin.st>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/tools/clang-scan-deps/CMakeLists.txt

  Log Message:
  -----------
  [clang-scan-deps] Fix builds with BUILD_SHARED_LIBS=ON

This fixes building in this configuration after
87e1104cf0e2de0d04bee2944893fa7897277b2f.


  Commit: 7e9bd12cd9ebb1f14c3716d5e45fb88aff23e671
      https://github.com/llvm/llvm-project/commit/7e9bd12cd9ebb1f14c3716d5e45fb88aff23e671
  Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp

  Log Message:
  -----------
  MemCpyOpt: clarify logic in processStoreOfLoad (NFC) (#108400)


  Commit: 82a36468c74a29b6154639d659550c62457e655b
      https://github.com/llvm/llvm-project/commit/82a36468c74a29b6154639d659550c62457e655b
  Author: Jacek Caban <jacek at codeweavers.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M lld/COFF/DLL.cpp
    M lld/COFF/DLL.h
    M lld/COFF/Driver.cpp
    M lld/COFF/InputFiles.cpp
    M lld/COFF/InputFiles.h
    M lld/COFF/SymbolTable.cpp
    M lld/COFF/SymbolTable.h
    M lld/COFF/Symbols.h
    M lld/COFF/Writer.cpp
    M lld/test/COFF/Inputs/loadconfig-arm64ec.s
    M lld/test/COFF/arm64ec-import.test

  Log Message:
  -----------
  [LLD][COFF] Add support for ARM64EC auxiliary IAT (#108304)

In addition to the regular IAT, ARM64EC also includes an auxiliary IAT.
At runtime, the regular IAT is populated with the addresses of imported
functions, which may be x86_64 functions or the export thunks of ARM64EC
functions. The auxiliary IAT contains versions of functions that are
guaranteed to be directly callable by ARM64 code.

The linker fills the auxiliary IAT with the addresses of `__impchk_`
thunks. These thunks perform a call on the IAT address using
`__icall_helper_arm64ec` with the target address from the IAT. If the
imported function is an ARM64EC function, the OS may replace the address
in the auxiliary IAT with the address of the ARM64EC version of the
function (not its export thunk), avoiding the runtime call checker for
better performance.


  Commit: dd66aaf85a2258324851ac19eb08094928ac1eac
      https://github.com/llvm/llvm-project/commit/dd66aaf85a2258324851ac19eb08094928ac1eac
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M compiler-rt/lib/sanitizer_common/sanitizer_common_interface.inc
    M compiler-rt/lib/sanitizer_common/sanitizer_interface_internal.h
    M compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp
    M compiler-rt/lib/sanitizer_common/weak_symbols.txt

  Log Message:
  -----------
  [sanitizer] Allow to override GetDTLSRange (#108348)

And rename it into __sanitizer_get_dtls_size.

The test will be in a separate patch, as I
expected reverts of the test.


  Commit: de0fdcb2b04d0eb85b408a459824c6c07d0656ad
      https://github.com/llvm/llvm-project/commit/de0fdcb2b04d0eb85b408a459824c6c07d0656ad
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll

  Log Message:
  -----------
  [SLP][NFC]Add a test for incorrectly combined extracts with the buildvector


  Commit: 95eab0d195fdfac03ddccbd3941dcb365b87a6be
      https://github.com/llvm/llvm-project/commit/95eab0d195fdfac03ddccbd3941dcb365b87a6be
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    A compiler-rt/test/sanitizer_common/TestCases/Linux/tls_get_addr.c

  Log Message:
  -----------
  [sanitizer] Test for __sanitizer_get_dtls_size (#108349)

Test for #108348 which is almost NFC. However, the test
may fail on some platforms, and a few iterations could be
needed to filter out unsupported platforms.


  Commit: 5d7cf504ce02f387660ceaedf890c35cfd0ad55f
      https://github.com/llvm/llvm-project/commit/5d7cf504ce02f387660ceaedf890c35cfd0ad55f
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll

  Log Message:
  -----------
  [SLP]Fix PR108421: Correctly deduce VF from the masks

Need to select the max of CommonMask and V1 Mask size to correctly
perform reshuffling of the vectors, otherwise incorrect result is
generated.

Fixes https://github.com/llvm/llvm-project/issues/108421


  Commit: 71cb7811bbfedb400f86286a31f0a9bea3d834c6
      https://github.com/llvm/llvm-project/commit/71cb7811bbfedb400f86286a31f0a9bea3d834c6
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp

  Log Message:
  -----------
  [LV] Remove stale completeLoopSkeleton (NFCI).

The function has been removed a while ago, also remove the stable
declaration.


  Commit: 4808842771f8b009f9366db13249890698aee7b6
      https://github.com/llvm/llvm-project/commit/4808842771f8b009f9366db13249890698aee7b6
  Author: Shilei Tian <i at tianshilei.me>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/Attributor.h
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp

  Log Message:
  -----------
  [NFC][Attributor] Use unsigned integer for address space tracking (#108447)


  Commit: 08d294df5513e1914077ced91a9b44a00874fe0f
      https://github.com/llvm/llvm-project/commit/08d294df5513e1914077ced91a9b44a00874fe0f
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll

  Log Message:
  -----------
  [VPlan] Simplify VPBuilder insert point when adding users in exit block.

Simplifies setting the insert point, addressing a TODO.


  Commit: 2e58d923a1a543166a2aa72d8b579bb5c7cc320b
      https://github.com/llvm/llvm-project/commit/2e58d923a1a543166a2aa72d8b579bb5c7cc320b
  Author: weiwei chen <weiwei.chen at modular.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
    M llvm/test/CodeGen/NVPTX/lower-alloca.ll

  Log Message:
  -----------
  [NVPTX] Check Before inserting AddrSpaceCastInst in NVPTXLoweringAlloca (#106127)

If `allocaInst` is already in `ADDRESS_SPACE_LOCAL`, there is no need to
do an explicit cast which will actually fail assertion with
`AddrSpaceCastInst`. Only insert the cast when needed.


  Commit: 6db8292d4865e00a5a6fa2aae5aacdb9cab3c2ef
      https://github.com/llvm/llvm-project/commit/6db8292d4865e00a5a6fa2aae5aacdb9cab3c2ef
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td

  Log Message:
  -----------
  [RISCV] Put ADDI InstAliases together and give them explicit priorities.

Make the priorities explicit instead of relying on the order in the .td file.


  Commit: f02a0d0e73d90a5f8b207ba4fb95f3ae9cc23f53
      https://github.com/llvm/llvm-project/commit/f02a0d0e73d90a5f8b207ba4fb95f3ae9cc23f53
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/MC/RISCV/csr-aliases.s

  Log Message:
  -----------
  [RISCV] Consistently use CHECK-EXT-F instead of CHECK-EXT-F-ON in csr-aliases.s. NFC

We only have RUN lines for CHECK-EXT-F, but he had a mix of checks.


  Commit: 8814b6db3809b1cc341a3672e680faa5d167f52b
      https://github.com/llvm/llvm-project/commit/8814b6db3809b1cc341a3672e680faa5d167f52b
  Author: Arthur Eubanks <aeubanks at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/test/Driver/cl-link.c
    M clang/test/Driver/windows-cross.c

  Log Message:
  -----------
  [clang][test] Fix some windows driver tests with legacy runtime dir layout (#108452)

With the legacy runtime directory layout, the runtime libraries are
under `lib/clang/20/lib/windows` and have an arch suffix.


  Commit: 853bb8f635595c382caf112b804d76b8f4520b74
      https://github.com/llvm/llvm-project/commit/853bb8f635595c382caf112b804d76b8f4520b74
  Author: Marc Auberer <marc.auberer at chillibits.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M llvm/include/llvm/ADT/DenseMap.h

  Log Message:
  -----------
  [ADT][NFC] Refactor/optimize DenseMap::copyFrom (#108377)

Simplify code, constexpr-ify if with constexpr condition


  Commit: 48088dc01b85e93b56475f9d4c6ad9f1874eed82
      https://github.com/llvm/llvm-project/commit/48088dc01b85e93b56475f9d4c6ad9f1874eed82
  Author: rjmansfield <ryan_mansfield at apple.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/tools/llvm-dwp/X86/cu_tu_units_manual_v4.s
    M llvm/test/tools/llvm-dwp/X86/cu_tu_units_manual_v5.s
    M llvm/test/tools/llvm-dwp/X86/cu_tu_units_manual_v5_invalid.s
    M llvm/test/tools/llvm-dwp/X86/debug_macro_v5.s
    M llvm/test/tools/llvm-dwp/X86/type_dedup.test
    M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp

  Log Message:
  -----------
  [llvm-dwarfdump] Rename manaully-generate-unit-index. (#108399)

-manaully-generate-unit-index was misspelled.


  Commit: 6292ea6879217468cd9187d4f4dd3ee7c713431c
      https://github.com/llvm/llvm-project/commit/6292ea6879217468cd9187d4f4dd3ee7c713431c
  Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
    M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir

  Log Message:
  -----------
  [mlir][AMDGPU] Remove an old bf16 workaround (#108409)

The AMDGPU backend now implements LLVM's `bfloat` type. Therefore, we no
longer need to type convert MLIR's `bf16` to `i16` during lowerings to
ROCDL.

As a result of this change, we discovered that, whel the code for MFMA
and WMMA intrinsics was mainly prepared for this change, we were failing
to bitcast the bf16 results of WMMA operations out from the i16 they're
natively represented as. This commit also fixes that issue.

---------

Co-authored-by: Jakub Kuderski <kubakuderski at gmail.com>


  Commit: 6d859c1712b539fb36e799bd7b1801f4acacc1ac
      https://github.com/llvm/llvm-project/commit/6d859c1712b539fb36e799bd7b1801f4acacc1ac
  Author: vporpo <vporpodas at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp
    M llvm/unittests/SandboxIR/TrackerTest.cpp

  Log Message:
  -----------
  [SandboxIR] Implement GlobalValue (#108317)

This patch implements sandboxir::GlobalValue mirroring
llvm::GlobalValue. Please note that the implementation is incomplete as
it's missing several member functions.


  Commit: 981bb9dcc926ec91e5c3dd9e5064740ab19e1928
      https://github.com/llvm/llvm-project/commit/981bb9dcc926ec91e5c3dd9e5064740ab19e1928
  Author: Xiang Li <python3kgae at outlook.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
    M llvm/lib/Target/DirectX/DXILFinalizeLinkage.cpp
    M llvm/lib/Target/DirectX/DXILFinalizeLinkage.h
    M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
    M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.h
    M llvm/lib/Target/DirectX/DXILPrepare.cpp
    A llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
    M llvm/test/CodeGen/DirectX/llc-pipeline.ll

  Log Message:
  -----------
  [DirectX] generate resource table for PSV part (#106607)

Use DXILResourceWrapperPass to build the resource table.

Since DXILResourceWrapperPass operates on LLVM intrinsics rather than
DXIL operations, add addPreserved for DXILResourceWrapperPass in the
passes before DXContainerGlobals

Fixes #103275


  Commit: 13280d99aec5b4f383a2f3d5c10ecb148a07384e
      https://github.com/llvm/llvm-project/commit/13280d99aec5b4f383a2f3d5c10ecb148a07384e
  Author: YANG Xudong <yangxudong at ymatrix.cn>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
    M llvm/test/CodeGen/LoongArch/fp16-promote.ll

  Log Message:
  -----------
  [loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (#107791)

For zig with LLVM 19.1.0rc4, we are seeing the following error when
bootstrapping a `loongarch64-linux-musl` target.


https://github.com/ziglang/zig-bootstrap/issues/164#issuecomment-2332357069

It seems that this issue is caused by `PromoteFloatResult` is not
handling FREEZE OP on loongarch.

Here is the reproduction of the error: https://godbolt.org/z/PPfvWjjG5

~~This patch adds the FREEZE OP handling with `PromoteFloatRes_UnaryOp`
and adds a test case.~~

This patch changes loongarch's way of floating point promotion to soft
promotion to avoid this problem.

See: loongarch's handling of `half`:
- https://github.com/llvm/llvm-project/issues/93894
- https://github.com/llvm/llvm-project/pull/94456

Also see: other float promotion FREEZE handling
-
https://github.com/llvm/llvm-project/commit/0019c2f194a5e1f4cd65c5284e204328cc40ab3d


  Commit: 2ca75df1d18caa244dc7f3acd61e491e055c6c60
      https://github.com/llvm/llvm-project/commit/2ca75df1d18caa244dc7f3acd61e491e055c6c60
  Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M llvm/include/llvm/Analysis/ValueTracking.h
    M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/test/Transforms/InstCombine/rem.ll

  Log Message:
  -----------
  [ValueTracking] Infer is-power-of-2 from dominating conditions (#107994)

Addresses downstream rustc issue:
https://github.com/rust-lang/rust/issues/129795


  Commit: ec1922b52302fd9083eeac35e81e3a0c621b5469
      https://github.com/llvm/llvm-project/commit/ec1922b52302fd9083eeac35e81e3a0c621b5469
  Author: Xiang Li <python3kgae at outlook.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/test/CodeGen/DirectX/floor.ll

  Log Message:
  -----------
  [DirectX] fix fail test (#108468)

Fix fails in floor.ll.
1. Need to enable scalarizer.
2. Need to use 27 for floor.


  Commit: e7a1dc231ad2c8dcf034585472f311617e24006e
      https://github.com/llvm/llvm-project/commit/e7a1dc231ad2c8dcf034585472f311617e24006e
  Author: Erick Ochoa <github at ceci-nest-pas.me>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/cmake/modules/MLIRDetectPythonEnv.cmake

  Log Message:
  -----------
  [CMake] Remove requirement of NumPy header files (#108465)

NumPy header files were required for building MLIR, however the NumPy
C-API is never used. In other words, NumPy is not a build time
dependency. `numpy`, the python package, is required at runtime for the
python bindings tests. In particular the file
`mlir/python/mlir/runtime/np_to_memref.py` and all tests which may use
it. This commit removes the build time dependency, but the runtime
dependency remains through the `requirements.txt` file.

Co-authored-by: Erick Ochoa <erick at ceci-nest-pas.me>


  Commit: 17ff6161b83e6a5e86fcb6a13c5551bba1438405
      https://github.com/llvm/llvm-project/commit/17ff6161b83e6a5e86fcb6a13c5551bba1438405
  Author: Erick Ochoa <github at ceci-nest-pas.me>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M mlir/test/CMakeLists.txt

  Log Message:
  -----------
  [CMake] Add missing dependency (#108461)

The [`mlir-capi-execution-engine-test` test
executable](https://github.com/llvm/llvm-project/blob/main/mlir/test/CAPI/CMakeLists.txt#L26-L34)

```cmake
if(MLIR_ENABLE_EXECUTION_ENGINE)
  _add_capi_test_executable(mlir-capi-execution-engine-test
    execution_engine.c
  LINK_LIBS PRIVATE
    MLIRCAPIConversion
    MLIRCAPIExecutionEngine
    MLIRCAPIRegisterEverything
)
endif()
```


is run by lit tests, but it is not properly listed as a dependency. It
is added in places conditionally across the file
[`tests/CMakeLists.txt`](https://github.com/llvm/llvm-project/blob/main/mlir/test/CMakeLists.txt#L130-L143)

```cmake
# The native target may not be enabled, in this case we won't
# run tests that involves executing on the host: do not build
# useless binaries.
if(LLVM_ENABLE_PIC AND TARGET ${LLVM_NATIVE_ARCH})
  list(APPEND MLIR_TEST_DEPENDS
    mlir-cpu-runner
    llc
    mlir_async_runtime
    mlir-capi-execution-engine-test
    mlir_c_runner_utils
    mlir_runner_utils
    mlir_float16_utils
  )
endif()
```

But this condition is not the same as the one where the test executable
is added. [It has been reported on discord that the following error
occurred:](https://discord.com/channels/636084430946959380/642426447167881246/1283811636725022730)

```
FAIL: MLIR :: CAPI/execution_engine.c (2 of 2121)
******************** TEST 'MLIR :: CAPI/execution_engine.c' FAILED ********************
Exit Code: 127
Command Output (stdout):
--
# RUN: at line 10
/usr/bin/mlir-capi-execution-engine-test 2>&1 | /usr/bin/FileCheck /builddir/build/BUILD/mlir-19.1.0_rc4-build/mlir-19.1.0-rc4.src/test/CAPI/execution_engine.c
# executed command: /usr/bin/mlir-capi-execution-engine-test
# .---command stderr------------
# | '/usr/bin/mlir-capi-execution-engine-test': command not found
# `-----------------------------
```

This error will not be deterministic and is dependent on the order in
which tools are built. If by any chance,
`mlir-capi-execution-engine-test` is built before the lit tests run,
then nothing will happen. But lit tests can be run before
`mlir-capi-execution-engine-test` is built.

This patch adds the `mlir-capi-execution-engine` to the
`MLIR_TEST_DEPENDS` list when the `MLIR_ENABLE_EXECUTION_ENGINE` flag is
present.

Happy to make changes like:
* removing `mlir-capi-execution-engine-test` from the other place where
it is included in the tests
* and merge and sort alphabetically these two commands

```cmake
set(MLIR_TEST_DEPENDS
FileCheck count not split-file
mlir-capi-ir-test
mlir-capi-irdl-test
mlir-capi-llvm-test
mlir-capi-pass-test
mlir-capi-quant-test
mlir-capi-rewrite-test
mlir-capi-sparse-tensor-test
mlir-capi-transform-test
mlir-capi-transform-interpreter-test
mlir-capi-translation-test
mlir-linalg-ods-yaml-gen
mlir-lsp-server
mlir-opt
  mlir-query
  mlir-reduce
  mlir-tblgen
  mlir-translate
  tblgen-lsp-server
  tblgen-to-irdl
  )

set(MLIR_TEST_DEPENDS ${MLIR_TEST_DEPENDS}
  mlir-capi-pdl-test
  mlir-pdll-lsp-server
  mlir-pdll
  ) 
```

Co-authored-by: Erick Ochoa <erick at ceci-nest-pas.me>


  Commit: 3c9db3a627811f656cc569fe3b8bdb54ba8192bc
      https://github.com/llvm/llvm-project/commit/3c9db3a627811f656cc569fe3b8bdb54ba8192bc
  Author: Rahul Joshi <rjoshi at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
    M clang/utils/TableGen/TableGenBackends.h

  Log Message:
  -----------
  [clang][TableGen] Change ASTProperties Emitter to use const RecordKeeper (#108274)

Change ASTProperties Emitter to use const RecordKeeper.

This is a part of effort to have better const correctness in TableGen
backends:


https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089


  Commit: 7ba49685c020f7059fe0ba27c157ecf08b937d44
      https://github.com/llvm/llvm-project/commit/7ba49685c020f7059fe0ba27c157ecf08b937d44
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
    M llvm/test/MC/RISCV/csr-aliases.s
    M llvm/test/MC/RISCV/rvf-aliases-valid.s
    M llvm/test/MC/RISCV/rvzfinx-aliases-valid.s

  Log Message:
  -----------
  [RISCV] Enable floating point CSR alias mnemonics for Zfinx. (#108464)


  Commit: e323b40bf1dee704801d44e099592d4f6932cc1e
      https://github.com/llvm/llvm-project/commit/e323b40bf1dee704801d44e099592d4f6932cc1e
  Author: Jianjian Guan <jacquesguan at me.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp

  Log Message:
  -----------
  [NFC][mlir] Simplify code (#108346)


  Commit: cc40a461df1b67dc84ed0334e2818ef8d14f04f5
      https://github.com/llvm/llvm-project/commit/cc40a461df1b67dc84ed0334e2818ef8d14f04f5
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/test/MC/RISCV/rv32ih-aliases-valid.s
    M llvm/test/MC/RISCV/rvi-aliases-valid.s

  Log Message:
  -----------
  [RISCV] Increase EmitPriority on some InstAliases. NFC

Use EmitPriority instead of relying on file ordering when there
are multiple InstAliases for the same instruction.

Enhance tests to check that we are printing the alias correctly
by checking to end of line.
Remove -no-aliases from some RUN lines that expect to check alias.
Remove encoding checks from alias test.


  Commit: dee058f9e3ae95b8f4b95034b65c3d7408060c8e
      https://github.com/llvm/llvm-project/commit/dee058f9e3ae95b8f4b95034b65c3d7408060c8e
  Author: Jim Lin <jim at andestech.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M clang/lib/Basic/Targets/RISCV.cpp
    M clang/test/Preprocessor/riscv-cmodel.c

  Log Message:
  -----------
  [RISCV] Emit predefined macro __riscv_cmodel_large for large code model (#108131)

Co-authored-by: patrick <patrick at andestech.com>


  Commit: c00c62c113d1ac121891d644a9f18f247c24d9b1
      https://github.com/llvm/llvm-project/commit/c00c62c113d1ac121891d644a9f18f247c24d9b1
  Author: Amir Ayupov <aaupov at fb.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M bolt/include/bolt/Profile/ProfileYAMLMapping.h
    M bolt/include/bolt/Profile/YAMLProfileWriter.h
    M bolt/lib/Profile/DataAggregator.cpp
    M bolt/lib/Profile/YAMLProfileWriter.cpp
    M bolt/test/X86/pseudoprobe-decoding-inline.test
    M bolt/test/X86/pseudoprobe-decoding-noinline.test
    M llvm/include/llvm/MC/MCPseudoProbe.h

  Log Message:
  -----------
  [BOLT] Add pseudo probe inline tree to YAML profile

Add probe inline tree information to YAML profile, at function level:
- function GUID,
- checksum,
- parent node id,
- call site in the parent.

This information is used for pseudo probe block matching (#99891).

The encoding adds/changes probe information in multiple levels of
YAML profile:
- BinaryProfile: add pseudo_probe_desc with GUIDs and Hashes, which
  permits deduplication of data:
  - many GUIDs are duplicate as the same callee is commonly inlined
    into multiple callers,
  - hashes are also very repetitive, especially for functions with
    low block counts.
- FunctionProfile: add inline tree (see above). Top-level function
  is included as root of function inline tree, which makes guid and
  pseudo_probe_desc_hash fields redundant.
- BlockProfile: densely-encoded block probe information:
  - probes reference their containing inline tree node,
  - separate lists for block, call, indirect call probes,
  - block probe encoding is specialized: ids are encoded as bitset
    in uint64_t. If only block probe with id=1 is present, it's
    encoded as implicit entry (id=0, omitted).
  - inline tree nodes with identical probes share probe description
    where node indices are combined into a list.

On top of #107970, profile with new probe encoding has the following
characteristics (profile for a large binary):

- Profile without probe information: 33MB, 3.8MB compressed (baseline).
- Profile with inline tree information: 92MB, 14MB compressed.

Profile processing time (YAML parsing, inference, attaching steps):
- profile without pseudo probes: 5s,
- profile with pseudo probes, without pseudo probe matching: 11s,
- with pseudo probe matching: 12.5s.

Test Plan: updated pseudoprobe-decoding-inline.test

Reviewers: wlei-llvm, ayermolo, rafaelauler, dcci, maksfb

Reviewed By: wlei-llvm, rafaelauler

Pull Request: https://github.com/llvm/llvm-project/pull/107137


  Commit: d9ed8b018df725faec4076a3efdfcbd7a24c99f0
      https://github.com/llvm/llvm-project/commit/d9ed8b018df725faec4076a3efdfcbd7a24c99f0
  Author: Arthur Eubanks <aeubanks at google.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M compiler-rt/test/sanitizer_common/TestCases/dlsym_alloc.c

  Log Message:
  -----------
  [test][compiler-rt] Mark dlsym_alloc.c as unsupported on macos (#108439)

With #106912, the test now fails on macos, e.g.

https://green.lab.llvm.org/job/llvm.org/job/clang-stage1-RA/2058/.


  Commit: cd774c873c891776403ada6962d3f1602efd4054
      https://github.com/llvm/llvm-project/commit/cd774c873c891776403ada6962d3f1602efd4054
  Author: Amir Ayupov <aaupov at fb.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M bolt/include/bolt/Profile/ProfileYAMLMapping.h
    M bolt/include/bolt/Profile/YAMLProfileWriter.h
    M bolt/lib/Profile/YAMLProfileWriter.cpp

  Log Message:
  -----------
  [BOLT][NFC] Rename ProfilePseudoProbeDesc

Address build issues due to aliasing PseudoProbeDesc, e.g.
https://lab.llvm.org/buildbot/#/builders/113/builds/2743


  Commit: d04c2ed60c6a1acef75b0cfff6f1bf9a5a7bea89
      https://github.com/llvm/llvm-project/commit/d04c2ed60c6a1acef75b0cfff6f1bf9a5a7bea89
  Author: Mainak Sil <mainaksil0 at gmail.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M clang-tools-extra/docs/clang-tidy/checks/bugprone/pointer-arithmetic-on-polymorphic-object.rst

  Log Message:
  -----------
  [clang-tidy] Improve documentation of bugprone-pointer-arithmetic-on-polymorphic-object (#108324)

Fix #107831.


  Commit: 9d9d2b4799a6e839fb93b0d571714a220a486ac8
      https://github.com/llvm/llvm-project/commit/9d9d2b4799a6e839fb93b0d571714a220a486ac8
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
    M llvm/test/CodeGen/RISCV/xcvalu.ll
    M llvm/test/MC/RISCV/corev/XCValu-valid.s

  Log Message:
  -----------
  [RISCV] Rename XCValu cv.slet(u) to cv.sle(u). (#108481)

According to https://github.com/openhwgroup/cv32e40p/issues/833 this
instruction was renamed last year to remove the 't'.

I used MnemonicAlias to support the old name. Unfortunately, this gives
a generic error if XCValu is not enabled. Since its an old name I hope
this isn't too big of an issue.

CC: @jeremybennett


  Commit: 70ef5eb6f087524dc952a8f5249b79f4a4000e04
      https://github.com/llvm/llvm-project/commit/70ef5eb6f087524dc952a8f5249b79f4a4000e04
  Author: harishch4 <harishcse44 at gmail.com>
  Date:   2024-09-13 (Fri, 13 Sep 2024)

  Changed paths:
    M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
    M flang/lib/Lower/OpenMP/ClauseProcessor.h
    M flang/lib/Lower/OpenMP/OpenMP.cpp
    M flang/test/Lower/OpenMP/simd.f90

  Log Message:
  -----------
  [Flang][OpenMP] Lowering nontemporal clause to MLIR for SIMD directive (#108339)

Currently, Flang throws a "**not yet implemented: Unhandled clause
NONTEMPORAL in SIMD construct**" error when encountering nontemporal
clause. This patch adds support for this clause in SIMD construct.


  Commit: 648f2bbea6af7f8a6313ecf4a7dc15579bea53fb
      https://github.com/llvm/llvm-project/commit/648f2bbea6af7f8a6313ecf4a7dc15579bea53fb
  Author: Amir Ayupov <aaupov at fb.com>
  Date:   2024-09-26 (Thu, 26 Sep 2024)

  Changed paths:
    M .github/workflows/release-binaries.yml
    M bolt/include/bolt/Profile/ProfileYAMLMapping.h
    M bolt/include/bolt/Profile/YAMLProfileReader.h
    M bolt/include/bolt/Profile/YAMLProfileWriter.h
    M bolt/lib/Profile/YAMLProfileReader.cpp
    M bolt/lib/Profile/YAMLProfileWriter.cpp
    M bolt/test/X86/pseudoprobe-decoding-inline.test
    M bolt/test/X86/pseudoprobe-decoding-noinline.test
    M clang-tools-extra/docs/clang-tidy/checks/bugprone/pointer-arithmetic-on-polymorphic-object.rst
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Driver/Options.td
    M clang/lib/Basic/Targets/RISCV.cpp
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/Driver/ToolChains/Gnu.cpp
    M clang/lib/Headers/hlsl/hlsl_intrinsics.h
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/Sema/SemaInit.cpp
    M clang/test/AST/HLSL/vector-constructors.hlsl
    A clang/test/ClangScanDeps/implicit-target.c
    A clang/test/CodeGenHLSL/builtins/step.hlsl
    M clang/test/Driver/cl-link.c
    M clang/test/Driver/windows-cross.c
    M clang/test/Preprocessor/riscv-cmodel.c
    A clang/test/SemaHLSL/BuiltIns/step-errors.hlsl
    M clang/tools/clang-scan-deps/CMakeLists.txt
    M clang/tools/clang-scan-deps/ClangScanDeps.cpp
    M clang/utils/TableGen/ClangASTPropertiesEmitter.cpp
    M clang/utils/TableGen/TableGenBackends.h
    M compiler-rt/cmake/base-config-ix.cmake
    M compiler-rt/lib/sanitizer_common/sanitizer_common_interface.inc
    M compiler-rt/lib/sanitizer_common/sanitizer_interface_internal.h
    M compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp
    M compiler-rt/lib/sanitizer_common/weak_symbols.txt
    M compiler-rt/test/lit.common.cfg.py
    A compiler-rt/test/sanitizer_common/TestCases/Linux/tls_get_addr.c
    M compiler-rt/test/sanitizer_common/TestCases/dlsym_alloc.c
    M cross-project-tests/lit.cfg.py
    M cross-project-tests/lit.site.cfg.py.in
    M flang/include/flang/Semantics/expression.h
    M flang/lib/Evaluate/intrinsics.cpp
    M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
    M flang/lib/Lower/OpenMP/ClauseProcessor.h
    M flang/lib/Lower/OpenMP/OpenMP.cpp
    M flang/lib/Semantics/check-call.cpp
    M flang/lib/Semantics/expression.cpp
    M flang/runtime/edit-input.cpp
    M flang/test/Lower/OpenMP/simd.f90
    A flang/test/Semantics/elemental02.f90
    M flang/test/Semantics/expr-errors06.f90
    A flang/test/Semantics/kinds06.f90
    M flang/unittests/Runtime/Namelist.cpp
    M libcxx/.clang-format
    M libcxx/include/CMakeLists.txt
    M libcxx/include/__algorithm/adjacent_find.h
    M libcxx/include/__algorithm/all_of.h
    M libcxx/include/__algorithm/any_of.h
    M libcxx/include/__algorithm/binary_search.h
    M libcxx/include/__algorithm/count.h
    M libcxx/include/__algorithm/count_if.h
    M libcxx/include/__algorithm/equal.h
    M libcxx/include/__algorithm/equal_range.h
    M libcxx/include/__algorithm/find.h
    M libcxx/include/__algorithm/find_end.h
    M libcxx/include/__algorithm/find_first_of.h
    M libcxx/include/__algorithm/find_if.h
    M libcxx/include/__algorithm/find_if_not.h
    M libcxx/include/__algorithm/includes.h
    M libcxx/include/__algorithm/is_heap.h
    M libcxx/include/__algorithm/is_heap_until.h
    M libcxx/include/__algorithm/is_partitioned.h
    M libcxx/include/__algorithm/is_permutation.h
    M libcxx/include/__algorithm/is_sorted.h
    M libcxx/include/__algorithm/is_sorted_until.h
    M libcxx/include/__algorithm/lexicographical_compare.h
    M libcxx/include/__algorithm/lower_bound.h
    M libcxx/include/__algorithm/max.h
    M libcxx/include/__algorithm/max_element.h
    M libcxx/include/__algorithm/min.h
    M libcxx/include/__algorithm/min_element.h
    M libcxx/include/__algorithm/minmax.h
    M libcxx/include/__algorithm/minmax_element.h
    M libcxx/include/__algorithm/mismatch.h
    M libcxx/include/__algorithm/none_of.h
    M libcxx/include/__algorithm/pstl.h
    M libcxx/include/__algorithm/remove.h
    M libcxx/include/__algorithm/remove_if.h
    M libcxx/include/__algorithm/search.h
    M libcxx/include/__algorithm/search_n.h
    M libcxx/include/__algorithm/set_intersection.h
    M libcxx/include/__algorithm/simd_utils.h
    M libcxx/include/__algorithm/unique.h
    M libcxx/include/__algorithm/upper_bound.h
    M libcxx/include/__bit/bit_cast.h
    M libcxx/include/__bit/countl.h
    M libcxx/include/__bit/countr.h
    M libcxx/include/__chrono/leap_second.h
    M libcxx/include/__config
    M libcxx/include/__filesystem/path.h
    M libcxx/include/__functional/identity.h
    A libcxx/include/__fwd/get.h
    A libcxx/include/__fwd/variant.h
    M libcxx/include/__math/abs.h
    M libcxx/include/__math/copysign.h
    M libcxx/include/__math/min_max.h
    M libcxx/include/__math/roots.h
    M libcxx/include/__math/rounding_functions.h
    M libcxx/include/__math/traits.h
    M libcxx/include/__memory/allocate_at_least.h
    M libcxx/include/__memory/allocator.h
    M libcxx/include/__memory/allocator_traits.h
    M libcxx/include/__memory/assume_aligned.h
    M libcxx/include/__memory/temporary_buffer.h
    M libcxx/include/__mutex/lock_guard.h
    M libcxx/include/__mutex/unique_lock.h
    M libcxx/include/__ranges/elements_view.h
    M libcxx/include/__utility/forward.h
    M libcxx/include/__utility/move.h
    M libcxx/include/array
    M libcxx/include/barrier
    M libcxx/include/deque
    M libcxx/include/forward_list
    M libcxx/include/future
    M libcxx/include/limits
    M libcxx/include/list
    M libcxx/include/map
    M libcxx/include/math.h
    M libcxx/include/module.modulemap
    M libcxx/include/new
    M libcxx/include/queue
    M libcxx/include/regex
    M libcxx/include/scoped_allocator
    M libcxx/include/set
    M libcxx/include/stack
    M libcxx/include/stdlib.h
    M libcxx/include/string
    M libcxx/include/string_view
    M libcxx/include/type_traits
    M libcxx/include/unordered_map
    M libcxx/include/unordered_set
    M libcxx/include/variant
    M libcxx/include/vector
    M libcxx/test/std/containers/sequences/vector.bool/enabled_hash.pass.cpp
    M libcxx/test/std/diagnostics/syserr/syserr.hash/enabled_hash.pass.cpp
    M libcxx/test/std/experimental/memory/memory.observer.ptr/hash.pass.cpp
    M libcxx/test/std/input.output/filesystems/class.path/path.member/path.hash_enabled.pass.cpp
    M libcxx/test/std/numerics/c.math/signbit.pass.cpp
    M libcxx/test/std/strings/basic.string.hash/enabled_hashes.pass.cpp
    M libcxx/test/std/strings/string.view/string.view.hash/enabled_hashes.pass.cpp
    M libcxx/test/std/thread/thread.threads/thread.thread.class/thread.thread.id/enabled_hashes.pass.cpp
    M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.hash/hash_shared_ptr.pass.cpp
    M libcxx/test/std/utilities/memory/util.smartptr/util.smartptr.hash/hash_unique_ptr.pass.cpp
    M libcxx/test/std/utilities/optional/optional.hash/hash.pass.cpp
    M libcxx/test/std/utilities/template.bitset/bitset.hash/enabled_hash.pass.cpp
    M libcxx/test/std/utilities/type.index/type.index.synopsis/hash_type_index.pass.cpp
    M libcxx/test/std/utilities/variant/variant.hash/hash.pass.cpp
    M libcxx/test/support/poisoned_hash_helper.h
    R libcxx/test/support/test.support/test_poisoned_hash_helper.pass.cpp
    M lld/COFF/DLL.cpp
    M lld/COFF/DLL.h
    M lld/COFF/Driver.cpp
    M lld/COFF/InputFiles.cpp
    M lld/COFF/InputFiles.h
    M lld/COFF/SymbolTable.cpp
    M lld/COFF/SymbolTable.h
    M lld/COFF/Symbols.h
    M lld/COFF/Writer.cpp
    M lld/test/COFF/Inputs/loadconfig-arm64ec.s
    M lld/test/COFF/arm64ec-import.test
    M lldb/include/lldb/Core/SourceManager.h
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
    M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
    M lldb/test/API/lit.cfg.py
    M lldb/test/API/lit.site.cfg.py.in
    M lldb/test/Shell/SymbolFile/DWARF/no_unique_address-with-bitfields.cpp
    M lldb/test/Shell/helper/toolchain.py
    M lldb/test/Shell/lit.site.cfg.py.in
    M llvm/CMakeLists.txt
    M llvm/include/llvm/ADT/DenseMap.h
    M llvm/include/llvm/Analysis/CtxProfAnalysis.h
    M llvm/include/llvm/Analysis/ValueTracking.h
    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/include/llvm/IR/IntrinsicsSPIRV.td
    M llvm/include/llvm/InitializePasses.h
    M llvm/include/llvm/LinkAllPasses.h
    M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
    M llvm/include/llvm/SandboxIR/SandboxIR.h
    M llvm/include/llvm/SandboxIR/SandboxIRValues.def
    M llvm/include/llvm/Transforms/IPO/Attributor.h
    M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
    M llvm/include/llvm/Transforms/Scalar/Scalarizer.h
    M llvm/lib/Analysis/ValueTracking.cpp
    M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
    M llvm/lib/ProfileData/PGOCtxProfReader.cpp
    M llvm/lib/SandboxIR/SandboxIR.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
    M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
    M llvm/lib/Target/DirectX/DXILFinalizeLinkage.cpp
    M llvm/lib/Target/DirectX/DXILFinalizeLinkage.h
    M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
    M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.h
    M llvm/lib/Target/DirectX/DXILPrepare.cpp
    M llvm/lib/Target/DirectX/DirectXTargetMachine.cpp
    M llvm/lib/Target/LoongArch/LoongArchISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXLowerAlloca.cpp
    M llvm/lib/Target/RISCV/RISCVFeatures.td
    M llvm/lib/Target/RISCV/RISCVInstrInfo.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/X86/X86ScheduleZnver4.td
    M llvm/lib/Transforms/Coroutines/CMakeLists.txt
    M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
    M llvm/lib/Transforms/Coroutines/CoroInternal.h
    M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
    M llvm/lib/Transforms/Coroutines/Coroutines.cpp
    A llvm/lib/Transforms/Coroutines/MaterializationUtils.cpp
    A llvm/lib/Transforms/Coroutines/MaterializationUtils.h
    M llvm/lib/Transforms/Coroutines/SpillUtils.cpp
    M llvm/lib/Transforms/Coroutines/SpillUtils.h
    M llvm/lib/Transforms/Coroutines/SuspendCrossingInfo.cpp
    M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
    M llvm/lib/Transforms/IPO/FunctionImport.cpp
    M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
    M llvm/lib/Transforms/Scalar/Scalar.cpp
    M llvm/lib/Transforms/Scalar/Scalarizer.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
    A llvm/test/CodeGen/DirectX/ContainerData/PSVResources.ll
    M llvm/test/CodeGen/DirectX/acos.ll
    M llvm/test/CodeGen/DirectX/asin.ll
    M llvm/test/CodeGen/DirectX/atan.ll
    M llvm/test/CodeGen/DirectX/ceil.ll
    M llvm/test/CodeGen/DirectX/cos.ll
    M llvm/test/CodeGen/DirectX/cosh.ll
    M llvm/test/CodeGen/DirectX/exp2.ll
    M llvm/test/CodeGen/DirectX/fabs.ll
    M llvm/test/CodeGen/DirectX/floor.ll
    M llvm/test/CodeGen/DirectX/isinf.ll
    A llvm/test/CodeGen/DirectX/llc-pipeline.ll
    M llvm/test/CodeGen/DirectX/reversebits.ll
    M llvm/test/CodeGen/DirectX/round.ll
    M llvm/test/CodeGen/DirectX/saturate.ll
    A llvm/test/CodeGen/DirectX/scalar-store.ll
    A llvm/test/CodeGen/DirectX/scalarize-two-calls.ll
    M llvm/test/CodeGen/DirectX/sin.ll
    M llvm/test/CodeGen/DirectX/sinh.ll
    M llvm/test/CodeGen/DirectX/sqrt.ll
    A llvm/test/CodeGen/DirectX/step.ll
    M llvm/test/CodeGen/DirectX/tan.ll
    M llvm/test/CodeGen/DirectX/tanh.ll
    M llvm/test/CodeGen/DirectX/trunc.ll
    M llvm/test/CodeGen/LoongArch/fp16-promote.ll
    M llvm/test/CodeGen/NVPTX/lower-alloca.ll
    M llvm/test/CodeGen/RISCV/double-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/float-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/half-fcmp-strict.ll
    M llvm/test/CodeGen/RISCV/xcvalu.ll
    A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/step.ll
    M llvm/test/MC/RISCV/corev/XCValu-valid.s
    M llvm/test/MC/RISCV/csr-aliases.s
    M llvm/test/MC/RISCV/rv32ih-aliases-valid.s
    M llvm/test/MC/RISCV/rvf-aliases-valid.s
    M llvm/test/MC/RISCV/rvi-aliases-valid.s
    M llvm/test/MC/RISCV/rvzfinx-aliases-valid.s
    A llvm/test/Transforms/Coroutines/gh107139-split-in-scc.ll
    A llvm/test/Transforms/InstCombine/fmod.ll
    M llvm/test/Transforms/InstCombine/pow-1.ll
    M llvm/test/Transforms/InstCombine/rem.ll
    M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
    A llvm/test/Transforms/SLPVectorizer/X86/multi-extracts-bv-combined.ll
    M llvm/test/tools/llvm-dwp/X86/cu_tu_units_manual_v4.s
    M llvm/test/tools/llvm-dwp/X86/cu_tu_units_manual_v5.s
    M llvm/test/tools/llvm-dwp/X86/cu_tu_units_manual_v5_invalid.s
    M llvm/test/tools/llvm-dwp/X86/debug_macro_v5.s
    M llvm/test/tools/llvm-dwp/X86/type_dedup.test
    M llvm/test/tools/llvm-mca/X86/Znver4/zero-idioms.s
    M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
    M llvm/tools/opt/optdriver.cpp
    M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
    M llvm/unittests/SandboxIR/SandboxIRTest.cpp
    M llvm/unittests/SandboxIR/TrackerTest.cpp
    M llvm/utils/gn/build/toolchain/target_flags.gni
    M llvm/utils/gn/secondary/compiler-rt/lib/BUILD.gn
    M llvm/utils/gn/secondary/compiler-rt/lib/asan/BUILD.gn
    M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Transforms/Coroutines/BUILD.gn
    M mlir/cmake/modules/MLIRDetectPythonEnv.cmake
    M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
    M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
    M mlir/lib/Dialect/Transform/Interfaces/TransformInterfaces.cpp
    M mlir/test/CMakeLists.txt
    M mlir/test/Conversion/AMDGPUToROCDL/wmma.mlir
    M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [𝘀𝗽𝗿] changes introduced through rebase

Created using spr 1.3.4

[skip ci]


Compare: https://github.com/llvm/llvm-project/compare/41e1fa020cfe...648f2bbea6af

To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications


More information about the All-commits mailing list