[all-commits] [llvm/llvm-project] 4f90e7: [AMDGPU] Do not count implicit VGPRs in SIInsertWa...
Stanislav Mekhanoshin via All-commits
all-commits at lists.llvm.org
Wed Sep 25 00:42:10 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 4f90e75bdc156d2630da525eb74d00611753c706
https://github.com/llvm/llvm-project/commit/4f90e75bdc156d2630da525eb74d00611753c706
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-09-25 (Wed, 25 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/image-waterfall-loop-O0.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/spill-wait.mir
M llvm/test/CodeGen/AMDGPU/waitcnt-agpr.mir
M llvm/test/CodeGen/AMDGPU/waitcnt.mir
Log Message:
-----------
[AMDGPU] Do not count implicit VGPRs in SIInsertWaitcnts (#109049)
When generating waitcounts before a use or def skip VGPRs. We never have
a real implicit VGPR operands on memory instructions, it is only for
super-reg liveness accounting.
Some other instructions (MOVRELS as an example) may have real implicit
VGPR uses though.
This is less then ideal but most of the problems observed with spills.
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