[all-commits] [llvm/llvm-project] d5b705: [flang] Fixed aarch64 buildbots after #109339.
Fangrui Song via All-commits
all-commits at lists.llvm.org
Tue Sep 24 13:34:27 PDT 2024
Branch: refs/heads/users/MaskRay/spr/clang-add-cc1-output-asm-variant-to-set-output-syntax
Home: https://github.com/llvm/llvm-project
Commit: d5b7050d0a00e93b633ea1c5a03d2c1b4dbfaa77
https://github.com/llvm/llvm-project/commit/d5b7050d0a00e93b633ea1c5a03d2c1b4dbfaa77
Author: Slava Zakharin <szakharin at nvidia.com>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M flang/include/flang/Tools/TargetSetup.h
Log Message:
-----------
[flang] Fixed aarch64 buildbots after #109339.
Commit: 76883932014bcce2efb57be062f901de26317707
https://github.com/llvm/llvm-project/commit/76883932014bcce2efb57be062f901de26317707
Author: vporpo <vporpodas at google.com>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrInterval.h
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/CMakeLists.txt
A llvm/unittests/Transforms/Vectorize/SandboxVectorizer/InstrIntervalTest.cpp
Log Message:
-----------
[SandboxVec] Simple Instruction Interval class (#108882)
An InstrInterval is a range of instructions in a block. The class will
eventually have an API for set operations, like union, intersection etc.
Commit: 594efd262519fb7508cfb44c7c65b608af1394cd
https://github.com/llvm/llvm-project/commit/594efd262519fb7508cfb44c7c65b608af1394cd
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/SandboxVectorizer/BUILD.gn
Log Message:
-----------
[gn build] Port 76883932014b
Commit: b3533a156da92262eb19429d8c12f53e87f5ccec
https://github.com/llvm/llvm-project/commit/b3533a156da92262eb19429d8c12f53e87f5ccec
Author: Tarun Prabhu <tarun at lanl.gov>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
A flang/test/Driver/frecord-command-line.f90
A flang/test/Lower/record-command-line.f90
M flang/tools/bbc/CMakeLists.txt
M flang/tools/bbc/bbc.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/Import/commandline.ll
A mlir/test/Target/LLVMIR/commandline.mlir
Log Message:
-----------
[clang][flang][mlir] Support -frecord-command-line option (#102975)
Add support for the -frecord-command-line option that will produce the
llvm.commandline metadata which will eventually be saved in the object
file. This behavior is also supported in clang. Some refactoring of the
code in flang to handle these command line options was carried out. The
corresponding -grecord-command-line option which saves the command line
in the debug information has not yet been enabled for flang.
Commit: 72a218056d68b7aa65ab3eda56837117bb59f11a
https://github.com/llvm/llvm-project/commit/72a218056d68b7aa65ab3eda56837117bb59f11a
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
Log Message:
-----------
[llvm][Triple] Add `Environment` members and parsing for glibc/musl parity. (#107664)
This adds support for:
* `muslabin32` (MIPS N32)
* `muslabi64` (MIPS N64)
* `muslf32` (LoongArch ILP32F/LP64F)
* `muslsf` (LoongArch ILP32S/LP64S)
As we start adding glibc/musl cross-compilation support for these
targets in Zig, it would make our life easier if LLVM recognized these
triples. I'm hoping this'll be uncontroversial since the same has
already been done for `musleabi`, `musleabihf`, and `muslx32`.
I intentionally left out a musl equivalent of `gnuf64` (LoongArch
ILP32D/LP64D); my understanding is that Loongson ultimately settled on
simply `gnu` for this much more common case, so there doesn't *seem* to
be a particularly compelling reason to add a `muslf64` that's basically
deprecated on arrival.
Note: I don't have commit access.
Commit: e90a73255b4cfb3f8abc369251c8035b837e0042
https://github.com/llvm/llvm-project/commit/e90a73255b4cfb3f8abc369251c8035b837e0042
Author: csstormq <swust_xiaoqiangxu at 163.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/docs/Dialects/Affine.md
Log Message:
-----------
[mlir][docs] Fix incorrect operation name(NFC) (#109261)
Commit: 6b8edc9f7933d59ababd34ff040fab3d16cb3e3b
https://github.com/llvm/llvm-project/commit/6b8edc9f7933d59ababd34ff040fab3d16cb3e3b
Author: csstormq <swust_xiaoqiangxu at 163.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/docs/Tutorials/UnderstandingTheIRStructure.md
M mlir/test/IR/print-ir-nesting.mlir
Log Message:
-----------
[mlir] Fix disagreement between document and test(NFC) (#109257)
Commit: f41f6ea1f33c4f5e7c94f3d155e44292d1809c50
https://github.com/llvm/llvm-project/commit/f41f6ea1f33c4f5e7c94f3d155e44292d1809c50
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/docs/StandardCPlusPlusModules.rst
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/fmodules-embed-all-files.cpp
Log Message:
-----------
[C++20] [Modules] Offer -fmodules-embed-all-files option (#107194)
See
https://discourse.llvm.org/t/rfc-modules-should-we-embed-sources-to-the-bmi/81029
for details.
Close https://github.com/llvm/llvm-project/issues/72383
Commit: b5cdb039712d0c24b0d10c96b6b6d52456088f84
https://github.com/llvm/llvm-project/commit/b5cdb039712d0c24b0d10c96b6b6d52456088f84
Author: Yuxuan Chen <ych at fb.com>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
Log Message:
-----------
[Coroutines] Better optimization remarks for CoroAnnotationElide pass (#109352)
Commit: 95d4c97a20bb46cd7ca9c5389f9ba33f1bf8f7a0
https://github.com/llvm/llvm-project/commit/95d4c97a20bb46cd7ca9c5389f9ba33f1bf8f7a0
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M libc/hdr/CMakeLists.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/wchar_t.h
A libc/hdr/types/wint_t.h
A libc/hdr/wchar_macros.h
A libc/hdr/wchar_overlay.h
M libc/include/llvm-libc-types/wchar_t.h
M libc/include/llvm-libc-types/wint_t.h
M libc/src/__support/CMakeLists.txt
M libc/src/__support/wctype_utils.h
M libc/src/wchar/CMakeLists.txt
M libc/src/wchar/btowc.cpp
M libc/src/wchar/btowc.h
M libc/src/wchar/wctob.cpp
M libc/src/wchar/wctob.h
M libc/test/src/wchar/btowc_test.cpp
Log Message:
-----------
[libc][wchar] Move wchar's types to proxy headers. (#109334)
Also protect against extern inline function definitions added when
building with gcc: https://github.com/llvm/llvm-project/issues/60481.
Commit: 8c3b94f420a20a45dd07f3e12d6a6d649858f452
https://github.com/llvm/llvm-project/commit/8c3b94f420a20a45dd07f3e12d6a6d649858f452
Author: Ben Shi <2283975856 at qq.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/test/MC/AVR/inst-rjmp.s
Log Message:
-----------
[AVR][MC] Fix incorrect range of relative jumps (#109124)
'rjmp .+4094' is legal but rejected by llvm-mc since
86a60e7f1e8f361f84ccb6e656e848dd4fbaa713, and this patch fixed that
range issue.
Commit: 3d0846bedcd18d546fd3733c93c2e144f2faab09
https://github.com/llvm/llvm-project/commit/3d0846bedcd18d546fd3733c93c2e144f2faab09
Author: weiwei chen <weiwei.chen at modular.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86MCInstLower.cpp
Log Message:
-----------
[MC] Explicitly mark MCSymbol for MO_ExternalSymbol (#108880)
- [x] Mark `MCSymbol` for `MO_ExternalSymbol` to be external when
created.
Commit: 5326614e2f84677515c38a17cf2f30cf66deaadc
https://github.com/llvm/llvm-project/commit/5326614e2f84677515c38a17cf2f30cf66deaadc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
Log Message:
-----------
AtomicExpand: Really allow incremental legalization (#108613)
Fix up 100d9b89947bb1d42af20010bb594fa4c02542fc. The iterator
fixes ended up defeating the point, since newly inserted blocks
were not visited. This never erases the current block, so we can
simply not preincrement the block iterator.
The AArch64 FP atomic tests now expand the cmpxchg in the second
round of legalization.
Commit: 1bc59e55ecec984ccdc665c5bf8468d3d65ec086
https://github.com/llvm/llvm-project/commit/1bc59e55ecec984ccdc665c5bf8468d3d65ec086
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M .github/new-prs-labeler.yml
Log Message:
-----------
github: Add tablegen directories to PR autolabeler (#109129)
Commit: 528bcf3a55ca520c31c77ed5fbacf09bff8f39ec
https://github.com/llvm/llvm-project/commit/528bcf3a55ca520c31c77ed5fbacf09bff8f39ec
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
Log Message:
-----------
AMDGPU: Restore deleted test checks from test
These were accidentally removed in 758444ca3e7163a1504eeced3383af861d01d761
Commit: dab3c6d39458fcc0607c678263132d7ca184cddd
https://github.com/llvm/llvm-project/commit/dab3c6d39458fcc0607c678263132d7ca184cddd
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/examples/Attribute/CMakeLists.txt
Log Message:
-----------
[Clang] Change Attribute plugin to link clang-cpp like other examples (#109319)
Change the Attribute example plugin to use clang_target_link_libraries
instead of target_link_libraries so libclang-cpp is linked when the
CLANG_LINK_CLANG_DYLIB CMake option is used.
This change will allow building the plugin on windows when building llvm
and clang as a shared library with explicit visibility macros enabled.
Commit: 5b17f85a7d722439a39f1ac1c554aed7858adab4
https://github.com/llvm/llvm-project/commit/5b17f85a7d722439a39f1ac1c554aed7858adab4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/MC/MCRegister.h
Log Message:
-----------
[CodeGen][MC] Improve DenseMapInfo for Register/MCRegister.
Make getEmptyKey() and getTombstoneKey() return a
Register/MCRegister instead of `unsigned`. Use operator==
isEqual.
Commit: 4f0187d1442273ac54ac11acbbd3b4e1c02008d8
https://github.com/llvm/llvm-project/commit/4f0187d1442273ac54ac11acbbd3b4e1c02008d8
Author: Petr Hosek <phosek at google.com>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M libcxx/src/include/config_elast.h
Log Message:
-----------
[libcxx] No _LIBCPP_ELAST needed for LLVM libc (#108739)
LLVM libc can handle out-of-range errno values.
Commit: e8a739062490ce1bb30974f216ba187cd7b5a2a4
https://github.com/llvm/llvm-project/commit/e8a739062490ce1bb30974f216ba187cd7b5a2a4
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/basic.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir] [LLVM IR] Introduce VaArgOp (#109260)
I find there is no LLVMOp corresponding to LLVM's [va_arg
instruction](https://llvm.org/docs/LangRef.html#va-arg-instruction) so I
tried to add one. This is helpful for clangir
(https://github.com/llvm/clangir/pull/865).
New to MLIR and not sure who are the appropriate reviewers. Appreciated
in ahead for reviewing and triaging.
Commit: b0e68a9a53e6bc1396271ee3d79cb86c8049fe17
https://github.com/llvm/llvm-project/commit/b0e68a9a53e6bc1396271ee3d79cb86c8049fe17
Author: Daniil Kovalev <dkovalev at accesssoftek.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/test/CodeGen/ptrauth-init-fini.c
Log Message:
-----------
[PAC][clang] Use cc1 instead of driver in init-fini codegen test (#109247)
Commit: d2d78e584b7489066772638d1c48db9d61f5a3f7
https://github.com/llvm/llvm-project/commit/d2d78e584b7489066772638d1c48db9d61f5a3f7
Author: Akshat Oke <76596238+Akshat-Oke at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
A llvm/include/llvm/CodeGen/MachineLICM.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AArch64/mlicm-stack-write-check.mir
M llvm/test/CodeGen/AArch64/sme-machine-licm-vg.mir
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/licm-valu.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-convergent.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-copy-like-instrs.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-undef-use.mir
M llvm/test/CodeGen/PowerPC/DisableHoistingDueToBlockHotnessNoProfileData.mir
M llvm/test/CodeGen/PowerPC/DisableHoistingDueToBlockHotnessProfileData.mir
M llvm/test/CodeGen/PowerPC/machinelicm-cse-dead-flag.mir
M llvm/test/CodeGen/X86/machine-licm-vs-wineh.mir
M llvm/test/CodeGen/X86/unfoldMemoryOperand.mir
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
Log Message:
-----------
[NewPM][CodeGen] Port MachineLICM to NPM (#107376)
Commit: 5e7810882c8b58431358cd8da3a329a3c505de2c
https://github.com/llvm/llvm-project/commit/5e7810882c8b58431358cd8da3a329a3c505de2c
Author: Petr Hosek <phosek at google.com>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M libcxx/src/support/runtime/exception_fallback.ipp
M libcxx/src/support/runtime/exception_msvc.ipp
M libcxx/src/support/runtime/exception_pointer_unimplemented.ipp
Log Message:
-----------
[libcxx] Use __libcpp_verbose_abort for error messages (#108873)
Rather than using the following sequence of calls:
```
fprintf(stderr, "...");
::abort();
```
We should use the following:
```
__libcpp_verbose_abort("...")
```
This simplifies the code and ensures the behavior is consistent across
all call sites.
Commit: 173841cc56a12410e6ca7e4a37151d7057c6d20f
https://github.com/llvm/llvm-project/commit/173841cc56a12410e6ca7e4a37151d7057c6d20f
Author: braw-lee <93831198+braw-lee at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
Log Message:
-----------
[TLI] Add basic support for fdim libcall (#108702)
first PR to fix #108695
Signed-off-by: Kushal Pal <kushalpal109 at gmail.com>
Commit: ea578804c81bbad1f31a0c940c8f4378d6893ede
https://github.com/llvm/llvm-project/commit/ea578804c81bbad1f31a0c940c8f4378d6893ede
Author: Nathan Ridge <zeratul976 at hotmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/ASTContext.cpp
M clang/unittests/AST/CMakeLists.txt
A clang/unittests/AST/RawCommentForDeclTest.cpp
Log Message:
-----------
[AST] Ensure getRawCommentsForAnyRedecl() does not miss any redecl with a comment (#108475)
The previous implementation had a bug where, if it was called on a Decl
later in the redecl chain than `LastCheckedDecl`, it could incorrectly
skip and overlook a Decl with a comment.
The patch addresses this by only using `LastCheckedDecl` if the input
Decl `D` is on the path from the first (canonical) Decl to
`LastCheckedDecl`.
An alternative that was considered was to start the iteration from the
(canonical) Decl, however this ran into problems with the modelling of
explicit template specializations in the AST where the canonical Decl
can be unusual. With the current solution, if no Decls were checked yet,
we prefer to check the input Decl over the canonical one.
Fixes https://github.com/llvm/llvm-project/issues/108145
Commit: f9bd08382a4ad84c06e0b572d3b7fc3ecdb81898
https://github.com/llvm/llvm-project/commit/f9bd08382a4ad84c06e0b572d3b7fc3ecdb81898
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
Log Message:
-----------
AMDGPU: Explicitly disable verifier in failing tests
This should fix expensive_checks failures.
These now hit a new verifier error. The first test is explicitly
testing the failing case produces an error, so it should skip
the verifier. The unsupported call tests should also error (although
it would be better if it errored via a different path).
Commit: 1e131ddfa8f1d7b18c85c6e4079458be8b419421
https://github.com/llvm/llvm-project/commit/1e131ddfa8f1d7b18c85c6e4079458be8b419421
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBExecutionContext.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStopHookInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/target/stop-hooks/TestStopHookScripted.py
M lldb/test/API/functionalities/scripted_process/dummy_scripted_process.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
[lldb/Interpreter] Introduce `ScriptedStopHook{,Python}Interface` & make use of it (#105449)
This patch introduces new `ScriptedStopHook{,Python}Interface` classes
that make use of the Scripted Interface infrastructure and makes use of
it in `StopHookScripted`.
It also relax the requirement on the number of argument for initializing
scripting extension if the size of the interface parameter pack contains
1 less element than the extension maximum number of positional arguments
for this initializer.
This addresses the cases where the embedded interpreter session
dictionary is passed to the extension initializer which is not used most
of the time.
---------
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 2c6e5ef6873e9c80190beb62c625e16802c9901d
https://github.com/llvm/llvm-project/commit/2c6e5ef6873e9c80190beb62c625e16802c9901d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
Log Message:
-----------
TLI: Fix test after "Add basic support for fdim libcall"
Commit: 92da37b08f95844576c5d5502712bab0961e2f27
https://github.com/llvm/llvm-project/commit/92da37b08f95844576c5d5502712bab0961e2f27
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/Object/XCOFFObjectFile.h
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/XCOFFObjectFile.cpp
Log Message:
-----------
[Object][NFC] Add extern template declarations needed by llvm-objdump (#109156)
These symbols are implicitly imported from the LLVM shared library by
llvm-objdump on ELF like platforms, but for windows they need to be
explicitly exported when LLVM is built as shared library.
I also add visibility macros for XCOFFObjectFile::getExceptionEntries
that can't automatically be added by clang tooling since it doesn't
store the source locations for explicit function template
instantiations.
Commit: 6611efdf76f6a5355eed05f49d4ec324a224b281
https://github.com/llvm/llvm-project/commit/6611efdf76f6a5355eed05f49d4ec324a224b281
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-19 (Thu, 19 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
Log Message:
-----------
[X86] Use X86AS::GS and X86AS::FS instead of 256 and 257. NFC (#109342)
Commit: ce47e57161fdb51f1eb99b5ca75bcbde2a5c7b03
https://github.com/llvm/llvm-project/commit/ce47e57161fdb51f1eb99b5ca75bcbde2a5c7b03
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/AST/BUILD.gn
Log Message:
-----------
[gn build] Port ea578804c81b
Commit: 400b725c2740ee29560bac9ad870b4ddb56bf3f2
https://github.com/llvm/llvm-project/commit/400b725c2740ee29560bac9ad870b4ddb56bf3f2
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/abs.ll
M llvm/test/Analysis/CostModel/RISCV/fca-load-store.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
M llvm/test/Analysis/CostModel/RISCV/fp-sqrt-pow.ll
M llvm/test/Analysis/CostModel/RISCV/fp-trig-log-exp.ll
M llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
M llvm/test/Analysis/CostModel/RISCV/int-min-max.ll
M llvm/test/Analysis/CostModel/RISCV/int-sat-math.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-add.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-and.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fmaximum.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fminimum.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-max.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-min.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-or.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-xor.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
Log Message:
-----------
[RISCV] Remove -riscv-v-vector-bits-min from cost model tests. NFC
It looks like they were added to prevent fixed length vectors from
being expanded, but that's no longer the case today:
https://reviews.llvm.org/D121447#3376520
Commit: 96ae7c4f1aa02cb10455dda22abbb0b3b2ceaa6b
https://github.com/llvm/llvm-project/commit/96ae7c4f1aa02cb10455dda22abbb0b3b2ceaa6b
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/test/Interpreter/multiline.cpp
M clang/tools/clang-repl/ClangRepl.cpp
Log Message:
-----------
[clang-repl] Implement continuation for preprocessor directives. (#107552)
Commit: f322f4a55e8a60b996a0a9f0b3fe924c7af2cb1b
https://github.com/llvm/llvm-project/commit/f322f4a55e8a60b996a0a9f0b3fe924c7af2cb1b
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[sanitizer_common] Provide dummy ThreadDescriptorSize on Solaris (#109285)
Since 2c69a09bee94acca859a1adf5b04d01dc13f7295, the Solaris build is
broken like
```
Undefined first referenced
symbol in file
_ZN11__sanitizer20ThreadDescriptorSizeEv projects/compiler-rt/lib/sanitizer_common/CMakeFiles/RTSanitizerCommonLibc.i386.dir/sanitizer_linux_libcdep.cpp.o
```
The `ThreadDescriptorSize` reference is from
`sanitizer_linux_libcdep.cpp` (`GetTls`), l.590. This isn't actually
needed on non-glibc targets AFAICS, so this patch provides a dummy to
restore the build.
Tested on `sparcv9-sun-solaris2.11`, `amd64-pc-solaris2.11`, and
`x86_64-pc-linux-gnu`.
Commit: 9e7315912656628b606e884e39cdeb261b476f16
https://github.com/llvm/llvm-project/commit/9e7315912656628b606e884e39cdeb261b476f16
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/EarlyIfConversion.cpp
Log Message:
-----------
[NFC][EarlyIfConverter] Replace boolean Predicate for a class (#108519)
Currently SSAIfConv is used in 2 scenarios. Generalize them to support
more scenarios.
Commit: 3c83102f0615c7d66f6df698ca472ddbf0e9483d
https://github.com/llvm/llvm-project/commit/3c83102f0615c7d66f6df698ca472ddbf0e9483d
Author: Juan Manuel Martinez Caamaño <juamarti at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/EarlyIfConversion.cpp
Log Message:
-----------
[NFC][EarlyIfConverter] Remove unused member variables
Commit: eaeb1fbcc05e15728f5fc96f08da3bcd24b0fc73
https://github.com/llvm/llvm-project/commit/eaeb1fbcc05e15728f5fc96f08da3bcd24b0fc73
Author: David Green <david.green at arm.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
Log Message:
-----------
[AArch64] Cleanup and extend arm64-fp128.ll. NFC
This rewrites the existing tests that load from globals to a more modern style,
and adds vector and GIsel test coverage.
Commit: 0f235573de6386260afcd8fa144d24366927288c
https://github.com/llvm/llvm-project/commit/0f235573de6386260afcd8fa144d24366927288c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pr29222.ll
M llvm/test/CodeGen/X86/shuffle-half.ll
Log Message:
-----------
[X86] Fold broadcast(scalar) -> scalar_to_vector(scalar) if only the lowest element is demanded.
Commit: 9a32f28366b1099b0f5214e62473c0a2a2155434
https://github.com/llvm/llvm-project/commit/9a32f28366b1099b0f5214e62473c0a2a2155434
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Fix a problem with array size limits (#109383)
Descriptor::MaxArrayElemBytes is an unsigned value, which might overflow
the SizeT we have in CheckArraySize.
Commit: 1ed65febd996eaa018164e880c87a9e9afc6f68d
https://github.com/llvm/llvm-project/commit/1ed65febd996eaa018164e880c87a9e9afc6f68d
Author: Nathan Gauër <brioche at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
A clang/test/CodeGenHLSL/convergence/cf.for.plain.hlsl
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.cpp
M llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.h
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
A llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchUnreachable.ll
M llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll
M llvm/test/CodeGen/SPIRV/branching/if-merging.ll
M llvm/test/CodeGen/SPIRV/branching/if-non-merging.ll
M llvm/test/CodeGen/SPIRV/branching/switch-range-check.ll
M llvm/test/CodeGen/SPIRV/instructions/ret-type.ll
M llvm/test/CodeGen/SPIRV/lit.local.cfg
M llvm/test/CodeGen/SPIRV/phi-ptrcast-dominate.ll
R llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.cond-op.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.do.break.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.do.continue.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.do.nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.break.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.continue.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.plain.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.short-circuited-cond.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.if.const-cond.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.if.for.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.if.nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.if.plain.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.logical-and.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.logical-or.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.return.early.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.return.early.simple.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.return.void.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.simple.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.simple2.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.opswitch.literal.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.opswitch.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.opswitch.simple.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.break.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.continue.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.plain.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.short-circuited-cond.ll
A llvm/test/CodeGen/SPIRV/structurizer/condition-linear.ll
A llvm/test/CodeGen/SPIRV/structurizer/do-break.ll
A llvm/test/CodeGen/SPIRV/structurizer/do-continue.ll
A llvm/test/CodeGen/SPIRV/structurizer/do-nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/do-plain.ll
A llvm/test/CodeGen/SPIRV/structurizer/logical-or.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-convergence-in-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-multiple-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-simple-while-identity.ll
A llvm/test/CodeGen/SPIRV/structurizer/return-early.ll
M llvm/tools/spirv-tools/CMakeLists.txt
Log Message:
-----------
[SPIR-V] Add SPIR-V structurizer (#107408)
This commit adds an initial SPIR-V structurizer.
It leverages the previously merged passes, and the convergence region
analysis to determine the correct merge and continue blocks for SPIR-V.
The first part does a branch cleanup (simplifying switches, and
legalizing them), then merge instructions are added to cycles,
convergent and later divergent blocks.
Then comes the important part: splitting critical edges, and making sure
the divergent construct boundaries don't cross.
- we split blocks with multiple headers into 2 blocks.
- we split blocks that are a merge blocks for 2 or more constructs:
SPIR-V spec disallow a merge block to be shared by 2
loop/switch/condition construct.
- we split merge & continue blocks: SPIR-V spec disallow a basic block
to be both a continue block, and a merge block.
- we remove superfluous headers: when a header doesn't bring more info
than the parent on the divergence state, it must be removed.
This PR leverages the merged SPIR-V simulator for testing, as long as
spirv-val. For now, most DXC structurization tests are passing. The
unsupported ones are either caused by unsupported features like switches
on boolean types, or switches in region exits, because the MergeExit
pass doesn't support those yet (there is a FIXME).
This PR is quite large, and the addition not trivial, so I tried to keep
it simple. E.G: as soon as the CFG changes, I recompute the dominator
trees and other structures instead of updating them.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: 2da70572a2564c4250534efd9399a751cde1e962
https://github.com/llvm/llvm-project/commit/2da70572a2564c4250534efd9399a751cde1e962
Author: David Green <david.green at arm.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
Log Message:
-----------
[AArch64][GISel] Scalarize fp128 fadd/fsub/fmul/etc.
Like other fp128/i128 vectors, we scalarize these operations to allow them to
be libcalled.
Commit: 76b827bb4d5b4cc4d3229c4c6de2529e8b156810
https://github.com/llvm/llvm-project/commit/76b827bb4d5b4cc4d3229c4c6de2529e8b156810
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
[lldb] Fix SWIG wrapper compilation error
Introduced by 1e131ddfa8f1d7b18c85c6e4079458be8b419421.
https://lab.llvm.org/buildbot/#/builders/59/builds/5272
Commit: e6eb94d3982cc55b16f62a17177dab7da46ae0f0
https://github.com/llvm/llvm-project/commit/e6eb94d3982cc55b16f62a17177dab7da46ae0f0
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Add missing verifier check for `tosa.reshape` (#109301)
This PR adds a missing verifier check for `tosa.reshape`, ensuring that
the number of elements in `new_shape` matches the number of elements in
the input tensor. Fixes #108151 and fixes #107969.
Commit: 413b12a5aba09f136c51923fe568c7269ef93c35
https://github.com/llvm/llvm-project/commit/413b12a5aba09f136c51923fe568c7269ef93c35
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
Log Message:
-----------
[LV] Add additional tests for UDiv expansion.
Additional tests for https://github.com/llvm/llvm-project/issues/89958,
following discussion at https://github.com/llvm/llvm-project/pull/92177.
Commit: 801046e3303eed43bffebb84e9e505cc19cad5c0
https://github.com/llvm/llvm-project/commit/801046e3303eed43bffebb84e9e505cc19cad5c0
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBExecutionContext.h
R lldb/include/lldb/Interpreter/Interfaces/ScriptedStopHookInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.cpp
R lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/target/stop-hooks/TestStopHookScripted.py
M lldb/test/API/functionalities/scripted_process/dummy_scripted_process.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
Revert "[lldb] Fix SWIG wrapper compilation error"
...and "[lldb/Interpreter] Introduce `ScriptedStopHook{,Python}Interface` & make use of it (#105449)"
This reverts commit 76b827bb4d5b4cc4d3229c4c6de2529e8b156810, and commit 1e131ddfa8f1d7b18c85c6e4079458be8b419421
because the first commit caused the test command-stop-hook-output.test to fail.
Commit: 37e5319a12ba47c18049728804d3d1e1b10c4eb4
https://github.com/llvm/llvm-project/commit/37e5319a12ba47c18049728804d3d1e1b10c4eb4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/unittests/ADT/APIntTest.cpp
M llvm/unittests/ADT/APSIntTest.cpp
M llvm/unittests/ADT/StringExtrasTest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/Support/DivisionByConstantTest.cpp
Log Message:
-----------
[UnitTests] Fix APInt signed flags (NFC)
This makes unit tests compatible with the assertion added in
https://github.com/llvm/llvm-project/pull/106524, by setting the
isSigned flag to the correct value or changing how the value is
constructed.
Commit: a861ed411a359b7cb2b58d642e4a7f2fdcf92057
https://github.com/llvm/llvm-project/commit/a861ed411a359b7cb2b58d642e4a7f2fdcf92057
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-loads-p16.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
Log Message:
-----------
[VPlan] Add initial loop-invariant code motion transform. (#107894)
Add initial transform to move out loop-invariant recipes.
This also helps to fix a divergence between legacy and VPlan-based cost
model due to legacy using ScalarEvolution::isLoopInvariant in some
cases.
Fixes https://github.com/llvm/llvm-project/issues/107501.
PR: https://github.com/llvm/llvm-project/pull/107894
Commit: af4dcbbfe6c7b2c7390a202580e0d2093d2aeb49
https://github.com/llvm/llvm-project/commit/af4dcbbfe6c7b2c7390a202580e0d2093d2aeb49
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/test/Dialect/Affine/invalid.mlir
Log Message:
-----------
[mlir][affine] Verify `map` of affineMaxMinOp has at least one result (#108699)
This PR fixes a bug in `verifyAffineMinMaxOp` that allowed `map` of
`affine.max` and `affine.min` to have an empty result. Fixes #108368.
Commit: e5717fb61d844895d4ca88659646d04ac749bc82
https://github.com/llvm/llvm-project/commit/e5717fb61d844895d4ca88659646d04ac749bc82
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsWebAssembly.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/wasm_simd128.h
M clang/test/CodeGen/builtins-wasm.c
Log Message:
-----------
[clang][wasm] Replace the target iminmax intrinsics with the equivalent generic `__builtin_elementwise_min/max` intrinsics (#109259)
Noticed while working on #109160
Commit: 2c90eb990af176f2b57baecd2920481243845bb9
https://github.com/llvm/llvm-project/commit/2c90eb990af176f2b57baecd2920481243845bb9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsWebAssembly.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/wasm_simd128.h
M clang/test/CodeGen/builtins-wasm.c
Log Message:
-----------
[clang][wasm] Replace the target integer add saturate intrinsics with the equivalent generic `__builtin_elementwise_add_sat` intrinsics (#109269)
Noticed while working on #109160
I've left out the sub_sat intrinsics for now - not sure about the history behind them using Intrinsic::wasm_sub_sat_* instead of Intrinsic::*sub_sat
Commit: 8a36eb83e5309ca14ffa0f9b567206bab7506f94
https://github.com/llvm/llvm-project/commit/8a36eb83e5309ca14ffa0f9b567206bab7506f94
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Change AsmMatcherEmitter to use const RecordKeeper (#109174)
Change AsmMatcherEmitter to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: b594b93024bbe24bddbcc0e54cb5551e0df642cf
https://github.com/llvm/llvm-project/commit/b594b93024bbe24bddbcc0e54cb5551e0df642cf
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/DisassemblerEmitter.cpp
M llvm/utils/TableGen/TableGenBackends.h
Log Message:
-----------
[LLVM][TableGen] Change DisassemblerEmitter to use const RecordKeeper (#109177)
Change DisassemblerEmitter to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: d109636c2ee55f872e846ce11e0e1882382703c1
https://github.com/llvm/llvm-project/commit/d109636c2ee55f872e846ce11e0e1882382703c1
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTableExecutorEmitter.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Change GISelCombinerEmitter to use const RecordKeeper (#109187)
Change GISelCombinerEmitter to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 2b01452c208877e20043c0a643c89bc10be5ca4d
https://github.com/llvm/llvm-project/commit/2b01452c208877e20043c0a643c89bc10be5ca4d
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/TableGen/Common/PredicateExpander.cpp
M llvm/utils/TableGen/Common/PredicateExpander.h
Log Message:
-----------
[LLVM][TableGen] Use const Record pointers in PredicateExpander (#109365)
Use const Record pointers in PredicateExpander.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 708567ab0b585be90f1378ed15b55c31813d23c8
https://github.com/llvm/llvm-project/commit/708567ab0b585be90f1378ed15b55c31813d23c8
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/DAGISelMatcherOpt.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Adopt `indent` for indentation (#109275)
Adopt `indent` for indentation DAGISelMatcher and DecoderEmitter.
Commit: 737c414e1d9578e5037e68e3b3f6ddea507f8243
https://github.com/llvm/llvm-project/commit/737c414e1d9578e5037e68e3b3f6ddea507f8243
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/CommonArgs.h
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.h
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Optimizer/Dialect/Support/FIRContext.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Dialect/Support/FIRContext.cpp
R flang/test/Driver/frecord-command-line.f90
R flang/test/Lower/record-command-line.f90
M flang/tools/bbc/CMakeLists.txt
M flang/tools/bbc/bbc.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Target/LLVMIR/ModuleImport.h
M mlir/include/mlir/Target/LLVMIR/ModuleTranslation.h
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
R mlir/test/Target/LLVMIR/Import/commandline.ll
R mlir/test/Target/LLVMIR/commandline.mlir
Log Message:
-----------
Revert "[clang][flang][mlir] Support -frecord-command-line option (#102975)"
This reverts commit b3533a156da92262eb19429d8c12f53e87f5ccec.
It caused test failures in shared library builds:
https://lab.llvm.org/buildbot/#/builders/80/builds/3854
Commit: 766ec7d50f207b7e17f23b16bdf4fca1cdc8dd23
https://github.com/llvm/llvm-project/commit/766ec7d50f207b7e17f23b16bdf4fca1cdc8dd23
Author: Alexandre Ganea <aganea at havenstudios.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
Log Message:
-----------
[SandboxIR] Silence warning with Clang 19.1.0 on Windows
This fixes:
```
[1832/3777] Building CXX object
lib\SandboxIR\CMakeFiles\LLVMSandboxIR.dir\SandboxIR.cpp.obj
In file included from
C:\src\git\llvm-project\llvm\lib\SandboxIR\SandboxIR.cpp:9:
C:\src\git\llvm-project\llvm\include\llvm/SandboxIR/SandboxIR.h(4400,16):
warning: unqualified friend declaration referring to type outside of the
nearest enclosing namespace is a Microsoft extension; add a nested name
specifier [-Wmicrosoft-unqualified-friend]
4400 | friend class TargetExtType; // For LLVMCtx.
| ^
| ::llvm::
1 warning generated.
```
Commit: d6f91200fe95dbf30a091af3ba039a817e7ddf14
https://github.com/llvm/llvm-project/commit/d6f91200fe95dbf30a091af3ba039a817e7ddf14
Author: Abhina Sreeskantharajan <Abhina.Sreeskantharajan at ibm.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M llvm/lib/Support/FileCollector.cpp
Log Message:
-----------
Revert "[SystemZ][z/OS] Propagate IsText flag continuation"
This reverts commit 3b3accb598ec87a6a30b0e18ded06071030bb78f.
Commit: efdb3ae23247850d3886e3708400f0d991ed59e1
https://github.com/llvm/llvm-project/commit/efdb3ae23247850d3886e3708400f0d991ed59e1
Author: Abhina Sreeskantharajan <Abhina.Sreeskantharajan at ibm.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang-tools-extra/clangd/FS.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/support/ThreadsafeFS.cpp
M clang-tools-extra/clangd/unittests/ClangdTests.cpp
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/SourceManager.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
M clang/unittests/Driver/DistroTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M lldb/unittests/Host/FileSystemTest.cpp
M lldb/unittests/Utility/MockSymlinkFileSystem.h
M llvm/include/llvm/Support/AutoConvert.h
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/lib/Support/AutoConvert.cpp
M llvm/lib/Support/FileCollector.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
Log Message:
-----------
Revert "[SystemZ][z/OS] Propagate IsText parameter to open text files as text (#107906)"
This reverts commit edf3b277a5f2ebe144827ed47463c22743cac5f9.
Commit: 3127b659fad358b135721bd937fead49e5c73de5
https://github.com/llvm/llvm-project/commit/3127b659fad358b135721bd937fead49e5c73de5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/test/CodeGenHLSL/BasicFeatures/OutputArguments.hlsl
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/test/Transforms/CorrelatedValuePropagation/add.ll
M llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
M llvm/test/Transforms/CorrelatedValuePropagation/cond-using-block-value.ll
M llvm/test/Transforms/CorrelatedValuePropagation/select.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
Log Message:
-----------
[CVP] Infer range return attribute (#99620)
We already infer this in IPSCCP (which runs very early, so cannot
benefit from inlining and simplifications) and SCCP (which runs without
PredicateInfo, so does not use assumes). Do it in CVP as well, so it can
handle cases that IPSCCP/SCCP can't.
Fixes https://github.com/llvm/llvm-project/issues/98946 (everything
apart from f2, where the assume is dropped by the frontend).
Commit: cee0bf962648cf69a07e58dd8b02977d2a7e6007
https://github.com/llvm/llvm-project/commit/cee0bf962648cf69a07e58dd8b02977d2a7e6007
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Use Lo_32 and Hi_32 helpers (NFC) (#109413)
Commit: 3bcffe5ccc694d7c40f4bc84bd9ced1cc0e30d5c
https://github.com/llvm/llvm-project/commit/3bcffe5ccc694d7c40f4bc84bd9ced1cc0e30d5c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Fix MSVC implicit shift extension warning.
Commit: 73b8074e68e4b01bd7cb0dd2372af5adc2e89231
https://github.com/llvm/llvm-project/commit/73b8074e68e4b01bd7cb0dd2372af5adc2e89231
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Do not use APInt for simple 64-bit arithmetic. NFC. (#109414)
Commit: 1808fc13c83c0bffb7e61adf1bb26a3097bc3c81
https://github.com/llvm/llvm-project/commit/1808fc13c83c0bffb7e61adf1bb26a3097bc3c81
Author: Matthew Devereau <matthew.devereau at arm.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sdiv.ll
Log Message:
-----------
[AArch64][InstCombine] Bail from combining SRAD on +/-1 divisor (#109274)
This fixes a crash when svdiv's third parameter is svdup_s64(1)
Commit: 2f50b280dc8e995ef67ad31a5f71adc4c270890d
https://github.com/llvm/llvm-project/commit/2f50b280dc8e995ef67ad31a5f71adc4c270890d
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instruction.h
M llvm/lib/SandboxIR/SandboxIR.cpp
Log Message:
-----------
[DebugInfo] Enable deprecation of iterator-insertion methods (#102608)
This is an almost-final step in eliminating debug-intrinsics -- read more
about that here: https://llvm.org/docs/RemoveDIsDebugInfo.html . To
correctly update variable location information in the background when
inserting instructions, we need some information carried at runtime in
BasicBlock::iterator, hence deprecating pointer-insertion.
An immediate fix for any deprecation warnings is to call "getIterator"
on the insertion position pointer. If you intend on inserting at the start
of a block, use BB->begin() or similar methods to fetch the appropriate
iterator.
Commit: c3371a675750b3869354a490aad045c7dcef6891
https://github.com/llvm/llvm-project/commit/c3371a675750b3869354a490aad045c7dcef6891
Author: Victor Campos <victor.campos at arm.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallSet.h
Log Message:
-----------
[ADT][NFC] Style and nit fixes in SmallSet (#108582)
Commit: 03635b3215180f71c81a2ec61008e27f84b09aad
https://github.com/llvm/llvm-project/commit/03635b3215180f71c81a2ec61008e27f84b09aad
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors.cpp
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors.cpp
Log Message:
-----------
[rtsan][compiler-rt] Add 64 bit file interceptors, test for _FILE_OFFSET_BITS (#108057)
>From #107988
We were not intercepting the 64 bit versions of these calls, leading to
tests failing when _FILE_OFFSET_BITS = 64.
Commit: da36603148baf37d3625aa030b4c05bf5785cae2
https://github.com/llvm/llvm-project/commit/da36603148baf37d3625aa030b4c05bf5785cae2
Author: Oleksandr T. <oleksandr.tarasiuk at outlook.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/ext_vector_casts.c
Log Message:
-----------
[Clang] prevented assertion failure by handling integral to boolean conversions for boolean vectors (#108657)
Fixes #108326
Commit: 42b696d7b9942fdf07d65267da40ab178464adaa
https://github.com/llvm/llvm-project/commit/42b696d7b9942fdf07d65267da40ab178464adaa
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
[libc][bazel] Enable software prefetching for memcpy (#108939)
This will affect only Bazel configuration for now.
Commit: 28646d0cc12a01b0de2e4eb982cb91590bc2f84a
https://github.com/llvm/llvm-project/commit/28646d0cc12a01b0de2e4eb982cb91590bc2f84a
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCStreamer.cpp
A llvm/test/MC/ELF/debug-loc-label.s
Log Message:
-----------
[MC] Add .loc_label instruction (#99710)
As discussed in [the
RFC](https://discourse.llvm.org/t/rfc-extending-llvm-mc-loc-directive-with-labeling-support/79608)
we need a way to create labels in the assembler-generated line section
in order to support the future addition of the
[DW_AT_LLVM_stmt_sequence](https://discourse.llvm.org/t/rfc-new-dwarf-attribute-for-symbolication-of-merged-functions/79434)
attribute.
We have a similar precedent for such behavior with the
[.cfi_label](https://github.com/llvm/llvm-project/pull/97922)
instruction - so we add the `.loc_label THE_LABEL_NAME` instruction
which:
- Terminates the current line sequence in the line section
- Creates a new label with the specified label name in the `.debug_line`
section
Commit: c320df4a2c9d7be10caea9a423d2bfbdcaae6a39
https://github.com/llvm/llvm-project/commit/c320df4a2c9d7be10caea9a423d2bfbdcaae6a39
Author: Michal Rostecki <vadorovsky at protonmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/docs/RemoveDIsDebugInfo.md
M llvm/include/llvm-c/Core.h
M llvm/lib/IR/Core.cpp
M llvm/test/Bindings/llvm-c/debug_info_new_format.ll
M llvm/tools/llvm-c-test/debuginfo.c
Log Message:
-----------
[LLVM-C] Add bindings to `Instruction::getDbgRecordRange()` (#107802)
Since the migration from `@llvm.dbg.value` intrinsic to `#dbg_value`
records, there is no way to retrieve the debug records for an
`Instruction` in LLVM-C API.
Previously, with debug info intrinsics, retrieving debug info for an
`Instruction` could be done with `LLVMGetNextInstructions`, because the
intrinsic call was also an instruction.
However, to be able to retrieve debug info with the current LLVM, where
debug records are used, the `getDbgRecordRange()` iterator needs to be
exposed.
Add new functions for DbgRecord sequence traversal:
LLVMGetFirstDbgRecord
LLVMGetLastDbgRecord
LLVMGetNextDbgRecord
LLVMGetPreviousDbgRecord
See llvm/docs/RemoveDIsDebugInfo.md and release notes.
Commit: ef44e4659878f256a46476efcf0398f3dd510f54
https://github.com/llvm/llvm-project/commit/ef44e4659878f256a46476efcf0398f3dd510f54
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M libcxx/include/__algorithm/comp.h
M libcxx/include/__algorithm/ranges_minmax.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__type_traits/desugars_to.h
M libcxx/include/__type_traits/is_trivially_copyable.h
M libcxx/src/algorithm.cpp
Log Message:
-----------
Revert "[libc++] Simplify the implementation of std::sort a bit (#104902)"
This reverts commit d4ffccfce103b01401b8a9222e373f2d404f8439, which
caused a performance regression that needs to be investigated further.
Commit: 57b12e8fbc9bb29ebe8f9d2a0f2c5085b38c2454
https://github.com/llvm/llvm-project/commit/57b12e8fbc9bb29ebe8f9d2a0f2c5085b38c2454
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
Log Message:
-----------
[clangd] Improve robustness when clang-tidy check names contain leading spaces. (#109421)
The current logic assumes that check names do not have leading spaces.
In cases like "-*, clang-diagnostic*", when processing the second check
" clang-diagnostics-*" (with a leading space), the check fails on
`CDPrefix.starts_with(Check)`, resulting in all diagnostics remaining
disabled.
Commit: 9c5ad62e7440423fbcd2d84c8f0347a5f000400e
https://github.com/llvm/llvm-project/commit/9c5ad62e7440423fbcd2d84c8f0347a5f000400e
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
R llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerLowering.cpp
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
Log Message:
-----------
Revert "[RISCV][GISEL] Introduce the RISCVPostLegalizerLowering pass (#108991)"
This reverts commit 64972834c193632cbc47e54c0f0c721636b077e6.
Based on the discussions in #108991 that happened post merge, we have decided
to remove this pass in favor of generating `RISCV::G_*` opcodes in the legalizer.
We may reconsider moving that code elsewhere in the future so that we can do
a better job during generic combines. We don't feel that doing it in instruciton
selection is the right decision today. Firstly, it requires us to manually
do regbankselect on the newly introduced instructions. Secondly, it is more
difficult to test since the test output will contain whatever `RISCV::G_*`
instructions select to (instead of `RISCV::G_*`).
My personal opinion is that the legalizer pass can be split into an early
legalizer and a late legalizer, both before regbankselect. The first legalizer
would not introduce target specific generic opcodes and the generic combiner
would run after it. The second legalizer would introduce the target specific
generic opcodes. I think this approach is better than the lowerer because the
legalizer guarantees that whatever we lower to is legal, and apparently because
it is more performant at compared to the lowerer (although, I'm not sure how
true this is).
Commit: 1553714b0093a8ef907faf3b3145c224caa7364a
https://github.com/llvm/llvm-project/commit/1553714b0093a8ef907faf3b3145c224caa7364a
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/Status.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Utility/Status.cpp
M lldb/unittests/Utility/StatusTest.cpp
Log Message:
-----------
Revert "[lldb] Change the implementation of Status to store an llvm::Error (NFC) (#106774)"
This reverts commit 104b249c236578d298384416c495ff7310b97f4d because
it has caused 2 test failures on Windows:
https://lab.llvm.org/buildbot/#/builders/141/builds/2544
Failed Tests (2):
lldb-api :: functionalities/gdb_remote_client/TestGDBRemotePlatformFile.py
lldb-unit :: Utility/./UtilityTests.exe/StatusTest/ErrorWin32
I reckon the cause is the same, that we construct an error with the Win32
NO_ERROR value which means there was no error but we're assuming anything
with an error code is a failure.
Commit: 4eb98384099cbd1d901d8ef6a210af95d9c36adf
https://github.com/llvm/llvm-project/commit/4eb98384099cbd1d901d8ef6a210af95d9c36adf
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
Log Message:
-----------
[VPlan] Generalize VPValue::isDefinedOutsideLoopRegions.
Update isDefinedOutsideLoopRegions to check if a recipe is defined
outside any region. Split off already approved
https://github.com/llvm/llvm-project/pull/95842 now that this can be
tested separately after landing VPlan-based LICM
https://github.com/llvm/llvm-project/issues/107501
Commit: 86ce8e4504c06ecc3cc42f002ad4eb05cac10925
https://github.com/llvm/llvm-project/commit/86ce8e4504c06ecc3cc42f002ad4eb05cac10925
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV][TTI] Fix potential crash of using dyn_cast() in getIntrinsicInstrCost() NFC. (#109379)
This patch fix the potential crash about using dyn_cast in `vp_cmp`
which is same as #109313.
Check if the IntrinsicCostAttrubute contains underlying instruction
first and cast to the VPCmpIntrinsic.
Commit: d0a7cb709eb282bb1e26d373a1cae97ae3d9372a
https://github.com/llvm/llvm-project/commit/d0a7cb709eb282bb1e26d373a1cae97ae3d9372a
Author: Umang Yadav <29876643+umangyadav at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Target/LLVM/ROCDL/Utils.h
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
M mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
Log Message:
-----------
[ROCDL] Pass `amd_code_object_version` when serializing ROCDL gpu module (#108874)
This PR adds ability to pass non-default value to
`.amdhsa_code_object_version` metadata when serializing ROCDL GPU
modules.
It also fixes typos in two places.
---------
Co-authored-by: Fabian Mora <fmora.dev at gmail.com>
Commit: 9f8f1d9890fcbae96b92fa0bee5a6f9e1f953ebd
https://github.com/llvm/llvm-project/commit/9f8f1d9890fcbae96b92fa0bee5a6f9e1f953ebd
Author: Umang Yadav <29876643+umangyadav at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/lib/ExecutionEngine/RocmRuntimeWrappers.cpp
M mlir/test/Conversion/GPUCommon/lower-memset-to-gpu-runtime-calls.mlir
Log Message:
-----------
[MLIR][AMDGPU] Add ability to do 16-bit Memset with HIP APIs (#108587)
CC: @krzysz00 @manupak
Commit: 69dbf468bf0beb87e2a8d9f9f597296d642028d6
https://github.com/llvm/llvm-project/commit/69dbf468bf0beb87e2a8d9f9f597296d642028d6
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/include/clang/Sema/SemaObjC.h
M clang/lib/Sema/SemaDeclObjC.cpp
Log Message:
-----------
[Sema] Avoid repeated hash lookups (NFC) (#109375)
GlobalMethodPool, the type of MethodPool, is a type wrapping DenseMap
and exposes only a subset of the DenseMap methods.
This patch adds operator[] to GlobalMethodPool so that we can avoid
repeated hash lookups. I don't bother using references or rvalue
references in operator[] because Selector, the key type, is small and
trivially copyable. Note that Selector is a class that wraps a
PointerUnion.
Commit: 78768c52a0e5d9915ee75a190b07114c174ff8cb
https://github.com/llvm/llvm-project/commit/78768c52a0e5d9915ee75a190b07114c174ff8cb
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang-tools-extra/clang-move/HelperDeclRefGraph.cpp
Log Message:
-----------
[clang-move] Avoid repeated hash lookups (NFC) (#109374)
Commit: 7365b1c7bb670d83b66e97628ccfc070c1abed94
https://github.com/llvm/llvm-project/commit/7365b1c7bb670d83b66e97628ccfc070c1abed94
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[TableGen] Eliminate use of `convertInitializerTo` in SearchableTable (#109206)
Eliminate use of `convertInitializerTo` as that needs a non-const
RecordKeeper (which we want to make const).
Commit: c498af71d73e96e95730f3b3caaea08d3edbe62c
https://github.com/llvm/llvm-project/commit/c498af71d73e96e95730f3b3caaea08d3edbe62c
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
Log Message:
-----------
[clang-tidy] Avoid repeated hash lookups (NFC) (#109373)
Commit: 5bcc82d43388bb0daa122d5fe7ecda5eca27fc16
https://github.com/llvm/llvm-project/commit/5bcc82d43388bb0daa122d5fe7ecda5eca27fc16
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopPeel.cpp
A llvm/test/Transforms/LoopUnroll/pr109333.ll
Log Message:
-----------
[LoopPeel] Fix LCSSA phi node invalidation
In the test case, the BECount of the second loop uses %load,
but we only have an LCSSA phi node for %add, so that is what
gets invalidated. Use the forgetLcssaPhiWithNewPredecessor()
API instead, which will invalidate the roots of the expression
instead.
Fixes https://github.com/llvm/llvm-project/issues/109333.
Commit: 20150daafec2d44de1ea8ec6f69ac452cc5d5c1a
https://github.com/llvm/llvm-project/commit/20150daafec2d44de1ea8ec6f69ac452cc5d5c1a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/tools/llvm-c-test/debuginfo.c
Log Message:
-----------
[llvm-c-test] Fix warnings
This patch fixes:
llvm/tools/llvm-c-test/debuginfo.c:254:20: error: unused variable
'AddDbgRecordLast' [-Werror,-Wunused-variable]
llvm/tools/llvm-c-test/debuginfo.c:257:20: error: unused variable
'AddDbgRecordOverTheRange' [-Werror,-Wunused-variable]
llvm/tools/llvm-c-test/debuginfo.c:264:20: error: unused variable
'AddDbgRecordUnderTheRange' [-Werror,-Wunused-variable]
Commit: 0570ba6b05e707b1a1f3208087370b17058e7afb
https://github.com/llvm/llvm-project/commit/0570ba6b05e707b1a1f3208087370b17058e7afb
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
Log Message:
-----------
[AMDGPU][True16][MC] true16 for more VOP1 instructions (#108412)
Support true16 and fake16 format for more VOP1 instructions in MC
This patch updates the true16 and fake16 vop_profile for the following
instructions and update the asm/dasm tests:
V_CVT_F16_U16
V_CVT_F16_I16
V_CVT_U16_F16
V_CVT_I16_F16
V_CVT_NORM_U16_F16
V_CVT_NORM_I16_F16
V_FREXP_EXP_I16_F16
Since this patch introduce fake16 instructions for V_CVT_F16_U16, it
address an issue in fix-sgprs-copy-f16 test which is brought up here
https://github.com/llvm/llvm-project/pull/104510#discussion_r1742499668
Commit: 02071a8d83b963da525236ac2a1bd0299d1647e1
https://github.com/llvm/llvm-project/commit/02071a8d83b963da525236ac2a1bd0299d1647e1
Author: Nico Weber <thakis at chromium.org>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
Revert "[gn build] Port 64972834c193"
This reverts commit 98cf6560ab6df885b6e21463f6a0a1fa5cea1eea.
64972834c193 was reverted in 9c5ad62e7440
Commit: 7f6bbb3c4f2c5f03d2abd3a79c85f1e0e4e03e05
https://github.com/llvm/llvm-project/commit/7f6bbb3c4f2c5f03d2abd3a79c85f1e0e4e03e05
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
M llvm/test/Analysis/CostModel/RISCV/fp-min-max-abs.ll
M llvm/test/Analysis/CostModel/RISCV/fp-sqrt-pow.ll
M llvm/test/Analysis/CostModel/RISCV/fp-trig-log-exp.ll
M llvm/test/Analysis/CostModel/RISCV/gep.ll
M llvm/test/Analysis/CostModel/RISCV/int-sat-math.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/mixed-extracts-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
Log Message:
-----------
[RISCV][TTI] Reduce cost of a build_vector pattern (#108419)
This change is actually two related changes, but they're very hard to
meaningfully separate as the second balances the first, and yet doesn't
do much good on it's own.
First, we can reduce the cost of a build_vector pattern. Our current
costing for this defers to generic insertelement costing which isn't
unreasonable, but also isn't correct. While inserting N elements
requires N-1 slides and N vmv.s.x, doing the full build_vector only
requires N vslide1down. (Note there are other cases that our build
vector lowering can do more cheaply, this is simply the easiest upper
bound which appears to be "good enough" for SLP costing purposes.)
Second, we need to tell SLP that calls don't preserve vector registers.
Without this, SLP will vectorize scalar code which performs e.g. 4 x
float @exp calls as two <2 x float> @exp intrinsic calls. Oddly, the
costing works out that this is in fact the optimal choice - except that
we don't actually have a <2 x float> @exp, and unroll during DAG. This
would be fine (or at least cost neutral) except that the libcall for the
scalar @exp blows all vector registers. So the net effect is we added a
bunch of spills that SLP had no idea about. Thankfully, AArch64 has a
similiar problem, and has taught SLP how to reason about spill cost once
the right TTI hook is implemented.
Now, for some implications...
The SLP solution for spill costing has some inaccuracies. In particular,
it basically just guesses whether a intrinsic will be lowered to a call
or not, and can be wrong in both directions. It also has no mechanism to
differentiate on calling convention.
This has the effect of making partial vectorization (i.e. starting in
scalar) more profitable. In practice, the major effect of this is to
make it more like SLP will vectorize part of a tree in an intersecting
forrest, and then vectorize the remaining tree once those uses have been
removed.
This has the effect of biasing us slightly away from strided, or indexed
loads during vectorization - because the scalar cost is more accurately
modeled, and these instructions look relevatively less profitable.
Commit: 5b7b52f9e9ac783d645f6cfc53a6822be2c40067
https://github.com/llvm/llvm-project/commit/5b7b52f9e9ac783d645f6cfc53a6822be2c40067
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#109372)
Commit: 8db97ae36c586f8e0321b7bc784cda4d8c5bac26
https://github.com/llvm/llvm-project/commit/8db97ae36c586f8e0321b7bc784cda4d8c5bac26
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
Revert "[bazel] Port 64972834c193632cbc47e54c0f0c721636b077e6"
This reverts commit d3532d1b670546dd36e535982d23dfef903cfda0.
The change this adapter for bazel was reverted in 9c5ad62e7440423fbcd2d84c8f0347a5f000400e
Commit: 12e8e0b10c3f52098cc41322c12eb7f3bfd75b06
https://github.com/llvm/llvm-project/commit/12e8e0b10c3f52098cc41322c12eb7f3bfd75b06
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/test/Driver/amdgpu-openmp-toolchain.c
Log Message:
-----------
[AMDGPU] Correctly use the auxiliary toolchain to include libc++ (#109366)
Summary:
Now that we have a functional build for `libc++` on the GPU, it will now
find the target specific headers in `include/amdgcn-amd-amdhsa`. This is
a problem for offloading via OpenMP because we need the CPU and GPU
headers to match exactly. All the other toolchains forward this
correctly except the AMDGPU OpenMP one, fix this by overriding it to use
the host toolchain instead of the device one, so the triple is not
returned as `amdgcn-amd-amdhsa`.
Commit: 33bc6cf619ac8d49232b1bc29ac7d38951583221
https://github.com/llvm/llvm-project/commit/33bc6cf619ac8d49232b1bc29ac7d38951583221
Author: Petr Hosek <phosek at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M libcxxabi/src/abort_message.cpp
M libcxxabi/src/abort_message.h
M libcxxabi/src/cxa_default_handlers.cpp
M libcxxabi/src/cxa_exception_storage.cpp
M libcxxabi/src/cxa_guard_impl.h
M libcxxabi/src/cxa_handlers.cpp
M libcxxabi/src/cxa_thread_atexit.cpp
M libcxxabi/src/cxa_vector.cpp
M libcxxabi/src/cxa_virtual.cpp
M libcxxabi/src/demangle/DemangleConfig.h
M libcxxabi/src/stdlib_new_delete.cpp
Log Message:
-----------
[libcxxabi] Rename abort_message to __abort_message (#108887)
This is an internal API and the name should reflect that.
Commit: c472c9f367e8376fb5cb9bcc954d9c434ecd242a
https://github.com/llvm/llvm-project/commit/c472c9f367e8376fb5cb9bcc954d9c434ecd242a
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaOpenACC.cpp
Log Message:
-----------
[OpenACC] Remove mistakenly left over commented code from a previous
commit
Commit: 739ede400b7aa7dfbec771b0d5e9c47f9da5d6cb
https://github.com/llvm/llvm-project/commit/739ede400b7aa7dfbec771b0d5e9c47f9da5d6cb
Author: Shourya Goel <shouryagoel10000 at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M libc/include/llvm-libc-macros/math-function-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/IsZeroTest.h
A libc/test/include/iszero_test.c
A libc/test/include/iszero_test.cpp
A libc/test/include/iszerof_test.cpp
A libc/test/include/iszerol_test.cpp
Log Message:
-----------
[libc][[math] Implement IsZero Macro (#109336)
#109201
Commit: efb583178d74b2174e8b9660b67ba7295527b09f
https://github.com/llvm/llvm-project/commit/efb583178d74b2174e8b9660b67ba7295527b09f
Author: smanna12 <soumi.manna at intel.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/include/clang/Parse/Parser.h
Log Message:
-----------
[Clang] Prevent Copying of LateParsedClass Instances (#109428)
Class clang::Parser::LateParsedClass owns resources that are freed in
its destructor but has no user-written assignment operator.
This commit explicitly deletes the copy constructor and copy assignment
operator for the LateParsedClass.
Commit: d31e314131b17b0a802a80593a33cb11213c60d1
https://github.com/llvm/llvm-project/commit/d31e314131b17b0a802a80593a33cb11213c60d1
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Analysis/CallGraphSCCPass.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/IRReader/IRReader.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[llvm] Don't call raw_string_ostream::flush() (NFC)
Don't call raw_string_ostream::flush(), which is essentially a no-op.
As specified in the docs, raw_string_ostream is always unbuffered.
( 65b13610a5226b84889b923bae884ba395ad084d for further reference )
Commit: f7c3309b1361443cded697255995fade24838ef8
https://github.com/llvm/llvm-project/commit/f7c3309b1361443cded697255995fade24838ef8
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
Log Message:
-----------
[RISCV] Add coverage for <N x i1> vp.strided.load
These are currently scalarized, and I need something to exercise
<N x i1> scalarization costing. We should probably consider adding
a buildvector intrinsic for this purpose.
Commit: 65bc259a97cd8cc70907b65f59aff728245ba9c0
https://github.com/llvm/llvm-project/commit/65bc259a97cd8cc70907b65f59aff728245ba9c0
Author: Daniil Fukalov <dfukalov at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryBasicBlock.h
M lld/ELF/OutputSections.cpp
M mlir/include/mlir/Bytecode/BytecodeWriter.h
M mlir/lib/Target/SPIRV/SPIRVBinaryUtils.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
M polly/lib/Support/RegisterPasses.cpp
Log Message:
-----------
[NFC] Add explicit #include llvm-config.h where its macros are used, last part. (#107615)
(this is the part related to bolt, lld and mlir)
Without these explicit includes, removing other headers, who implicitly
include llvm-config.h, may have non-trivial side effects. For example,
`clangd` may report even `llvm-config.h` as "no used" in case it defines
a macro, that is explicitly used with #ifdef. It is actually amplified
with different build configs which use different set of macros.
Commit: ebf13086740d714339b5f7a8bdadf9a5e1b754bb
https://github.com/llvm/llvm-project/commit/ebf13086740d714339b5f7a8bdadf9a5e1b754bb
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaOpenACC/compute-construct-intexpr-clause-ast.cpp
Log Message:
-----------
[OpenACC] Ensure clause expressions side-effects don't happen
The OpenACC standard says side-effects/ordering of expressions in
clauses and constructs (not yet, but PR for constructs) cannot be
depended on. We already had infrastructure to ensure constructs, and
non-template clauses did this right, but we had the ordering of a call
vs transform of the clauses happened in tree transform.
This patch ensures that the evaluation context put together for the
construct covers the clauses as well in tree transform.
Commit: d497f465df024068cb2c134cdccd2f76bebd2a1e
https://github.com/llvm/llvm-project/commit/d497f465df024068cb2c134cdccd2f76bebd2a1e
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/test/CodeGen/aarch64-cpu-supports.c
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
M clang/test/Sema/attr-target-clones-aarch64.c
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/lib/Target/AArch64/AArch64FMV.td
Log Message:
-----------
[FMV][AArch64] Unify ls64, ls64_v and ls64_accdata. (#108024)
Originally I tried spliting these features in the compiler with
https://github.com/llvm/llvm-project/pull/101712, but we decided to lump
those features in the ACLE specification (see
https://github.com/ARM-software/acle/pull/346). Since there are no
hardware implementations out there which implement ls64 without ls64_v
or ls64_accdata, this shouldn't be a regression for feature detection.
Commit: fb78495376017111d8b5a1f43745d3c17b0d8978
https://github.com/llvm/llvm-project/commit/fb78495376017111d8b5a1f43745d3c17b0d8978
Author: Prabhuk <prabhukr at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
A clang/lib/Driver/ToolChains/UEFI.cpp
A clang/lib/Driver/ToolChains/UEFI.h
A clang/test/CodeGen/X86/uefi-data-layout.c
A clang/test/Driver/uefi-constructed-args.c
M clang/unittests/Driver/ToolChainTest.cpp
Log Message:
-----------
Reland "[Driver] Add toolchain for X86_64 UEFI target" (#109364)
Reverts llvm/llvm-project#109340
Addressing the failed MAC Clang Driver test as part of this reland.
Commit: 330ecf0c1ab64f406c6db2d61633c2ca18275f36
https://github.com/llvm/llvm-project/commit/330ecf0c1ab64f406c6db2d61633c2ca18275f36
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
Log Message:
-----------
[gn build] Port fb7849537601
Commit: 605420e0a5dc2fe7a13f16a077e044e57f6661af
https://github.com/llvm/llvm-project/commit/605420e0a5dc2fe7a13f16a077e044e57f6661af
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/MC/MCInstrAnalysis.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/lib/MC/MCInstrDesc.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCRegisterInfo.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
Log Message:
-----------
[MC] Use MCRegister and remove implicit casts from MCRegister to unsigned. NFC
Commit: 2162a18fb206736c41c9182737b72ae15d5e6bf0
https://github.com/llvm/llvm-project/commit/2162a18fb206736c41c9182737b72ae15d5e6bf0
Author: Michael Buch <michaelbuch12 at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/test/CodeGen/union-init2.c
Log Message:
-----------
[clang][CodeGen] Check initializer of zero-size fields for nullptr (#109271)
In https://github.com/llvm/llvm-project/pull/96422 we started treating
empty records as zero-sized for the purpose of layout. In `C`, empty
fields were never considered `isZeroSize`, so we would never have tried
to call `Init->hasSideEffects` on them. But since
https://github.com/llvm/llvm-project/pull/96422 we can get here when
compiling `C`, but `Init` need not exist. This patch adds a null-check
to account for this situtation.
Commit: 6d66ac51a49af7ee46f1ccac45d312352d8b942e
https://github.com/llvm/llvm-project/commit/6d66ac51a49af7ee46f1ccac45d312352d8b942e
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
Log Message:
-----------
[libcxx][CMake] Do not hard-code the ABI for the GPU build
Summary:
We specify the ABI to experimental, but we should leave this up to the
user. Primarily this is because we want the ABI to be compatible with
the user's CPU build, so the default should be used.
Commit: cdd71d61664b63ae57bdba9ee0d891f78ef79c07
https://github.com/llvm/llvm-project/commit/cdd71d61664b63ae57bdba9ee0d891f78ef79c07
Author: Krystian Stasiowski <sdkrystian at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
A clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
Log Message:
-----------
[Clang][Sema] Refactor collection of multi-level template argument lists (#106585)
Currently, clang rejects the following explicit specialization of `f`
due to the constraints not being equivalent:
```
template<typename T>
struct A
{
template<bool B>
void f() requires B;
};
template<>
template<bool B>
void A<int>::f() requires B { }
```
This happens because, in most cases, we do not set the flag indicating
whether a `RedeclarableTemplate` is an explicit specialization of a
member of an implicitly instantiated class template specialization until
_after_ we compare constraints for equivalence. This patch addresses the
issue (and a number of other issues) by:
- storing the flag indicating whether a declaration is a member
specialization on a per declaration basis, and
- significantly refactoring `Sema::getTemplateInstantiationArgs` so we
collect the right set of template argument in all cases.
Many of our declaration matching & constraint evaluation woes can be
traced back to bugs in `Sema::getTemplateInstantiationArgs`. This
change/refactor should fix a lot of them. It also paves the way for
fixing #101330 and #105462 per my suggestion in #102267 (which I have
implemented on top of this patch but will merge in a subsequent PR).
Commit: 7f1633c521fbb19ec0d1e1cb47662a5003b51c23
https://github.com/llvm/llvm-project/commit/7f1633c521fbb19ec0d1e1cb47662a5003b51c23
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
Log Message:
-----------
[AMDGPU][True16] vop1 pk instructions profile update (#109228)
Remove dependency on VOPProfileI2F. This is to get ready for the
upcoming VOP3 true16 profile update. No test file changed.
Commit: ccff6cc3b3c2b8920024a18a2a2e2bca502ad942
https://github.com/llvm/llvm-project/commit/ccff6cc3b3c2b8920024a18a2a2e2bca502ad942
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel] Port 65bc259a97cd8cc70907b65f59aff728245ba9c0 (#109458)
Commit: a06529597c72a5b5a5903613e274709f79f82822
https://github.com/llvm/llvm-project/commit/a06529597c72a5b5a5903613e274709f79f82822
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Change RegisterInfoEmitter to use const RecordKeeper (#109237)
Change RegisterInfoEmitter to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 28ad801a7593cdb768bcd8e940ea53507653432d
https://github.com/llvm/llvm-project/commit/28ad801a7593cdb768bcd8e940ea53507653432d
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/test/CodeGen/SPIRV/lit.local.cfg
Log Message:
-----------
[SPIR-V] Enable `spirv-sim` lit substitution unconditionally (#109451)
The uses of spirv-sim aren't gated by LLVM_INCLUDE_SPIRV_TOOLS_TESTS, so
the substitution shouldn't be gated either. Fixes tests after #107408
Commit: 30adb43c897a45c18d7dd163fb4ff40c915fc488
https://github.com/llvm/llvm-project/commit/30adb43c897a45c18d7dd163fb4ff40c915fc488
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/AST/DeclTemplate.cpp
Log Message:
-----------
[AST] Fix a warning
This patch fixes:
clang/lib/AST/DeclTemplate.cpp:466:9: error: unused type alias 'Base'
[-Werror,-Wunused-local-typedef]
Commit: 6af5f87d8d5889888ac27b768652efafb5bb9e40
https://github.com/llvm/llvm-project/commit/6af5f87d8d5889888ac27b768652efafb5bb9e40
Author: Thurston Dang <thurston at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M libcxxabi/src/abort_message.cpp
M libcxxabi/src/abort_message.h
M libcxxabi/src/cxa_default_handlers.cpp
M libcxxabi/src/cxa_exception_storage.cpp
M libcxxabi/src/cxa_guard_impl.h
M libcxxabi/src/cxa_handlers.cpp
M libcxxabi/src/cxa_thread_atexit.cpp
M libcxxabi/src/cxa_vector.cpp
M libcxxabi/src/cxa_virtual.cpp
M libcxxabi/src/demangle/DemangleConfig.h
M libcxxabi/src/stdlib_new_delete.cpp
Log Message:
-----------
Revert "[libcxxabi] Rename abort_message to __abort_message (#108887)"
This reverts commit 33bc6cf619ac8d49232b1bc29ac7d38951583221.
Reason: broke Android buildbot (https://lab.llvm.org/buildbot/#/builders/186/builds/2517)
/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm_build64/bin/clang++ -DHAVE___CXA_THREAD_ATEXIT_IMPL -DLIBCXX_BUILDING_LIBCXXABI -D_LIBCPP_BUILDING_LIBRARY -D_LIBCPP_DISABLE_VISIBILITY_ANNOTATIONS="" -D_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER -D_LIBCXXABI_BUILDING_LIBRARY -D_LIBCXXABI_DISABLE_VISIBILITY_ANNOTATIONS -D_LIBCXXABI_LINK_PTHREAD_LIB -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/libcxxabi/../libcxx/src -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/compiler_rt_build_android_aarch64/lib/fuzzer/libcxx_fuzzer_aarch64/include/c++/v1 -I/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/libcxxabi/include --target=aarch64-linux-android24 --sysroot=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64/sysroot --gcc-toolchain=/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64 -B/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/android_ndk/toolchains/llvm/prebuilt/linux-x86_64 -fvisibility-inlines-hidden -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -Wmisleading-indentation -Wctad-maybe-unsupported -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DNDEBUG -std=c++23 -fPIC -nostdinc++ -fstrict-aliasing -fno-exceptions -D_DEBUG -UNDEBUG -Wall -Wextra -Wnewline-eof -Wshadow -Wwrite-strings -Wno-unused-parameter -Wno-long-long -Werror=return-type -Wextra-semi -Wundef -Wunused-template -Wformat-nonliteral -Wno-user-defined-literals -Wno-covered-switch-default -Wno-suggest-override -Wno-error -fvisibility=hidden -fvisibility-global-new-delete=force-hidden -MD -MT libcxxabi/src/CMakeFiles/cxxabi_static_objects.dir/abort_message.cpp.o -MF libcxxabi/src/CMakeFiles/cxxabi_static_objects.dir/abort_message.cpp.o.d -o libcxxabi/src/CMakeFiles/cxxabi_static_objects.dir/abort_message.cpp.o -c /var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/libcxxabi/src/abort_message.cpp
/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/libcxxabi/src/abort_message.cpp:64:5: error: use of undeclared identifier 'android_set___abort_message'; did you mean 'android_set_abort_message'?
64 | android_set___abort_message(buffer);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~
| android_set_abort_message
/var/lib/buildbot/sanitizer-buildbot6/sanitizer-x86_64-linux-android/build/llvm-project/libcxxabi/src/abort_message.cpp:18:25: note: 'android_set_abort_message' declared here
18 | extern "C" void android_set_abort_message(const char* msg);
| ^
1 error generated.
Commit: 533c7ff2db6e7f78e34fc0cc1f6390645337d964
https://github.com/llvm/llvm-project/commit/533c7ff2db6e7f78e34fc0cc1f6390645337d964
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/include/clang/Sema/SemaObjC.h
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Serialization/ASTReader.cpp
Log Message:
-----------
[Sema] Declare GlobalMethodPool with using (NFC) (#109437)
GlobalMethodPool is a wrapper around DenseMap that does not add
anything except:
using Lists = std::pair<ObjCMethodList, ObjCMethodList>;
This patch removes the wrapper and switches to an alias with "using".
In ReadMethodPool in ASTReader.cpp, we can simplify:
insert(std::make_pair(Sel, SemaObjC::GlobalMethodPool::Lists()))
to:
try_emplace(Sel)
But then try_emplace(Sel).first->second is the same as operator[], so
this patch simplifies the rest of the function.
Commit: 9be7f7748484e4fb6ca653ac92ba0548ef844ce3
https://github.com/llvm/llvm-project/commit/9be7f7748484e4fb6ca653ac92ba0548ef844ce3
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang-tools-extra/clang-move/HelperDeclRefGraph.cpp
Log Message:
-----------
[clang-move] Use a range-based for loop (NFC) (#109438)
Commit: d64fc57353c6e6f5796c97e9dc541ba7a7ab3cb4
https://github.com/llvm/llvm-project/commit/d64fc57353c6e6f5796c97e9dc541ba7a7ab3cb4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
Log Message:
-----------
[TableGen] Use StringSet instead of StringMap (NFC) (#109441)
Commit: 2e0f0a397abb855e72cd9e7ec4ad41cf1a0650ed
https://github.com/llvm/llvm-project/commit/2e0f0a397abb855e72cd9e7ec4ad41cf1a0650ed
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
R llvm/include/llvm/ProfileData/RawMemProfReader.h
Log Message:
-----------
[memprof] Remove RawMemProfReader.h (#109446)
It's been more than five months since RawMemProfReader.h became a
"forwarding" header with:
commit 2bede6873dbe7021b306d3e5bec59d0fba2dd26c
Author: Kazu Hirata <kazu at google.com>
Date: Wed Apr 10 22:03:20 2024 -0700
This patch removes the empty header.
Commit: d8d252fe96877f9fdbf6b0b6c19da543e796bb84
https://github.com/llvm/llvm-project/commit/d8d252fe96877f9fdbf6b0b6c19da543e796bb84
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/test/API/commands/frame/recognizer/Makefile
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
R lldb/test/API/commands/frame/recognizer/categories
A lldb/test/API/commands/frame/recognizer/main.c
R lldb/test/API/commands/frame/recognizer/main.m
M lldb/unittests/Target/StackFrameRecognizerTest.cpp
Log Message:
-----------
[lldb] Add support for disabling frame recognizers (#109219)
Sometimes you only want to temporarily disable a frame recognizer
instead of deleting it. In particular, when dealing with one of the
builtin frame recognizers, which cannot be restored after deletion.
To be able to write test cases for this functionality, I also changed
`lldb/test/API/commands/frame/recognizer` to use normal C instead of
Objective-C
Commit: 65c57066e099fe7f1357485cd6c4fb068bc82323
https://github.com/llvm/llvm-project/commit/65c57066e099fe7f1357485cd6c4fb068bc82323
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/tools/lldb-dap/README.md
Log Message:
-----------
[lldb-dap][docs] Improve README (#109266)
* Document how to procure and configure the `lldb-dap` binary
* Improve documentation for `launch.json`:
* Show the examples before the reference. Most new users just want to
get going, and will only need the reference later on
* Deduplicate the list of "launch" and "attach" config settings
* Remove the `stopOnEntry` setting from "attach", since this is a
launch-only setting
* Document the previously undocumented settings `sourcePath`,
`commandEscapePrefix`, `custom{Frame,Thread}Format`, `runInTerminal`
* Add the settings `debuggerRoot` and `sourceMap` to the common section.
So far they were documented as launch-only settings.
* Document that the Debug Console prints variables / expressions by
default and that LLDB commands need to be escaped.
Commit: 2e414799d0ad511cd7999895014a2cae2ea5e3e3
https://github.com/llvm/llvm-project/commit/2e414799d0ad511cd7999895014a2cae2ea5e3e3
Author: Tyler Nowicki <tyler.nowicki at amd.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Coroutines/CoroSplit.h
A llvm/lib/Transforms/Coroutines/ABI.h
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroInternal.h
M llvm/lib/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
Log Message:
-----------
[Coroutines] ABI Objects to improve code separation between different ABIs, users and utilities. (#109338)
* Adds an ABI object class hierarchy to implement the coroutine ABIs
(Switch, Asyc, and Retcon{Once})
* The ABI object improves the separation of the code related to users,
ABIs and utilities.
* No code changes are required by any existing users.
* Each ABI overrides delegate methods for initialization, building the
coroutine frame and splitting the coroutine, other methods may be added
later.
* CoroSplit invokes a generator lambda to instantiate the ABI object and
calls the ABI object to carry out its primary operations.
See RFC for more info:
https://discourse.llvm.org/t/rfc-abi-objects-for-coroutines/81057
Commit: 751389218edcd29c51a9f1ba159c7870b632fcaa
https://github.com/llvm/llvm-project/commit/751389218edcd29c51a9f1ba159c7870b632fcaa
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
M flang/module/__fortran_builtins.f90
M flang/module/ieee_arithmetic.f90
A flang/test/Semantics/ieee_int.f90
Log Message:
-----------
[flang] Make IEEE_INT and IEEE_REAL into builtin intrinsic functions (#109191)
For proper error detection of bad KIND= arguments, make IEEE_INT and
IEEE_REAL actual intrinsic functions. Lowering will have to check for
the new __builtin_ names.
Commit: e8335aef063e08a7cd8a543d7ab14b20f554c07b
https://github.com/llvm/llvm-project/commit/e8335aef063e08a7cd8a543d7ab14b20f554c07b
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Semantics/bad-forward-type.f90
Log Message:
-----------
[flang] Avoid crash in name resolution on erroneous type extension (#109312)
Don't crash when a bad Fortran program tries to extend a derived type
with previous legitimate forward references but no prior definition.
Fixes https://github.com/llvm/llvm-project/issues/109268.
Commit: 8be575e49816ee6ff0b0b924e0b84b2a9fff98aa
https://github.com/llvm/llvm-project/commit/8be575e49816ee6ff0b0b924e0b84b2a9fff98aa
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/modfile69.f90
Log Message:
-----------
[flang] Fix edge case regression (#109350)
A recent fix to the emission of derived type names to module files
exposed a regression in the case of a derived type that (1) has the same
name as a generic procedure interface and (2) has undergone renaming
through USE association before (3) being used in a declaration
significant to a module procedure interface. Fix.
Commit: 6959ec91d7f8b579a7698cfe244d434b177af493
https://github.com/llvm/llvm-project/commit/6959ec91d7f8b579a7698cfe244d434b177af493
Author: Peter Klausler <pklausler at nvidia.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M flang/lib/Evaluate/intrinsics.cpp
A flang/test/Evaluate/int8.f90
Log Message:
-----------
[flang] Extension intrinsics INT8 and INT2 (#109433)
These are legacy conversion intrinsic functions supported by nearly all
Fortran compilers (esp. INT8).
They are equivalent to INT(..., KIND=8 or 2), respectively.
Commit: 76bc1eddb2cf8b6cc073649ade21b59bbed438a2
https://github.com/llvm/llvm-project/commit/76bc1eddb2cf8b6cc073649ade21b59bbed438a2
Author: Jonathan Tanner <10051116+aDifferentJT at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/lib/Analysis/AliasAnalysis.cpp
Log Message:
-----------
[AA] Take account of C++23's stricter rules for forward declarations (NFC) (#109416)
C++23 has stricter rules for forward declarations around
std::unique_ptr, this means that the inline declaration of the
constructor was failing under clang in C++23 mode, switching to an
out-of-line definition of the constructor fixes this.
This was fairly major impact as it blocked inclusion of a lot of headers
under clang in C++23 mode.
Fixes #106597.
Commit: 2011cbcd84102236dd6d58e2079ac676a3403f25
https://github.com/llvm/llvm-project/commit/2011cbcd84102236dd6d58e2079ac676a3403f25
Author: cmtice <cmtice at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/test/API/tools/lldb-dap/evaluate/main.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/lldb-dap.cpp
Log Message:
-----------
[lldb-dap] Add feature to remember last non-empty expression. (#107485)
Update lldb-dap so if the user just presses return, which sends an empty
expression, it re-evaluates the most recent non-empty
expression/command. Also udpated test to test this case.
Commit: 2672947633865c19c332c8e39f0d11e841e2480f
https://github.com/llvm/llvm-project/commit/2672947633865c19c332c8e39f0d11e841e2480f
Author: Thurston Dang <thurston at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Coroutines/CoroSplit.h
R llvm/lib/Transforms/Coroutines/ABI.h
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroInternal.h
M llvm/lib/Transforms/Coroutines/CoroShape.h
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/Coroutines/Coroutines.cpp
Log Message:
-----------
Revert "[Coroutines] ABI Objects to improve code separation between different ABIs, users and utilities. (#109338)"
This reverts commit 2e414799d0ad511cd7999895014a2cae2ea5e3e3.
Reason: buildbot breakage
(https://lab.llvm.org/buildbot/#/builders/51/builds/4105)
(This was the only new CL.)
/home/b/sanitizer-aarch64-linux/build/llvm-project/llvm/lib/Transforms/Coroutines/ABI.h:71:31: error: 'llvm::coro::AsyncABI' has virtual functions but non-virtual destructor [-Werror,-Wnon-virtual-dtor]
71 | class LLVM_LIBRARY_VISIBILITY AsyncABI : public BaseABI {
etc.
Commit: 07045b567962c86a9e16abc4f3a848ef35a06f5c
https://github.com/llvm/llvm-project/commit/07045b567962c86a9e16abc4f3a848ef35a06f5c
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_context.cpp
Log Message:
-----------
[compiler-rt][rtsan] Create colorized reports (#109419)
Commit: 4d621025d4fc2f2438affdca7a016dd93b56f4e0
https://github.com/llvm/llvm-project/commit/4d621025d4fc2f2438affdca7a016dd93b56f4e0
Author: Chris B <chris.bieneman at me.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Headers/hlsl.h
M clang/test/Preprocessor/predefined-macros-hlsl.hlsl
Log Message:
-----------
[HLSL] Warn about incomplete language support (#108894)
This adds a warning about incomplete language mode support before HLSL
202x. This is the last change in the sequence to fix and make HLSL 202x
the default mode for Clang (#108044).
Fixes #108044
Commit: 4b4ea6d84bddb5e7b3f144d18630390755e8f7b6
https://github.com/llvm/llvm-project/commit/4b4ea6d84bddb5e7b3f144d18630390755e8f7b6
Author: Chris B <chris.bieneman at me.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/test/CodeGenHLSL/builtins/asuint.hlsl
A clang/test/SemaHLSL/BuiltIns/asfloat-constexpr.hlsl
A clang/test/SemaHLSL/BuiltIns/asuint-constexpr.hlsl
Log Message:
-----------
[HLSL] Make casting functions constexpr (#108902)
This marks the `bit_cast` helper as `constexpr` and allows the casts
implemented with it to also be `constexpr`. This is largely not a
functional change, but it enables using the casts in expressions that
need to be resolved at compile time as demonstrated with the static
asserts in the new tests.
---------
Co-authored-by: joaosaffran <126493771+joaosaffran at users.noreply.github.com>
Commit: c24418ad914c64c78facb1bb77951b161448fcc0
https://github.com/llvm/llvm-project/commit/c24418ad914c64c78facb1bb77951b161448fcc0
Author: Afonso Faria <oracle-main at protonmail.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/DanglingHandleCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/dangling-handle.rst
Log Message:
-----------
[clang-tidy] Add `std::span` to default `bugprone-dangling-handle.HandleClasses` (#107711)
`std::span` suffers from the same dangling issues as `std::string_view`.
This patch adds `std::span` to the default list of handle classes in
`bugprone-dangling-handle`, allowing clang-tidy to catch e.g. the
following:
```cpp
span<int> f() {
// All these return values will dangle.
array<int, 1> A;
return {A};
vector<int> Array;
return {Array};
}
```
Commit: b014265d992ce515826a8d3ce378ca1f643e297d
https://github.com/llvm/llvm-project/commit/b014265d992ce515826a8d3ce378ca1f643e297d
Author: Daniel Hernandez-Juarez <dhernandez0 at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[mlir][AMDGPU] New gfx12 barrier instructions and update lowering LDSBarrierOp (#109273)
New gfx12 barrier instructions: s.barrier.signal, s.barrier.wait and
s.wait.dscnt. And update lowering LDSBarrierOp accordingly.
CC: @krzysz00 @manupak @giuseros
Commit: c0b1c623be11593159dc02688baaca96d1e16332
https://github.com/llvm/llvm-project/commit/c0b1c623be11593159dc02688baaca96d1e16332
Author: vporpo <vporpodas at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement ConstantPtrAuth (#109315)
This patch implements sandboxir::ConstantPtrAuth mirroring
llvm::ConstantPtrAuth
Commit: abc2412f077546066289d0e34c3b499d54337446
https://github.com/llvm/llvm-project/commit/abc2412f077546066289d0e34c3b499d54337446
Author: vporpo <vporpodas at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrInterval.h
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/InstrIntervalTest.cpp
Log Message:
-----------
[SandboxVec][InstrInterval] Add ArrayRef constructor (#109357)
The new constructor creates an InstrInterval from an
ArrayRef<Instruction *>. This patch also adds top() and bottom()
getters.
Commit: cdf29709d7554c197b371c83e798bc6335f67a33
https://github.com/llvm/llvm-project/commit/cdf29709d7554c197b371c83e798bc6335f67a33
Author: Florian Mayer <fmayer at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Log Message:
-----------
[NFC] [HWASan] fix LLVM style guide violations
Commit: f732157a9d067e4d300905c831a964222e0eadee
https://github.com/llvm/llvm-project/commit/f732157a9d067e4d300905c831a964222e0eadee
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/bindings/python/python-swigsafecast.swig
M lldb/bindings/python/python-wrapper.swig
M lldb/include/lldb/API/SBExecutionContext.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStopHookInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-forward.h
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Target/Target.cpp
M lldb/test/API/commands/target/stop-hooks/TestStopHookScripted.py
M lldb/test/API/functionalities/scripted_process/dummy_scripted_process.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
[lldb/Interpreter] Introduce ScriptedStopHook{,Python}Interface & make use of it (#109498)
This patch re-lands #105449 and fixes the various test failures.
---------
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: b44da2446b17aaa847bf76f81a01870917f8736b
https://github.com/llvm/llvm-project/commit/b44da2446b17aaa847bf76f81a01870917f8736b
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/Status.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Utility/Status.cpp
M lldb/unittests/Utility/StatusTest.cpp
Log Message:
-----------
[lldb] Change the implementation of Status to store an llvm::Error (NFC) (#106774)
(based on a conversation I had with @labath yesterday in
https://github.com/llvm/llvm-project/pull/106442)
Most APIs that currently vend a Status would be better served by
returning llvm::Expected<> instead. If possibles APIs should be
refactored to avoid Status. The only legitimate long-term uses of Status
are objects that need to store an error for a long time (which should be
questioned as a design decision, too).
This patch makes the transition to llvm::Error easier by making the
places that cannot switch to llvm::Error explicit: They are marked with
a call to Status::clone(). Every other API can and should be refactored
to use llvm::Expected. In the end Status should only be used in very few
places.
Whenever an unchecked Error is dropped by Status it logs this to the
verbose API channel.
Implementation notes:
This patch introduces two new kinds of error_category as well as new
llvm::Error types. Here is the mapping of lldb::ErrorType to
llvm::Errors:
```
(eErrorTypeInvalid)
eErrorTypeGeneric llvm::StringError
eErrorTypePOSIX llvm::ECError
eErrorTypeMachKernel MachKernelError
eErrorTypeExpression llvm::ErrorList<ExpressionError>
eErrorTypeWin32 Win32Error
```
Relanding with built-in cloning support for llvm::ECError, and support
for initializing a Windows error with a NO_ERROR error code.
Commit: 008999ee8c3259ad1d7280eb4350e59ce57eb585
https://github.com/llvm/llvm-project/commit/008999ee8c3259ad1d7280eb4350e59ce57eb585
Author: Ian Wood <75152913+IanWood1 at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M mlir/lib/Pass/PassTiming.cpp
Log Message:
-----------
[MLIR] Fix crash when using --mlir-timing (#109463)
Commit: ce0c41cb0cfe9a48b6ab48784453503d33420763
https://github.com/llvm/llvm-project/commit/ce0c41cb0cfe9a48b6ab48784453503d33420763
Author: davidtrevelyan <davidtrevelyan at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/CMakeLists.txt
M compiler-rt/lib/rtsan/rtsan.cpp
A compiler-rt/lib/rtsan/rtsan_assertions.cpp
A compiler-rt/lib/rtsan/rtsan_assertions.h
M compiler-rt/lib/rtsan/rtsan_context.cpp
M compiler-rt/lib/rtsan/rtsan_context.h
A compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
A compiler-rt/lib/rtsan/rtsan_diagnostics.h
R compiler-rt/lib/rtsan/rtsan_stack.cpp
R compiler-rt/lib/rtsan/rtsan_stack.h
M compiler-rt/lib/rtsan/tests/rtsan_test_context.cpp
Log Message:
-----------
[rtsan][NFC] Move assertions and diagnostics into own impl files (#109500)
In preparation for providing more information to rtsan's diagnostics
output (via `__rtsan_expect_not_realtime`), this PR separates out all
logic for i) making rtsan's assertions about real-time context state and
ii) displaying diagnostics to the user - disentangling them both from
the rtsan `Context`.
We'll follow up this PR with a simplification to the unit tests that
reflect this new separation.
Commit: 0a84f12208a9b66b07df67062b5f7907cab308e9
https://github.com/llvm/llvm-project/commit/0a84f12208a9b66b07df67062b5f7907cab308e9
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan.h
M compiler-rt/lib/rtsan/rtsan_interceptors.cpp
Log Message:
-----------
[rtsan][NFC] Rename _expect_not_realtime function (#109487)
Commit: a9352a0d31862c15146ca863bde165498e9a80e8
https://github.com/llvm/llvm-project/commit/a9352a0d31862c15146ca863bde165498e9a80e8
Author: goldsteinn <35538541+goldsteinn at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll
Log Message:
-----------
[Inliner] Fix bug where attributes are propagated incorrectly (#109347)
- **[Inliner] Add tests for incorrect propagation of return attrs; NFC**
- **[Inliner] Fix bug where attributes are propagated incorrectly**
The bug stems from the fact that we assume the new (inlined) callsite
is calling the same function as the original (callee) callsite. While
this is typically the case, since `VMap` simplifies the new
instructions, callee intrinsics callsites can end up not corresponding
with the same function.
This can lead to buggy propagation.
Commit: 2e89e6b59a32450f43416bfdfb65748ea4606875
https://github.com/llvm/llvm-project/commit/2e89e6b59a32450f43416bfdfb65748ea4606875
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CufImplicitDeviceGlobal.cpp
A flang/test/Fir/CUDA/cuda-implicit-device-global.f90
Log Message:
-----------
[flang][cuda] Flag globals used in device function (#109460)
Commit: 4fd14b9a3afb2ab34dfaa3bc4ed86e82122507be
https://github.com/llvm/llvm-project/commit/4fd14b9a3afb2ab34dfaa3bc4ed86e82122507be
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate pointer/reference in range-for loop (#109361)
Fixes #109358.
Commit: c28e268c32a6840d08e3a4dbc9eeb8a0f564d6c0
https://github.com/llvm/llvm-project/commit/c28e268c32a6840d08e3a4dbc9eeb8a0f564d6c0
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate pointer/reference in `if` statement (#109370)
Fixes #60146.
Commit: 0c9f7ef52739b28f42c03c2bd1c87b744b687e6f
https://github.com/llvm/llvm-project/commit/0c9f7ef52739b28f42c03c2bd1c87b744b687e6f
Author: vporpo <vporpodas at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
Log Message:
-----------
[SandboxVec][DAG] Implement extend(ArrayRef) (#109493)
This builds the DAG from an ArrayRef of Instructions.
Commit: 8a30246f48946b0d2166d98b95b254a1865681ed
https://github.com/llvm/llvm-project/commit/8a30246f48946b0d2166d98b95b254a1865681ed
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/Status.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Utility/Status.cpp
M lldb/unittests/Utility/StatusTest.cpp
Log Message:
-----------
Revert "[lldb] Change the implementation of Status to store an llvm::Error (NFC) (#106774)"
This reverts commit b44da2446b17aaa847bf76f81a01870917f8736b.
Commit: a15f1bfa949ba9f46a04e3972e4b0698ce8f3a01
https://github.com/llvm/llvm-project/commit/a15f1bfa949ba9f46a04e3972e4b0698ce8f3a01
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/test/MC/RISCV/pcrel-fixups.s
Log Message:
-----------
[RISCV] Avoid calling isSymbolRefDifferenceFullyResolvedImpl. NFC
This member function is supposed to be private to MC. Also add an ifunc
test.
Commit: cf85b33e961ec402b325d0a9396babc62625bd5e
https://github.com/llvm/llvm-project/commit/cf85b33e961ec402b325d0a9396babc62625bd5e
Author: davidtrevelyan <davidtrevelyan at users.noreply.github.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
A compiler-rt/lib/rtsan/tests/rtsan_test_assertions.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_context.cpp
Log Message:
-----------
[rtsan] Prune rtsan context and assertions tests (#109503)
Disentangles (and simplifies) integration-like tests for
`__rtsan::ExpectNotRealtime` and `__rtsan::Context` into simpler unit
tests. None of the tests are new, but their assertions have changed to
reflect the more direct testing strategy.
Commit: 2c4da3c44bf66e764642b94335f7d718730055f5
https://github.com/llvm/llvm-project/commit/2c4da3c44bf66e764642b94335f7d718730055f5
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/MC/MCObjectWriter.cpp
Log Message:
-----------
[MC] Remove unneeded null getFragment() check. NFC
Follow-up to d620ba0344c719da51b6067975439ed84024b1ac.
Commit: 68849a878858f981e19c5a664310e0ff059f27e7
https://github.com/llvm/llvm-project/commit/68849a878858f981e19c5a664310e0ff059f27e7
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
Log Message:
-----------
[TableGen] Use StringSet instead of StringMap (NFC) (#109469)
Commit: 0cab475d1126305dc1bbb2ba269e40d704dfb90f
https://github.com/llvm/llvm-project/commit/0cab475d1126305dc1bbb2ba269e40d704dfb90f
Author: Florian Mayer <fmayer at google.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Log Message:
-----------
[NFC] [HWASan] pull removeFnAttributes into function (#109488)
Commit: 0659fd996784cbc2b11379380a03633fa80f7816
https://github.com/llvm/llvm-project/commit/0659fd996784cbc2b11379380a03633fa80f7816
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M clang-tools-extra/clangd/index/Symbol.h
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
Log Message:
-----------
[clangd] Collect comments from function definitions into the index (#67802)
This is useful with projects that put their (doxygen) comments at the
implementation site, rather than the header.
Commit: b84d773fd004ce719da69fbae5ec1dbc2b951230
https://github.com/llvm/llvm-project/commit/b84d773fd004ce719da69fbae5ec1dbc2b951230
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M llvm/include/llvm/Support/Parallel.h
M llvm/lib/Support/Parallel.cpp
M llvm/unittests/Support/ParallelTest.cpp
Log Message:
-----------
[Parallel] Revert sequential task changes
https://reviews.llvm.org/D148728 introduced `bool Sequential` to unify
`execute` and the old `spawn` without argument. However, sequential
tasks might be executed by any worker thread (non-deterministic),
leading to non-determinism output for ld.lld -z nocombreloc (see
https://reviews.llvm.org/D133003).
In addition, the extra member variables have overhead.
This sequential task has only been used for lld parallel relocation
scanning.
This patch restores the behavior before https://reviews.llvm.org/D148728 .
Fix #105958
Pull Request: https://github.com/llvm/llvm-project/pull/109084
Commit: 0b0874755d4f339ae3ef6a43421405ebe9d645f3
https://github.com/llvm/llvm-project/commit/0b0874755d4f339ae3ef6a43421405ebe9d645f3
Author: Akshat Oke <76596238+Akshat-Oke at users.noreply.github.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
A llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
M llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/spill192.mir
Log Message:
-----------
[AMDGPU][NewPM] Port SILowerSGPRSpills to NPM (#108934)
Commit: f760db124972a07ead0976d3c7b2cb309a0f6acb
https://github.com/llvm/llvm-project/commit/f760db124972a07ead0976d3c7b2cb309a0f6acb
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
A flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
Log Message:
-----------
[flang][cuda][NFC] Expose conversion patterns from CUF to FIR calls (#109465)
Expose conversion patterns so they can be reused outside of this pass.
Commit: 18225c783a00bde62f19a177a57de388e20c2bba
https://github.com/llvm/llvm-project/commit/18225c783a00bde62f19a177a57de388e20c2bba
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-20 (Fri, 20 Sep 2024)
Changed paths:
M llvm/include/llvm/MC/MCStreamer.h
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
Log Message:
-----------
[ARM] Use MCRegister in 2 functions in ARMTargetStreamer. NFC
Commit: d7db094340600828a0a62374627f324fb66af020
https://github.com/llvm/llvm-project/commit/d7db094340600828a0a62374627f324fb66af020
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
Log Message:
-----------
[AMDGPU] Avoid repeated hash lookups (NFC) (#109506)
Commit: 97aa8cc94d94e8f0adc85489f7832ba7c0a9b577
https://github.com/llvm/llvm-project/commit/97aa8cc94d94e8f0adc85489f7832ba7c0a9b577
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/CodeGenCXX/weak-init.cpp
Log Message:
-----------
[clang][bytecode] Diagnose weak reads in final load (#109515)
They aren't allowed here either.
Commit: f5f61c802e9bb9504082f9e0f41926f5d2ab7115
https://github.com/llvm/llvm-project/commit/f5f61c802e9bb9504082f9e0f41926f5d2ab7115
Author: Tarık Çelik <141952517+tarik-celik at users.noreply.github.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
A clang/README.md
R clang/README.txt
Log Message:
-----------
Updated and renamed README.txt to README.md (#106198)
Co-authored-by: Tarık Çelik <tarik.celik.0000 at protonmail.com>
Commit: c57b9f5a138d9a7ce0744e4fdb85ff31dc5f2cac
https://github.com/llvm/llvm-project/commit/c57b9f5a138d9a7ce0744e4fdb85ff31dc5f2cac
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/Sema/annotate-type.c
Log Message:
-----------
[clang][bytecode] Fix reporting non-constant variables in C (#109516)
We need to call FFDiag() to get the usual "invalid subexpression"
diagnostic.
Commit: 8527861179ac7771bae09e2fcb0eece4b589d747
https://github.com/llvm/llvm-project/commit/8527861179ac7771bae09e2fcb0eece4b589d747
Author: Matthias Springer <me at m-sp.org>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M mlir/lib/Transforms/Utils/DialectConversion.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Unify materialization of value replacements (#108381)
PR #106760 aligned the handling of dropped block arguments and dropped
op results. The two helper functions that insert source materializations
for uses of replaced block arguments / op results that survived the
conversion are now almost identical (`legalizeConvertedArgumentTypes`
and `legalizeConvertedOpResultTypes`). This PR merges the two functions
and moves the implementation directly into `finalize`.
This PR simplifies the code base and improves the efficiency a bit:
previously, `finalize` iterated over
`ConversionPatternRewriterImpl::rewrites` twice. Now, only one iteration
is needed.
---------
Co-authored-by: Jakub Kuderski <jakub at nod-labs.com>
Commit: 5b4c80f1234f176c19bdbe687861e7f076ec189a
https://github.com/llvm/llvm-project/commit/5b4c80f1234f176c19bdbe687861e7f076ec189a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/codegen.m
Log Message:
-----------
[clang][bytecode] Create dummy pointers for ObjCStringLiterals (#109520)
We need to have the final APValue point to the ObjCStringLiteral
expression, not the StringLiteral itself.
Commit: f5a65d8752f26245744ae3e1365cc3ac283c2638
https://github.com/llvm/llvm-project/commit/f5a65d8752f26245744ae3e1365cc3ac283c2638
Author: yronglin <yronglin777 at gmail.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/constexpr-vectors.cpp
M clang/test/AST/ByteCode/vectors.cpp
M clang/test/SemaCXX/constexpr-vectors.cpp
Log Message:
-----------
[clang][bytecode] Implement arithmetic, bitwise and compound assignment operator (#108949)
Implement `+`, `-`, `*`, `/` , `%`, `&`, `|`, `^`, `<<`, `>>` and
compound assignment operator.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: fc5de0af33b7fb9b9f745e70dcd351f2de4211cb
https://github.com/llvm/llvm-project/commit/fc5de0af33b7fb9b9f745e70dcd351f2de4211cb
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/unittests/clang-tidy/ClangTidyTest.h
M clang-tools-extra/unittests/clang-tidy/IncludeCleanerTest.cpp
M clang-tools-extra/unittests/clang-tidy/IncludeInserterTest.cpp
M clang-tools-extra/unittests/clang-tidy/NamespaceAliaserTest.cpp
M clang-tools-extra/unittests/clang-tidy/ReadabilityModuleTest.cpp
M clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp
M clang-tools-extra/unittests/clang-tidy/UsingInserterTest.cpp
Log Message:
-----------
[clang-tools-extra] Use {} instead of std::nullopt to initialize empty ArrayRef (#109400)
Follow up to #109133.
Commit: eb6e7e8f89a3d5c1cbc9856774ca00208753fb12
https://github.com/llvm/llvm-project/commit/eb6e7e8f89a3d5c1cbc9856774ca00208753fb12
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
M llvm/unittests/CodeGen/LexicalScopesTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineBasicBlockTest.cpp
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/Support/ConvertUTFTest.cpp
M llvm/unittests/Support/SourceMgrTest.cpp
M llvm/unittests/Transforms/Utils/CloningTest.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
Log Message:
-----------
[unittests] Use {} instead of std::nullopt to initialize empty ArrayRef (#109388)
Follow up to #109133.
Commit: bd8fe9972e3f17776e4e05e69e13ab8271d34132
https://github.com/llvm/llvm-project/commit/bd8fe9972e3f17776e4e05e69e13ab8271d34132
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
A llvm/test/Transforms/LoopVectorize/invariant-replicate-region.ll
Log Message:
-----------
[VPlan] Mov licm to end of VPlan optimizations.
This moves licm after expanding replicate regions. This fixes a crash
when trying to hoist a predicated VPReplicateRecipes which later get
expanded to replicate regions.
Hoisting replicate regions out was not intended (see the discussion and
at the review and comment on shallow traversal in licm()).
Fixes https://github.com/llvm/llvm-project/issues/109510.
Commit: 58e05779b483bb3d9f734bd09f5cb2241431a0b7
https://github.com/llvm/llvm-project/commit/58e05779b483bb3d9f734bd09f5cb2241431a0b7
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
R llvm/test/Transforms/LoopVectorize/invariant-replicate-region.ll
Log Message:
-----------
[LV] Move test requiring AArch64 to target subdir.
The test added in bd8fe9972e3f depends on the AArch64. Move it.
Commit: c9e5c42ad1bba84670d6f7ebe7859f4f12063c5a
https://github.com/llvm/llvm-project/commit/c9e5c42ad1bba84670d6f7ebe7859f4f12063c5a
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[X86,SimplifyCFG][NFC] Refactor code for #108812 (#109398)
Commit: 8f31ee996ae21ee77db29abb02a3aef4750e6d35
https://github.com/llvm/llvm-project/commit/8f31ee996ae21ee77db29abb02a3aef4750e6d35
Author: vporpo <vporpodas at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
Log Message:
-----------
[SandboxVec][DAG] Implement DGNode::isMem() (#109504)
DGNode::isMem() returns true if the node is a memory dependency
candidate.
Commit: 041b0a81b05cb20f0ece49bc72d3f6f611095ee0
https://github.com/llvm/llvm-project/commit/041b0a81b05cb20f0ece49bc72d3f6f611095ee0
Author: wang-y-z <57429717+wang-y-z at users.noreply.github.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M mlir/lib/IR/Operation.cpp
A mlir/test/Pass/scf-to-cf-and-print-liveness.mlir
Log Message:
-----------
[MLIR][Operation] Fix `isBeforeInBlock` crash bug mentioned in https://github.com/llvm/llvm-project/issues/60909 (#101172)
# summary
This MR fix `isBeforeInBlock` crash bug mentioned in
https://github.com/llvm/llvm-project/issues/60909. Fixes #60909.
# Trigger condition
1. A block only have one operation.
2. `block->isOpOrderValid()` is true, but `op->hasValidOrder()` is
false.
3. call: `op->isBeforeInBlock(op)`, compared with op itself.
Will crash on `assert(blockFront != blockBack && "expected more than one
operation");`
# Case study
Simplified repro case in
`mlir/test/Pass/scf2cf-print-liveness-crash.mlir`
When put `-convert-scf-to-cf -test-print-liveness` together in one cmd
line, the first pass will work normally and crash on the second pass.
Details please refer https://github.com/llvm/llvm-project/issues/60909
# Solutions
option1. in `isBeforeInBlock`, check if block only have one operation
before step into `updateOrderIfNecessary`, if have only one, it must
return false
option2. in `isBeforeInBlock`, check if `this == other`, if true return
false
option3. fix `addNodeToList` logic
I prefer option3:
When a block contains only one operation and the user calls
op->isBeforeInBlock(op), if block->isOpOrderValid() returns true,
updateOrderIfNecessary is called. If op->hasValidOrder() is false, it
will crash at the assertion assert(blockFront != blockBack && "expected
more than one operation");.
This behavior is abnormal and needs fixing. I discovered that after the
first pass of `-convert-scf-to-cf`, there is a block with only one
operation where the block order is valid but the operation order is
invalid, leading to a crash when `-test-print-liveness` pass runs.
---------
Co-authored-by: isaacw <isaacw at nvidia.com>
Commit: 2f664f2bdf2a3974f5c35ea0278239011181eb87
https://github.com/llvm/llvm-project/commit/2f664f2bdf2a3974f5c35ea0278239011181eb87
Author: Matteo Franciolini <mfranciolini at tesla.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/test/Dialect/Linalg/mesh-sharding-propagation.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
Log Message:
-----------
[mlir][mesh] Fix empty `split_axes` sharding annotation (#108236)
The `split_axes` attribute is defined as "array attribute of array
attributes". Following the definition, empty `split_axes` values should
not be allowed, since that would break the definition and would lead to
invalid IR. In such scenario, passes leveraging the mesh dialect can
observe:
* crashes in sharding-propagation;
* creation of null MeshShardingAttrs in spmdization;
* non roundtrippable IR.
The patch prevents `split_axes` to become empty by modifying the
`removeTrailingEmptySubArray` such that a minimum size of one is
guaranteed when constructing the attribute, and adds a test that would
crash without the change.
Commit: 56124feeb81e60695246c7dcd8d638cd1288b52b
https://github.com/llvm/llvm-project/commit/56124feeb81e60695246c7dcd8d638cd1288b52b
Author: Shourya Goel <shouryagoel10000 at gmail.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/math-function-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/FpClassifyTest.h
A libc/test/include/fpclassify_test.c
A libc/test/include/fpclassify_test.cpp
A libc/test/include/fpclassifyf_test.cpp
A libc/test/include/fpclassifyl_test.cpp
Log Message:
-----------
[libc][math] Implement fpclassify macro. (#109519)
#109201
Commit: 1b6019388c17657c1c07f1e3123a7b4000f94490
https://github.com/llvm/llvm-project/commit/1b6019388c17657c1c07f1e3123a7b4000f94490
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan.h
M compiler-rt/lib/rtsan/rtsan_assertions.cpp
M compiler-rt/lib/rtsan/rtsan_assertions.h
M compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.h
M compiler-rt/lib/rtsan/tests/rtsan_test_assertions.cpp
A compiler-rt/test/rtsan/blocking_call.cpp
Log Message:
-----------
[rtsan][compiler-rt] Introduce __rtsan_notify_blocking_call (#109529)
# Why?
In llvm, we need to add a call to `__rtsan_notify_blocking_call()` when
a function is marked `[[clang::blocking]]`. This will produce a
different error message than a call to an unsafe malloc etc
Commit: 8d0336c14be9d1f99e5c2b5791d8f4df35725ff2
https://github.com/llvm/llvm-project/commit/8d0336c14be9d1f99e5c2b5791d8f4df35725ff2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
Log Message:
-----------
[clang-offload-bundler] Avoid repeated hash lookups (NFC) (#109507)
Commit: 22486e031d13cad3df99be5ab6d860920b71fc80
https://github.com/llvm/llvm-project/commit/22486e031d13cad3df99be5ab6d860920b71fc80
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
Log Message:
-----------
[LiveDebugValues] Avoid repeated hash lookups (NFC) (#109509)
Commit: f76375d9d47894de6665a662811471614b9c5b8b
https://github.com/llvm/llvm-project/commit/f76375d9d47894de6665a662811471614b9c5b8b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
Log Message:
-----------
[SPIRV] Avoid repeated hash lookups (NFC) (#109517)
Commit: 27ad4b03e7622e397dca8185bf783cd3006b95c5
https://github.com/llvm/llvm-project/commit/27ad4b03e7622e397dca8185bf783cd3006b95c5
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
Log Message:
-----------
[SandboxVec][DAG][NFC] Fix typo
Commit: d2969022640a94b26b7324241e13d67080554d9f
https://github.com/llvm/llvm-project/commit/d2969022640a94b26b7324241e13d67080554d9f
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/include/clang/Basic/TokenKinds.def
Log Message:
-----------
[Clang] Remove __is_nullptr from the list of type traits
Commit: b177a9b6efb64d1683ea13adc4eb2105fdeae224
https://github.com/llvm/llvm-project/commit/b177a9b6efb64d1683ea13adc4eb2105fdeae224
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M libcxx/include/__config
Log Message:
-----------
[libc++][NFC] Remove _LIBCPP_HAS_NO_NOEXCEPT
This macro is never used, so we can drop the definition of it too.
Commit: 6b56a273490e403957eb3fd7d772d8769423a718
https://github.com/llvm/llvm-project/commit/6b56a273490e403957eb3fd7d772d8769423a718
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
Log Message:
-----------
[ELF] Replace config-> with ctx.arg. in LTO.cpp
Commit: bb0a6f252fe8cb2e5e4f9c26ec2eeda5a8b514fb
https://github.com/llvm/llvm-project/commit/bb0a6f252fe8cb2e5e4f9c26ec2eeda5a8b514fb
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
Log Message:
-----------
[ELF] Pass Ctx to LinkerScript. NFC
Commit: 9b7a22ebb52e56246e8bf319c82eaa30cca52e18
https://github.com/llvm/llvm-project/commit/9b7a22ebb52e56246e8bf319c82eaa30cca52e18
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/LinkerScript.cpp
Log Message:
-----------
[ELF] Replace config-> with ctx.arg. in LinkerScript
Commit: 39e30508a7f6ec5477b11611946a491af5ebdeda
https://github.com/llvm/llvm-project/commit/39e30508a7f6ec5477b11611946a491af5ebdeda
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/test/Preprocessor/predefined-arch-macros.c
Log Message:
-----------
[Driver][Sparc] Default to -mcpu=v9 for 32-bit Linux/sparc64 (#109278)
While working on supporting PR #109101 on Linux/sparc64, I was reminded
that `clang -m32` still defaults to generating V8 code, although the
64-bit kernel requires a V9 CPU.
This patch corrects that.
Tested on `sparc64-unknown-linux-gnu`, `x86_64-pc-linux-gnu`,
`sparcv9-sun-solaris2.11`, and `amd64-pc-solaris2.11`.
Commit: f86050de738385ecc27e7ce827f72296be8def36
https://github.com/llvm/llvm-project/commit/f86050de738385ecc27e7ce827f72296be8def36
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/cxx17.cpp
Log Message:
-----------
[clang][bytecode] Don't call checkLiteralType() in visitInitializer() (#109530)
We were calling checkLiteralType() too many time and rejecting some
things we shouldn't. Add The calls manually when handling
MaterializeTemporaryExprs. Maybe we should call it in other places as
well, but adding more calls is easier than removing them from a generic
code path.
Commit: cf57a670bb3b85a362098b931a3176f2debe6a6a
https://github.com/llvm/llvm-project/commit/cf57a670bb3b85a362098b931a3176f2debe6a6a
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/ScriptParser.h
Log Message:
-----------
[ELF] ScriptParser: pass Ctx to ScriptParser and ScriptLexer. NFC
Commit: a04db2c7a6f46ea147e7635dbfe349c68341c897
https://github.com/llvm/llvm-project/commit/a04db2c7a6f46ea147e7635dbfe349c68341c897
Author: davidtrevelyan <davidtrevelyan at users.noreply.github.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/CMakeLists.txt
M compiler-rt/lib/rtsan/rtsan.cpp
R compiler-rt/lib/rtsan/rtsan_assertions.cpp
M compiler-rt/lib/rtsan/rtsan_assertions.h
M compiler-rt/lib/rtsan/tests/rtsan_test_assertions.cpp
Log Message:
-----------
[rtsan] Decouple assertions from error actions (#109535)
Decouples sanitizer assertion `ExpectNotRealtime` from the action that
should happen if a real-time context is detected.
Commit: 6032feee339bbd20a2f91cca61fa9fb722aabe82
https://github.com/llvm/llvm-project/commit/6032feee339bbd20a2f91cca61fa9fb722aabe82
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_context.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_context.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors.cpp
Log Message:
-----------
[rtsan][NFC] Standardize lambda function case, fix autos (#109541)
Commit: 8ec406757cb92f352888a3d4092397f2b5a7d1d9
https://github.com/llvm/llvm-project/commit/8ec406757cb92f352888a3d4092397f2b5a7d1d9
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
A llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/AArch64/arbitrary-induction-step.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
A llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
Log Message:
-----------
[VPlan] Implement unrolling as VPlan-to-VPlan transform. (#95842)
This patch implements explicit unrolling by UF as VPlan transform. In
follow up patches this will allow simplifying VPTransform state (no need
to store unrolled parts) as well as recipe execution (no need to
generate code for multiple parts in an each recipe). It also allows for
more general optimziations (e.g. avoid generating code for recipes that
are uniform-across parts).
It also unifies the logic dealing with unrolled parts in a single place,
rather than spreading it out across multiple places (e.g. VPlan post
processing for header-phi recipes previously.)
In the initial implementation, a number of recipes still take the
unrolled part as additional, optional argument, if their execution
depends on the unrolled part.
The computation for start/step values for scalable inductions changed
slightly. Previously the step would be computed as scalar and then
splatted, now vscale gets splatted and multiplied by the step in a
vector mul.
This has been split off https://github.com/llvm/llvm-project/pull/94339
which also includes changes to simplify VPTransfomState and recipes'
::execute.
The current version mostly leaves existing ::execute untouched and
instead sets VPTransfomState::UF to 1.
A follow-up patch will clean up all references to VPTransformState::UF.
Another follow-up patch will simplify VPTransformState to only store a
single vector value per VPValue.
PR: https://github.com/llvm/llvm-project/pull/95842
Commit: 33204002f6420bbe39fabdab674fce911bc7d0ed
https://github.com/llvm/llvm-project/commit/33204002f6420bbe39fabdab674fce911bc7d0ed
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/ScriptParser.cpp
Log Message:
-----------
[ELF] ScriptParser: make Ctx & a member variable. NFC
Lambda captures need adjusting.
Commit: 49ec508596ff13601788d073e3f6e77498658187
https://github.com/llvm/llvm-project/commit/49ec508596ff13601788d073e3f6e77498658187
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
Log Message:
-----------
[ELF] Pass Ctx & to Writer. NFC
Commit: 1dd9a565eae55edbc74822c29aa1f8ac2bc3e88b
https://github.com/llvm/llvm-project/commit/1dd9a565eae55edbc74822c29aa1f8ac2bc3e88b
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
Log Message:
-----------
[ELF] Replace config-> with ctx.arg. in Arch/
Commit: 86fb006e7f48822bbf2a7e83abf2a659e798c243
https://github.com/llvm/llvm-project/commit/86fb006e7f48822bbf2a7e83abf2a659e798c243
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 8ec406757cb9
Commit: b620fde2be98d181d41f95691a150923ab1e978e
https://github.com/llvm/llvm-project/commit/b620fde2be98d181d41f95691a150923ab1e978e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp
Log Message:
-----------
[NFC][sanitizer] Early returns in `DTLS_on_tls_get_addr` (#109539)
Commit: f379b634359003df0a6f8458fc49b4a17764fdd8
https://github.com/llvm/llvm-project/commit/f379b634359003df0a6f8458fc49b4a17764fdd8
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
A llvm/test/tools/llvm-readobj/COFF/arm64ec-chpe.yaml
R llvm/test/tools/llvm-readobj/arm64ec-chpe.yaml
Log Message:
-----------
[llvm-readobj][NFC] Move arm64ec-chpe.yaml to COFF subdirectory
Commit: eba30b3370e1269ec9772e75c3818080cb1f272a
https://github.com/llvm/llvm-project/commit/eba30b3370e1269ec9772e75c3818080cb1f272a
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
Log Message:
-----------
[ELF] Replace config-> with ctx.arg. in [IS]*.cpp
Commit: 37bb9ad12836685d9e07792478ffc12470861bd0
https://github.com/llvm/llvm-project/commit/37bb9ad12836685d9e07792478ffc12470861bd0
Author: David Green <david.green at arm.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
Log Message:
-----------
[AArch64] Regenerate GlobalISel legalize-cmp.mir tests. NFC
Commit: 6dcd0d4b50ff3da15c316daad9b29633612664f6
https://github.com/llvm/llvm-project/commit/6dcd0d4b50ff3da15c316daad9b29633612664f6
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp
Log Message:
-----------
[NFC][sanitizer] Update `DTLS_on_tls_get_addr` failure comment (#109546)
Also return `nullptr` on failure. All callers
do nothing for `nullptr` or `{tls_beg, 0}`,
but with `nullptr` they continue earlier.
Commit: c3f9b736c48700db267cdbd22ce510b9978cbdf6
https://github.com/llvm/llvm-project/commit/c3f9b736c48700db267cdbd22ce510b9978cbdf6
Author: David Green <david.green at arm.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
Log Message:
-----------
[AArch64] Treat fp128 G_FNEG like G_FABS
These fp128 G_FNEG operations should be treated more like G_FABS, where the
operation is lowered to simple integer arithmetic. All other operations are the
same between the two ActionDefinitionsBuilders.
Commit: e45fc5140df7bb60242a989ac7fc5cd0c0563234
https://github.com/llvm/llvm-project/commit/e45fc5140df7bb60242a989ac7fc5cd0c0563234
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
Log Message:
-----------
[Linalg][Vectorization] Add support for linalg vectorization of a tensor.extract case (#107922)
In https://github.com/llvm/llvm-project/pull/102321 we relaxed the
vectorizer so that when checking for contiguous loads we dont always
have a trailing non unit dim. For example in the test case added we have
`tensor<8x1xf32>` which is now a valid candidate for contiguous load.
However, the logic to check contiguous load assumed that only the
trailing dim will be non unit so this PR just updates that logic to find
the actual non unit dim.
Commit: 1818ca5c4ae87ed222a18177caa7c8dde6c67efa
https://github.com/llvm/llvm-project/commit/1818ca5c4ae87ed222a18177caa7c8dde6c67efa
Author: Martin Storsjö <martin at martin.st>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/DeclTemplate.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateDeductionGuide.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderDecl.cpp
M clang/lib/Serialization/ASTWriterDecl.cpp
R clang/test/CXX/temp/temp.constr/temp.constr.decl/p4.cpp
Log Message:
-----------
Revert "[Clang][Sema] Refactor collection of multi-level template argument lists (#106585)"
This reverts commit cdd71d61664b63ae57bdba9ee0d891f78ef79c07 (and
30adb43c897a45c18d7dd163fb4ff40c915fc488).
This change broke compiling Qt, see
https://github.com/llvm/llvm-project/pull/106585#issuecomment-2365309463
for details.
Commit: f264d9a9d56f165777f0e1750b3bdb74059fffd0
https://github.com/llvm/llvm-project/commit/f264d9a9d56f165777f0e1750b3bdb74059fffd0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Log Message:
-----------
[Linalg] Fix a warning
This patch fixes:
mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp:821:12: error:
variable 'countNonUnitDim' set but not used
[-Werror,-Wunused-but-set-variable]
Commit: da38e1d5a962b45fd95034fc0a00f26526ec3c70
https://github.com/llvm/llvm-project/commit/da38e1d5a962b45fd95034fc0a00f26526ec3c70
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang-tools-extra/modularize/Modularize.cpp
Log Message:
-----------
[modularize] Avoid repeated hash lookups (NFC) (#109508)
Co-authored-by: Nikita Popov <github at npopov.com>
Commit: dc2deb53131b9d4c5e881229190bdda1ca3ea47f
https://github.com/llvm/llvm-project/commit/dc2deb53131b9d4c5e881229190bdda1ca3ea47f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
Log Message:
-----------
[SLP]Vectorize gathered loads
Final gather/buildvector nodes may have scalar loads, which are not
vectorized (since they are part of the gather nodes) but may form full
vector loads, being combined. This patch walks over all gather nodes,
"gathering" and sorting gathered scalar loads and then tries to build
vector loads, which later are reshuffled between the gather nodes.
It allows later to add support for segmented loads (kind of AOS to SOA
load kind for RISC-V RVV) and may help with the removal of the alternat
e opcodes support.
Currently, alternate nodes may depend on each other because of the
consecutive loads between their operands. Because of that we cannot
simply remove alternate vectorization. But this approach may help to
remove most of the stuff for it, since we'll be able to vectorize loads
in between lanes.
Metric: size..text, AVX512
Program size..text
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 238381.00 250669.00 5.2%
test-suite :: SingleSource/UnitTests/Vectorizer/VPlanNativePath/outer-loop-vect.test 25753.00 26329.00 2.2%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-psadbw.test 3028.00 3092.00 2.1%
test-suite :: MultiSource/Benchmarks/Rodinia/hotspot/hotspot.test 4243.00 4275.00 0.8%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 649765.00 653877.00 0.6%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 649765.00 653877.00 0.6%
test-suite :: SingleSource/Benchmarks/BenchmarkGame/n-body.test 4199.00 4222.00 0.5%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-mask_set_bw.test 12933.00 12997.00 0.5%
test-suite :: SingleSource/Benchmarks/Misc/flops.test 8282.00 8314.00 0.4%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-unpack_msasm.test 10065.00 10097.00 0.3%
test-suite :: SingleSource/Benchmarks/Misc-C++/Large/ray.test 5160.00 5176.00 0.3%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12472220.00 12509612.00 0.3%
test-suite :: MultiSource/Benchmarks/Prolangs-C++/city/city.test 6908.00 6924.00 0.2%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 202830.00 203278.00 0.2%
test-suite :: SingleSource/Benchmarks/CoyoteBench/fftbench.test 9133.00 9149.00 0.2%
test-suite :: MultiSource/Benchmarks/Olden/power/power.test 6792.00 6803.00 0.2%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1395585.00 1397473.00 0.1%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1395585.00 1397473.00 0.1%
test-suite :: External/SPEC/CINT2017speed/631.deepsjeng_s/631.deepsjeng_s.test 97662.00 97758.00 0.1%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 595179.00 595739.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/miniAMR.test 70603.00 70667.00 0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/unix-smail/unix-smail.test 19877.00 19893.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/PENNANT.test 90231.00 90279.00 0.1%
test-suite :: External/SPEC/CINT2006/473.astar/473.astar.test 33738.00 33754.00 0.0%
test-suite :: External/SPEC/CFP2017speed/619.lbm_s/619.lbm_s.test 13262.00 13268.00 0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 1139964.00 1140460.00 0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 849507.00 849875.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 1158379.00 1158859.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CoMD.test 38724.00 38740.00 0.0%
test-suite :: External/SPEC/CFP2006/470.lbm/470.lbm.test 15180.00 15186.00 0.0%
test-suite :: External/SPEC/CFP2017rate/519.lbm_r/519.lbm_r.test 15484.00 15490.00 0.0%
test-suite :: External/SPEC/CINT2006/456.hmmer/456.hmmer.test 167391.00 167455.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/ControlFlow-dbl/ControlFlow-dbl.test 137448.00 137496.00 0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2030254.00 2030766.00 0.0%
test-suite :: MicroBenchmarks/LCALS/SubsetALambdaLoops/lcalsALambda.test 302870.00 302934.00 0.0%
test-suite :: MicroBenchmarks/LCALS/SubsetARawLoops/lcalsARaw.test 303126.00 303190.00 0.0%
test-suite :: External/SPEC/CFP2006/444.namd/444.namd.test 241107.00 241155.00 0.0%
test-suite :: External/SPEC/CFP2006/482.sphinx3/482.sphinx3.test 162974.00 163006.00 0.0%
test-suite :: MultiSource/Applications/siod/siod.test 167168.00 167200.00 0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 1048796.00 1048988.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CLAMR.test 201623.00 201655.00 0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 501734.00 501798.00 0.0%
test-suite :: MultiSource/Applications/ClamAV/clamscan.test 580888.00 580952.00 0.0%
test-suite :: MultiSource/Benchmarks/MallocBench/gs/gs.test 168319.00 168335.00 0.0%
test-suite :: MicroBenchmarks/ImageProcessing/Interpolation/Interpolation.test 226022.00 226038.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/StatementReordering-flt/StatementReordering-flt.test 118011.00 118015.00 0.0%
test-suite :: External/SPEC/CINT2006/471.omnetpp/471.omnetpp.test 550589.00 550605.00 0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 3072477.00 3072541.00 0.0%
test-suite :: External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk.test 2385563.00 2385579.00 0.0%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 389171.00 389155.00 -0.0%
test-suite :: MultiSource/Applications/lua/lua.test 234764.00 234748.00 -0.0%
test-suite :: MultiSource/Benchmarks/mafft/pairlocalalign.test 227694.00 227678.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/NodeSplitting-flt/NodeSplitting-flt.test 119819.00 119807.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/Recurrences-flt/Recurrences-flt.test 117995.00 117983.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/InductionVariable-flt/InductionVariable-flt.test 123610.00 123594.00 -0.0%
test-suite :: MultiSource/Benchmarks/FreeBench/pifft/pifft.test 81414.00 81398.00 -0.0%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 782040.00 781880.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 9597420.00 9595292.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 9597420.00 9595292.00 -0.0%
test-suite :: External/SPEC/CINT2006/445.gobmk/445.gobmk.test 911832.00 911608.00 -0.0%
test-suite :: MultiSource/Applications/oggenc/oggenc.test 192507.00 192459.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/LoopRestructuring-flt/LoopRestructuring-flt.test 122843.00 122811.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-flt/CrossingThresholds-flt.test 122292.00 122260.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 777363.00 777155.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/Expansion-flt/Expansion-flt.test 123265.00 123205.00 -0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 315534.00 315358.00 -0.1%
test-suite :: MultiSource/Benchmarks/TSVC/ControlFlow-flt/ControlFlow-flt.test 128163.00 128083.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 6562.00 6555.00 -0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/compiler/compiler.test 23428.00 23396.00 -0.1%
test-suite :: MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow.test 22749.00 22717.00 -0.1%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39549.00 39485.00 -0.2%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39546.00 39482.00 -0.2%
test-suite :: MultiSource/Benchmarks/Prolangs-C/bison/mybison.test 57214.00 57118.00 -0.2%
test-suite :: SingleSource/Benchmarks/Adobe-C++/loop_unroll.test 413668.00 412804.00 -0.2%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1044047.00 1041487.00 -0.2%
test-suite :: MultiSource/Benchmarks/McCat/18-imp/imp.test 12414.00 12382.00 -0.3%
test-suite :: MultiSource/Benchmarks/Prolangs-C/gnugo/gnugo.test 31161.00 30969.00 -0.6%
test-suite :: MultiSource/Benchmarks/MallocBench/espresso/espresso.test 224726.00 223254.00 -0.7%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 93512.00 92824.00 -0.7%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 281151.00 278463.00 -1.0%
test-suite :: MultiSource/Benchmarks/Olden/tsp/tsp.test 2820.00 2788.00 -1.1%
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 156819.00 154739.00 -1.3%
test-suite :: MultiSource/Benchmarks/MiBench/security-blowfish/security-blowfish.test 11560.00 11160.00 -3.5%
test-suite :: MultiSource/Benchmarks/McCat/08-main/main.test 6734.00 6382.00 -5.2%
results results0 diff
ASCI_Purple/SMG2000 - extra vector code
VPlanNativePath/outer-loop-vect - extra vectorization, better vector
code
AVX512BWVL/Vector-AVX512BWVL-psadbw - better vector code
Rodinia/hotspot - small variations
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - extra vector code, better vectorization
BenchmarkGame/n-body - better vector code.
AVX512BWVL/Vector-AVX512BWVL-unpack_msasm - small variations
Misc/flops - extra vector code
AVX512BWVL/Vector-AVX512BWVL-mask_set_bw - small variations
Misc-C++/Large - better vector code
CFP2017rate/526.blender_r - extra vector code
Prolangs-C++/city - extra vector code
MiBench/consumer-lame - extra vector code
CoyoteBench/fftbench - extra vector code
Olden/power - better vector code
CFP2017rate/538.imagick_r
CFP2017speed/638.imagick_s - extra vector code
CINT2017rate/531.deepsjeng_r - extra vector code
CFP2006/447.dealII - small variations
DOE-ProxyApps-C/miniAMR - small variations
Prolangs-C/unix-smail - small variations
DOE-ProxyApps-C++/PENNANT - small variations
CINT2006/473.astar - small variations
CFP2006/453.povray - small variations
JM/lencod - extra vector code
CFP2017rate/511.povray_r - small variations
DOE-ProxyApps-C/CoMD - small variations
CFP2006/470.lbm - extra vector code
CFP2017speed/619.lbm_s
CFP2017rate/519.lbm_r - extra vector code
CINT2006/456.hmmer - extra code vectorized
TSVC/ControlFlow-dbl - extra vector code
CFP2017rate/510.parest_r - better vector code
LCALS/SubsetALambdaLoops - extra code vectorized
LCALS/SubsetARawLoops - extra code vectorized
CFP2006/444.namd - extra code vectorized
CFP2006/482.sphinx3 - better vector code
Applications/siod - better vector code
Benchmarks/7zip - better vector code
DOE-ProxyApps-C++/CLAMR - extra code vectorized
Applications/sqlite3 - extra code vectorized
Applications/ClamAV - smaller vector code
MallocBench/gs - small variations
MicroBenchmarks/ImageProcessing - small variations
TSVC/StatementReordering-flt - extra code vectorized
CINT2006/471.omnetpp - small variations
CINT2006/403.gcc - extra code vectorized
CINT2006/483.xalancbmk - extra code vectorized
JM/ldecod - small variations
Applications/lua - extra code vectorized
mafft/pairlocalalign - small variations
TSVC/NodeSplitting-flt - extra code vectorized
TSVC/Recurrences-flt - extra code vectorized
TSVC/InductionVariable-flt - extra code vectorized
FreeBench/pifft - small variations
CINT2006/464.h264ref - extra code vectorized
CINT2017speed/602.gcc_s
CINT2017rate/502.gcc_r - some extra code vectorized, extra code inlined
CINT2006/445.gobmk - small variations
Applications/oggenc - small variations
TSVC/LoopRestructuring-flt - extra code vectorized
TSVC/CrossingThresholds-flt - extra code vectorized
CFP2017rate/508.namd_r - small variations
TSVC/ControlFlow-flt - extra code vectorized
mediabench/g721 - small variations
Prolangs-C/compiler - small variations
FreeBench/fourinarow - better vector code
MiBench/telecomm-gsm - small variation in vector code
mediabench/gsm - same
Prolangs-C/bison - small variations
Adobe-C++/loop_unroll - extra code vectorized
Benchmarks/tramp3d-v4 - extra code gets inlined, small changes in vetor
code
McCat/18-imp - variations in vector code
Prolangs-C/gnugo - variations in vector code
MallocBench/espresso - extra code vectorized
DOE-ProxyApps-C++/miniFE - small variations in vector code
Prolangs-C/TimberWolfMC - extra code vectorized, small changes in
previously vectorized code.
Olden/tsp - small changes in vector code
CFP2006/433.milc - extra code gets inlined, vectorized 2 x stores to 4 x stores
MiBench/security-blowfish - extra code vectorized
McCat/08-main - better vector code.
Metric: size..text, RISCV, sifive-p670
Program size..text
results results0 diff
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 63580.00 64020.00 0.7%
test-suite :: MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan.test 21388.00 21406.00 0.1%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 296992.00 297088.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 968112.00 968208.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/StatementReordering-dbl/StatementReordering-dbl.test 45160.00 45164.00 0.0%
test-suite :: External/SPEC/CINT2017rate/523.xalancbmk_r/523.xalancbmk_r.test 2635902.00 2635854.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/623.xalancbmk_s/623.xalancbmk_s.test 2635902.00 2635854.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 7568730.00 7568578.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 7568730.00 7568578.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-flt/CrossingThresholds-flt.test 49764.00 49762.00 -0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 449132.00 449108.00 -0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 695932.00 695892.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 508820.00 508788.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 508820.00 508788.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 9594152.00 9593336.00 -0.0%
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 166522.00 166490.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 722252.00 722092.00 -0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 27554.00 27546.00 -0.0%
test-suite :: SingleSource/UnitTests/Vectorizer/VPlanNativePath/outer-loop-vect.test 10900.00 10896.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-dbl/CrossingThresholds-dbl.test 46754.00 46732.00 -0.0%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 631570.00 631226.00 -0.1%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 850698.00 850218.00 -0.1%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 24816.00 24800.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 24814.00 24798.00 -0.1%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 1599946.00 1598394.00 -0.1%
test-suite :: MultiSource/Applications/hbd/hbd.test 27236.00 27204.00 -0.1%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 293848.00 293480.00 -0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/compiler/compiler.test 20160.00 20048.00 -0.6%
test-suite :: MultiSource/Benchmarks/MallocBench/espresso/espresso.test 182088.00 181040.00 -0.6%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 4788.00 4748.00 -0.8%
DOE-ProxyApps-C++/miniFE - extra vector code
MiBench/automotive-susan - small variations
Benchmarks/Bullet - extra vector code
CFP2017rate/511.povray_r - slightly better vector code
TSVC/StatementReordering-dbl - small variations
CINT2017rate/523.xalancbmk_r
CINT2017speed/623.xalancbmk_s - extra vector code
CINT2017rate/502.gcc_r
CINT2017speed/602.gcc_s - extra vector code
TSVC/CrossingThresholds-flt - small variations
Applications/sqlite3 - extra vector code
JM/lencod - extra vector code, small variations
CINT2017rate/525.x264_r
CINT2017speed/625.x264_s - small variations
CFP2017rate/526.blender_r - extra vector code, small variations
DOE-ProxyApps-C/miniGMG - small variations
Vectorizer/VPlanNativePath/outer-loop-vect - small variations
TSVC/CrossingThresholds-dbl - small variations
Benchmarks/tramp3d-v4 - small variations
Benchmarks/7zip - extra vector code
MiBench/telecomm-gsm - small variations
mediabench/gsm/toast - small variations
CFP2017rate/510.parest_r - extra vector code
Applications/hbd - extra vector code
JM/ldecod - better vector code
Prolangs-C/compiler - extra vector code
MallocBench/espresso - extra vector code
mediabench/g721/g721encode - extra vectorization
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/107461
Commit: c64277d1b480cee80a1f3c25ea03dd64f5199037
https://github.com/llvm/llvm-project/commit/c64277d1b480cee80a1f3c25ea03dd64f5199037
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Speculatively fix older MSVC after &ctx change
https://lab.llvm.org/buildbot/#/builders/107/builds/3155
```
error C2039: 'ctx': is not a member of '`anonymous-namespace'::Writer<ELFT>::fixSectionAlignments::<lambda_38c4af40b02773e966aeff2e6bd45bf2>'
```
Commit: e588fd994fe8ce0fa7804284f2a2a9a6922980fd
https://github.com/llvm/llvm-project/commit/e588fd994fe8ce0fa7804284f2a2a9a6922980fd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
Log Message:
-----------
Revert "[SLP]Vectorize gathered loads"
This reverts commit dc2deb53131b9d4c5e881229190bdda1ca3ea47f to fix the
issue reported in https://lab.llvm.org/buildbot/#/builders/25/builds/2668
Commit: 1833d418a04123916c1dbeb0c41c8bc7d06b779b
https://github.com/llvm/llvm-project/commit/1833d418a04123916c1dbeb0c41c8bc7d06b779b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
Log Message:
-----------
[SLP]Vectorize gathered loads
Final gather/buildvector nodes may have scalar loads, which are not
vectorized (since they are part of the gather nodes) but may form full
vector loads, being combined. This patch walks over all gather nodes,
"gathering" and sorting gathered scalar loads and then tries to build
vector loads, which later are reshuffled between the gather nodes.
It allows later to add support for segmented loads (kind of AOS to SOA
load kind for RISC-V RVV) and may help with the removal of the alternat
e opcodes support.
Currently, alternate nodes may depend on each other because of the
consecutive loads between their operands. Because of that we cannot
simply remove alternate vectorization. But this approach may help to
remove most of the stuff for it, since we'll be able to vectorize loads
in between lanes.
Metric: size..text, AVX512
Program size..text
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 238381.00 250669.00 5.2%
test-suite :: SingleSource/UnitTests/Vectorizer/VPlanNativePath/outer-loop-vect.test 25753.00 26329.00 2.2%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-psadbw.test 3028.00 3092.00 2.1%
test-suite :: MultiSource/Benchmarks/Rodinia/hotspot/hotspot.test 4243.00 4275.00 0.8%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 649765.00 653877.00 0.6%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 649765.00 653877.00 0.6%
test-suite :: SingleSource/Benchmarks/BenchmarkGame/n-body.test 4199.00 4222.00 0.5%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-mask_set_bw.test 12933.00 12997.00 0.5%
test-suite :: SingleSource/Benchmarks/Misc/flops.test 8282.00 8314.00 0.4%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-unpack_msasm.test 10065.00 10097.00 0.3%
test-suite :: SingleSource/Benchmarks/Misc-C++/Large/ray.test 5160.00 5176.00 0.3%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12472220.00 12509612.00 0.3%
test-suite :: MultiSource/Benchmarks/Prolangs-C++/city/city.test 6908.00 6924.00 0.2%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 202830.00 203278.00 0.2%
test-suite :: SingleSource/Benchmarks/CoyoteBench/fftbench.test 9133.00 9149.00 0.2%
test-suite :: MultiSource/Benchmarks/Olden/power/power.test 6792.00 6803.00 0.2%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1395585.00 1397473.00 0.1%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1395585.00 1397473.00 0.1%
test-suite :: External/SPEC/CINT2017speed/631.deepsjeng_s/631.deepsjeng_s.test 97662.00 97758.00 0.1%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 595179.00 595739.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/miniAMR.test 70603.00 70667.00 0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/unix-smail/unix-smail.test 19877.00 19893.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/PENNANT.test 90231.00 90279.00 0.1%
test-suite :: External/SPEC/CINT2006/473.astar/473.astar.test 33738.00 33754.00 0.0%
test-suite :: External/SPEC/CFP2017speed/619.lbm_s/619.lbm_s.test 13262.00 13268.00 0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 1139964.00 1140460.00 0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 849507.00 849875.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 1158379.00 1158859.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CoMD.test 38724.00 38740.00 0.0%
test-suite :: External/SPEC/CFP2006/470.lbm/470.lbm.test 15180.00 15186.00 0.0%
test-suite :: External/SPEC/CFP2017rate/519.lbm_r/519.lbm_r.test 15484.00 15490.00 0.0%
test-suite :: External/SPEC/CINT2006/456.hmmer/456.hmmer.test 167391.00 167455.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/ControlFlow-dbl/ControlFlow-dbl.test 137448.00 137496.00 0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2030254.00 2030766.00 0.0%
test-suite :: MicroBenchmarks/LCALS/SubsetALambdaLoops/lcalsALambda.test 302870.00 302934.00 0.0%
test-suite :: MicroBenchmarks/LCALS/SubsetARawLoops/lcalsARaw.test 303126.00 303190.00 0.0%
test-suite :: External/SPEC/CFP2006/444.namd/444.namd.test 241107.00 241155.00 0.0%
test-suite :: External/SPEC/CFP2006/482.sphinx3/482.sphinx3.test 162974.00 163006.00 0.0%
test-suite :: MultiSource/Applications/siod/siod.test 167168.00 167200.00 0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 1048796.00 1048988.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CLAMR.test 201623.00 201655.00 0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 501734.00 501798.00 0.0%
test-suite :: MultiSource/Applications/ClamAV/clamscan.test 580888.00 580952.00 0.0%
test-suite :: MultiSource/Benchmarks/MallocBench/gs/gs.test 168319.00 168335.00 0.0%
test-suite :: MicroBenchmarks/ImageProcessing/Interpolation/Interpolation.test 226022.00 226038.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/StatementReordering-flt/StatementReordering-flt.test 118011.00 118015.00 0.0%
test-suite :: External/SPEC/CINT2006/471.omnetpp/471.omnetpp.test 550589.00 550605.00 0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 3072477.00 3072541.00 0.0%
test-suite :: External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk.test 2385563.00 2385579.00 0.0%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 389171.00 389155.00 -0.0%
test-suite :: MultiSource/Applications/lua/lua.test 234764.00 234748.00 -0.0%
test-suite :: MultiSource/Benchmarks/mafft/pairlocalalign.test 227694.00 227678.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/NodeSplitting-flt/NodeSplitting-flt.test 119819.00 119807.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/Recurrences-flt/Recurrences-flt.test 117995.00 117983.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/InductionVariable-flt/InductionVariable-flt.test 123610.00 123594.00 -0.0%
test-suite :: MultiSource/Benchmarks/FreeBench/pifft/pifft.test 81414.00 81398.00 -0.0%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 782040.00 781880.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 9597420.00 9595292.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 9597420.00 9595292.00 -0.0%
test-suite :: External/SPEC/CINT2006/445.gobmk/445.gobmk.test 911832.00 911608.00 -0.0%
test-suite :: MultiSource/Applications/oggenc/oggenc.test 192507.00 192459.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/LoopRestructuring-flt/LoopRestructuring-flt.test 122843.00 122811.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-flt/CrossingThresholds-flt.test 122292.00 122260.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 777363.00 777155.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/Expansion-flt/Expansion-flt.test 123265.00 123205.00 -0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 315534.00 315358.00 -0.1%
test-suite :: MultiSource/Benchmarks/TSVC/ControlFlow-flt/ControlFlow-flt.test 128163.00 128083.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 6562.00 6555.00 -0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/compiler/compiler.test 23428.00 23396.00 -0.1%
test-suite :: MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow.test 22749.00 22717.00 -0.1%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39549.00 39485.00 -0.2%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39546.00 39482.00 -0.2%
test-suite :: MultiSource/Benchmarks/Prolangs-C/bison/mybison.test 57214.00 57118.00 -0.2%
test-suite :: SingleSource/Benchmarks/Adobe-C++/loop_unroll.test 413668.00 412804.00 -0.2%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1044047.00 1041487.00 -0.2%
test-suite :: MultiSource/Benchmarks/McCat/18-imp/imp.test 12414.00 12382.00 -0.3%
test-suite :: MultiSource/Benchmarks/Prolangs-C/gnugo/gnugo.test 31161.00 30969.00 -0.6%
test-suite :: MultiSource/Benchmarks/MallocBench/espresso/espresso.test 224726.00 223254.00 -0.7%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 93512.00 92824.00 -0.7%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 281151.00 278463.00 -1.0%
test-suite :: MultiSource/Benchmarks/Olden/tsp/tsp.test 2820.00 2788.00 -1.1%
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 156819.00 154739.00 -1.3%
test-suite :: MultiSource/Benchmarks/MiBench/security-blowfish/security-blowfish.test 11560.00 11160.00 -3.5%
test-suite :: MultiSource/Benchmarks/McCat/08-main/main.test 6734.00 6382.00 -5.2%
results results0 diff
ASCI_Purple/SMG2000 - extra vector code
VPlanNativePath/outer-loop-vect - extra vectorization, better vector
code
AVX512BWVL/Vector-AVX512BWVL-psadbw - better vector code
Rodinia/hotspot - small variations
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - extra vector code, better vectorization
BenchmarkGame/n-body - better vector code.
AVX512BWVL/Vector-AVX512BWVL-unpack_msasm - small variations
Misc/flops - extra vector code
AVX512BWVL/Vector-AVX512BWVL-mask_set_bw - small variations
Misc-C++/Large - better vector code
CFP2017rate/526.blender_r - extra vector code
Prolangs-C++/city - extra vector code
MiBench/consumer-lame - extra vector code
CoyoteBench/fftbench - extra vector code
Olden/power - better vector code
CFP2017rate/538.imagick_r
CFP2017speed/638.imagick_s - extra vector code
CINT2017rate/531.deepsjeng_r - extra vector code
CFP2006/447.dealII - small variations
DOE-ProxyApps-C/miniAMR - small variations
Prolangs-C/unix-smail - small variations
DOE-ProxyApps-C++/PENNANT - small variations
CINT2006/473.astar - small variations
CFP2006/453.povray - small variations
JM/lencod - extra vector code
CFP2017rate/511.povray_r - small variations
DOE-ProxyApps-C/CoMD - small variations
CFP2006/470.lbm - extra vector code
CFP2017speed/619.lbm_s
CFP2017rate/519.lbm_r - extra vector code
CINT2006/456.hmmer - extra code vectorized
TSVC/ControlFlow-dbl - extra vector code
CFP2017rate/510.parest_r - better vector code
LCALS/SubsetALambdaLoops - extra code vectorized
LCALS/SubsetARawLoops - extra code vectorized
CFP2006/444.namd - extra code vectorized
CFP2006/482.sphinx3 - better vector code
Applications/siod - better vector code
Benchmarks/7zip - better vector code
DOE-ProxyApps-C++/CLAMR - extra code vectorized
Applications/sqlite3 - extra code vectorized
Applications/ClamAV - smaller vector code
MallocBench/gs - small variations
MicroBenchmarks/ImageProcessing - small variations
TSVC/StatementReordering-flt - extra code vectorized
CINT2006/471.omnetpp - small variations
CINT2006/403.gcc - extra code vectorized
CINT2006/483.xalancbmk - extra code vectorized
JM/ldecod - small variations
Applications/lua - extra code vectorized
mafft/pairlocalalign - small variations
TSVC/NodeSplitting-flt - extra code vectorized
TSVC/Recurrences-flt - extra code vectorized
TSVC/InductionVariable-flt - extra code vectorized
FreeBench/pifft - small variations
CINT2006/464.h264ref - extra code vectorized
CINT2017speed/602.gcc_s
CINT2017rate/502.gcc_r - some extra code vectorized, extra code inlined
CINT2006/445.gobmk - small variations
Applications/oggenc - small variations
TSVC/LoopRestructuring-flt - extra code vectorized
TSVC/CrossingThresholds-flt - extra code vectorized
CFP2017rate/508.namd_r - small variations
TSVC/ControlFlow-flt - extra code vectorized
mediabench/g721 - small variations
Prolangs-C/compiler - small variations
FreeBench/fourinarow - better vector code
MiBench/telecomm-gsm - small variation in vector code
mediabench/gsm - same
Prolangs-C/bison - small variations
Adobe-C++/loop_unroll - extra code vectorized
Benchmarks/tramp3d-v4 - extra code gets inlined, small changes in vetor
code
McCat/18-imp - variations in vector code
Prolangs-C/gnugo - variations in vector code
MallocBench/espresso - extra code vectorized
DOE-ProxyApps-C++/miniFE - small variations in vector code
Prolangs-C/TimberWolfMC - extra code vectorized, small changes in
previously vectorized code.
Olden/tsp - small changes in vector code
CFP2006/433.milc - extra code gets inlined, vectorized 2 x stores to 4 x stores
MiBench/security-blowfish - extra code vectorized
McCat/08-main - better vector code.
Metric: size..text, RISCV, sifive-p670
Program size..text
results results0 diff
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 63580.00 64020.00 0.7%
test-suite :: MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan.test 21388.00 21406.00 0.1%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 296992.00 297088.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 968112.00 968208.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/StatementReordering-dbl/StatementReordering-dbl.test 45160.00 45164.00 0.0%
test-suite :: External/SPEC/CINT2017rate/523.xalancbmk_r/523.xalancbmk_r.test 2635902.00 2635854.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/623.xalancbmk_s/623.xalancbmk_s.test 2635902.00 2635854.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 7568730.00 7568578.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 7568730.00 7568578.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-flt/CrossingThresholds-flt.test 49764.00 49762.00 -0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 449132.00 449108.00 -0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 695932.00 695892.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 508820.00 508788.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 508820.00 508788.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 9594152.00 9593336.00 -0.0%
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 166522.00 166490.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 722252.00 722092.00 -0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 27554.00 27546.00 -0.0%
test-suite :: SingleSource/UnitTests/Vectorizer/VPlanNativePath/outer-loop-vect.test 10900.00 10896.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-dbl/CrossingThresholds-dbl.test 46754.00 46732.00 -0.0%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 631570.00 631226.00 -0.1%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 850698.00 850218.00 -0.1%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 24816.00 24800.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 24814.00 24798.00 -0.1%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 1599946.00 1598394.00 -0.1%
test-suite :: MultiSource/Applications/hbd/hbd.test 27236.00 27204.00 -0.1%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 293848.00 293480.00 -0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/compiler/compiler.test 20160.00 20048.00 -0.6%
test-suite :: MultiSource/Benchmarks/MallocBench/espresso/espresso.test 182088.00 181040.00 -0.6%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 4788.00 4748.00 -0.8%
DOE-ProxyApps-C++/miniFE - extra vector code
MiBench/automotive-susan - small variations
Benchmarks/Bullet - extra vector code
CFP2017rate/511.povray_r - slightly better vector code
TSVC/StatementReordering-dbl - small variations
CINT2017rate/523.xalancbmk_r
CINT2017speed/623.xalancbmk_s - extra vector code
CINT2017rate/502.gcc_r
CINT2017speed/602.gcc_s - extra vector code
TSVC/CrossingThresholds-flt - small variations
Applications/sqlite3 - extra vector code
JM/lencod - extra vector code, small variations
CINT2017rate/525.x264_r
CINT2017speed/625.x264_s - small variations
CFP2017rate/526.blender_r - extra vector code, small variations
DOE-ProxyApps-C/miniGMG - small variations
Vectorizer/VPlanNativePath/outer-loop-vect - small variations
TSVC/CrossingThresholds-dbl - small variations
Benchmarks/tramp3d-v4 - small variations
Benchmarks/7zip - extra vector code
MiBench/telecomm-gsm - small variations
mediabench/gsm/toast - small variations
CFP2017rate/510.parest_r - extra vector code
Applications/hbd - extra vector code
JM/ldecod - better vector code
Prolangs-C/compiler - extra vector code
MallocBench/espresso - extra vector code
mediabench/g721/g721encode - extra vectorization
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/107461
Commit: 85681d48343d503e95d57bad742b254354e59414
https://github.com/llvm/llvm-project/commit/85681d48343d503e95d57bad742b254354e59414
Author: Lang Hames <lhames at gmail.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
Log Message:
-----------
[ORC] Simplify intra-graph dependence tracking in ObjectLinkingLayer.
ObjectLinkingLayer::registerDependencies used to propagate external symbol
dependencies (dependencies on symbols outside the current graph) to all nodes.
Since ebe8733a11e, which merged addDependencies into notifyEmitted, the
notifyEmitted function will propagate intra-graph dependencies, so
registerDependencies no longer needs to do this.
This patch updates ObjectLinkingLayer::registerDependencies to just propagate
named dependencies (on both internal and external symbols) through anonymous
blocks, leaving the rest of the work to ExecutionSession::notifyEmitted.
It also choses a key symbol to use for blocks containing multiple symbols. The
result is both easier to read and faster.
Commit: 255870d7b5c474b1ea0b61f165d11930ada2e2ef
https://github.com/llvm/llvm-project/commit/255870d7b5c474b1ea0b61f165d11930ada2e2ef
Author: Lang Hames <lhames at gmail.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
M llvm/lib/ExecutionEngine/JITLink/DWARFRecordSectionSplitter.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/test/ExecutionEngine/JITLink/AArch64/ELF_ehframe.s
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ehframe.s
M llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_loongarch64_ehframe.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_ehframe.s
M llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_ehframe.s
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
Log Message:
-----------
[JITLink] Update splitBlock to support splitting into multiple blocks.
LinkGraph::splitBlock used to take a single split-point to split a Block into
two. In the common case where a block needs to be split repeatedly (e.g. in
eh-frame and compact-unwind sections), iterative calls to splitBlock could
lead to poor performance as symbols and edges are repeatedly shuffled to new
blocks.
This commit updates LinkGraph::splitBlock to take a sequence of split offsets,
allowing a block to be split into an arbitrary number of new blocks. Internally,
Symbols and Edges only need to be moved once (directly to whichever new block
they will be associated with), leading to better performance.
On some large MachO object files in an out of tree project this change improved
the performance of splitBlock by several orders of magnitude.
rdar://135820493
Commit: 2c770675ce36402b51a320ae26f369690c138dc1
https://github.com/llvm/llvm-project/commit/2c770675ce36402b51a320ae26f369690c138dc1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
Log Message:
-----------
[ARM] Use MCRegister in more places. NFC
Commit: aaa637d8d04694827e0e7d68c68971ff26791823
https://github.com/llvm/llvm-project/commit/aaa637d8d04694827e0e7d68c68971ff26791823
Author: Shourya Goel <shouryagoel10000 at gmail.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M libc/include/llvm-libc-macros/math-function-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/IsNormalTest.h
A libc/test/include/isnormal_test.c
A libc/test/include/isnormal_test.cpp
A libc/test/include/isnormalf_test.cpp
A libc/test/include/isnormall_test.cpp
Log Message:
-----------
[libc][math] Implement isnormal macro. (#109547)
#109201
Commit: ff8d55f8d5079aca95feeb671417bacc21eaac61
https://github.com/llvm/llvm-project/commit/ff8d55f8d5079aca95feeb671417bacc21eaac61
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/Thunks.cpp
Log Message:
-----------
[ELF] Replace config-> with ctx.arg. in Relocations and Thunks
Commit: eaedbbc30ded7965f37cfa90149daf308656c299
https://github.com/llvm/llvm-project/commit/eaedbbc30ded7965f37cfa90149daf308656c299
Author: Petr Hosek <phosek at google.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M libc/newhdrgen/yaml_functions_sorted.py
Log Message:
-----------
[libc] Use `yaml.safe_load` rather than `yaml.load` (#109557)
`yaml.load` is considered unsafe, use `yaml.safe_load`.
Commit: bbca451be01fb02d05c2d0586b061fd5611d80ba
https://github.com/llvm/llvm-project/commit/bbca451be01fb02d05c2d0586b061fd5611d80ba
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M clang/CMakeLists.txt
Log Message:
-----------
[CMake] Preserve clang-prebolt
In Clang-BOLT step, preserve pre-BOLT Clang binary (as well as clang++
symlink).
Also modify the default set of BOLT flags:
- drop ICF (can mess with unwinders),
- switch from hfsort+ to cdsort (aliases),
- enable CDSplit,
- update debug sections.
Reviewers: maksfb
Reviewed By: maksfb
Pull Request: https://github.com/llvm/llvm-project/pull/109351
Commit: eb8d865c4465a98e754670b34a445b45bcd60282
https://github.com/llvm/llvm-project/commit/eb8d865c4465a98e754670b34a445b45bcd60282
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/utils/TableGen/Common/PredicateExpander.cpp
Log Message:
-----------
[TableGen] Change getReg() == 0 to !getReg().isValid() in expandCheckInvalidRegOperand. NFC
Commit: 6f482010aeb921437193ef5c8884f743ec7cb360
https://github.com/llvm/llvm-project/commit/6f482010aeb921437193ef5c8884f743ec7cb360
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/CallGraphSort.cpp
M lld/ELF/Config.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Target.cpp
Log Message:
-----------
[ELF] Replace config-> with ctx.arg.
Commit: a7e14e24876a9f6465a719c759dad5e4905417cd
https://github.com/llvm/llvm-project/commit/a7e14e24876a9f6465a719c759dad5e4905417cd
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/DWARF.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/LTO.cpp
Log Message:
-----------
[ELF] Replace config-> with ctx.arg.
Commit: d147b6d581636a13ca86b32aece11de0cd562d68
https://github.com/llvm/llvm-project/commit/d147b6d581636a13ca86b32aece11de0cd562d68
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
Log Message:
-----------
[AMDGPU] Add hazard workarounds to insertIndirectBranch (#109127)
BranchRelaxation runs after the hazard recognizer, so workarounds for
SGPR accesses need to be applied directly inline to the code it
generates.
Commit: 67f0277cc3aed528f354b6bac04ba40ffa23f26b
https://github.com/llvm/llvm-project/commit/67f0277cc3aed528f354b6bac04ba40ffa23f26b
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Replace config-> with ctx.arg. in Writer
Commit: b47af5d1480e83304017a846488aaeac679ee855
https://github.com/llvm/llvm-project/commit/b47af5d1480e83304017a846488aaeac679ee855
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-21 (Sat, 21 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86Operand.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
Log Message:
-----------
[MC] Replace some comparisons of MCRegister and literal 0. NFC
We can convert the MCRegister to bool instead. I think this should
allows us to remove MCRegister::operator==(int). All other comparisons
in tree are unsigned.
Commit: 46df454c9a57d32aa1471fc322d1df1ba17fbe39
https://github.com/llvm/llvm-project/commit/46df454c9a57d32aa1471fc322d1df1ba17fbe39
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/EarlyIfConversion.cpp
Log Message:
-----------
[CodeGen] Construct SmallVector with ArrayRef (NFC) (#109566)
Commit: c219ebd95750c0ad6768d28d7569389e6fbd0be1
https://github.com/llvm/llvm-project/commit/c219ebd95750c0ad6768d28d7569389e6fbd0be1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/ExecutionEngine/JITLink/DefineExternalSectionStartAndEndSymbols.h
Log Message:
-----------
[ExecutionEngine] Avoid repeated hash lookups (NFC) (#109563)
Commit: 15e6b5d643618d0c477d31188f6894a31bad98d8
https://github.com/llvm/llvm-project/commit/15e6b5d643618d0c477d31188f6894a31bad98d8
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Transforms/IPO/IROutliner.cpp
Log Message:
-----------
[Transforms] Avoid repeated hash lookups (NFC) (#109565)
Commit: f5be5cdaad7edf52e39ad439cf5d608c930efca2
https://github.com/llvm/llvm-project/commit/f5be5cdaad7edf52e39ad439cf5d608c930efca2
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/Basic/Builtins.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/SemaCXX/type-trait-common-type.cpp
M libcxx/include/__type_traits/common_type.h
M libcxx/include/module.modulemap
Log Message:
-----------
[Clang] Add __builtin_common_type (#99473)
This implements the logic of the `common_type` base template as a
builtin alias. If there should be no `type` member, an empty class is
returned. Otherwise a specialization of a `type_identity`-like class is
returned. The base template (i.e. `std::common_type`) as well as the
empty class and `type_identity`-like struct are given as arguments to
the builtin.
Commit: 02cae5584933365c7904608a3096e859da9b2031
https://github.com/llvm/llvm-project/commit/02cae5584933365c7904608a3096e859da9b2031
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/GenericDomTreeUpdaterImpl.h
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#109564)
Commit: 59b7461c139d30ea57db4211decebe43117676fa
https://github.com/llvm/llvm-project/commit/59b7461c139d30ea57db4211decebe43117676fa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M mlir/lib/AsmParser/AsmParserState.cpp
Log Message:
-----------
[AsmParser] Avoid repeated hash lookups (NFC) (#109562)
Commit: e4e3ff5adc8b374be0620223ea2b654adde038ea
https://github.com/llvm/llvm-project/commit/e4e3ff5adc8b374be0620223ea2b654adde038ea
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/CGData/OutlinedHashTree.cpp
M llvm/lib/CGData/OutlinedHashTreeRecord.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/ObjCopy/wasm/WasmWriter.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
Log Message:
-----------
[llvm] Use std::optional::value_or (NFC) (#109568)
Commit: 0074cea432e268ed126b12c6e7fd4df2e1707a77
https://github.com/llvm/llvm-project/commit/0074cea432e268ed126b12c6e7fd4df2e1707a77
Author: Lang Hames <lhames at gmail.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/COFFPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
Log Message:
-----------
[ORC] Get rid of ObjectLinkingLayer::Plugin::getSyntheticSymbolDependencies.
Instead, when a MaterializationResponsibility contains an initializer symbol,
the Platform classes (MachO, COFF, ELFNix) will now add a defined symbol with
the same name to an arbitary block within the initializer sections, and then
add keep-alive edges from that symbol to all other init section blocks.
ObjectLinkingLayer is updated to automatically discard symbols where the
corresponding MaterializationResponsibility entry has the
MaterializationSideEffecstsOnly flag. This change simplifies both the
ObjectLinkingLayer::Plugin interface and the dependence tracking algorithm,
which no longer needs a special case for "synthetic"
(MaterializationSideEffectsOnly) symbols.
Commit: f8f0a266e0c26cd940ccba9542aec4b5efed9821
https://github.com/llvm/llvm-project/commit/f8f0a266e0c26cd940ccba9542aec4b5efed9821
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsWebAssembly.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/wasm_simd128.h
M clang/test/CodeGen/builtins-wasm.c
M clang/test/Headers/wasm.c
M llvm/include/llvm/IR/IntrinsicsWebAssembly.td
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
Log Message:
-----------
[clang][wasm] Replace the target integer sub saturate intrinsics with the equivalent generic `__builtin_elementwise_sub_sat` intrinsics (#109405)
Remove the Intrinsic::wasm_sub_sat_signed/wasm_sub_sat_unsigned entries
and just use sub_sat_s/sub_sat_u directly
Commit: 2f1e04ffae699993d33970b2643a3dbd551e4cd9
https://github.com/llvm/llvm-project/commit/2f1e04ffae699993d33970b2643a3dbd551e4cd9
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
Log Message:
-----------
[Clang] Remove __is_nullptr from the list of type traits (#109533)
Support for `__is_nullptr` was removed in #99038, but I forgot to remove
it from the list of type traits, resulting in Clang crashing when one
tries to use it.
Commit: 9614f69b4b1ebaba7a8ad51d583844ebca99bb08
https://github.com/llvm/llvm-project/commit/9614f69b4b1ebaba7a8ad51d583844ebca99bb08
Author: Amr Hesham <amr96 at programmer.net>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/xor.ll
Log Message:
-----------
[InstCombine] Fold Xor with or disjoint (#105992)
Implement a missing optimization fold `(X | Y) ^ M to (X ^ M) ^ Y` and
`(X | Y) ^ M to (Y ^ M) ^ X`
Commit: 38666e651587a5ca1b1290595c83d48d19914c42
https://github.com/llvm/llvm-project/commit/38666e651587a5ca1b1290595c83d48d19914c42
Author: Xing Guo <higuoxing+github at gmail.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/test/ExecutionEngine/JITLink/x86-64/ELF_R_X86_64_PC8.s
Log Message:
-----------
[Test][JITLink] Correctly generate the R_X86_64_PC8 relocation. (#109283)
Previously, ELF_R_X86_64_PC8.s doesn't produce the R_X86_64_PC8
relocation. This patch helps fix it by emitting a byte `main - .` to the
.rodata section.
Commit: 68e2b695eae06b42261ecdc145c1f1ece57cd14c
https://github.com/llvm/llvm-project/commit/68e2b695eae06b42261ecdc145c1f1ece57cd14c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M clang/tools/clang-nvlink-wrapper/NVLinkOpts.td
Log Message:
-----------
[NvlinkWrapper] Fix `-pluing` not consuming its argument
Summary:
Sometimes `clang` will pass `-plugin` when doing LTO, which should be
correctly consumed by the nvlink wrapper. Right now it was leaving the
`plugin.so` argument as a regular input, which would cause it to error
on the `.so` input.
Commit: 5b9206dbe42a149f44cc267508d439717912cb1d
https://github.com/llvm/llvm-project/commit/5b9206dbe42a149f44cc267508d439717912cb1d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M clang/test/Driver/nvlink-wrapper.c
Log Message:
-----------
[Driver] Fix nvlink wrapper test
Commit: 9e535743a4fd02a0af787b42f783046f43be8136
https://github.com/llvm/llvm-project/commit/9e535743a4fd02a0af787b42f783046f43be8136
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Log Message:
-----------
[ARM] Avoid repeated hash lookups (NFC) (#109569)
Commit: 7a4b320931a139514b2fcdf682cb4ab2abb6331d
https://github.com/llvm/llvm-project/commit/7a4b320931a139514b2fcdf682cb4ab2abb6331d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
Log Message:
-----------
[Rewrite] clang-format RewriteObjC.cpp (NFC)
I'm going to touch this area in a subsequent patch.
Commit: d84411f686e7755c620c93d77c5f6adba88d28a5
https://github.com/llvm/llvm-project/commit/d84411f686e7755c620c93d77c5f6adba88d28a5
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Log Message:
-----------
[ARM] clang-format ARMLowOverheadLoops.cpp (NFC)
I'm going to touch this area in a subsequent patch.
Commit: 9f3d083c4963fcd164fc48e326e5967e6395f28a
https://github.com/llvm/llvm-project/commit/9f3d083c4963fcd164fc48e326e5967e6395f28a
Author: Hans <hans at hanshq.net>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/asan/tests/asan_str_test.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_errno.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_errno_codes.h
M compiler-rt/test/asan/TestCases/strtol_strict.c
Log Message:
-----------
[win/asan] Ensure errno gets set correctly for strtol (#109258)
This fixes two problems with asan's interception of `strtol` on Windows:
1. In the dynamic runtime, the `strtol` interceptor calls out to ntdll's
`strtol` to perform the string conversion. Unfortunately, that function
doesn't set `errno`. This has been a long-standing problem (#34485), but
it was not an issue when using the static runtime. After the static
runtime was removed recently (#107899), the problem became more urgent.
2. A module linked against the static CRT will have a different instance
of `errno` than the ASan runtime, since that's now always linked against
the dynamic CRT. That means even if the ASan runtime sets `errno`
correctly, the calling module will not see it.
This patch fixes the first problem by making the `strtol` interceptor
call out to `strtoll` instead, and do 32-bit range checks on the result.
I can't think of any reasonable way to fix the second problem, so we
should stop intercepting `strtol` in the static runtime thunk. I checked
the list of functions in the thunk, and `strtol` and `strtoll` are the
only ones that set `errno`. (`strtoll` was already missing, probably by
mistake.)
Commit: 19ecdedcd2b7fb44689ce3cd59a6a078539eef3f
https://github.com/llvm/llvm-project/commit/19ecdedcd2b7fb44689ce3cd59a6a078539eef3f
Author: Adrian Vogelsgesang <avogelsgesang at salesforce.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/test/API/tools/lldb-dap/extendedStackTrace/TestDAP_extendedStackTrace.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb-dap] Rename `enableDisplayExtendedBacktrace` (#109521)
The `enable` prefix is a filler word which adds no additional
information. Rename the setting to `displayExtendedBacktrace`
Given that this setting was only introduced a month ago, and that there
has not been any release since then, I assume that usage is still rather
low. As such, it should be fine to not provide backwards-compatibility
workarounds.
Commit: 090dc77a8d636415b772f7e5f95cd120370e41d1
https://github.com/llvm/llvm-project/commit/090dc77a8d636415b772f7e5f95cd120370e41d1
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-no-libc-functions-in-c.c
Log Message:
-----------
[-Wunsafe-buffer-usage] Fix a bug and suppress libc warnings for C files (#109496)
- Fix a bug in UnsafeBufferUsage.cpp related to casting to PointerType
- Suppress -Wunsafe-buffer-usage-in-libc-call for C files
(rdar://117182250)
Commit: 3ad3f05ac872fabb55e9340594c3d7d5195ae08c
https://github.com/llvm/llvm-project/commit/3ad3f05ac872fabb55e9340594c3d7d5195ae08c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
A compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
R compiler-rt/test/tsan/Darwin/variadic-open.cpp
Log Message:
-----------
[NFC][tsan] Move `variadic-open` test
There is nothing Darwin or tsan specific in the test.
For #108291
Commit: e5d174c792481d3b5094fd24be3b42d867a42dd9
https://github.com/llvm/llvm-project/commit/e5d174c792481d3b5094fd24be3b42d867a42dd9
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Don't use FileCheck in test
`assert` is enough.
Commit: 4ab22d7b3cc92d08c6371df367ae21716d1b6942
https://github.com/llvm/llvm-project/commit/4ab22d7b3cc92d08c6371df367ae21716d1b6942
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Extract test from `main` function
And extract cleanup into RUN: command
Commit: 76cffc2aa5d85874b2e83661debfce30cf8d3028
https://github.com/llvm/llvm-project/commit/76cffc2aa5d85874b2e83661debfce30cf8d3028
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[sanitizer] Add O_TMPFILE test
For #108291
Commit: 06c3a7d2d764fc605ef933b2f805f41f2fcaee71
https://github.com/llvm/llvm-project/commit/06c3a7d2d764fc605ef933b2f805f41f2fcaee71
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Remove unneeded State.UF after 8ec406757cb92 (NFC).
State.UF is not needed any longer after 8ec406757cb92
(https://github.com/llvm/llvm-project/pull/95842). Clean it up,
simplifying ::execute of existing recipes.
Commit: 2e729bac35fb3e17c21a636f0fd076a8d7ee84d1
https://github.com/llvm/llvm-project/commit/2e729bac35fb3e17c21a636f0fd076a8d7ee84d1
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Debug test on bot
Remove unneded _GNU_SOURCE.
Add perror.
Commit: 5a68ac8ba751d535509826d72f91584cf5d44046
https://github.com/llvm/llvm-project/commit/5a68ac8ba751d535509826d72f91584cf5d44046
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/include/llvm/Object/COFF.h
M llvm/test/tools/llvm-readobj/COFF/arm64ec-chpe.yaml
M llvm/tools/llvm-readobj/COFFDumper.cpp
Log Message:
-----------
[llvm-readobj][COFF] Add support for version 2 of CHPE metadata (#109545)
Commit: 123e8c735d0765a12e65f1daefcbe23a059e26fd
https://github.com/llvm/llvm-project/commit/123e8c735d0765a12e65f1daefcbe23a059e26fd
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/Support/IndentedOstreamTest.cpp
Log Message:
-----------
[mlir] Don't call llvm::raw_string_ostream::flush() (NFC)
Don't call raw_string_ostream::flush(), which is essentially a no-op.
As specified in the docs, raw_string_ostream is always unbuffered.
( 65b13610a5226b84889b923bae884ba395ad084d for further reference )
Commit: 2603c8b23be06116bc61bda36fae05b81d906c3f
https://github.com/llvm/llvm-project/commit/2603c8b23be06116bc61bda36fae05b81d906c3f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Undo "RUN:" part of 4ab22d7b3cc92d08c6371df367ae21716d1b6942
It was not compartible with mobile tests.
Commit: 0e21c8e598789e0325569533d65ab8bacd3aeedf
https://github.com/llvm/llvm-project/commit/0e21c8e598789e0325569533d65ab8bacd3aeedf
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
Log Message:
-----------
[LV] Auto-generate check lines for test.
Commit: 53266f73f037bd20bcbbd7852fd0c6a7703b4c38
https://github.com/llvm/llvm-project/commit/53266f73f037bd20bcbbd7852fd0c6a7703b4c38
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
A llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
Log Message:
-----------
[VPlan] Run DCE after unrolling.
This cleans up a number of dead recipes after unrolling if only their
first or last parts are used. This simplifies a number of tests.
Fixes https://github.com/llvm/llvm-project/issues/109581.
Commit: df935ff4eca91013553edbf3ca1d45b568f6709f
https://github.com/llvm/llvm-project/commit/df935ff4eca91013553edbf3ca1d45b568f6709f
Author: Gedare Bloom <gedare at rtems.org>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Fix regression with BlockIndent of Braced Initializers (#108717)
Fixes #73584.
Commit: 397b96aa87d1546e2b2fd34a7622fe6f4194776e
https://github.com/llvm/llvm-project/commit/397b96aa87d1546e2b2fd34a7622fe6f4194776e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Make test Android friendly
Commit: f5ec00b79ba63eec6a39a5cc04cbdba58b0c01bf
https://github.com/llvm/llvm-project/commit/f5ec00b79ba63eec6a39a5cc04cbdba58b0c01bf
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Remove leftover from previous run
Commit: 777329d32f9a6dc6db3b74797abf359e5098c62a
https://github.com/llvm/llvm-project/commit/777329d32f9a6dc6db3b74797abf359e5098c62a
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Target.h
Log Message:
-----------
[ELF] Replace config-> with ctx.arg. in Driver.cpp and Target.h
Commit: b8248dacade77ea5abc49bd8c58d0b1656957492
https://github.com/llvm/llvm-project/commit/b8248dacade77ea5abc49bd8c58d0b1656957492
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/CallGraphSort.cpp
M lld/ELF/Driver.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
Log Message:
-----------
[ELF] Replace remnant config-> with ctx.arg.
Commit: a0879f2054bbd7278ff729c8b5e8442c0e5c7f00
https://github.com/llvm/llvm-project/commit/a0879f2054bbd7278ff729c8b5e8442c0e5c7f00
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Skip O_TMPFILE if FS does not support it
Commit: 10266279c3569b2e37ada2fbf6b927c45aa7ee41
https://github.com/llvm/llvm-project/commit/10266279c3569b2e37ada2fbf6b927c45aa7ee41
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Log Message:
-----------
[NFC][hwasan] Add a few of {}
Commit: 652194531c45682715503355676e39b5b57c9394
https://github.com/llvm/llvm-project/commit/652194531c45682715503355676e39b5b57c9394
Author: Jim Lin <jim at andestech.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/test/Driver/riscv32-toolchain.c
M clang/test/Driver/riscv64-toolchain.c
Log Message:
-----------
[RISCV][test] Fix incorrect check prefix in riscv32-toolchain.c and riscv64-toolchain.c. (#109390)
Commit: e1a1f18022089969d4e7e1686a6dff3980b6ccb1
https://github.com/llvm/llvm-project/commit/e1a1f18022089969d4e7e1686a6dff3980b6ccb1
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] Make `Config config` part of `Ctx ctx`
Commit: 1429204352ec758c98a60e3d22773973e234615b
https://github.com/llvm/llvm-project/commit/1429204352ec758c98a60e3d22773973e234615b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Debug errno in test
Commit: 0d334d83a4c7ce16fa1bc0e5e56bbdeaf01c2b2d
https://github.com/llvm/llvm-project/commit/0d334d83a4c7ce16fa1bc0e5e56bbdeaf01c2b2d
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/MC/Disassembler/X86/apx/kmov.txt
M llvm/test/MC/X86/apx/kmov-att.s
M llvm/test/MC/X86/apx/kmov-intel.s
Log Message:
-----------
[X86][APX] Fix wrong encoding of promoted KMOV instructions due to missing NoCD8 (#109579)
Promoted KMOV* was encoded with CD8 incorrectly, see
https://godbolt.org/z/cax513hG1
Commit: 81c3499531c3fe03827bd8bc890e3a16db9e4c3c
https://github.com/llvm/llvm-project/commit/81c3499531c3fe03827bd8bc890e3a16db9e4c3c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Skip test if O_TMPFILE EINVAL on some FS
Commit: 62f737f7409b5d2b33c746158c62f14e5bb78aed
https://github.com/llvm/llvm-project/commit/62f737f7409b5d2b33c746158c62f14e5bb78aed
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
[Driver][X86] Add flang visibility for -m[no-]evex512 (#109598)
The `-m[no-]evex512` are nontrivial options which are used to control
vector size of other AVX512 features. Hence we expose both to flang for
Fortran users.
Commit: 9ed46fbe9fa153316b7b0bb0906f3c8db45a8f81
https://github.com/llvm/llvm-project/commit/9ed46fbe9fa153316b7b0bb0906f3c8db45a8f81
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/Common/DriverDispatcher.cpp
M lld/ELF/Driver.cpp
M lld/MachO/InputSection.cpp
Log Message:
-----------
[lld] Use StringRef idioms (NFC) (#109584)
Commit: ba5e19580913d0b4cac249a81f0aabf7a0a3317f
https://github.com/llvm/llvm-project/commit/ba5e19580913d0b4cac249a81f0aabf7a0a3317f
Author: Shourya Goel <shouryagoel10000 at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libc/include/llvm-libc-macros/math-function-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/IsSubnormalTest.h
A libc/test/include/issubnormal_test.c
A libc/test/include/issubnormal_test.cpp
A libc/test/include/issubnormalf_test.cpp
A libc/test/include/issubnormall_test.cpp
Log Message:
-----------
[libc][math] Implement issubnormal macro. (#109572)
#109201
Commit: 80cdc3718036cd3ee33424953821ac01046d5278
https://github.com/llvm/llvm-project/commit/80cdc3718036cd3ee33424953821ac01046d5278
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/tools/CMakeLists.txt
Log Message:
-----------
[Clang] Include the clang-shlib CMake project when building for MSVC (#109457)
Enable building clang-cpp shared library for windows when building with
explicit visibility macros enabled and LLVM is built as a shared
library(LLVM_BUILD_LLVM_DYLIB_VIS).
This is part of the effort to support for enabling plugins on windows by
adding better support for building LLVM and Clang as a DLL.
Commit: c3d3cef8d58377b02032b07b5f094a402a70435a
https://github.com/llvm/llvm-project/commit/c3d3cef8d58377b02032b07b5f094a402a70435a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/test/MC/RISCV/rv64-relax-all.s
Log Message:
-----------
[RISCV] Don't delete all fixups in RISCVMCCodeEmitter::expandLongCondBr. (#109513)
The Fixups vector passed into this function may already have fixups in
it from earlier instructions. We should not erase those. We just want to
erase fixups added by this function.
Fixes #108612.
Commit: 80b44517f571689ede9327b3122caff3c631408e
https://github.com/llvm/llvm-project/commit/80b44517f571689ede9327b3122caff3c631408e
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
Log Message:
-----------
[RISCV][TTI] Add instruction cost for vp.select. (#109381)
This patch make instruction cost for vp.select the same as its non-vp
counterpart.
Commit: 5a4c6f97997f3cdfa9d98f7f0b546e331ee9cc4a
https://github.com/llvm/llvm-project/commit/5a4c6f97997f3cdfa9d98f7f0b546e331ee9cc4a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/test/Transforms/SimplifyCFG/speculate-derefable-load.ll
Log Message:
-----------
[Loads] Check context instruction for context-sensitive derefability (#109277)
If a dereferenceability fact is provided through `!dereferenceable` (or
similar), it may only hold on the given control flow path. When we use
`isSafeToSpeculativelyExecute()` to check multiple instructions, we
might make use of `!dereferenceable` information that does not hold at
the speculation target. This doesn't happen when speculating
instructions one by one, because `!dereferenceable` will be dropped
while speculating.
Fix this by checking whether the instruction with `!dereferenceable`
dominates the context instruction. If this is not the case, it means we
are speculating, and cannot guarantee that it holds at the speculation
target.
Fixes https://github.com/llvm/llvm-project/issues/108854.
Commit: 8a6248b739d705577fa5414b4010605dca38aa79
https://github.com/llvm/llvm-project/commit/8a6248b739d705577fa5414b4010605dca38aa79
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
Log Message:
-----------
[SimplifyCFG] Don't separate a load/store from its gep during sinking (#102318)
If we can sink the a load/store, but not the gep producing its pointer
operand, don't sink the load/store either. This may prevent the gep from
being folded into an addressing mode, and may also negatively affect
further analysis.
Fixes https://github.com/llvm/llvm-project/issues/96838.
Commit: 84b1489c8f8d4fb3c541167301c29ee4dad1af78
https://github.com/llvm/llvm-project/commit/84b1489c8f8d4fb3c541167301c29ee4dad1af78
Author: David Green <david.green at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/CodeGen/ARM/vbsl.ll
Log Message:
-----------
[ARM] Update VBIC tests. NFC
Commit: df6855ba57b2cede7b1578e74276f3ad33c2ad5d
https://github.com/llvm/llvm-project/commit/df6855ba57b2cede7b1578e74276f3ad33c2ad5d
Author: Benji Smith <6193112+Benjins at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm-c/Core.h
M llvm/lib/IR/Core.cpp
M llvm/test/Bindings/llvm-c/atomics.ll
Log Message:
-----------
[C API] Add usub_cond and usub_sat atomic ops to C API (#109532)
These were added in the C++ API in
https://github.com/llvm/llvm-project/pull/105568 but were not exposed
via the C API previously
Commit: 6ad268e3913cb6814fabae420a8e80156e1632a7
https://github.com/llvm/llvm-project/commit/6ad268e3913cb6814fabae420a8e80156e1632a7
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] refactor Target::Install function (#108996)
refactor Target::Install function
Commit: c8e0672864abf6fb624ddde5d6a1775d8634213a
https://github.com/llvm/llvm-project/commit/c8e0672864abf6fb624ddde5d6a1775d8634213a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
Log Message:
-----------
[Loops] Use forgetLcssaPhiWithNewPredecessor() in more places
Use the more aggressive invalidation method in a number of places
that add incoming values to lcssa phi nodes. It is likely that
it's possible to construct cases with incorrect SCEV preservation
similar to https://github.com/llvm/llvm-project/issues/109333 for
these.
Commit: 898fd396b836600ef857464941220d07894b859b
https://github.com/llvm/llvm-project/commit/898fd396b836600ef857464941220d07894b859b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Check allocation size limit for operator new (#109590)
Commit: 02711a77c0bf8b7921f48aaa601564449888e458
https://github.com/llvm/llvm-project/commit/02711a77c0bf8b7921f48aaa601564449888e458
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/preinstalled_signal.cpp
Log Message:
-----------
[ASan][test] XFAIL Linux/preinstalled_signal.cpp on Linux/sparc64 (#109623)
With ASan testing enabled on SPARC as per PR #107405, the
```
AddressSanitizer-sparc-linux-dynamic :: TestCases/Linux/preinstalled_signal.cpp
```
test `FAIL`s on Linux/sparc64. See Issue #109573 for all the details,
but the core is that `syscall(__NR_rt_sigaction)` cannot be used because
it takes an additional argument that isn't accessible outside of `libc`,
while switching to `sigaction` instead changes the order of
`AsanInitInternal` and `Init`, breaking the test.
Therefore this patch `XFAIL`s the test.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
Commit: db3569d2e5aa4d967a2e8c5b9893f9a49937e55d
https://github.com/llvm/llvm-project/commit/db3569d2e5aa4d967a2e8c5b9893f9a49937e55d
Author: Michal Rostecki <vadorovsky at protonmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/Bindings/llvm-c/debug_info_new_format.ll
M llvm/tools/llvm-c-test/main.c
Log Message:
-----------
[llvm-c-test] Rename --test-dibuilder-debuginfo-format to `--test-dibuilder` (#105702)
The former name was introduced during the split between debug info
intrinsic and `DbgRecord`. Before the split, it was named
`--test-dibuilder`.
However, the full migration to `DbgRecord` happened already and we have
just one test suite related to building debug info using LLVM-C API.
Therefore, it makes sense to rename it back to `--test-dibuilder`.
Commit: 8b4b7d28f7c344c728a9812aa99d9ad24edb40a2
https://github.com/llvm/llvm-project/commit/8b4b7d28f7c344c728a9812aa99d9ad24edb40a2
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] additional fix for 65bc259a97cd8cc70907b65f59aff728245ba9c0
Commit: b953914e2fef53773baa1fa89e96671015d45852
https://github.com/llvm/llvm-project/commit/b953914e2fef53773baa1fa89e96671015d45852
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Object/COFFObjectFile.cpp
M llvm/test/tools/llvm-readobj/COFF/arm64ec-chpe.yaml
Log Message:
-----------
[Object][COFF] Fix CHPE metadata offset check (#109591)
Commit: 6fc2451167ec991361dd0568de9a9fa2926f8da8
https://github.com/llvm/llvm-project/commit/6fc2451167ec991361dd0568de9a9fa2926f8da8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
A llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning-execution-mode.s
A llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning.s
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
Reland "[llvm-exegesis] Add support for pinning benchmarking process to a CPU (#85168)"
This reverts commit 5e3d48a68096a0017a0fa4bb89f2d48767c8a7e4.
This relands commit 9886788a8a500a1b429a6db64397c849b112251c.
This was originally causing build failures on more esoteric platforms
that have different definitions of getcpu. This is only intended to be
supported on x86-64 currently, so just use preprocessor definitions to
special case the function.
Commit: 02ee96eca90741031a26f0f06cd48bb0ba558d1a
https://github.com/llvm/llvm-project/commit/02ee96eca90741031a26f0f06cd48bb0ba558d1a
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/finite-trip-count.ll
M llvm/test/Analysis/ScalarEvolution/ne-overflow.ll
M llvm/test/Analysis/ScalarEvolution/predicated-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/predicated-symbolic-max-backedge-taken-count.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-implied-addrec.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/simple_early_exit.ll
Log Message:
-----------
[Analysis] Teach isDereferenceableAndAlignedInLoop about SCEV predicates (#106562)
Currently if a loop contains loads that we can prove at compile time
are dereferenceable when certain conditions are satisfied the function
isDereferenceableAndAlignedInLoop will still return false because
getSmallConstantMaxTripCount will return 0 when SCEV predicates
are required. This patch changes getSmallConstantMaxTripCount to take
an optional Predicates pointer argument so that we can permit
functions such as isDereferenceableAndAlignedInLoop to consider more
cases.
Commit: 0b0a37e158bcf6d0667b4744b3d335f91578e0c9
https://github.com/llvm/llvm-project/commit/0b0a37e158bcf6d0667b4744b3d335f91578e0c9
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaCXX/attr-musttail.cpp
Log Message:
-----------
[clang] Lifetime of locals must end before musttail call (#109255)
The lifetimes of local variables and function parameters must end before
the call to a [[clang::musttail]] function, instead of before the
return, because we will not have a stack frame to hold them when doing
the call.
This documents this limitation, and adds diagnostics to warn about some
code which is invalid because of it.
Commit: f28a0355364b9f09fa3d47720af4cf7431721de6
https://github.com/llvm/llvm-project/commit/f28a0355364b9f09fa3d47720af4cf7431721de6
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/LLVMTargetMachine.cpp
Log Message:
-----------
Fix memory leak in LLVMTargetMachine.cpp (#109610)
Because `MAB` is a raw pointer, it could potentially leak memory because
of the `||` in the null check.
Commit: 8632e8bd64d6f02e571777390274c262d5c85167
https://github.com/llvm/llvm-project/commit/8632e8bd64d6f02e571777390274c262d5c85167
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
A llvm/test/CodeGen/AMDGPU/shrink-v-cmp-wave32-dead-vcc-lo.mir
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
AMDGPU: Fix implicit vcc def to vcc_lo on wave32 targets (#109514)
Commit: cd80ed424b13790a65365a0145fa9b1b51b13680
https://github.com/llvm/llvm-project/commit/cd80ed424b13790a65365a0145fa9b1b51b13680
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
Log Message:
-----------
[llvm-exegesis] Fix -Wunused-variable in BenchmarkRunner.cpp (NFC)
/llvm-project/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp:415:18:
error: unused variable 'CurrentCPU' [-Werror,-Wunused-variable]
unsigned int CurrentCPU;
^
1 error generated.
Commit: 3e0a76b1fd10d2f5f36d34a91b525c1d29685185
https://github.com/llvm/llvm-project/commit/3e0a76b1fd10d2f5f36d34a91b525c1d29685185
Author: futog <54807384+futog at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/AArch64/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/AArch64/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/Mips/llvm-ir/ashr.ll
M llvm/test/CodeGen/Mips/llvm-ir/lshr.ll
M llvm/test/CodeGen/Mips/llvm-ir/shl.ll
M llvm/test/CodeGen/PowerPC/ctrloop-sh.ll
M llvm/test/CodeGen/PowerPC/pr59074.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/CodeGen/X86/shift-i128.ll
M llvm/test/CodeGen/X86/shift-i256.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/X86/widen-load-of-small-alloca-with-zero-upper-half.ll
M llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll
Log Message:
-----------
[Codegen][LegalizeIntegerTypes] Improve shift through stack (#96151)
Minor improvement on cc39c3b17fb2598e20ca0854f9fe6d69169d85c7.
Use an aligned stack slot to store the shifted value.
Use the native register width as shifting unit, so the load of the
shift result is aligned.
If the shift amount is a multiple of the native register width, there is
no need to do a follow-up shift after the load. I added new tests for
these cases.
Co-authored-by: Gergely Futo <gergely.futo at hightec-rt.com>
Commit: 2612316f72b92d7905717c358aeab8b8141738a1
https://github.com/llvm/llvm-project/commit/2612316f72b92d7905717c358aeab8b8141738a1
Author: Viktoriia Bakalova <115406782+VitaNuo at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/test/test_demangle.pass.cpp
M llvm/include/llvm/Demangle/ItaniumDemangle.h
Log Message:
-----------
[ItaniumDemangle] Add template name to the substitutions list during demangling (#108538)
When demangling a template template parameter (`method<bool,
Bar>(Bar<bool> b)`), the current demangler version first enters the
template argument (`bool`) into the substitutions list, then the whole
template specialization (`Bar<bool>`). The template name (`Bar`) never
becomes a substitution candidate on its own.
This is different when mangling. Mangling `method<bool, Bar>(Bar<bool>
b, Bar<int> i)` substitutes the `Bar` in the second parameter with the
substitution for `TemplateTemplateParmDecl`.
This leads to a discrepancy between mangler and demangler, see
https://github.com/llvm/llvm-project/issues/108009.
Commit: bad544461a72cdf0e8301b0e80eef4e6661eee2b
https://github.com/llvm/llvm-project/commit/bad544461a72cdf0e8301b0e80eef4e6661eee2b
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove an outdated comment
Commit: d36f66b42d7abec73bb5b953612eef26e6c12e0a
https://github.com/llvm/llvm-project/commit/d36f66b42d7abec73bb5b953612eef26e6c12e0a
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M offload/include/OpenMP/OMPT/Callback.h
M offload/include/OpenMP/OMPT/Interface.h
M offload/plugins-nextgen/common/CMakeLists.txt
R offload/plugins-nextgen/common/OMPT/OmptCallback.cpp
M offload/src/OpenMP/OMPT/Callback.cpp
M offload/src/exports
Log Message:
-----------
[NFC][offload][OMPT] Cleanup of OMPT internals (#109005)
Removed `OmptCallbacks.cpp` since relevant contents were duplicated.
Because of the static linking there should be no change in
functionality.
Commit: 7a181980b900683fd3e1ac9601a627c758f19a61
https://github.com/llvm/llvm-project/commit/7a181980b900683fd3e1ac9601a627c758f19a61
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[InstCombine] Fix nits in new xor fold
Followup to https://github.com/llvm/llvm-project/pull/105992,
use the simplifyXorInst helper and use getWithInstruction
consistently.
Commit: a72d7eea5413444249670579fecea6823fb3c564
https://github.com/llvm/llvm-project/commit/a72d7eea5413444249670579fecea6823fb3c564
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/include/clang/Frontend/MultiplexConsumer.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Interpreter/IncrementalParser.h
M clang/lib/Interpreter/Interpreter.cpp
A clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/unittests/Interpreter/CodeCompletionTest.cpp
M clang/unittests/Interpreter/InterpreterExtensionsTest.cpp
Log Message:
-----------
[clang-repl] Simplify the value printing logic to enable out-of-process. (#107737)
This patch improves the design of the IncrementalParser and Interpreter
classes. Now the incremental parser is only responsible for building the
partial translation unit declaration and the AST, while the Interpreter
fills in the lower level llvm::Module and other JIT-related
infrastructure. Finally the Interpreter class now orchestrates the AST
and the LLVM IR with the IncrementalParser and IncrementalExecutor
classes.
The design improvement allows us to rework some of the logic that
extracts an interpreter value into the clang::Value object. The new
implementation simplifies use-cases which are used for out-of-process
execution by allowing interpreter to be inherited or customized with an
clang::ASTConsumer.
This change will enable completing the pretty printing work which is in
llvm/llvm-project#84769
Commit: 7e7009fc5725fc2a9157212834cc995c91969cf1
https://github.com/llvm/llvm-project/commit/7e7009fc5725fc2a9157212834cc995c91969cf1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Interpreter/BUILD.gn
Log Message:
-----------
[gn build] Port a72d7eea5413
Commit: 31ac3d092bd047ab2c0bdcb6d527736472b9d4a6
https://github.com/llvm/llvm-project/commit/31ac3d092bd047ab2c0bdcb6d527736472b9d4a6
Author: sinan <sinan.lin at linux.alibaba.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
R bolt/test/AArch64/Inputs/iplt.ld
R bolt/test/AArch64/ifunc.c
A bolt/test/AArch64/ifunc.test
A bolt/test/Inputs/ifunc.c
A bolt/test/Inputs/iplt.ld
A bolt/test/X86/ifunc.test
Log Message:
-----------
[BOLT] Add .iplt support to x86 (#106513)
Add X86 support for parsing .iplt section and symbols.
Commit: 57f5d8f2fe9ed55a03ce451811940726d6908f2e
https://github.com/llvm/llvm-project/commit/57f5d8f2fe9ed55a03ce451811940726d6908f2e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Only store single vector per VPValue in VPTransformState. (NFC)
After 8ec406757cb92 (https://github.com/llvm/llvm-project/pull/95842),
VPTransformState only stores a single vector value per VPValue.
Simplify the code by replacing the SmallVector in PerPartOutput with a
single Value * and rename to VPV2Vector for clarity.
Also remove the redundant Part argument from various accessors.
Commit: cff753f8768ff3a7afbc27adaf318ebbf419dcfa
https://github.com/llvm/llvm-project/commit/cff753f8768ff3a7afbc27adaf318ebbf419dcfa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] SimplifyDemandedVectorEltsForTargetNode - simplify X86ISD::VBROADCAST of 0'th element handling. NFC.
Avoid duplicate TLO.CombineTo calls.
Commit: 85220a0c651e565ab576c5be17c1ec5c9eb2a350
https://github.com/llvm/llvm-project/commit/85220a0c651e565ab576c5be17c1ec5c9eb2a350
Author: Kelvin Lee <kiyolee at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
Log Message:
-----------
[lldb][FreeBSD] Fix a typo in NativeProcessFreeBSD::MonitorSIGTRAP() (#109643)
Apparently a typo is causing compile error, added by https://github.com/llvm/llvm-project/pull/108504.
Commit: 677177bb60dbe0d551251058c28466c5d74cebac
https://github.com/llvm/llvm-project/commit/677177bb60dbe0d551251058c28466c5d74cebac
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/Mips/Mips.h
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.h
M llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/srem.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-mult.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-sdiv.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-srem.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-udiv.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-urem.ll
M llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/urem.ll
Log Message:
-----------
[Mips] Fix mfhi/mflo hazard miscompilation about div and mult (#91449)
Fix issue1: In mips1-4, require a minimum of 2 instructions between a
mflo/mfhi and the next mul/dmult/div/ddiv/divu/ddivu instruction.
Fix issue2: In mips1-4, should not put mflo into the delay slot for the
return.
Fix https://github.com/llvm/llvm-project/issues/81291
Commit: 26f272ebbdf8dc4a81f3f7d7c8ccf99fd9398bfb
https://github.com/llvm/llvm-project/commit/26f272ebbdf8dc4a81f3f7d7c8ccf99fd9398bfb
Author: Pawan Nirpal <pawannirpal at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
A llvm/test/CodeGen/X86/canonicalize-vars.ll
Log Message:
-----------
[X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (#106370)
Enable support for fcanonicalize intrinsic lowering.
Commit: c712ab829b2050e2ac1652e032fa0786a43a31c0
https://github.com/llvm/llvm-project/commit/c712ab829b2050e2ac1652e032fa0786a43a31c0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Implement placement-new (#107033)
If we have a placement-new destination already, use that instead of
allocating a new one.
Tests are partially based on
`test/SemaCXX/cxx2c-constexpr-placement-new.cpp`.
Commit: c35ea627df441a3650f986ca79954b4b9d16bf24
https://github.com/llvm/llvm-project/commit/c35ea627df441a3650f986ca79954b4b9d16bf24
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/if_target.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/if_target.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/if_target.test
M llvm/utils/update_test_checks.py
Log Message:
-----------
update_test_checks: recognize %if in RUN line (#108972)
Recognize %if for target-specific cases in RUN line and keep only tool
command with options
Commit: e0bd8d3485075d24ecff2b4f5d9e2117853bd08b
https://github.com/llvm/llvm-project/commit/e0bd8d3485075d24ecff2b4f5d9e2117853bd08b
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
M llvm/test/Transforms/SLPVectorizer/arith-div-undef.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-insert-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/catchswitch.ll
M llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll
Log Message:
-----------
[SLP] Better way to filter target-specific tests (#106720)
When only an exclusive target e.g AArch64 was enabled, these tests were
previously shown as UNSUPPORTED.
This change allows us to run tests for cases with only a build for one
target.
Commit: 7773dcd16389b07e055a10336c42e71ffd57ad3d
https://github.com/llvm/llvm-project/commit/7773dcd16389b07e055a10336c42e71ffd57ad3d
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
Log Message:
-----------
[X86][NFC] Change test name and add a new test (#109638)
Address post commit comments in #108754.
Commit: 785337e2d97a712612a5956657e8dbf1cd140e46
https://github.com/llvm/llvm-project/commit/785337e2d97a712612a5956657e8dbf1cd140e46
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/scalable-fp-ext-trunc-illegal-type.ll
Log Message:
-----------
[LV][AArch64] Don't query registers for illegal scalable vector elts (#109411)
When trying to maximize vector bandwidth we ask TTI for the number of
registers required for a given operation. If the type of that operation
happens to be something illegal for scalable vectors (e.g.
<vscale x 4 x fp128>) then we would see a crash.
Instead, just return a default value and let the cost model reject the
invalid operation later.
Commit: f4eeae1244c83486e38e4b73715fa688d34bc244
https://github.com/llvm/llvm-project/commit/f4eeae1244c83486e38e4b73715fa688d34bc244
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/simple_early_exit.ll
Log Message:
-----------
[LoopVectorize] Address comments on PR #107004 left post-commit (#109300)
* Rename Speculative -> Uncountable and update tests.
* Add comments explaining why it's safe to ignore the predicates when
building up a list of exiting blocks.
* Reshuffle some code to do (hopefully) cheaper checks first.
Commit: b0dc7b5b8617e188a926cbe06918fedab2fd5df9
https://github.com/llvm/llvm-project/commit/b0dc7b5b8617e188a926cbe06918fedab2fd5df9
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/xtn.ll
Log Message:
-----------
[AArch64][GlobalISel] Prefer to use Vector Truncate (#105692)
Tries to combine scalarised truncates into vector truncate operations
EXAMPLE:
`%a(i32), %b(i32) = G_UNMERGE %src(<2 x i32>)`
`%T_a(i16) = G_TRUNC %a(i32)`
`%T_b(i16) = G_TRUNC %b(i32)`
`%Imp(i16) = G_IMPLICIT_DEF(i16)`
`%dst(v8i16) = G_MERGE_VALUES %T_a(i16), %T_b(i16), %Imp(i16),
%Imp(i16)`
===>
`%Imp(<2 x i32>) = G_IMPLICIT_DEF(<2 x i32>)`
`%Mid(<4 x s16>) = G_CONCAT_VECTORS %src(<2 x i32>), %Imp(<2 x i32>)`
`%dst(<4 x s16>) = G_TRUNC %Mid(<4 x s16>)`
Commit: f8f41bf92c92ebc9b113a2a573d12880b86d5af3
https://github.com/llvm/llvm-project/commit/f8f41bf92c92ebc9b113a2a573d12880b86d5af3
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/attr-gsl-owner-pointer-std.cpp
Log Message:
-----------
[clang] Apply the [[gsl::Owner]] or [[gsl::Pointer]] attributes to the STL template specialization declarations. (#109653)
Fixes #109442
Commit: 6f194a6dea4b4067336431e699ea3588417d4b96
https://github.com/llvm/llvm-project/commit/6f194a6dea4b4067336431e699ea3588417d4b96
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
Log Message:
-----------
[SimplifyCFG] Avoid truncation in linear map overflow check
This is supposed to test multiplication of the linear multiplifier
with the largest value it can be multiplied with. However, if
we truncate TableSize-1 here, it might not actually be the largest
value. I think in practice this still works out, because in cases
where we'd truncate the value here we'd also fail the NonMonotonic
check. But to match the intent of the code, we should treat the
truncating case as overflowing.
Commit: 6d216fb7b8546c04223e56002152c556926d1a1d
https://github.com/llvm/llvm-project/commit/6d216fb7b8546c04223e56002152c556926d1a1d
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/unittests/Core/BinaryContext.cpp
Log Message:
-----------
[perf2bolt] Improve heuristic to map in-process addresses to specific… (#109397)
… segments in Elf binary.
The heuristic is improved by also taking into account that only
executable segments should contain instructions.
Fixes #109384.
Commit: 3e0d37fd79faeb60a47ed8aace1c594ff7f637f2
https://github.com/llvm/llvm-project/commit/3e0d37fd79faeb60a47ed8aace1c594ff7f637f2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/tools/llvm-reduce/TestRunner.cpp
M llvm/tools/llvm-reduce/TestRunner.h
Log Message:
-----------
llvm-reduce: Simplify argument setup for ExecuteAndWait
Only need to append the input file for each iteration.
Commit: cee65092c95a216e63d970b5da1495eb33dd506a
https://github.com/llvm/llvm-project/commit/cee65092c95a216e63d970b5da1495eb33dd506a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Log Message:
-----------
[ARM] Avoid repeated hash lookups (NFC) (#109602)
Commit: 9a3348856ced274b9c7136d6726a18ca8975dad1
https://github.com/llvm/llvm-project/commit/9a3348856ced274b9c7136d6726a18ca8975dad1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
Log Message:
-----------
[DWARFLinker] Avoid repeated hash lookups (NFC) (#109604)
Commit: ff9f1a6ea2a0031387d23ce510d43edd81a18a1e
https://github.com/llvm/llvm-project/commit/ff9f1a6ea2a0031387d23ce510d43edd81a18a1e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
Log Message:
-----------
[Rewrite] Avoid repeated hash lookups (NFC) (#109605)
Commit: d6a6e25c5158be8a1b820aedf067fce394f7a313
https://github.com/llvm/llvm-project/commit/d6a6e25c5158be8a1b820aedf067fce394f7a313
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[AST] Avoid repeated hash lookups (NFC) (#109603)
Commit: a4232dc676908548afa36d4f4ad740131ce385e2
https://github.com/llvm/llvm-project/commit/a4232dc676908548afa36d4f4ad740131ce385e2
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Log Message:
-----------
[rtsan][tsan] Fix va_args handling in open functions (#108291)
Check oflag to see if it contains O_CREAT / O_TMPFILE before unpacking parameters to avoid UB
Commit: 21627236363d629f6a5b820f45a6071371e4b8db
https://github.com/llvm/llvm-project/commit/21627236363d629f6a5b820f45a6071371e4b8db
Author: Chao Chen <116223022+chencha3 at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
[MLIR][XeGPU] Updates XeGPU TensorDescAttr and Refine Gather/Scatter definition. (#109144)
The PR makes the following refine changes to the XeGPU dialect.
1. Separated the old `TensorDescAttr` into two independent attributes: `BlockTensorDescAttr` and `ScatterTensorDescAttr`
2. Renamed the `MemoryScopeAttr` to `MemorySpaceAttr` and updated the enumeration value for shared memory following OpenCL standard.
3. Introduced `transpose` UnitAttr to `StoreScatterOp`and `LoadGatherOp`
4. Added memory space check for `CreateNdDesc` and `CreateDesc` op, as well as valid and invalid test cases for them.
Commit: 0b524efa953ce4a1f41ff6abaa8e3c5f757e40e2
https://github.com/llvm/llvm-project/commit/0b524efa953ce4a1f41ff6abaa8e3c5f757e40e2
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
Log Message:
-----------
[RISCV][TTI] Reduce cost of a <N x i1> build_vector pattern (#109449)
This is a follow up to 7f6bbb3. When lowering a <N x i1> build_vector,
we currently chose to extend to i8, perform the build_vector there, and
then truncate back in vector. Our costing on the other hand accounts for
it as if we performed a vector extend, an insert, and a vector extract
for every element. This significantly over estimates the cost.
Note that we can likely do better in our build_vector lowering here by
packing the bits in scalar, and doing a build_vector of the packed bits.
Regardless, our costing should match our lowering.
Commit: ecb98f9fed65801d9ad2c138da7194496e18aeec
https://github.com/llvm/llvm-project/commit/ecb98f9fed65801d9ad2c138da7194496e18aeec
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M llvm/include/llvm-c/Core.h
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M polly/lib/CodeGen/RuntimeDebugBuilder.cpp
Log Message:
-----------
[IRBuilder] Remove uses of CreateGlobalStringPtr() (NFC)
Since the migration to opaque pointers, CreateGlobalStringPtr()
is the same as CreateGlobalString(). Normalize to the latter.
Commit: 09e94d09fd0f6ca7daac86f2c019473e0bd2f54e
https://github.com/llvm/llvm-project/commit/09e94d09fd0f6ca7daac86f2c019473e0bd2f54e
Author: Chao Chen <116223022+chencha3 at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
Revert "[MLIR][XeGPU] Updates XeGPU TensorDescAttr and Refine Gather/Scatter definition. " (#109666)
Reverts llvm/llvm-project#109144
Commit: bf791566e1585cac21bd89f7d1381272f2ad40c9
https://github.com/llvm/llvm-project/commit/bf791566e1585cac21bd89f7d1381272f2ad40c9
Author: Piotr Sobczak <piotr.sobczak at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
Log Message:
-----------
[AMDGPU] Add test for readfirstlane with i1 type (#109657)
Add test for readfirstlane with i1 type to demonstrate the lowering
works.
Also simplify existing tests a bit - the declarations are not strictly
needed anymore.
Commit: b189b89bdeb74a933016bef6d85ae42b0c62b40e
https://github.com/llvm/llvm-project/commit/b189b89bdeb74a933016bef6d85ae42b0c62b40e
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/phi-with-multiple-unsimplifiable-values.ll
Log Message:
-----------
[InstCombine] Relax the conditons of fold of `ucmp`/`scmp` into phi by allowing the phi node to use the result of `ucmp`/`scmp` more than once (#109593)
This extends the optimisation implemented in #107769 by relaxing the
condtions to make it happen. Now, the value produced by `ucmp`/`scmp`
doesn't need to be one-use, but only one-user, meaning it can be present
in a single phi node more than once.
Commit: 04d8e364bbf758b2ecbc06b782f1b5dd91bd16e6
https://github.com/llvm/llvm-project/commit/04d8e364bbf758b2ecbc06b782f1b5dd91bd16e6
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
Log Message:
-----------
[IRBuilder] Deprecate CreateGlobalStringPtr() (NFC)
In favor of CreateGlobalString(), which has the same behavior.
The distinction used to be meaningful prior to the introduction
of opaque pointers.
Commit: 40d6497a97a61ef5ea38e615cc324104cb34072a
https://github.com/llvm/llvm-project/commit/40d6497a97a61ef5ea38e615cc324104cb34072a
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/inline-strcmp-debugloc.ll
Log Message:
-----------
[DebugInfo] Transfer strcmp DILocation to generated inline code (#108531)
When AggressiveInstCombine inlines a strcmp call, we currently copy the
strcmp's DILocation only to the br instruction that jumps to the inline
code. While this is roughly analogous to the original call, it leaves
the generated code without any source location, which is precarious for
a memory operation. This patch copies the strcmp call's DILocation to
all the generated code.
An alternative solution would be to generate a new DILocation with a
line 0 location and an inlinedAt pointing to the original call location,
but this would still give limited attribution to the generated code
without traversing the DIE, whereas the submitted solution allows
attribution with just the line table; even though it would be
technically more accurate, pragmatically I believe that copying the
call's location will be more useful for users.
Commit: d4798498c4a30efb03eebb56415a69fa60107414
https://github.com/llvm/llvm-project/commit/d4798498c4a30efb03eebb56415a69fa60107414
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/compare-3way.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-select.ll
M llvm/test/Transforms/InstCombine/sink_to_unreachable.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
Log Message:
-----------
[InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (#107314)
This also handles commuted cases of the same fold, with either the
condition or the true/false values of the inner select being swapped.
Commit: be0b1142df7733633354ef1f73d0379bcd2ccb54
https://github.com/llvm/llvm-project/commit/be0b1142df7733633354ef1f73d0379bcd2ccb54
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/test/Analysis/stack-addr-ps.cpp
Log Message:
-----------
[analyzer][StackAddrEscapeChecker] Fix assert failure for alloca regions (#109655)
Fixes #107852
Make it explicit that the checker skips `alloca` regions to avoid the
risk of producing false positives for code with advanced memory
management.
StackAddrEscapeChecker already used this strategy when it comes to
malloc'ed regions, so this change relaxes the assertion and explicitly
silents the issues related to memory regions generated with `alloca`.
Commit: 53abbced3032b555d43f5b91fafa741c8a11a050
https://github.com/llvm/llvm-project/commit/53abbced3032b555d43f5b91fafa741c8a11a050
Author: Paul T Robinson <paul.robinson at sony.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
A clang/test/CodeGenCXX/debug-info-line-if-2.cpp
Log Message:
-----------
[DebugInfo] Correct the line attribution for IF branches (#108300)
An 'if' statement introduces a scope, but in some cases the conditional
branch to the then/else blocks had a debug-info attribution that did not
include the scope. This led to some inefficiency in the DWARF line
table.
Commit: 606557ddd68bcb082fb82fd21b0afb260222ae14
https://github.com/llvm/llvm-project/commit/606557ddd68bcb082fb82fd21b0afb260222ae14
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M compiler-rt/test/profile/Posix/instrprof-dlopen-norpath.test
Log Message:
-----------
[PGO] use atomics for profile counters in instrprof-dlopen-norpath.test
When two threads dlopen a shared library, one instance of the library
is loaded. Hence, code inside the library needs to be thread safe,
so use atomic updates for profile counters.
Commit: 50a1ab12abbe948e6d3f8418f11bfa1951c8d19e
https://github.com/llvm/llvm-project/commit/50a1ab12abbe948e6d3f8418f11bfa1951c8d19e
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
Log Message:
-----------
[LAA] Don't assume libcalls with output/input pointers can be vectorized (#108980)
LoopAccessAnalysis currently does not check/track aliasing from the
output pointers, but assumes vectorizing library calls with a mapping is
safe.
This can result in incorrect codegen if something like the following is
vectorized:
```
for(int i=0; i<N; i++) {
// No aliasing between input and output pointers detected.
sincos(cos_out[0], sin_out+i, cos_out+i);
}
```
Where for VF >= 2 `cos_out[1]` to `cos_out[VF-1]` is the cosine of the
original value of `cos_out[0]` not the updated value.
Commit: d61b2590f8e360695a5298311855c8649337969f
https://github.com/llvm/llvm-project/commit/d61b2590f8e360695a5298311855c8649337969f
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/CMakeLists.txt
Log Message:
-----------
[Clang-BOLT] Drop CDSplit flag
Breaks AArch64 Clang-BOLT builds:
https://github.com/llvm/llvm-project/pull/109351#issuecomment-2368584365
Commit: cce1fa39eabfca4907ff8d616618683eec1a5486
https://github.com/llvm/llvm-project/commit/cce1fa39eabfca4907ff8d616618683eec1a5486
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
Log Message:
-----------
[RISCV] Add zvfbfmin arithmetic cost model test coverage. NFC
Commit: 2cd20c255684257b86940bdda6861897f0bf3c00
https://github.com/llvm/llvm-project/commit/2cd20c255684257b86940bdda6861897f0bf3c00
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
R llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning-execution-mode.s
R llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning.s
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
Revert "[llvm-exegesis] Add support for pinning benchmarking process to a CPU (#85168)"
This reverts commit 6fc2451167ec991361dd0568de9a9fa2926f8da8.
This broke some more buildbots.
Commit: ce9a2c652104197a051db3788f3ec503cab3a79b
https://github.com/llvm/llvm-project/commit/ce9a2c652104197a051db3788f3ec503cab3a79b
Author: MichelleCDjunaidi <michellechrisalyn at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
A clang-tools-extra/docs/clang-tidy/ExternalClang-TidyExamples.rst
M clang-tools-extra/docs/clang-tidy/index.rst
Log Message:
-----------
[clang-tidy][doc] Add external examples (#106675)
Clang has a page where they list out external examples:
https://clang.llvm.org/docs/ExternalClangExamples.html. This mimics this page by adding some useful links specific to clang-tidy.
Commit: caf0897c9c7f6f2a142af06bff8680a23d1d4bf5
https://github.com/llvm/llvm-project/commit/caf0897c9c7f6f2a142af06bff8680a23d1d4bf5
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
Log Message:
-----------
[SPIR-V] Fix deprecation warnings after #102608 (#109447)
Follow up to fix warnings in the SPIRV backend after 2f50b280dc8e
"[DebugInfo] Enable deprecation of iterator-insertion methods (#102608)"
Commit: 40d8888f13fb54b0fe840deef23054de6544c184
https://github.com/llvm/llvm-project/commit/40d8888f13fb54b0fe840deef23054de6544c184
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/Status.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Utility/Status.cpp
M lldb/unittests/Utility/StatusTest.cpp
Log Message:
-----------
[lldb] Change the implementation of Status to store an llvm::Error (NFC) (#106774)
(based on a conversation I had with @labath yesterday in
https://github.com/llvm/llvm-project/pull/106442)
Most APIs that currently vend a Status would be better served by
returning llvm::Expected<> instead. If possibles APIs should be
refactored to avoid Status. The only legitimate long-term uses of Status
are objects that need to store an error for a long time (which should be
questioned as a design decision, too).
This patch makes the transition to llvm::Error easier by making the
places that cannot switch to llvm::Error explicit: They are marked with
a call to Status::clone(). Every other API can and should be refactored
to use llvm::Expected. In the end Status should only be used in very few
places.
Whenever an unchecked Error is dropped by Status it logs this to the
verbose API channel.
Implementation notes:
This patch introduces two new kinds of error_category as well as new
llvm::Error types. Here is the mapping of lldb::ErrorType to
llvm::Errors:
```
(eErrorTypeInvalid)
eErrorTypeGeneric llvm::StringError
eErrorTypePOSIX llvm::ECError
eErrorTypeMachKernel MachKernelError
eErrorTypeExpression llvm::ErrorList<ExpressionError>
eErrorTypeWin32 Win32Error
```
Relanding with built-in cloning support for llvm::ECError, and support
for initializing a Windows error with a NO_ERROR error code.
Commit: 8a9f66ca3118245f1ece5ba7ae6312889222eff9
https://github.com/llvm/llvm-project/commit/8a9f66ca3118245f1ece5ba7ae6312889222eff9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
R llvm/test/MC/RISCV/machine-csr-names-invalid.s
Log Message:
-----------
[RISCV] Remove machine-csr-names-invalid.s. NFC (#109595)
This appears to be redundant with rv32-only-csr-names.s which tests the
same registers and many more.
Commit: 27b5dc422cd3dc15b3d4410ba910d4b12272384d
https://github.com/llvm/llvm-project/commit/27b5dc422cd3dc15b3d4410ba910d4b12272384d
Author: Sean Perry <perry at ca.ibm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/CodeGen/Generic/allow-check.ll
M llvm/test/lit.cfg.py
Log Message:
-----------
Add target-byteorder for cases where endian in target triple is what matters (#107915)
I came across the subtly when setting up lit for z/OS and running it on
a Linux on Power machine. Linux on Power is little endian. This was
resulting in all of these tests being run even though the target triple
was z/OS which is big endian. The lit should really be checking if the
target is little endian not the host. The previous way didn't handle
cross compilation while running lit.
Commit: 8e8a0724c28642f49aeb313110522521d8359037
https://github.com/llvm/llvm-project/commit/8e8a0724c28642f49aeb313110522521d8359037
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
Log Message:
-----------
[llvm-debuginfod-find] Remove old parameter comment (#109637)
This patch removes a comment in llvm-debuginfod-find containing all the
cl::opt entries, which are redundant after the conversion to using
optTable. These seem to have been introduced in #108082 along with a
conversion to optTable.
Commit: 78ae2de4c692bea03d03e4c149b350543d220490
https://github.com/llvm/llvm-project/commit/78ae2de4c692bea03d03e4c149b350543d220490
Author: gonzalobg <65027571+gonzalobg at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
A llvm/test/CodeGen/NVPTX/fence-sm-90.ll
M llvm/test/CodeGen/NVPTX/fence.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
A llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store.ll
Log Message:
-----------
[NVPTX] Load/Store/Fence syncscope support (#106101)
Adds "initial" support for `syncscope` to the NVPTX backend
`load`/`store`/`fence` instructions.
Atomic Read-Modify-Write operations intentionally not supported as part
of this initial PR.
Commit: 93baa018e09bb3d4d5f4da0232321aff204caaeb
https://github.com/llvm/llvm-project/commit/93baa018e09bb3d4d5f4da0232321aff204caaeb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
[LegalizeVectorTypes] Preserve original MemoryOperand and MemVT when widening fixed vector load to vp_load. (#109473)
Previously we were building a new memoperand with the size of the widened VT. This was causing a failure in our downstream with non-power of 2 vectorization. Alias analysis allowed rescheduling a 3 element vector load past 2 out of 3 scalar stores that overwrite what it was supposed to read.
Alias analysis considers it undefined behavior to read more than the size of the underlying object. There is an exception if the underying objects is sufficiently aligned, but that doesn't apply in my failing case.
Commit: f7d088b6168608682975759bf27b7c2ad0ae7117
https://github.com/llvm/llvm-project/commit/f7d088b6168608682975759bf27b7c2ad0ae7117
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/test/Sema/riscv-asm.c
Log Message:
-----------
[RISCV] Implement validateGlobalRegisterVariable. (#109596)
Only allow GPR registers and verify the size is the same as XLen.
This fixes the crash seen in #109588 by making it a frontend error.
gcc does accept the code so we may need to consider if we can fix the
backend. Some other targets I tried appear to have similar issues so it
might not be straightforward to fix.
Commit: 19f04e908667aade0efe2de9ae705baaf68c0ce2
https://github.com/llvm/llvm-project/commit/19f04e908667aade0efe2de9ae705baaf68c0ce2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
Log Message:
-----------
[AArch64] Use MCRegister in more places. NFC
Commit: 3336d73126ae7ebaadf7c3a4d85e373eaae8cda6
https://github.com/llvm/llvm-project/commit/3336d73126ae7ebaadf7c3a4d85e373eaae8cda6
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/ABI.h
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/include/lldb/Target/UnwindLLDB.h
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/ArmUnwindInfo.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/ABI.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/UnwindLLDB.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
Log Message:
-----------
[lldb][NFC] New names for the two RegisterLocation classes (#109611)
lldb has two RegisterLocation classes that do slightly different things.
UnwindPlan::Row::RegisterLocation (new: AbstractRegisterLocation) has a
description of how to find a register's value or location, not specific
to a particular stopping point. It may say that at a given offset into a
function, the caller's register has been spilled to stack memory at CFA
minus an offset. Or it may say that the caller's register is at a DWARF
exprssion.
UnwindLLDB::RegisterLocation (new: ConcreteRegisterLocation) is a
specific address where the register is currently stored, or the register
it has been copied into, or its value at this point in the current
function execution.
When lldb stops in a function, it interprets the
AbstractRegisterLocation's instructions using the register context and
stack memory, to create the ConcreteRegisterLocation at this point in
time for this stack frame.
I'm not thrilled with AbstractRegisterLocation and
ConcreteRegisterLocation, but it's better than the same name and it will
be easier to update them if someone suggests a better pair.
Commit: 62f3eae466cc6af101a9bfa21e2af4ff5c95658d
https://github.com/llvm/llvm-project/commit/62f3eae466cc6af101a9bfa21e2af4ff5c95658d
Author: Lei Huang <lei at ca.ibm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGen/PowerPC/builtins-ppc-build-pair-mma.c
M clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c
Log Message:
-----------
[PowerPC] Fix incorrect store alignment for __builtin_vsx_build_pair() (#108606)
Fixes #107229
Commit: df0864e761107b07e38f5503e0cbee0cebb4c5e8
https://github.com/llvm/llvm-project/commit/df0864e761107b07e38f5503e0cbee0cebb4c5e8
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LinkerScript.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptParser.cpp
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
Log Message:
-----------
[ELF] Move elf::symtab into Ctx
Remove the global variable `symtab` and add a member variable
(`std::unique_ptr<SymbolTable>`) to `Ctx` instead.
This is one step toward eliminating global states.
Pull Request: https://github.com/llvm/llvm-project/pull/109612
Commit: 127349fcba81646389e4b8202b35405a5fdbef47
https://github.com/llvm/llvm-project/commit/127349fcba81646389e4b8202b35405a5fdbef47
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libc/cmake/modules/CheckCompilerFeatures.cmake
A libc/cmake/modules/compiler_features/check_float16_conversion.cpp
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/ManipulationFunctions.h
A libc/src/__support/FPUtil/cast.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/except_value_utils.h
M libc/src/__support/FPUtil/generic/CMakeLists.txt
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ceilf16.cpp
M libc/src/math/generic/exp10f16.cpp
M libc/src/math/generic/exp2f16.cpp
M libc/src/math/generic/expf16.cpp
M libc/src/math/generic/expm1f16.cpp
M libc/src/math/generic/floorf16.cpp
M libc/src/math/generic/rintf16.cpp
M libc/src/math/generic/roundevenf16.cpp
M libc/src/math/generic/roundf16.cpp
M libc/src/math/generic/truncf16.cpp
M libc/test/src/math/smoke/AddTest.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/DivTest.h
M libc/test/src/math/smoke/FModTest.h
M libc/test/src/math/smoke/FmaTest.h
M libc/test/src/math/smoke/ModfTest.h
M libc/test/src/math/smoke/MulTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/SqrtTest.h
M libc/test/src/math/smoke/SubTest.h
M libc/test/src/math/smoke/exp10f16_test.cpp
M libc/test/src/math/smoke/exp2f16_test.cpp
M libc/test/src/math/smoke/expf16_test.cpp
M libc/test/src/math/smoke/expm1f16_test.cpp
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
Log Message:
-----------
[libc][math] Add floating-point cast independent of compiler runtime (#105152)
Fixes build and tests with compiler-rt on x86.
Commit: 5927c6745c2a60c368d7bcb789a1f561d62fa039
https://github.com/llvm/llvm-project/commit/5927c6745c2a60c368d7bcb789a1f561d62fa039
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/test/MC/AMDGPU/gfx10_unsupported.s
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
A llvm/test/MC/AMDGPU/gfx940_unsupported.s
Log Message:
-----------
[AMDGPU][MC] Instructions not to be supported in GFX940 (#109225)
Buffer_store_lds_dword, buffer_wbinvl1, and buffer_wbinvl1_vol are
obsolete in GFX940 and should not be supported.
Commit: 1693c6392299d1d4bea5b07094c1c562b7ee533f
https://github.com/llvm/llvm-project/commit/1693c6392299d1d4bea5b07094c1c562b7ee533f
Author: Xiaoyang Liu <siujoeng.lau at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libcxx/docs/Status/Cxx23Issues.csv
Log Message:
-----------
[libc++][NFC] mark LWG3723 as implemented (#109356)
This patch marks LWG3723 as implemented, with the implementation
completed in commit 87f3ff3 and released in `libc++` 17.0.
Closes #105104
Commit: 97b0d2076f53f669f27dc6d0539a3d01f28381e7
https://github.com/llvm/llvm-project/commit/97b0d2076f53f669f27dc6d0539a3d01f28381e7
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/Status.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Utility/Status.cpp
M lldb/unittests/Utility/StatusTest.cpp
Log Message:
-----------
Revert "[lldb] Change the implementation of Status to store an llvm::Error (NFC) (#106774)"
This reverts commit 40d8888f13fb54b0fe840deef23054de6544c184.
One last Windows failure remaining.
Commit: 1c47fa9b620d0abb280647b4f361ada43784d00e
https://github.com/llvm/llvm-project/commit/1c47fa9b620d0abb280647b4f361ada43784d00e
Author: Daniel Hernandez-Juarez <dhernandez0 at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
Log Message:
-----------
[mlir][AMDGPU] Add support for AMD f16 math library calls (#108809)
In this PR we add support for AMD f16 math library calls
(`__ocml_*_f16`)
CC: @krzysz00 @manupak
Commit: 3db0f8c895d4e814a18b754f9afbb1e03bd839a5
https://github.com/llvm/llvm-project/commit/3db0f8c895d4e814a18b754f9afbb1e03bd839a5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduced-value-vectorized-later.ll
Log Message:
-----------
[SLP]Update TrackedToOrig mappings after reduction vectorization
Need to update mappings in TrackedToOrig to correctly provide mapping
between updated reduced value after vectorization and its original
value, otherwise the compiler might miss this update and it may cause
compiler crash later, when it tries to find the original instruction
mapping for the updated value.
Fixes https://github.com/llvm/llvm-project/issues/109376
Commit: 6267f121f510859f8722c34a4a8c75e4d93b0300
https://github.com/llvm/llvm-project/commit/6267f121f510859f8722c34a4a8c75e4d93b0300
Author: OverMighty <its.overmighty at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libc/src/__support/FPUtil/dyadic_float.h
Log Message:
-----------
[libc] Fix missing LIBC_TYPES_HAS_FLOAT16 guard around DyadicFloat::generic_as() (#109697)
See Buildbot failure:
https://lab.llvm.org/buildbot/#/builders/93/builds/6872.
Commit: d1edef56e87631ca8712afe01ac560710a2334f2
https://github.com/llvm/llvm-project/commit/d1edef56e87631ca8712afe01ac560710a2334f2
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/Type.h
A llvm/include/llvm/SandboxIR/Utils.h
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Functions to find vectorizor-relevant properties (#109221)
When vectorizing, the destination type and value of stores is more
relevant than the type of the instruction itself. Similarly for return
instructions. These functions provide a convenient way to do that
without special-casing them everywhere, and avoids the need for
friending any class that needs access to Value::LLVMTy to calculate it.
Open to better naming.
Commit: 8be6b108fbd35c6f50db488a0a5462eba6852cfd
https://github.com/llvm/llvm-project/commit/8be6b108fbd35c6f50db488a0a5462eba6852cfd
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.def
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
Log Message:
-----------
[NVPTX] Remove nvvm.bitcast.* intrinsics (#107936)
Remove the following intrinsics which correspond directly to a bitcast:
- llvm.nvvm.bitcast.f2i
- llvm.nvvm.bitcast.i2f
- llvm.nvvm.bitcast.d2ll
- llvm.nvvm.bitcast.ll2d
Commit: f76dae15862959deb62ec200e0958d532c908f30
https://github.com/llvm/llvm-project/commit/f76dae15862959deb62ec200e0958d532c908f30
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Only store single scalar array per VPValue in VPTransState (NFC)
After 8ec406757cb92 (https://github.com/llvm/llvm-project/pull/95842),
VPTransformState only stores a single scalar vector per VPValue.
Simplify the code by replacing the nested SmallVector in PerPartScalars with
a single SmallVector and rename to VPV2Scalars for clarity.
Commit: e093bb9e5a6884842402e2cca03f002b514e4411
https://github.com/llvm/llvm-project/commit/e093bb9e5a6884842402e2cca03f002b514e4411
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
A llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning-execution-mode.s
A llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning.s
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
Reland "[llvm-exegesis] Add support for pinning benchmarking process to a CPU (#85168)" (#109688)
This reverts commit 2cd20c255684257b86940bdda6861897f0bf3c00.
This relands commit 9886788a8a500a1b429a6db64397c849b112251c.
This was causing more buildbot failures due to getcpu not being
available with glibc <=2.29. This patch fixes that by directly making
the syscall, assuming the syscall number macro is available.
Commit: 416c3ce0138ff4039dab13ff634ee6392b9a3c7b
https://github.com/llvm/llvm-project/commit/416c3ce0138ff4039dab13ff634ee6392b9a3c7b
Author: vporpo <vporpodas at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement ConstantExpr (#109491)
This patch implements an empty sandboxir::ConstantExpr class, mirroring
llvm::ConstantExpr.
Commit: 6e6d5eae765939cc4074bdd606658e78c4a2a559
https://github.com/llvm/llvm-project/commit/6e6d5eae765939cc4074bdd606658e78c4a2a559
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
A lldb/test/API/macosx/expedited-thread-pcs/Makefile
A lldb/test/API/macosx/expedited-thread-pcs/TestExpeditedThreadPCs.py
A lldb/test/API/macosx/expedited-thread-pcs/foo.c
A lldb/test/API/macosx/expedited-thread-pcs/main.cpp
Log Message:
-----------
[lldb] Don't invalid register context after setting thread pc's (#109499)
Some gdb remote serial protocol stubs will send the thread IDs and PCs
for all threads in a process in the stop-reply packet. lldb often needs
to know the pc values for all threads while at a private stop, and that
results in <n-1> read-register packets for <n> threads, and can be a big
performance problem when this is a hot code path.
GDBRemoteRegisterContext tracks the StopID of when its values were set,
and when the thread's StopID has incremented, it marks all values it has
as Invalid, and knows to refetch them.
We have a code path that resulted in setting the PCs for all the
threads, and then `ProcessGDBRemote::CalculateThreadStopInfo` *forcing*
an invalidation of all the register contexts, forcing us to re-read the
pc values for all threads except the one that stopped.
There are times when it is valid to force an invalidation of the
regsiter cache - for instance, if the layout of the registers has
changed because the processor state is different, or we've sent a
write-all-registers packet to the inferior and we want to make sure we
stay in sync with the inferior. But there was no reason for this method
to be forcing the register context to be invalid.
I added a test when running on Darwin systems, where debugserver always
sends the thread IDs and PCs, which turns on packet logging. The test
runs against an inferior which has 4 threads; it steps over a dlopen()
call, steps in to a user function with debug info, steps-over and
steps-in across source lines with multiple function calls, and then
examines the packet log and flags it as an error if lldb asked for the
pc value of any thread at any point in the debug session.
For this program and the operations we're doing, with debugserver that
provides thread IDs and PCs, we should never ask for the value of a pc
register.
rdar://136247381
Commit: 2b892b05025b6e0ed2f211435f99838ea3bbccd8
https://github.com/llvm/llvm-project/commit/2b892b05025b6e0ed2f211435f99838ea3bbccd8
Author: Brox Chen <guochen2 at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/tools/UpdateTestChecks/lit.local.cfg
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_err.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_err.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm.txt
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm.txt.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_multirun_dasm.txt
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_multirun_dasm.txt.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/amdgpu-basic.test
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/lit.local.cfg
M llvm/utils/UpdateTestChecks/common.py
A llvm/utils/update_mc_test_checks.py
Log Message:
-----------
added a script to update llvm-mc test file (#107246)
Added a script to update the test file generated by llvm-mc binary. The
script accepts .s and .txt for asm and dasm.
For mc test I am targetting there is no function name which can be used
as a key, thus no clear mapping between input and output. The script
assumes the test are always line-by-line and it update the output marker
for each test line-by-line.
---------
Co-authored-by: Alexander Richardson <mail at alexrichardson.me>
Commit: 706e71076e0276747e7ae94e3f8a7f73a45e5b6e
https://github.com/llvm/llvm-project/commit/706e71076e0276747e7ae94e3f8a7f73a45e5b6e
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
R llvm/test/Transforms/SLPVectorizer/X86/ext-int-reduced-not-operand.ll
R llvm/test/Transforms/SLPVectorizer/X86/extended-vectorized-gathered-inst.ll
R llvm/test/Transforms/SLPVectorizer/X86/external-user-instruction-minbitwidth.ll
R llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
R llvm/test/Transforms/SLPVectorizer/X86/extractelement-insertpoint.ll
R llvm/test/Transforms/SLPVectorizer/X86/extractlements-gathered-first-node.ll
R llvm/test/Transforms/SLPVectorizer/X86/extracts-with-undefs.ll
R llvm/test/Transforms/SLPVectorizer/X86/gather_extract_from_vectorbuild.ll
R llvm/test/Transforms/SLPVectorizer/X86/gep-with-extractelement-many-users.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-crash-index.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector-const-undef.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector-inseltpoison.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-element-multiple-uses.ll
R llvm/test/Transforms/SLPVectorizer/X86/insertelement-postpone.ll
R llvm/test/Transforms/SLPVectorizer/X86/insertelement-uses-vectorized-index.ll
R llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
R llvm/test/Transforms/SLPVectorizer/X86/jumbled_store_crash.ll
R llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
R llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-node-with-multi-users.ll
R llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-user-not-min.ll
R llvm/test/Transforms/SLPVectorizer/X86/multi-node-vectorized-insts.ll
R llvm/test/Transforms/SLPVectorizer/X86/multi-uses-with-deps-in-first.ll
R llvm/test/Transforms/SLPVectorizer/X86/one-element-vector.ll
A llvm/test/Transforms/SLPVectorizer/ext-int-reduced-not-operand.ll
A llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
A llvm/test/Transforms/SLPVectorizer/external-user-instruction-minbitwidth.ll
A llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
A llvm/test/Transforms/SLPVectorizer/extractelement-insertpoint.ll
A llvm/test/Transforms/SLPVectorizer/extractlements-gathered-first-node.ll
A llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
A llvm/test/Transforms/SLPVectorizer/gather_extract_from_vectorbuild.ll
A llvm/test/Transforms/SLPVectorizer/gep-with-extractelement-many-users.ll
A llvm/test/Transforms/SLPVectorizer/insert-crash-index.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const-undef.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-multiple-uses.ll
A llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
A llvm/test/Transforms/SLPVectorizer/insertelement-uses-vectorized-index.ll
A llvm/test/Transforms/SLPVectorizer/int-bitcast-minbitwidth.ll
A llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
A llvm/test/Transforms/SLPVectorizer/minbitwidth-multiuse-with-insertelement.ll
A llvm/test/Transforms/SLPVectorizer/minbitwidth-node-with-multi-users.ll
A llvm/test/Transforms/SLPVectorizer/minbitwidth-user-not-min.ll
A llvm/test/Transforms/SLPVectorizer/multi-node-vectorized-insts.ll
A llvm/test/Transforms/SLPVectorizer/multi-uses-with-deps-in-first.ll
A llvm/test/Transforms/SLPVectorizer/one-element-vector.ll
Log Message:
-----------
[SLP] Move some of X86 tests to common directory (#107587)
Some of the tests from the X86 directory can be generalized to improve
coverage for other architectures
Commit: 3138eb500c9462bcb6899088d49644adb4d90f62
https://github.com/llvm/llvm-project/commit/3138eb500c9462bcb6899088d49644adb4d90f62
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenHwModes.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.h
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.h
M llvm/utils/TableGen/Common/GlobalISel/PatternParser.cpp
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Use const record pointers in TableGen/Common files (#109467)
Use const record pointers in TableGen/Common files.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 74405b9d74d974523c0f9172a9b0c1cfd7320356
https://github.com/llvm/llvm-project/commit/74405b9d74d974523c0f9172a9b0c1cfd7320356
Author: vporpo <vporpodas at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement a few Instruction member functions (#109709)
This patch implements some of the missing member functions of
sandboxir::Instruction.
Commit: 954ab83e6a8acb7a78936cfa3e2284b1eaf8b722
https://github.com/llvm/llvm-project/commit/954ab83e6a8acb7a78936cfa3e2284b1eaf8b722
Author: Austin Kerbow <Austin.Kerbow at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
A llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
A llvm/test/MC/AMDGPU/amdhsa-kd-kernarg-preload.s
Log Message:
-----------
[AMDGPU] Include unused preload kernarg in KD total SGPR count (#104743)
Unlike with implicitly preloaded data UserSGPRs firmware is unable to
handle cases where SGPRs for kernel arguments contain preloaded data but
not are not explicitly referenced in the kernel. We need to include
these preloaded SGPRs in the GRANULATED_WAVEFRONT_SGPR_COUNT calculation
to not clobber SGPRs in adjacent waves.
Commit: e44ecf76e049474190c33cd737642a0a066fb6b0
https://github.com/llvm/llvm-project/commit/e44ecf76e049474190c33cd737642a0a066fb6b0
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/test/CodeGen/X86/section-stats.ll
Log Message:
-----------
[llvm][ELF] Add ELF header/section header table size statistics (#109345)
Followup to #102363. This makes the `elf-object-writer.*Bytes` stats sum
up to `assembler.ObjectBytes`.
Commit: 16d11e26f36fa0de8ef6e402bb85e32bf7c7acd6
https://github.com/llvm/llvm-project/commit/16d11e26f36fa0de8ef6e402bb85e32bf7c7acd6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/docs/gpu/support.rst
M libc/include/llvm-libc-types/rpc_opcodes_t.h
M libc/newhdrgen/yaml/stdlib.yaml
M libc/spec/stdc.td
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/gpu/CMakeLists.txt
A libc/src/stdlib/gpu/system.cpp
A libc/src/stdlib/system.h
M libc/utils/gpu/server/rpc_server.cpp
Log Message:
-----------
[libc] Add GPU support for the 'system' function (#109687)
Summary:
This function can easily be implemented by forwarding it to the host
process. This shows up in a few places that we might want to test the
GPU so it should be provided. Also, I find the idea of the GPU
offloading work to the CPU via `system` very funny.
Commit: 3bbe0f90f33357c27e3195207fa35c0fb44e426c
https://github.com/llvm/llvm-project/commit/3bbe0f90f33357c27e3195207fa35c0fb44e426c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libc/config/gpu/headers.txt
M libc/docs/gpu/support.rst
Log Message:
-----------
[libc] Add 'strings.h' header on the GPU (#109661)
Summary:
These are GNU extensions but still show up, the entrypoints were enabled
but we weren't emitting the header so they couldn't be used.
Commit: 1fae1314f1ff58f3601640c0a2c48cee3a322e5d
https://github.com/llvm/llvm-project/commit/1fae1314f1ff58f3601640c0a2c48cee3a322e5d
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/Status.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Utility/Status.cpp
M lldb/test/API/functionalities/gdb_remote_client/TestGDBRemotePlatformFile.py
M lldb/unittests/Utility/StatusTest.cpp
Log Message:
-----------
[lldb] Change the implementation of Status to store an llvm::Error (NFC) (#106774)
(based on a conversation I had with @labath yesterday in
https://github.com/llvm/llvm-project/pull/106442)
Most APIs that currently vend a Status would be better served by
returning llvm::Expected<> instead. If possibles APIs should be
refactored to avoid Status. The only legitimate long-term uses of Status
are objects that need to store an error for a long time (which should be
questioned as a design decision, too).
This patch makes the transition to llvm::Error easier by making the
places that cannot switch to llvm::Error explicit: They are marked with
a call to Status::clone(). Every other API can and should be refactored
to use llvm::Expected. In the end Status should only be used in very few
places.
Whenever an unchecked Error is dropped by Status it logs this to the
verbose API channel.
Implementation notes:
This patch introduces two new kinds of error_category as well as new
llvm::Error types. Here is the mapping of lldb::ErrorType to
llvm::Errors:
```
(eErrorTypeInvalid)
eErrorTypeGeneric llvm::StringError
eErrorTypePOSIX llvm::ECError
eErrorTypeMachKernel MachKernelError
eErrorTypeExpression llvm::ErrorList<ExpressionError>
eErrorTypeWin32 Win32Error
```
Relanding with built-in cloning support for llvm::ECError, and support
for initializing a Windows error with a NO_ERROR error code, and
modifying TestGDBRemotePlatformFile.py to support different renderings
of ENOSYS.
Commit: 9ac00b85e05d21be658d6aa0c91cbe05bb5dbde2
https://github.com/llvm/llvm-project/commit/9ac00b85e05d21be658d6aa0c91cbe05bb5dbde2
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/NVPTX/rotate.ll
M llvm/test/CodeGen/NVPTX/rotate_64.ll
Log Message:
-----------
[NVPTX] deprecate nvvm.rotate.* intrinsics, cleanup funnel-shift handling (#107655)
This change deprecates the following intrinsics which can be trivially
converted to llvm funnel-shift intrinsics:
- @llvm.nvvm.rotate.b32
- @llvm.nvvm.rotate.right.b64
- @llvm.nvvm.rotate.b64
Commit: 0a5edb4de408ae0405f85c3e4c6da5233f185f63
https://github.com/llvm/llvm-project/commit/0a5edb4de408ae0405f85c3e4c6da5233f185f63
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryData.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/RuntimeLibs/InstrumentationRuntimeLibrary.cpp
Log Message:
-----------
[bolt] Don't call llvm::raw_string_ostream::flush() (NFC)
Don't call raw_string_ostream::flush(), which is essentially a no-op.
As specified in the docs, raw_string_ostream is always unbuffered.
( 65b13610a5226b84889b923bae884ba395ad084d for further reference )
Commit: 783bac7ffb8f0d58d7381d90fcaa082eb0be1c1d
https://github.com/llvm/llvm-project/commit/783bac7ffb8f0d58d7381d90fcaa082eb0be1c1d
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
A llvm/test/Analysis/CtxProfAnalysis/handle-select.ll
Log Message:
-----------
[ctx_prof] Handle `select` and its `step` instrumentation (#109185)
The `step` instrumentation shouldn't be treated, during use, like an `increment`. The latter is treated as a BB ID. The step isn't that, it's more of a type of value profiling. We need to distinguish between the 2 when really looking for BB IDs (==increments), and handle appropriately `step`s. In particular, we need to know when to elide them because `select`s may get elided by function cloning, if the condition of the select is statically known.
Commit: c9e2c38f2c9784b668da875b7b94074a8bb416f7
https://github.com/llvm/llvm-project/commit/c9e2c38f2c9784b668da875b7b94074a8bb416f7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Log Message:
-----------
[NFC][hwasan] Convert ShadowMapping into class (#109616)
In the next patch we can switch to enum.
Commit: 300051159b5d8caef1e74193ebfb1ed1bce21c5e
https://github.com/llvm/llvm-project/commit/300051159b5d8caef1e74193ebfb1ed1bce21c5e
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M bolt/test/X86/log.test
M bolt/test/perf2bolt/perf_test.test
Log Message:
-----------
[BOLT][test] Update log.test and perf_test
Address noisy tests by:
- perf_test: bumping sampling frequency to maximum,
- log.test: matching Binary Function "main"
Commit: 8dbb739ffb0880e4f739992d07dc6ba6edca9509
https://github.com/llvm/llvm-project/commit/8dbb739ffb0880e4f739992d07dc6ba6edca9509
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Log Message:
-----------
[NFC][hwasan] Use `enum class` in `ShadowMapping` (#109617)
Commit: 3734fa8c724ce2af2f69886ca97c05c6c3717c34
https://github.com/llvm/llvm-project/commit/3734fa8c724ce2af2f69886ca97c05c6c3717c34
Author: S. Bharadwaj Yadavalli <Bharadwaj.Yadavalli at microsoft.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/DXILMetadataAnalysis.h
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
R llvm/lib/Target/DirectX/DXILMetadata.cpp
R llvm/lib/Target/DirectX/DXILMetadata.h
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
A llvm/test/CodeGen/DirectX/Metadata/lib-entries.ll
A llvm/test/CodeGen/DirectX/Metadata/multiple-entries-cs-error.ll
A llvm/test/CodeGen/DirectX/Metadata/target-profile-error.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags2.ll
M llvm/test/CodeGen/DirectX/strip-call-attrs.ll
M llvm/test/CodeGen/DirectX/typed_ptr.ll
Log Message:
-----------
[DXIL] Consume Metadata Analysis information in passes (#108034)
- Changed `DXILTranslateMetadata::translateMetadata()` to consume DXIL
Metadata Analysis information. Subsumed into `DXILTranslateMetedata.cpp`
the functionality in `DXILMetadata.*` files - that are hence deleted.
- Changed `DXILPrepare` pass to consume DXIL Metadata Analysis
information.
- Renamed `ModuleMetadataInfo::ShaderStage` to
`ModuleMetadataInfo::ShaderProfile` to better convey what it represents.
- Updated `unknown` target shader stage specification in triples of a
couple of tests.
- Added new tests for additional verification of `DXILTranslateMetadata`
pass functionality.
Commit: 9d3a57633ebb8251d2575696dfe53c67d3a47d33
https://github.com/llvm/llvm-project/commit/9d3a57633ebb8251d2575696dfe53c67d3a47d33
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
Log Message:
-----------
[RISCV] Add explicit XLenVT cast to vector load/store patterns.
This seems to be needed to get the patterns to import into GISel
properly.
Unfortunately, it also adds ~400 bytes to the SelectionDAG table.
I'm hoping if we remove i32 as a legal type for GPR registers, this
will go down.
Commit: eddbd4eb081fedddd4028244418f89e4bf5ffb09
https://github.com/llvm/llvm-project/commit/eddbd4eb081fedddd4028244418f89e4bf5ffb09
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[clang][NFC] add static for internal linkage function (#109436)
Detected by clang-tidy misc-use-internal-linkage
Commit: eca5949031c31fe5ff5ad7a5df07bbce13379108
https://github.com/llvm/llvm-project/commit/eca5949031c31fe5ff5ad7a5df07bbce13379108
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
Log Message:
-----------
[codegen][NFC] add static mark for internal usage variable and function (#109431)
Detect by clang-tidy misc-use-internal-linkage
Commit: 083f0fa454b618d722424a4a530b91de18a1b3c0
https://github.com/llvm/llvm-project/commit/083f0fa454b618d722424a4a530b91de18a1b3c0
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
Log Message:
-----------
[NFC][hwasan] Remove code duplication in ShadowMapping::init (#109618)
The goal to is to reorder this function to make
initialization in following order:
1. Defaults
2. Target specific overrides
3. Explicit copt<> overrides
Commit: 3bb92b530f27166b9037b63568534d248ff80150
https://github.com/llvm/llvm-project/commit/3bb92b530f27166b9037b63568534d248ff80150
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Region.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Region.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/RegionTest.cpp
Log Message:
-----------
[SandboxVec] Tag insts in a Region with metadata. (#109353)
For each region, we create a metadata node. Then when an instruction is
added to the Region, it gets tagged with the metadata node for that
region. In the following example, we have a Region that contains only
the `%t0` instruction.
```
define i8 @foo(i8 %v0, i8 %v1) {
%t0 = add i8 %v0, 1, !sbvec !0
%t1 = add i8 %t0, %v1
ret i8 %t1
}
!0 = distinct !{!"region"}
```
This commit also adds a function to create regions from metadata already
present in a Function.
This metadata can be used for debugging: if we dump IR before a Region
pass, the IR will contain enough info to re-create the Region and run
the pass by itself in a later invocation.
---------
Co-authored-by: Alina Sbirlea <alina.g.simion at gmail.com>
Commit: f77bbc0b34f98a6e866a72ccd8ff18bee9fa4dc8
https://github.com/llvm/llvm-project/commit/f77bbc0b34f98a6e866a72ccd8ff18bee9fa4dc8
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.h
Log Message:
-----------
[WebAssembly] Apply clang-tidy fixes on AsmParser/TypeCheck (NFC) (#109692)
Fixes are mostly one of these:
- `auto` -> `auto *` when the type is a pointer
- Function names start with a lowercase letter
- Variable names start with an uppercase letter
- No need to have an `else` after a `return`
Diff without whitespaces is easier to view.
Commit: 00629752e622814649e67d6e5ecb02bf131b537d
https://github.com/llvm/llvm-project/commit/00629752e622814649e67d6e5ecb02bf131b537d
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/RISCV/revec-getGatherCost.ll
Log Message:
-----------
[SLP][REVEC] Fix cost model for getGatherCost with FixedVectorType ScalarTy. (#109369)
Commit: 0673642cab6b6a9eec20d4ea4ee6bc46db47e04c
https://github.com/llvm/llvm-project/commit/0673642cab6b6a9eec20d4ea4ee6bc46db47e04c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
Log Message:
-----------
[hwasan] Replace "-hwasan-with-ifunc" and "-hwasan-with-tls" options (#109619)
Relationship between "-hwasan-mapping-offset",
"-hwasan-with-ifunc", and "-hwasan-with-tls" can
be to hard to understand.
Now we will have "-hwasan-mapping-offset",
presense of which will imply fixed shadow.
If "-hwasan-mapping-offset-dynamic" will set one
of 3 available dynamic shadows.
As-is "-hwasan-mapping-offset" has precedence over
"-hwasan-mapping-offset-dynamic". In follow up
patches we need to use the one with last
occurrence.
Commit: af1cf699f0bf62e54288ac3a5ada6050a41a57a1
https://github.com/llvm/llvm-project/commit/af1cf699f0bf62e54288ac3a5ada6050a41a57a1
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Move OrigIdx == 0 check to start of lowerEXTRACT_SUBVECTOR. NFC (#109731)
Allows us to remove a separate check of OrigIdx != 0 for the mask case.
Commit: fd11c81a80608ddd4b33b664e28b426229aabde1
https://github.com/llvm/llvm-project/commit/fd11c81a80608ddd4b33b664e28b426229aabde1
Author: A. Jiang <de34 at live.cn>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M libcxx/include/__memory/unique_temporary_buffer.h
Log Message:
-----------
[libc++] Add `_LIBCPP_NO_CFI` to `__allocate_unique_temporary_buffer` (#109682)
Follows up #100914. Addresses the issue revealed in
https://github.com/llvm/llvm-project/pull/100914#discussion_r1771647801.
Commit: 6bed79b3f00d3e2c273bc36ed350f802d76607b3
https://github.com/llvm/llvm-project/commit/6bed79b3f00d3e2c273bc36ed350f802d76607b3
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/Support/raw_ostream.h
M llvm/unittests/Support/raw_ostream_test.cpp
Log Message:
-----------
[Support] Add scaling support in `indent` (#109478)
Scaled indent is useful when indentation is always in steps of a fixed
number (the Scale) and still allow using the +/- operators to adjust
indentation.
Commit: 86c640323286f4d692a634373c71536795cd7290
https://github.com/llvm/llvm-project/commit/86c640323286f4d692a634373c71536795cd7290
Author: c8ef <c8ef at outlook.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M compiler-rt/lib/nsan/nsan.cpp
M compiler-rt/lib/nsan/nsan_flags.inc
A compiler-rt/test/nsan/fcmp.cpp
Log Message:
-----------
[compiler-rt][nsan] Add check-cmp flag (#108707)
Add check-cmp flag.
Closes #108435.
Commit: 2028687ecad01ccc135cdc03eca933d7eec24df4
https://github.com/llvm/llvm-project/commit/2028687ecad01ccc135cdc03eca933d7eec24df4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
Log Message:
-----------
[DWARFLinkerTypeUnit] Simplify code around try_emplace (NFC) (#109670)
Without this patch, we first default-construct a value with
try_emplace and then immediately override it with a new value.
This patch inserts the final value with try_emplace and simplies the
code around it.
Commit: 3cd3202b785654b8ac6d3bcf9ee18efcdd5171b0
https://github.com/llvm/llvm-project/commit/3cd3202b785654b8ac6d3bcf9ee18efcdd5171b0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/include/clang/Frontend/ASTUnit.h
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-extdef-mapping/ClangExtDefMapGen.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
Log Message:
-----------
[Frontend] Teach LoadFromASTFile to take FileName by StringRef (NFC) (#109583)
Without this patch, several callers of LoadFromASTFile construct an
instance of std::string to be passed as FileName, only to be converted
back to StringRef when LoadFromASTFile calls ReadAST.
This patch changes the type of FileName to StringRef and updates the
callers.
Commit: 23558afaf2f82f53ada3e9b6da3f11412dd02c8f
https://github.com/llvm/llvm-project/commit/23558afaf2f82f53ada3e9b6da3f11412dd02c8f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Hoist duplicate code in lowerINSERT_SUBVECTOR. NFC (#109733)
Commit: 64e7cb266e54e689791ad499965ddb0f8a1a2262
https://github.com/llvm/llvm-project/commit/64e7cb266e54e689791ad499965ddb0f8a1a2262
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
Log Message:
-----------
[Rewrite] Use auto (NFC)
I'm planning to change the type of BlockByCopyDecls and
BlockByRefDecls to SetVector. Declaring these iterators with auto
makes it easier to migrate to the new type.
Commit: 9b5a3036adbd9eed0f377cdf06aa622b917a1699
https://github.com/llvm/llvm-project/commit/9b5a3036adbd9eed0f377cdf06aa622b917a1699
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/docs/OpenMPSupport.rst
Log Message:
-----------
[OpenMP][Docs] Update OpenMP supported features table (#109726)
OpenMP features table: updated scope directive status from 'worked on'
to 'done' in section OpenMP 5.1 Implementation Details.
Commit: 29168e80ba6fabb96c2b45d9deb1e908e02f8a53
https://github.com/llvm/llvm-project/commit/29168e80ba6fabb96c2b45d9deb1e908e02f8a53
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/Attributes.h
M llvm/lib/IR/Attributes.cpp
Log Message:
-----------
[IR][Attribute] Add missing `const` def on `addAllocSizeParamAttr()`; NFC
Commit: f5eaadc38b8bbe547a5019b7ceb961978f36abde
https://github.com/llvm/llvm-project/commit/f5eaadc38b8bbe547a5019b7ceb961978f36abde
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Support/ModRef.cpp
M llvm/lib/Support/OptionStrCmp.cpp
Log Message:
-----------
[NFC] Fix line endings for ModRef.cpp/OptionStrCmp.cpp (#109712)
Commit: 0206181ada4b39f0324dfe977442c65c1693f0b1
https://github.com/llvm/llvm-project/commit/0206181ada4b39f0324dfe977442c65c1693f0b1
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lld/ELF/Driver.cpp
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
Log Message:
-----------
[ELF] Pass Ctx & to Driver and Writer
Commit: b30b9eb7a8823c1b3bbcd1bf9452e743a17d9223
https://github.com/llvm/llvm-project/commit/b30b9eb7a8823c1b3bbcd1bf9452e743a17d9223
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/lib/CodeGen/LiveInterval.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
Log Message:
-----------
LiveInterval: Make verify functions return bool (#109672)
This will allow the MachineVerifier to check these properties
instead of just asserting
Commit: fa089b014b41db4ef90378c7eae35306402cfcb3
https://github.com/llvm/llvm-project/commit/fa089b014b41db4ef90378c7eae35306402cfcb3
Author: SJW <48454132+sjw36 at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/test/Dialect/SCF/loop-pipelining.mlir
Log Message:
-----------
[SCF] Fixed epilogue predicates in loop pipelining (#108964)
The computed loop iteration is zero based, so only check it is less than
zero. This fixes the case when lower bound is not zero.
Commit: cde7b30268a85a3e7900a31534a97e7eb4de9236
https://github.com/llvm/llvm-project/commit/cde7b30268a85a3e7900a31534a97e7eb4de9236
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
Log Message:
-----------
AMDGPU: Fix missing functions in MIR tests
This function was in the IR section, but not present in the MIR
function list.
Commit: 63b2595846b86b4e4eb9afba5e97dd64e8135c10
https://github.com/llvm/llvm-project/commit/63b2595846b86b4e4eb9afba5e97dd64e8135c10
Author: sstipano <146831748+sstipano at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
A llvm/test/CodeGen/AMDGPU/freeze.ll
Log Message:
-----------
[AMDGPU][GlobalIsel] Use isRegisterClassType for G_FREEZE and G_IMPLICIT_DEF (#101331)
G_FREEZE was legal for <13 x S32> which caused an infinite loop in the
combiner
Commit: 2c58063435ce4717a949585bc5c32ecf98a77238
https://github.com/llvm/llvm-project/commit/2c58063435ce4717a949585bc5c32ecf98a77238
Author: Sergey Kozub <skozub at nvidia.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M mlir/include/mlir-c/BuiltinTypes.h
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/Types.h
M mlir/lib/AsmParser/TokenKinds.def
M mlir/lib/AsmParser/TypeParser.cpp
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Types.cpp
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/python/mlir/extras/types.py
M mlir/test/IR/attribute.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/python/ir/builtin_types.py
M mlir/utils/lldb-scripts/mlirDataFormatters.py
M mlir/utils/tree-sitter-mlir/grammar.js
Log Message:
-----------
[MLIR] Add f4E2M1FN type (#108877)
This PR adds `f4E2M1FN` type to mlir.
`f4E2M1FN` type is proposed in [OpenCompute MX
Specification](https://www.opencompute.org/documents/ocp-microscaling-formats-mx-v1-0-spec-final-pdf).
It defines a 4-bit floating point number with bit layout S1E2M1. Unlike
IEEE-754 types, there are no infinity or NaN values.
```c
f4E2M1FN
- Exponent bias: 1
- Maximum stored exponent value: 3 (binary 11)
- Maximum unbiased exponent value: 3 - 1 = 2
- Minimum stored exponent value: 1 (binary 01)
- Minimum unbiased exponent value: 1 − 1 = 0
- Has Positive and Negative zero
- Doesn't have infinity
- Doesn't have NaNs
Additional details:
- Zeros (+/-): S.00.0
- Max normal number: S.11.1 = ±2^(2) x (1 + 0.5) = ±6.0
- Min normal number: S.01.0 = ±2^(0) = ±1.0
- Min subnormal number: S.00.1 = ±2^(0) x 0.5 = ±0.5
```
Related PRs:
- [PR-95392](https://github.com/llvm/llvm-project/pull/95392) [APFloat]
Add APFloat support for FP4 data type
- [PR-105573](https://github.com/llvm/llvm-project/pull/105573) [MLIR]
Add f6E3M2FN type - was used as a template for this PR
- [PR-107999](https://github.com/llvm/llvm-project/pull/107999) [MLIR]
Add f6E2M3FN type
Commit: f6a8eb98b13ee50c67ecf4804461a23fba7398aa
https://github.com/llvm/llvm-project/commit/f6a8eb98b13ee50c67ecf4804461a23fba7398aa
Author: Jun Wang <jwang86 at yahoo.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
M llvm/test/CodeGen/AMDGPU/expand-si-indirect.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-with-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-non-empty-but-used-interval.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-hang-weak-dep.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-pre-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-group-barrier-pipeline-solver.mir
M llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/MC/AMDGPU/flat-global.s
A llvm/test/MC/AMDGPU/gfx10_flat_instructions_err.s
A llvm/test/MC/AMDGPU/gfx11_flat_instructions_err.s
A llvm/test/MC/AMDGPU/gfx12_flat_instructions_err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
Log Message:
-----------
[AMDGPU][MC] Disallow null as saddr in flat instructions (#101730)
Some flat instructions have an saddr operand. When 'null' is provided as
saddr, it may have the same encoding as another instruction. For
example, the instructions 'global_atomic_add v1, v2, null' and
'global_atomic_add v[1:2], v2, off' have the same encoding. This patch
disallows having null as saddr.
Commit: 78ff736db2313642c3d8dd74beee3bc0b21c5c2a
https://github.com/llvm/llvm-project/commit/78ff736db2313642c3d8dd74beee3bc0b21c5c2a
Author: David Green <david.green at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll
Log Message:
-----------
[ARM] Fix VMOVRRD combine with non-canonical inserts. (#109639)
In some situations, in the test case here with the multiple calls being
late legalized, we can see inserts of the form:
```
b = insert a, x, 0
c = insert b, y, 1
d = insert c, z, 0
bc = bitcast d
e = extract bc, 0
r = vmovrrd e
```
The redundant insert will usually be removed, but in some cases are not
prior to PerformVMOVRRDCombine. The code was finding the first insert
from each lane (x and y), as opposed to the last (z and y).
Commit: 5ca09d617da89c4466347030e2949dc5713eabcb
https://github.com/llvm/llvm-project/commit/5ca09d617da89c4466347030e2949dc5713eabcb
Author: David Green <david.green at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/test/CodeGen/ARM/expand-pseudos.mir
M llvm/test/CodeGen/ARM/vbsl.ll
Log Message:
-----------
[ARM] Fix VBSL Pseudo kill flags. (#109629)
When expanding a VBSP pseudo into VMOV; VBSL, if the first reg was
killed in the BSP then the kill flags could be incorrect copied to the
mov (vorr) and the vbsl. Drop the kill flags.
Note that this sometimes comes up when all the operands of the VBSP are
the same, which can be optimized separately.
Commit: 1493c247b687160aa92cf13ac1c6f363870bbac0
https://github.com/llvm/llvm-project/commit/1493c247b687160aa92cf13ac1c6f363870bbac0
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
Log Message:
-----------
[ASan][test] Fix TestCases/Posix/stack-overflow.cpp on Solaris/sparcv9 (#109101)
When ASan testing is enabled on SPARC as per PR #107405, the
```
AddressSanitizer-sparc-sunos :: TestCases/Posix/stack-overflow.cpp
```
test `FAIL`s:
```
compiler-rt/test/asan/TestCases/Posix/stack-overflow.cpp:80:12: error: CHECK: expected string not found in input
// CHECK: {{stack-overflow on address 0x.* \(pc 0x.* bp 0x.* sp 0x.* T.*\)}}
^
AddressSanitizer:DEADLYSIGNAL
AddressSanitizer:DEADLYSIGNAL
=================================================================
==11358==ERROR: AddressSanitizer: SEGV on unknown address 0xff3fff90 (pc 0x000db0c0 bp 0xfeed59f8 sp 0xfeed5978 T0)
==11358==The signal is caused by a READ memory access.
AddressSanitizer:DEADLYSIGNAL
AddressSanitizer: nested bug in the same thread, aborting.
```
It turns out that `sanitizer_linux.cpp` (`GetPcSpBp`) tries to
dereference the stack pointer to get at the saved frame pointer, which
cannot work since `sp` has been invalidated by the stack overflow in the
test. The access attempt thus leads to a second `SEGV`.
Solaris `walkcontext(3C)` doesn't have that problem: in the original
OpenSolaris sources (`$SRC/lib/libc/port/gen/walkstack.c`) they used
`/proc/self/as` to avoid the fault, which is quite heavy-handed. Solaris
11.4 uses a non-faulting load instead (`load_no_fault_uint32`, which
just uses the `lduwa` insn).
This patch follows this lead, returning a `NULL` `bp` in the failure
case. Unfortunately, this leads to `SEGV`s in the depth of the unwinder,
so this patch avoids printing a stack trace in this case.
Tested on `sparcv9-sun-solaris2.11` and `sparc64-unknown-linux-gnu`.
Commit: 4ac141683c310447f0efba775dc59b2145511ac0
https://github.com/llvm/llvm-project/commit/4ac141683c310447f0efba775dc59b2145511ac0
Author: tomasz-kaminski-sonarsource <79814193+tomasz-kaminski-sonarsource at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaDecl.cpp
M clang/test/CXX/class/class.friend/p7-cxx20.cpp
M clang/test/CXX/class/class.mfct/p1-cxx20.cpp
Log Message:
-----------
[C++20][Modules] NFC Reworked handling of inline for functions defined in class (#109470)
Reworked handling of implicit inline marking for member and friend
function defined in class.
Now, we handle it in an additive manner, i.e. if such in-class functions
are inline implicitly by language rules,
we mark the as `setImplicitInline`, and perform no action otherwise.
As we never remove inline specifier, the implementation is orthogonal to
other sources of inline
(like `inline`, `constexpr`, e.t.c), and we do not need to handle them
specially.
Also included test for `constexpr`, `consteval` and global module cases.
Commit: 3907d186d627f8957627b2861cf6f879d07c93c2
https://github.com/llvm/llvm-project/commit/3907d186d627f8957627b2861cf6f879d07c93c2
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
Log Message:
-----------
[sanitizer_common] Heed __ndbl_ prefix for 32-bit Linux/sparc64 inter… (#109106)
…ceptors
When ASan testing is enabled on SPARC as per PR #107405, a couple of
tests `FAIL` on Linux/sparc64:
```
AddressSanitizer-sparc-linux :: TestCases/printf-2.c
AddressSanitizer-sparc-linux :: TestCases/printf-3.c
AddressSanitizer-sparc-linux :: TestCases/printf-4.c
AddressSanitizer-sparc-linux :: TestCases/printf-5.c
SanitizerCommon-asan-sparc-Linux :: Linux/unexpected_format_specifier_test.cpp
```
It turns out the interceptors aren't used since on Linux/sparc64
`double` and `long double` are the same, and a couple of `stdio`
functions are prefixed with `__nldbl_` (no long double) accordingly.
This patch handles this.
Tested on `sparc64-unknown-linux-gnu`.
Commit: 4a264c559922a8754a0e28fbf316ba667ec19798
https://github.com/llvm/llvm-project/commit/4a264c559922a8754a0e28fbf316ba667ec19798
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
Log Message:
-----------
[sanitizer_common] Fix GetArgsAndEnv on Linux/sparc64 (#109109)
When ASan testing is enabled on SPARC as per PR #107405, the
```
AddressSanitizer-sparc-linux :: TestCases/Posix/print_cmdline.cpp
```
test `FAIL`s. Either `ASAN_OPTIONS=print_cmdline=true` yielded binary
garbage in the `Command:` output or just an empty string.
It turns out one needs to apply an offset to `__libc_stack_end` to get
at the actual `argc`/`argv`, as described in `glibc`'s
`sysdeps/sparc/sparc{32,64}/dl-machine.h` (`DL_STACK_END`).
This patch does this, fixing the test.
Tested on `sparc64-unknown-linux-gnu`.
Commit: d814006c0aedf806f2ea09660c26f51099020b2c
https://github.com/llvm/llvm-project/commit/d814006c0aedf806f2ea09660c26f51099020b2c
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Posix/coverage-fork.cpp
Log Message:
-----------
[ASan][test] Fix Posix/coverage-fork.cpp on Solaris (#109626)
With ASan testing enabled on SPARC as per PR #107405, the
```
AddressSanitizer-sparc-sunos-dynamic :: TestCases/Posix/coverage-fork.cpp
```
test occasionally `FAIL`s on Solaris/sparcv9:
```
compiler-rt/test/asan/TestCases/Posix/coverage-fork.cpp:46:15: error: CHECK-DAG: expected string not found in input
// CHECK-DAG: Parent PID: [[ParentPID:[0-9]+]]
^
```
It turns out that the output for parent and child processes is
interleaved like
```
Parent PID: Child PID: 27426
27425
```
Checking with `truss` shows that the `fprintf`s are implemented as 3
separate `write`s:
```
28489: write(2, " P a r e n t P I D : ", 12) = 12
28489: write(2, " 2 8 4 8 9", 5) = 5
28489: write(2, "\n", 1) = 1
```
To avoid this, this patch switches the test to use `snprintf`/`write` to
guarantee the output is atomic.
Tested on `sparcv9-sun-solaris2.11`, `amd64-pc-solaris2.11`, and
`x86_64-pc-linux-gnu`.
Commit: debc325bb1f58025c44393408a2b5a53ef8041f9
https://github.com/llvm/llvm-project/commit/debc325bb1f58025c44393408a2b5a53ef8041f9
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/test/CodeGen/Mips/cconv/illegal-vectors.ll
Log Message:
-----------
[MIPS] Fix failing to legalize load+call with vector of non-p2 integer (#109625)
Add a condition to check whether the vector element type is a power of 2.
Fixes #102870.
Commit: 5cd0900ef6eb97d72803bdca7180538a40431722
https://github.com/llvm/llvm-project/commit/5cd0900ef6eb97d72803bdca7180538a40431722
Author: Marina Taylor <marina_taylor at apple.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/icmp-inttoptr.ll
Log Message:
-----------
[InstCombine] Compare `icmp inttoptr, inttoptr` values directly (#107012)
InstCombine already has some rules for `icmp ptrtoint, ptrtoint` to drop
the casts and compare the source values. This change adds the same for
the reverse case with `inttoptr`.
Commit: 3dbd929ea6af134650dd1d91baeb61a4fc1b0eb8
https://github.com/llvm/llvm-project/commit/3dbd929ea6af134650dd1d91baeb61a4fc1b0eb8
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Log Message:
-----------
[AMDGPU][NFC] Update comment referring to SIRemoveShortExecBranches pass (#109756)
That pass no longer exists, since
5df2af8b0ef33f48b1ee72bcd27bc609b898da52 has merged it into
SIPreEmitPeephole.
Commit: e4d34261f85050af340ade9a7dcd332f11b4485f
https://github.com/llvm/llvm-project/commit/e4d34261f85050af340ade9a7dcd332f11b4485f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/codegen.m
Log Message:
-----------
[clang][bytecode] Ignore CPointerToObjCPointerCasts (#109760)
Commit: 14ab6190f6d1813cc5774dec2623862e1bd6876f
https://github.com/llvm/llvm-project/commit/14ab6190f6d1813cc5774dec2623862e1bd6876f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
M llvm/test/CodeGen/X86/canonicalize-vars.ll
Log Message:
-----------
[X86] Cleanup check prefixes in FCANONICALIZE tests for better sharing
Commit: 4b964002403a9b9be934174391ff5b698691a26b
https://github.com/llvm/llvm-project/commit/4b964002403a9b9be934174391ff5b698691a26b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Allow placement-new in std functions pre-C++26 (#109753)
Commit: b75174d05aa033a382d4c088e96e068a774f46da
https://github.com/llvm/llvm-project/commit/b75174d05aa033a382d4c088e96e068a774f46da
Author: David CARLIER <devnexen at gmail.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/test/sanitizer_common/TestCases/Linux/prctl.cpp
Log Message:
-----------
[compiler-rt] prctl interception update, SECCOMP_MODE_FILTER support. (#107722)
Commit: eabc8857e77c94a09624c12cc690753f68b87825
https://github.com/llvm/llvm-project/commit/eabc8857e77c94a09624c12cc690753f68b87825
Author: eddyz87 <eddyz87 at gmail.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets/BPF.cpp
M clang/test/Preprocessor/bpf-predefined-macros.c
Log Message:
-----------
[BPF] make __BPF_FEATURE_MAY_GOTO available for cpuv1 (#108071)
For some reason `__BPF_FEATURE_MAY_GOTO` is available for CPUs v{2,3,4}
but is not available for CPU v1. This limitation is arbitrary:
- the instruction is never produced by LLVM backend;
- on Linux Kernel side this instruction is available in kernels that
also support CPUv4.
Hence, it is more consistent to either always allow
`__BPF_FEATURE_MAY_GOTO` or only allow it for CPUv4.
Commit: 70529b24a30943d46e361d2990268499921e28a2
https://github.com/llvm/llvm-project/commit/70529b24a30943d46e361d2990268499921e28a2
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/MC/Disassembler/X86/apx/kmov.txt
Log Message:
-----------
[X86][APX] Do not emit {evex} prefix for memory variant (#109759)
This was mistakely changed by #109579, which doesn't match with other
EVEX decoding.
Commit: c5672e21ca2a16ff18cdaa83db11d2edb84c5e14
https://github.com/llvm/llvm-project/commit/c5672e21ca2a16ff18cdaa83db11d2edb84c5e14
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
Log Message:
-----------
[AArch64][CostModel] Reduce the cost of fadd reduction with fast flag (#108791)
fadd reduction with
1. Fast flag set
2. No of elements in input vector is power of 2 results in series of
faddp instructions. faddp instruction has latency/throughput identical
to fadd instruction and hence, we set relative cost=1 for faddp as well.
The change didn't show any regression with SPEC17-FP(C/C++),
llvm-test-suite on Neoverse-V2.
Commit: 3659aa8079e00d7bd4f2d9c68c404a93ec297200
https://github.com/llvm/llvm-project/commit/3659aa8079e00d7bd4f2d9c68c404a93ec297200
Author: Pravin Jagtap <Pravin.Jagtap at amd.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
A llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
A llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
Log Message:
-----------
[AMDGPU] Fix handling of DBG_VALUE_LIST while fixing the dead frame indices. (#109685)
Both SGPR->VGPR and VGPR->AGPR spilling code give a fixup to the spill
frame indices referred in debug instructions so that they can be
entirely removed. The stack argument is present at 0th index in
DBG_VALUE and at 2nd index for DBG_VALUE_LIST.
Fixes: SWDEV-484156
Commit: 30dbbdd2ea25e3ab5596e1fb0474696b242a760c
https://github.com/llvm/llvm-project/commit/30dbbdd2ea25e3ab5596e1fb0474696b242a760c
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
Log Message:
-----------
[Bazel] Fix for 127349fcba81646389e4b8202b35405a5fdbef47
Commit: cc7b24a4d125e9a81480aaaa961a2b963bbb2ea2
https://github.com/llvm/llvm-project/commit/cc7b24a4d125e9a81480aaaa961a2b963bbb2ea2
Author: Piotr Fusik <p.fusik at samsung.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Log Message:
-----------
[NFC] Fix typos in comments (#109765)
Commit: bfd8f7ee4a85ae8873db14fa6e7e31223a1df169
https://github.com/llvm/llvm-project/commit/bfd8f7ee4a85ae8873db14fa6e7e31223a1df169
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/extractelement-fp.ll
Log Message:
-----------
[X86] SimplifyDemandedVectorEltsForTargetNode - reduce vector width of FRSQRT/FRCP ymm nodes.
If we only demand the lower subvector of a FRSQRT/FRCP node, then reduce the width of the instruction.
Commit: 396f6775143ffa80b9f0e72e7250613092d88124
https://github.com/llvm/llvm-project/commit/396f6775143ffa80b9f0e72e7250613092d88124
Author: Scott Egerton <9487234+ScottEgerton at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
R llvm/lib/Target/AMDGPU/AMDGPUInsertSingleUseVDST.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
R llvm/test/CodeGen/AMDGPU/insert-singleuse-vdst.mir
R llvm/test/MC/AMDGPU/gfx1150_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[AMDGPU] Remove unused VGPRSingleUseHintInsts feature (#109769)
Commit: fc661df41a206779a9323fb9dd49038c44084d5e
https://github.com/llvm/llvm-project/commit/fc661df41a206779a9323fb9dd49038c44084d5e
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M lld/COFF/Writer.cpp
Log Message:
-----------
[LLD][COFF][NFC] Use dyn_cast on section chunks (#109701)
Instead of dyn_cast_or_null, chunk pointers are never null.
Commit: f664d313cd63893d7a4a496fdf0de988323b6b09
https://github.com/llvm/llvm-project/commit/f664d313cd63893d7a4a496fdf0de988323b6b09
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/test/Transforms/MemCpyOpt/fca2memcpy.ll
Log Message:
-----------
MemCpyOpt: replace an AA query with MSSA query (NFC) (#108535)
Fix a long-standing TODO.
Commit: 040bb37195d93f75cc7ce6b83254ab5db959a085
https://github.com/llvm/llvm-project/commit/040bb37195d93f75cc7ce6b83254ab5db959a085
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/float-induction.ll
Log Message:
-----------
[VPlan] Fix incorrect argument for CreateBinOp after 06c3a7d2d764.
06c3a7d2d764 incorrectly updated CreateBinOp to pass the debug location,
which gets interpreted as FPMath node. Remove the argument.
Commit: a3cf01d58587d81b184d40091a86d6b8bf92d240
https://github.com/llvm/llvm-project/commit/a3cf01d58587d81b184d40091a86d6b8bf92d240
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M lldb/docs/index.rst
A lldb/docs/resources/addinglanguagesupport.md
Log Message:
-----------
[lldb][docs] Resurrect the information on adding a new language (#109427)
This got deleted in e078c9507c3abb4d9bb2265c366b26557880a3e3, I presume
accidentally, because it didn't have a corresponding rst file for it.
So I've brought it back and converted it into Markdown. The content
remains accurate, from what I know at least.
It's a bit "now draw the rest of the owl" but if nothing else, it gives
you a bunch of important classes to go and research as a starting point.
You can see the original content here:
https://github.com/llvm/llvm-project/blob/5d71fc5d7b5ffe2323418a09db6eddaf84d6c662/lldb/www/adding-language-support.html
Commit: d4f38f43f5402041dd36977baa459830011d6ac6
https://github.com/llvm/llvm-project/commit/d4f38f43f5402041dd36977baa459830011d6ac6
Author: Nashe Mncube <nashe.mncube at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMFeatures.td
M llvm/lib/Target/ARM/ARMProcessors.td
M llvm/test/CodeGen/ARM/preferred-function-alignment.ll
Log Message:
-----------
[LLVM][ARM][CodeGen]Define branch instruction alignment for m85 and m7 (#109647)
Branch instruction alignments were not defined for cortex-m85 and
cortex-m7 which misses an optimisation opportunity. With this patch we
see performance improvements as high as 5% on some benchmarks with most
around 1%.
Commit: ea902d1b36e4e3a7d7bdd0f7bce3c460b6dd6e80
https://github.com/llvm/llvm-project/commit/ea902d1b36e4e3a7d7bdd0f7bce3c460b6dd6e80
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/LLVMContext.h
M llvm/include/llvm/IR/Type.h
M llvm/lib/IR/LLVMContext.cpp
Log Message:
-----------
[IR] Remove deprecated opaque pointer migration methods
Remove the following methods:
* Type::getNonOpaquePointerElementType()
* Type::isOpaquePointerTy()
* LLVMContext::supportsTypedPointers()
* LLVMContext::setOpaquePointers()
These were used temporarily during the opaque pointers migration,
and are no longer needed.
Commit: 3d34053af61ff45e05d230d2678eb8e95322eb14
https://github.com/llvm/llvm-project/commit/3d34053af61ff45e05d230d2678eb8e95322eb14
Author: Shengchen Kan <shengchen.kan at intel.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/test/Driver/relax.s
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
M llvm/test/MC/ELF/relocation-alias.s
M llvm/test/MC/X86/gotpcrelx.s
M llvm/test/MC/X86/reloc-directive-elf-64.s
Log Message:
-----------
[X86,MC] Add relocation R_X86_64_REX2_GOTPCRELX (#106681)
For
mov name at GOTPCREL(%rip), %reg
test %reg, name at GOTPCREL(%rip)
binop name at GOTPCREL(%rip), %reg
where binop is one of adc, add, and, cmp, or, sbb, sub, xor
instructions, add
`R_X86_64_REX2_GOTPCRELX`/`R_X86_64_CODE_4_GOTPCRELX` = 43
if the instruction starts at 4 bytes before the relocation offset. It
similar to R_X86_64_GOTPCRELX.
Linker can treat `R_X86_64_REX2_GOTPCRELX`/`R_X86_64_CODE_4_GOTPCRELX`
as `R_X86_64_GOTPCREL` or convert the above instructions to
lea name(%rip), %reg
mov $name, %reg
test $name, %reg
binop $name, %reg
if the first byte of the instruction at the relocation `offset - 4` is
`0xd5` (namely, encoded w/ REX2 prefix) when possible.
Binutils patch:
https://github.com/bminor/binutils-gdb/commit/3d5a60de52556f6a53d71d7e607c6696450ae3e4
Binutils mailthread:
https://sourceware.org/pipermail/binutils/2023-December/131462.html
ABI discussion: https://groups.google.com/g/x86-64-abi/c/KbzaNHRB6QU
Blog: https://kanrobert.github.io/rfc/All-about-APX-relocation
Commit: 6cfe6a6b3e9578be80120add7fbe19506f747196
https://github.com/llvm/llvm-project/commit/6cfe6a6b3e9578be80120add7fbe19506f747196
Author: Georgi Mirazchiyski <georgi.mirazchiyski at codeplay.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[NFC][AMDGPU] Assert no bad shift operations will happen (#108416)
The assumption in the asserts is based on the fact that no SGPR/VGPR
register Arg mask in the ISelLowering and Legalizer can equal zero. They
are implicitly set to ~0 by default (meaning non-masked) or explicitly
to a non-zero value.
The `optimizeCompareInstr` case is different from the above described.
It requires the mask to be a power-of-two because it's a special-case
optimization, hence in this case we still cannot have an invalid shift.
This commit also silences static analysis tools wrt potential bad shifts
that could result from the output of `countr_zero(Mask)`.
Commit: 5dc15ddf575978e0115b1a6edacb59f056792a80
https://github.com/llvm/llvm-project/commit/5dc15ddf575978e0115b1a6edacb59f056792a80
Author: Georgi Mirazchiyski <georgi.mirazchiyski at codeplay.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
Log Message:
-----------
[AMDGPU] Default-initialize uninitialized class member variables (#108428)
Commit: 4f8e76684f4c1e67726222c35f173ef722464a7e
https://github.com/llvm/llvm-project/commit/4f8e76684f4c1e67726222c35f173ef722464a7e
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll
Log Message:
-----------
[AsmPrinter] Do not emit label instructions after the function body if the target is SPIR-V (#107013)
AsmPrinter always creates a symbol for the end of function if valid
debug info is present. However, this breaks SPIR-V target's output,
because SPIR-V specification allows label instructions only inside a
block, not after the function body (see
https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#OpLabel).
This PR proposes to disable emission of label instructions after the
function body if the target is SPIR-V.
This PR is a fix of the
https://github.com/llvm/llvm-project/issues/102732 issue.
Commit: 497759e872a53964a54db941f3a1ed74446c5ed4
https://github.com/llvm/llvm-project/commit/497759e872a53964a54db941f3a1ed74446c5ed4
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
A lldb/test/API/functionalities/gdb_remote_client/TestAArch64XMLRegistersSVEOnly.py
Log Message:
-----------
[lldb][AArch64] Create Neon subregs when XML only includes SVE (#108365)
Fixes #107864
QEMU decided that when SVE is enabled it will only tell us about SVE
registers in the XML, and not include Neon registers. On the grounds
that the Neon V registers can be read from the bottom 128 bits of a SVE
Z register (SVE's vector length is always >= 128 bits).
To support this we create sub-registers just as we do for S and D
registers of the V registers. Except this time we use part of the Z
registers.
This change also updates our fallback for registers with unknown types
that are > 128 bit. This is detailed in
https://github.com/llvm/llvm-project/issues/87471, though that covers
more than this change fixes.
We'll now treat any register of unknown type that is >= 128 bit as a
vector of bytes. So that the user gets to see something
even if the order might be wrong.
And until lldb supports vector and union types for registers, this is
also the only way we can get a value to apply the sub-reg to, to make
the V registers.
Commit: c30fa3cde755e7519f0962f581868a09da1ea130
https://github.com/llvm/llvm-project/commit/c30fa3cde755e7519f0962f581868a09da1ea130
Author: Georgi Mirazchiyski <georgi.mirazchiyski at codeplay.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Fix has_single_bit assertion for Mask in SIInstrInfo (#109785)
Convert the `int64_t` Mask to `uint64_t` for `llvm::has_single_bit` to
compile.
Commit: 029b9b611d8becf04f4c525ab2b70e956b4b186d
https://github.com/llvm/llvm-project/commit/029b9b611d8becf04f4c525ab2b70e956b4b186d
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/docs/CMake.rst
Log Message:
-----------
[llvm][docs] Improve formatting of ENABLE_PROJECTS/RUNTIMES description
* Add line breaks so it's clear what should be passed to CMake.
* Make the note into an RST note block.
* Fix a couple of markdown style plain text markers.
Commit: c1826aeef353bf4bd8b181b47a0dbb1f1af93836
https://github.com/llvm/llvm-project/commit/c1826aeef353bf4bd8b181b47a0dbb1f1af93836
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
Log Message:
-----------
[mlir][tensor] Add new helper hooks for RelayoutOp (#109642)
Implements two helper hooks for PackOp and UnPackOP, `getAllOuterDims`
and `getTiledOuterDims`, and adds them to RelayoutOp (that both PackOp
an UnPackOp inherit from).
This improves code re-use and also clarifies the meaning of "outer dims"
and "tiled outer dims".
Commit: 3e3780ef6ab5902cd1763e28bb143e47091bd23a
https://github.com/llvm/llvm-project/commit/3e3780ef6ab5902cd1763e28bb143e47091bd23a
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Implement nxvf32 fpround to nxvbf16. (#107420)
Commit: 8ba334bc4ad1e20c8201b85ed0a3e3b87bc47fe1
https://github.com/llvm/llvm-project/commit/8ba334bc4ad1e20c8201b85ed0a3e3b87bc47fe1
Author: Dominik Montada <dominik.montada at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/test/CodeGen/AArch64/mlicm-stack-write-check.mir
M llvm/test/CodeGen/Hexagon/expand-condsets-impuse2.mir
M llvm/test/CodeGen/Hexagon/expand-condsets-phys-reg.mir
M llvm/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
A llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir
A llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties.mir
M llvm/test/CodeGen/X86/sjlj-shadow-stack-liveness.mir
M llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
Log Message:
-----------
[MIR] Allow overriding isSSA, noPhis, noVRegs in MIR input (#108546)
Allow setting the computed properties IsSSA, NoPHIs, NoVRegs for MIR
functions in MIR input. The default value is still the computed value.
If the property is set to false, the computed result is ignored. Conflicting
values (e.g. setting IsSSA where the input MIR is clearly not SSA) lead to
an error.
Closes #37787
Commit: db054a197002c4d6b2c568d7c36d86f5fccade2d
https://github.com/llvm/llvm-project/commit/db054a197002c4d6b2c568d7c36d86f5fccade2d
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
Log Message:
-----------
[AArch64][SME] Fix ADDVL addressing to scavenged stackslot. (#109674)
In https://reviews.llvm.org/D159196 we avoided stackslot scavenging
when there was no FP available. But in the case where FP is available
we need to actually prefer using the FP over the BP.
This change affects more than just SME, but it should be a general
improvement, since any slot above the (address pointed to by) FP
is always closer to FP than BP, so it makes sense to always favour
using the FP to address it when the FP is available.
This also fixes the issue for SME where this is not just preferred
but required.
Commit: 3073c3c2290a6d9b12fbaefa40dd22eef6312895
https://github.com/llvm/llvm-project/commit/3073c3c2290a6d9b12fbaefa40dd22eef6312895
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
A llvm/test/CodeGen/AArch64/sincos-stack-slots.ll
Log Message:
-----------
[SDAG] Avoid creating redundant stack slots when lowering FSINCOS (#108401)
When lowering `FSINCOS` to a library call (that takes output pointers)
we can avoid creating new stack allocations if the results of the
`FSINCOS` are being stored. Instead, we can take the destination
pointers from the stores and pass those to the library call.
---
Note: As a NFC this also adds (and uses) `RTLIB::getFSINCOS()`.
Commit: 3ec5e74c0dc99095f5961a31421c7adaf2860ec8
https://github.com/llvm/llvm-project/commit/3ec5e74c0dc99095f5961a31421c7adaf2860ec8
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fix layering for 127349fcba81646389e4b8202b35405a5fdbef47
Commit: 66c8dce82e60ebd22bbe6ce7c1550ae6de057625
https://github.com/llvm/llvm-project/commit/66c8dce82e60ebd22bbe6ce7c1550ae6de057625
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/docs/TableGen/ProgRef.rst
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/TableGen/TGLexer.h
M llvm/lib/TableGen/TGParser.cpp
A llvm/test/TableGen/listflatten-error.td
A llvm/test/TableGen/listflatten.td
Log Message:
-----------
[TableGen] Add a !listflatten operator to TableGen (#109346)
Add a !listflatten operator that will transform an input list of type
`list<list<X>>` to `list<X>` by concatenating elements of the
constituent lists of the input argument.
Commit: 12033e550b186f3b3e4d2ca3ce9cfc3d3a3fa6e1
https://github.com/llvm/llvm-project/commit/12033e550b186f3b3e4d2ca3ce9cfc3d3a3fa6e1
Author: Bevin Hansson <59652494+bevin-hansson at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/SPARC/salvage-debug-isel.ll
M llvm/test/CodeGen/X86/pr57673.ll
Log Message:
-----------
[ISelDAG] Salvage debug info at isel by referring to frame indices. (#109126)
We can refer to frame index locations when salvaging debug info
for certain nodes, which prevents the compiler from optimizing
out the location.
Commit: b47d1787b51f55d69ef1b4f88e72cd54af451649
https://github.com/llvm/llvm-project/commit/b47d1787b51f55d69ef1b4f88e72cd54af451649
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
Log Message:
-----------
[mlir][vector] Refine vectorisation of tensor.extract (#109580)
This PR fixes a bug in `isLoopInvariantIdx`. It makes sure that the
following case is vectorised as `vector.gather` (as opposed to
attempting a contiguous load):
```mlir
func.func @index_from_output_column_vector_gather_load(%src: tensor<8x128xf32>) -> tensor<8x1xf32> {
%c0 = arith.constant 0 : index
%0 = tensor.empty() : tensor<8x1xf32>
%res = linalg.generic {
indexing_maps = [#map],
iterator_types = ["parallel", "parallel"]
} outs(%0 : tensor<8x1xf32>) {
^bb0(%arg1: f32):
%1 = linalg.index 0 : index
%extracted = tensor.extract %src[%1, %c0] : tensor<8x128xf32>
linalg.yield %extracted : f32
} -> tensor<8x1xf32>
return %res : tensor<8x1xf32>
}
```
Specifically, when looking for loop-invariant indices in
`tensor.extract` Ops, any `linalg.index` Op that's used in address
colcluation should only access loop dims that are == 1. In the example
above, the following does not meet that criteria:
```mlir
%1 = linalg.index 0 : index
```
Note that this PR also effectively addresses the issue fixed in #107922,
i.e. exercised by:
* `@vectorize_nd_tensor_extract_load_1d_column_vector_using_gather_load`
`getNonUnitLoopDim` introduced in #107922 is still valid though. In
fact, it is required to identify that the following case is a contiguous
load:
```mlir
func.func @index_from_output_column_vector_contiguous_load(%src: tensor<8x128xf32>) -> tensor<8x1xf32> {
%c0 = arith.constant 0 : index
%0 = tensor.empty() : tensor<8x1xf32>
%res = linalg.generic {
indexing_maps = [#map],
iterator_types = ["parallel", "parallel"]
} outs(%0 : tensor<8x1xf32>) {
^bb0(%arg1: f32):
%1 = linalg.index 0 : index
%extracted = tensor.extract %src[%c0, %1] : tensor<8x128xf32>
linalg.yield %extracted : f32
} -> tensor<8x1xf32>
return %res : tensor<8x1xf32>
}
```
Some logic is still missing to lower the above to
`vector.transfer_read`, so it is conservatively lowered to
`vector.gather` instead (see TODO in
`getTensorExtractMemoryAccessPattern`).
There's a few additional changes:
* `getNonUnitLoopDim` is simplified and renamed as
`getTrailingNonUnitLoopDimIdx`, additional comments are added (note
that the functionality didn't change);
* extra comments in a few places, variable names in comments update to
use Markdown (which is the preferred approach in MLIR).
This is a follow-on for:
* https://github.com/llvm/llvm-project/pull/107922
* https://github.com/llvm/llvm-project/pull/102321
Commit: 106e4506ce6084e10353073d8880e2f736b74981
https://github.com/llvm/llvm-project/commit/106e4506ce6084e10353073d8880e2f736b74981
Author: David Pagan <dave.pagan at amd.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
Log Message:
-----------
[OpenMP][Docs] Update OpenMP release notes with 'omp scope' (#109752)
Release notes: added 'omp scope' directive to "OpenMP Support" section
of "What's New in Clang"
Commit: ebbf664aa31ac51c43a345a8a3d0734c54be7c4b
https://github.com/llvm/llvm-project/commit/ebbf664aa31ac51c43a345a8a3d0734c54be7c4b
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
Log Message:
-----------
[AMDGPU] Use shared prefix in GFX12 barrier test
Commit: 57bee1e4322d34f9760563081f9c10b6850bc2bf
https://github.com/llvm/llvm-project/commit/57bee1e4322d34f9760563081f9c10b6850bc2bf
Author: Xing Guo <higuoxing+github at gmail.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/x86_64.h
M llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
M llvm/lib/ExecutionEngine/JITLink/x86_64.cpp
A llvm/test/ExecutionEngine/JITLink/x86-64/ELF_R_X86_64_PC.s
R llvm/test/ExecutionEngine/JITLink/x86-64/ELF_R_X86_64_PC8.s
Log Message:
-----------
[JITLink] Add support for R_X86_64_PC16 relocation type. (#109630)
This patch adds support for R_X86_64_PC16 relocation type and
x86_64::Delta16 edge kind. This patch also adds missing test cases for
R_X86_64_PC32, R_X86_64_PC64 relocation types.
Commit: 02a334de6690202154ef09456c581618ff290f9a
https://github.com/llvm/llvm-project/commit/02a334de6690202154ef09456c581618ff290f9a
Author: Nathan Gauër <brioche at google.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
Log Message:
-----------
[SPIR-V] Fix bad insertion for type/id MIR (#109686)
Those instructions were inserted either after the instruction using it,
or in the middle of the module.
The first directly causes an issue. The second causes a more subtle
issue: the first type the type is inserted, the emission is fine, but
the second times, the first instruction is reused, without checking its
position in the function. This can lead to the second usage dominating
the definition.
In SPIR-V, types are usually in the header, above all code definition,
but at this stage I don't think we can, so what I do instead is to emit
it in the first basic block.
This commit reduces the failed tests with expensive checks from 107 to
71.
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: fe7bc872aad83fc0d5cf998230df752e73bb696d
https://github.com/llvm/llvm-project/commit/fe7bc872aad83fc0d5cf998230df752e73bb696d
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/test/DebugInfo/Generic/debug-ranges-duplication.ll
Log Message:
-----------
[DebugInfo][z/OS] XFAIL debug-ranges-duplication.ll on z/OS (#109681)
Same fix was provided for AIX in commit
704da919bafa5b088223f9d77424f24ae754539e.
The issue is unsupported DWARF 5 section with the following assertion:
`Assertion failed: Section && "Cannot switch to a null section!", file:
llvm/lib/MC/MCStreamer.cpp, line: 1266 `
Commit: 0de1e3e787c6d78b87ccb865ba2f2daf8d8e4ecc
https://github.com/llvm/llvm-project/commit/0de1e3e787c6d78b87ccb865ba2f2daf8d8e4ecc
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/tools/llvm-ctxprof-util/llvm-ctxprof-util.cpp
Log Message:
-----------
[;SystemZ][z/OS] Fix llvm-ctxprof to open input files in text mode (#109691)
Reading text files on z/OS relies on auto conversion to handle
ASCII/EBCDIC correctly. For this to work files need to be opened in text
mode is that is the type of the file. This PR fixes `llvm-ctxprof`
utility in this regards which in turn fixes the following LIT failure on
z/OS:
`FAIL: LLVM :: Analysis/CtxProfAnalysis/flatten-zero-path.ll`
Commit: 622ae7ffa432ca5985cf1655cf499e04b289bbf2
https://github.com/llvm/llvm-project/commit/622ae7ffa432ca5985cf1655cf499e04b289bbf2
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-insr.ll
Log Message:
-----------
[LLVM][InstCombine][AArch64] sve.insr(splat(x), x) ==> splat(x) (#109445)
Fixes https://github.com/llvm/llvm-project/issues/100497
Commit: 216e1b90c4a988880b772b8d152769f7d0cac0c6
https://github.com/llvm/llvm-project/commit/216e1b90c4a988880b772b8d152769f7d0cac0c6
Author: davidtrevelyan <davidtrevelyan at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
M compiler-rt/lib/rtsan/rtsan_diagnostics.h
Log Message:
-----------
[rtsan] Remove std::variant from rtsan diagnostics (#109786)
Following issue #109529 and PR
#109715, this PR removes the
`std::variant` in rtsan's diagnostics code, in favour of a solution by
`enum` without the C++ runtime.
Commit: b1e4656e8ee3289dc5f3139fc8eb33152f96bfe6
https://github.com/llvm/llvm-project/commit/b1e4656e8ee3289dc5f3139fc8eb33152f96bfe6
Author: Pavel Skripkin <paskripkin at gmail.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
Log Message:
-----------
[NFC][analyzer] Make `invalidateRegions` accept `Stmt` instead of `Expr` (#109792)
As was reported
[here](https://github.com/llvm/llvm-project/pull/103714#pullrequestreview-2238037812),
`invalidateRegions` should accept `Stmt` instead of `Expr`. This
conversion is possible, since `Expr` was anyway converted back to `Stmt`
later.
This refactoring is needed to fix another FP related to use of inline
assembly. The fix would be to change `State->bindLoc` to
`state->invalidateRegions` inside inline assembly visitor, since
`bindLoc` only binds to offset 0, which is not really correct semantics
in case of inline assembly.
Commit: 3fbf6f8bb183ad8b9157e50c442479f4ca7a9b8d
https://github.com/llvm/llvm-project/commit/3fbf6f8bb183ad8b9157e50c442479f4ca7a9b8d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[LV] Remove more references of unrolled parts after 57f5d8f2fe.
Continue to clean up some now stale references of unroll parts and
related terminology as pointed out post-commit for 06c3a7d.
Commit: 8b5e841487976ecc4233227fdd069f5a5f4443f0
https://github.com/llvm/llvm-project/commit/8b5e841487976ecc4233227fdd069f5a5f4443f0
Author: Chao Chen <chao.chen at intel.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
[MLIR][XeGPU] Updates XeGPU TensorDescAttr and Refine Gather/Scatter definition (#109675)
Bring back #109144 with fixes to VectorToXeGPU
Commit: 36757613b73908f055674a8df0b51cc00aa04373
https://github.com/llvm/llvm-project/commit/36757613b73908f055674a8df0b51cc00aa04373
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
R llvm/test/CodeGen/NVPTX/intrin-nocapture.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
Log Message:
-----------
[NVVM] Upgrade nvvm.ptr.* intrinics to addrspace cast (#109710)
Remove the following intrinsics which can be trivially replaced with an
`addrspacecast`
* llvm.nvvm.ptr.gen.to.global
* llvm.nvvm.ptr.gen.to.shared
* llvm.nvvm.ptr.gen.to.constant
* llvm.nvvm.ptr.gen.to.local
* llvm.nvvm.ptr.global.to.gen
* llvm.nvvm.ptr.shared.to.gen
* llvm.nvvm.ptr.constant.to.gen
* llvm.nvvm.ptr.local.to.gen
Also, cleanup the NVPTX lowering of `addrspacecast` making it more
concise.
Commit: bcbdf7ad6b571d11c102d018c78ee0fbf71e3e2c
https://github.com/llvm/llvm-project/commit/bcbdf7ad6b571d11c102d018c78ee0fbf71e3e2c
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
Log Message:
-----------
[RISCV][TTI/SLP] Add test coverage for select of constants costing
Provides coverage for an upcoming change which accounts for the cost
of materializing the vector constants in the vector select.
Commit: 31ac400e451b5dcbf11a3ece94d58dc3edf24e14
https://github.com/llvm/llvm-project/commit/31ac400e451b5dcbf11a3ece94d58dc3edf24e14
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove another reference of unrolled parts after 57f5d8f2fe.
Continue to clean up some now stale references of unroll parts and
related terminology as pointed out post-commit for 06c3a7d.
Commit: fa17977c315062646d4d1e01262d68dd69313e61
https://github.com/llvm/llvm-project/commit/fa17977c315062646d4d1e01262d68dd69313e61
Author: lntue <35648136+lntue at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[libc][bazel] Remove specializations from libc_math_function. (#109802)
There are no more specializations `libc/src/math/x86_64` or
`libc/src/math/aarch64` anymore. All implementations are going through
the generic implementation.
Commit: 99ade15d192db4afa897a7052a9c73dd42c2b88c
https://github.com/llvm/llvm-project/commit/99ade15d192db4afa897a7052a9c73dd42c2b88c
Author: Nico Weber <thakis at chromium.org>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
M compiler-rt/test/sanitizer_common/TestCases/Linux/prctl.cpp
Log Message:
-----------
Revert "[compiler-rt] prctl interception update, SECCOMP_MODE_FILTER support. (#107722)"
This reverts commit b75174d05aa033a382d4c088e96e068a774f46da.
Does not build on Android, see comments on
https://github.com/llvm/llvm-project/pull/107722
Commit: fda01437af339c87ecd226596dd1b5f6d2c6cbfa
https://github.com/llvm/llvm-project/commit/fda01437af339c87ecd226596dd1b5f6d2c6cbfa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
Log Message:
-----------
[Rewrite] Use SmallSetVector (NFC) (#109746)
We can combine:
SmallVector<ValueDecl *, 8> BlockByCopyDecls;
llvm::SmallPtrSet<ValueDecl *, 8> BlockByCopyDeclsPtrSet;
into:
llvm::SmallSetVector<ValueDecl *, 8> BlockByCopyDecls;
Likewise, we can combine:
SmallVector<ValueDecl *, 8> BlockByRefDecls;
llvm::SmallPtrSet<ValueDecl *, 8> BlockByRefDeclsPtrSet;
into:
llvm::SmallSetVector<ValueDecl *, 8> BlockByRefDecls;
Commit: 36dce5091e384087f5d1ceaf3777ac14f41087e4
https://github.com/llvm/llvm-project/commit/36dce5091e384087f5d1ceaf3777ac14f41087e4
Author: spupyrev <spupyrev at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
Log Message:
-----------
[CodeLayout][NFC] Format and minor refactoring of MBP (#109729)
This PR has two (NFC) commits:
- clang-format MBP
- move a part of tail duplication and block aligning into helper
functions for better readability.
Commit: f12d72d9c95ea2cd82d3e2a70c8cd5d5e88e2060
https://github.com/llvm/llvm-project/commit/f12d72d9c95ea2cd82d3e2a70c8cd5d5e88e2060
Author: David Green <david.green at arm.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/PtrUseVisitor.h
Log Message:
-----------
[PtrInfo] Use plain pointer over 'PointerIntPair<Instruction *, 1, bool>'. NFC (#109772)
This PtrInfo holds a pointer and whether it has been set. We can
represent this sentinal value as a nullptr, as we would for most
pointers. This assumes that the value is never set to nullptr, but from
the uses that appears to be true and already assumed.
Commit: d075debc508898d5f365f8e909c54d6f4edada85
https://github.com/llvm/llvm-project/commit/d075debc508898d5f365f8e909c54d6f4edada85
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
Log Message:
-----------
[AMDGPU] Fix chain handling when lowering barrier intrinsics (#109799)
Previously we would fail an assertion in RemoveNodeFromCSEMaps after
lowering:
t3: ch = llvm.amdgcn.s.barrier.join t0, TargetConstant:i64<2973>,
Constant:i32<0>
to:
t6: ch = S_BARRIER_JOIN_IMM TargetConstant:i32<0>
Commit: d4a38c8ff5c993e14c42895b51a47272fb03a857
https://github.com/llvm/llvm-project/commit/d4a38c8ff5c993e14c42895b51a47272fb03a857
Author: Usman Nadeem <mnadeem at quicinc.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
Log Message:
-----------
[DFAJumpThreading] Handle select unfolding when user phi is not a dir… (#109511)
…ect successor
Previously the code assumed that the select instruction is defined in a
block that is a direct predecessor of the block where the PHINode uses
it. So, we were hitting an assertion when we tried to access the def
block as an incoming block for the user phi node.
This patch handles that case by using the correct end block and creating
a new phi node that aggregates both the values of the select in that end
block, and then using that new unfolded phi to overwrite the original
user phi node.
Fixes #106083
Change-Id: Ie471994cca232318f74a6e6438efa21e561c2dc0
Commit: 679c9717dfc9687a3bca78b45d9fd104b67e16f9
https://github.com/llvm/llvm-project/commit/679c9717dfc9687a3bca78b45d9fd104b67e16f9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Fix vector shifts on big-endian systems (#109800)
For shifts, the LHS and RHS element types might be different. The
variable naming here could probably use some love now, but I'm trying to
fix this as fast as possible.
See the discussion in https://github.com/llvm/llvm-project/pull/108949
Commit: 206408732bca2ef464732a39c8319d47c8a1dbea
https://github.com/llvm/llvm-project/commit/206408732bca2ef464732a39c8319d47c8a1dbea
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M lldb/include/lldb/Symbol/UnwindPlan.h
Log Message:
-----------
[lldb][NFC] Add a missing setter method for UnwindPlans (#109751)
The UnwindPlan class has getter and setter methods for specifying an
abstract register location, but it doesn't have a setter for a DWARF
Expression register location. This hasn't been needed for any of the
UnwindPlans that we do in mainline lldb yet, but it is used in the Swift
language SwiftLanguageRuntime plugin which creates UnwindPlan for async
functions. While it's currently unused on main branch, this is a
straightforward setter in the same form as the others, the only caveat
being that it doesn't own the dwarf expression bytes, it has a pointer
to them.
Commit: 7773243d9916f98ba0ffce0c3a960e4aa9f03e81
https://github.com/llvm/llvm-project/commit/7773243d9916f98ba0ffce0c3a960e4aa9f03e81
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
R llvm/test/Transforms/SLPVectorizer/X86/peek-through-shuffle.ll
R llvm/test/Transforms/SLPVectorizer/X86/phi-node-bitwidt-op-not.ll
R llvm/test/Transforms/SLPVectorizer/X86/phi-undef-input.ll
R llvm/test/Transforms/SLPVectorizer/X86/postponed_gathers.ll
R llvm/test/Transforms/SLPVectorizer/X86/pr31599-inseltpoison.ll
R llvm/test/Transforms/SLPVectorizer/X86/pr31599.ll
R llvm/test/Transforms/SLPVectorizer/X86/reduction-gather-non-scheduled-extracts.ll
R llvm/test/Transforms/SLPVectorizer/X86/reduction-modified-values.ll
R llvm/test/Transforms/SLPVectorizer/X86/reorder-clustered-node.ll
R llvm/test/Transforms/SLPVectorizer/X86/reordered-top-scalars.ll
R llvm/test/Transforms/SLPVectorizer/X86/reordering-single-phi.ll
R llvm/test/Transforms/SLPVectorizer/X86/reused-buildvector-matching-vectorized-node.ll
R llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
R llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
R llvm/test/Transforms/SLPVectorizer/X86/scalarazied-result.ll
R llvm/test/Transforms/SLPVectorizer/X86/scalarization-overhead.ll
R llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder2.ll
R llvm/test/Transforms/SLPVectorizer/X86/shuffle-multivector.ll
R llvm/test/Transforms/SLPVectorizer/X86/shufflebuilder-bug.ll
R llvm/test/Transforms/SLPVectorizer/X86/stores-non-ordered.ll
R llvm/test/Transforms/SLPVectorizer/X86/unknown-entries.ll
R llvm/test/Transforms/SLPVectorizer/X86/zext-incoming-for-neg-icmp.ll
A llvm/test/Transforms/SLPVectorizer/peek-through-shuffle.ll
A llvm/test/Transforms/SLPVectorizer/phi-node-bitwidt-op-not.ll
A llvm/test/Transforms/SLPVectorizer/phi-undef-input.ll
A llvm/test/Transforms/SLPVectorizer/postponed_gathers.ll
A llvm/test/Transforms/SLPVectorizer/pr31599-inseltpoison.ll
A llvm/test/Transforms/SLPVectorizer/pr31599.ll
A llvm/test/Transforms/SLPVectorizer/reduction-gather-non-scheduled-extracts.ll
A llvm/test/Transforms/SLPVectorizer/reduction-modified-values.ll
A llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
A llvm/test/Transforms/SLPVectorizer/reordered-top-scalars.ll
A llvm/test/Transforms/SLPVectorizer/reordering-single-phi.ll
A llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
A llvm/test/Transforms/SLPVectorizer/root-trunc-extract-reuse.ll
A llvm/test/Transforms/SLPVectorizer/same-scalar-in-same-phi-extract.ll
A llvm/test/Transforms/SLPVectorizer/scalarazied-result.ll
A llvm/test/Transforms/SLPVectorizer/scalarization-overhead.ll
A llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
A llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
A llvm/test/Transforms/SLPVectorizer/shufflebuilder-bug.ll
A llvm/test/Transforms/SLPVectorizer/stores-non-ordered.ll
A llvm/test/Transforms/SLPVectorizer/unknown-entries.ll
A llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
Log Message:
-----------
[SLP] Move more X86 tests to common directory (#109821)
Some of the tests from the X86 directory can be generalized to improve
coverage for other architectures
Commit: fe6a3d46aa658fdd1e9a6cbb2031a597a3e59536
https://github.com/llvm/llvm-project/commit/fe6a3d46aa658fdd1e9a6cbb2031a597a3e59536
Author: Joseph Huber <huberjn at outlook.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M libc/config/gpu/entrypoints.txt
M libc/docs/gpu/support.rst
M libc/include/llvm-libc-types/rpc_opcodes_t.h
M libc/src/stdio/gpu/CMakeLists.txt
A libc/src/stdio/gpu/rename.cpp
M libc/utils/gpu/server/rpc_server.cpp
Log Message:
-----------
[libc] Implement the 'rename' function on the GPU (#109814)
Summary:
Straightforward implementation like the other `stdio.h` functions.
Commit: 8e68a512ef568324da60c8b2705e9b087d06ebcf
https://github.com/llvm/llvm-project/commit/8e68a512ef568324da60c8b2705e9b087d06ebcf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/test/CodeGen/X86/pmulh.ll
Log Message:
-----------
[X86] Add test coverage for #109790
Commit: 01be0252c834bc7be222057049d697f488493543
https://github.com/llvm/llvm-project/commit/01be0252c834bc7be222057049d697f488493543
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combinePMULH - simplify pattern matching with SDPatternMatch. NFC.
Commit: 9e60a6ad4242274c39242079d5351fcb9d6d99e6
https://github.com/llvm/llvm-project/commit/9e60a6ad4242274c39242079d5351fcb9d6d99e6
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] combinePMULH - pull out repeated IsTruncateFree helper. NFC.
Commit: 406a2128f57b1e86748cd6de6d3eab6b1e2db2ad
https://github.com/llvm/llvm-project/commit/406a2128f57b1e86748cd6de6d3eab6b1e2db2ad
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/pmulh.ll
Log Message:
-----------
[X86] combinePMULH - we can treat constant vectors as freely truncatable.
Fixes #109790
Commit: e64673d3174af941eb3c9f1ad822792154aa1d31
https://github.com/llvm/llvm-project/commit/e64673d3174af941eb3c9f1ad822792154aa1d31
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Treat insert_subvector into undef with index==0 as legal. (#109745)
Regardless of fixed and scalable type. We can always use subreg ops.
We don't need to do any container conversion.
Commit: c6bf59f26b2d74474a66182db6ebd576273bfb00
https://github.com/llvm/llvm-project/commit/c6bf59f26b2d74474a66182db6ebd576273bfb00
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
Log Message:
-----------
[X86] Add test coverage for #109272
Commit: 04b443e77845cd20ab5acc4356cee509316135dd
https://github.com/llvm/llvm-project/commit/04b443e77845cd20ab5acc4356cee509316135dd
Author: jimingham <jingham at apple.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/use/python-reference.rst
M lldb/examples/python/cmdtemplate.py
M lldb/examples/python/templates/parsed_cmd.py
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Utility/CompletionRequest.h
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/test/API/commands/command/script/add/TestAddParsedCommand.py
M lldb/test/API/commands/command/script/add/test_commands.py
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
Log Message:
-----------
Add the ability to define custom completers to the parsed_cmd template. (#109062)
If your arguments or option values are of a type that naturally uses one
of our common completion mechanisms, you will get completion for free.
But if you have your own custom values or if you want to do fancy things
like have `break set -s foo.dylib -n ba<TAB>` only complete on symbols
in foo.dylib, you can use this new mechanism to achieve that.
Commit: 090755234e5033de67be994e99e31f4d13dcdcc5
https://github.com/llvm/llvm-project/commit/090755234e5033de67be994e99e31f4d13dcdcc5
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
Log Message:
-----------
[rtsan] Refactor initialization state to prevent hangs (#109830)
Move to tri state (Uninitialized, Initialized, Initializing) for our
init state. We currently just have 2 (Uninitialized and Initialized).
Commit: f4042077e2e3946ee35c1df8cab8237de6086480
https://github.com/llvm/llvm-project/commit/f4042077e2e3946ee35c1df8cab8237de6086480
Author: vporpo <vporpodas at google.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement a few Instruction member functions (#109820)
This patch implements a few sandboxir::Instruction predicate functions.
Commit: 234193bae6cf8b19703c6e543b100517bb99a9f7
https://github.com/llvm/llvm-project/commit/234193bae6cf8b19703c6e543b100517bb99a9f7
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorize-convolution.mlir
Log Message:
-----------
[mlir][linalg] Vectorization support for convolution of i1 type (#109480)
Normally convolutions present with the following linalg op region
```
^bb0(%arg14: i4, %arg15: i4, %arg16: i4):
%17 = arith.muli %arg14, %arg15 : i4
%18 = arith.addi %arg16, %17 : i4
linalg.yield %18 : i4
```
However, for i1 due to strength reduction we get something like
```
^bb0(%arg14: i1, %arg15: i1, %arg16: i1):
%17 = arith.andi %arg14, %arg15 : i1
%18 = arith.ori %arg16, %17 : i1
linalg.yield %18 : i1
```
This PR updates the logic to support this region for i1 types.
Commit: 26029d77a57cb4aaa1479064109e985a90d0edd8
https://github.com/llvm/llvm-project/commit/26029d77a57cb4aaa1479064109e985a90d0edd8
Author: Tex Riddell <texr at microsoft.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/docs/LangRef.rst
M llvm/include/llvm/IR/Intrinsics.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
A llvm/test/CodeGen/DirectX/atan2.ll
A llvm/test/CodeGen/DirectX/atan2_error.ll
Log Message:
-----------
[DirectX] Add atan2 intrinsic and expand for DXIL backend (p1) (#108865)
This change is part of this proposal:
https://discourse.llvm.org/t/rfc-all-the-math-intrinsics/78294
This preliminary work adds the intrinsic to llvm and expands using atan
intrinsic for DXIL backend, since DXIL has no atan2 op.
Part 1 for Implement the atan2 HLSL Function #70096.
Commit: 12285cca5ed713dfd483bd96422a5607b8af0085
https://github.com/llvm/llvm-project/commit/12285cca5ed713dfd483bd96422a5607b8af0085
Author: Daniel Rodríguez Troitiño <drodriguez at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
A llvm/test/tools/dsymutil/X86/dwarf5-many-include-directories.test
Log Message:
-----------
[DWARF] Use ULEB128 and not just one byte for directory indices (#109067)
According to the standard `DW_LNCT_directory_index` can be `data1`,
`data2`, or `udata` (see 6.2.4.1). The code was using `data1`, but this
limits the number of directories to 256, even if the variable holding
the directory index is a `uint64_t`. `dsymutil` was hitting an assertion
when trying to write directory indices higher than 255.
Modify the classic and the parallel DWARF linkers to use `udata` and
encode the directory indices as ULEB128 and provide a test that has more
than 256 directories to check the changes are working as expected.
For people that were using `dsymutil` with CUs that had between 128-256
directories, this will mean that for those indices 2 bytes will be used
now, instead of just one.
Commit: 312895c52341ab7e66a3d0e8c55cbeaaa0fbb8b6
https://github.com/llvm/llvm-project/commit/312895c52341ab7e66a3d0e8c55cbeaaa0fbb8b6
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M .github/new-prs-labeler.yml
M bolt/include/bolt/Core/BinaryBasicBlock.h
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryData.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/RuntimeLibs/InstrumentationRuntimeLibrary.cpp
R bolt/test/AArch64/Inputs/iplt.ld
R bolt/test/AArch64/ifunc.c
A bolt/test/AArch64/ifunc.test
A bolt/test/Inputs/ifunc.c
A bolt/test/Inputs/iplt.ld
A bolt/test/X86/ifunc.test
M bolt/test/X86/log.test
M bolt/test/perf2bolt/perf_test.test
M bolt/unittests/Core/BinaryContext.cpp
M clang-tools-extra/clang-move/HelperDeclRefGraph.cpp
M clang-tools-extra/clang-query/Query.cpp
M clang-tools-extra/clang-tidy/ExpandModularHeadersPPCallbacks.cpp
M clang-tools-extra/clang-tidy/bugprone/DanglingHandleCheck.cpp
M clang-tools-extra/clangd/FS.cpp
M clang-tools-extra/clangd/ParsedAST.cpp
M clang-tools-extra/clangd/Preamble.cpp
M clang-tools-extra/clangd/index/Symbol.h
M clang-tools-extra/clangd/index/SymbolCollector.cpp
M clang-tools-extra/clangd/index/SymbolCollector.h
M clang-tools-extra/clangd/support/ThreadsafeFS.cpp
M clang-tools-extra/clangd/unittests/ClangdTests.cpp
M clang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
M clang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
A clang-tools-extra/docs/clang-tidy/ExternalClang-TidyExamples.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/dangling-handle.rst
M clang-tools-extra/docs/clang-tidy/index.rst
M clang-tools-extra/modularize/Modularize.cpp
M clang-tools-extra/unittests/clang-tidy/ClangTidyTest.h
M clang-tools-extra/unittests/clang-tidy/IncludeCleanerTest.cpp
M clang-tools-extra/unittests/clang-tidy/IncludeInserterTest.cpp
M clang-tools-extra/unittests/clang-tidy/NamespaceAliaserTest.cpp
M clang-tools-extra/unittests/clang-tidy/ReadabilityModuleTest.cpp
M clang-tools-extra/unittests/clang-tidy/TransformerClangTidyCheckTest.cpp
M clang-tools-extra/unittests/clang-tidy/UsingInserterTest.cpp
M clang/CMakeLists.txt
A clang/README.md
R clang/README.txt
M clang/docs/LanguageExtensions.rst
M clang/docs/OpenMPSupport.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/StandardCPlusPlusModules.rst
M clang/examples/Attribute/CMakeLists.txt
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/DeclID.h
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/Builtins.h
M clang/include/clang/Basic/BuiltinsNVPTX.def
M clang/include/clang/Basic/BuiltinsWebAssembly.def
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/FileManager.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/ASTUnit.h
M clang/include/clang/Frontend/MultiplexConsumer.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/SemaObjC.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/ProgramState.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/SValBuilder.h
M clang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h
M clang/include/clang/Tooling/DependencyScanning/DependencyScanningFilesystem.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/InterpFrame.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/FileManager.cpp
M clang/lib/Basic/SourceManager.cpp
M clang/lib/Basic/Targets.cpp
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/Mips.h
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/Basic/Targets/X86.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/SanitizerMetadata.cpp
M clang/lib/CrossTU/CrossTranslationUnit.cpp
M clang/lib/Driver/CMakeLists.txt
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.cpp
M clang/lib/Driver/ToolChains/AMDGPUOpenMP.h
M clang/lib/Driver/ToolChains/Arch/LoongArch.cpp
M clang/lib/Driver/ToolChains/Arch/Mips.cpp
M clang/lib/Driver/ToolChains/Arch/Sparc.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/Linux.cpp
A clang/lib/Driver/ToolChains/UEFI.cpp
A clang/lib/Driver/ToolChains/UEFI.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
M clang/lib/Headers/hlsl.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/wasm_simd128.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Interpreter/IncrementalParser.h
M clang/lib/Interpreter/Interpreter.cpp
A clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Lex/PPMacroExpansion.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclObjC.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOpenACC.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/lib/StaticAnalyzer/Core/ProgramState.cpp
M clang/lib/StaticAnalyzer/Core/RegionStore.cpp
M clang/lib/StaticAnalyzer/Core/SValBuilder.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningFilesystem.cpp
A clang/test/AST/ByteCode/codegen.m
M clang/test/AST/ByteCode/constexpr-vectors.cpp
M clang/test/AST/ByteCode/cxx17.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/AST/ByteCode/placement-new.cpp
M clang/test/AST/ByteCode/vectors.cpp
M clang/test/Analysis/stack-addr-ps.cpp
M clang/test/CXX/class/class.friend/p7-cxx20.cpp
M clang/test/CXX/class/class.mfct/p1-cxx20.cpp
M clang/test/CodeGen/PowerPC/builtins-ppc-build-pair-mma.c
M clang/test/CodeGen/PowerPC/builtins-ppc-pair-mma-types.c
A clang/test/CodeGen/X86/uefi-data-layout.c
M clang/test/CodeGen/aarch64-cpu-supports.c
M clang/test/CodeGen/aarch64-fmv-dependencies.c
M clang/test/CodeGen/attr-target-version.c
M clang/test/CodeGen/builtins-wasm.c
M clang/test/CodeGen/inline-asm-output-variant.c
M clang/test/CodeGen/ptrauth-init-fini.c
M clang/test/CodeGen/union-init2.c
M clang/test/CodeGenCXX/attr-target-clones-aarch64.cpp
A clang/test/CodeGenCXX/debug-info-line-if-2.cpp
M clang/test/CodeGenCXX/weak-init.cpp
M clang/test/CodeGenHLSL/BasicFeatures/OutputArguments.hlsl
M clang/test/CodeGenHLSL/builtins/asuint.hlsl
A clang/test/CodeGenHLSL/convergence/cf.for.plain.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/Driver/amdgpu-openmp-toolchain.c
A clang/test/Driver/fmodules-embed-all-files.cpp
M clang/test/Driver/nvlink-wrapper.c
M clang/test/Driver/relax.s
M clang/test/Driver/riscv32-toolchain.c
M clang/test/Driver/riscv64-toolchain.c
A clang/test/Driver/uefi-constructed-args.c
M clang/test/Headers/wasm.c
M clang/test/Interpreter/multiline.cpp
M clang/test/Preprocessor/bpf-predefined-macros.c
M clang/test/Preprocessor/predefined-arch-macros.c
M clang/test/Preprocessor/predefined-macros-hlsl.hlsl
M clang/test/Sema/annotate-type.c
M clang/test/Sema/attr-target-clones-aarch64.c
M clang/test/Sema/ext_vector_casts.c
M clang/test/Sema/riscv-asm.c
M clang/test/SemaCXX/attr-gsl-owner-pointer-std.cpp
M clang/test/SemaCXX/attr-musttail.cpp
M clang/test/SemaCXX/constexpr-vectors.cpp
A clang/test/SemaCXX/type-trait-common-type.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-no-libc-functions-in-c.c
A clang/test/SemaHLSL/BuiltIns/asfloat-constexpr.hlsl
A clang/test/SemaHLSL/BuiltIns/asuint-constexpr.hlsl
M clang/test/SemaOpenACC/compute-construct-intexpr-clause-ast.cpp
M clang/tools/CMakeLists.txt
M clang/tools/c-index-test/core_main.cpp
M clang/tools/clang-extdef-mapping/ClangExtDefMapGen.cpp
M clang/tools/clang-nvlink-wrapper/NVLinkOpts.td
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
M clang/tools/clang-repl/ClangRepl.cpp
M clang/unittests/AST/CMakeLists.txt
A clang/unittests/AST/RawCommentForDeclTest.cpp
M clang/unittests/Driver/DistroTest.cpp
M clang/unittests/Driver/ToolChainTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/unittests/Frontend/ASTUnitTest.cpp
M clang/unittests/Frontend/PCHPreambleTest.cpp
M clang/unittests/Interpreter/CodeCompletionTest.cpp
M clang/unittests/Interpreter/InterpreterExtensionsTest.cpp
M clang/unittests/Tooling/DependencyScanning/DependencyScannerTest.cpp
M clang/utils/TableGen/ClangOpenCLBuiltinEmitter.cpp
M compiler-rt/lib/asan/asan_interceptors.cpp
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/asan/tests/asan_str_test.cpp
M compiler-rt/lib/builtins/cpu_model/AArch64CPUFeatures.inc
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/mrs.inc
M compiler-rt/lib/nsan/nsan.cpp
M compiler-rt/lib/nsan/nsan_flags.inc
M compiler-rt/lib/rtsan/CMakeLists.txt
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan.h
A compiler-rt/lib/rtsan/rtsan_assertions.h
M compiler-rt/lib/rtsan/rtsan_context.cpp
M compiler-rt/lib/rtsan/rtsan_context.h
A compiler-rt/lib/rtsan/rtsan_diagnostics.cpp
A compiler-rt/lib/rtsan/rtsan_diagnostics.h
M compiler-rt/lib/rtsan/rtsan_interceptors.cpp
R compiler-rt/lib/rtsan/rtsan_stack.cpp
R compiler-rt/lib/rtsan/rtsan_stack.h
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
A compiler-rt/lib/rtsan/tests/rtsan_test_assertions.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_context.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_functional.cpp
M compiler-rt/lib/rtsan/tests/rtsan_test_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_errno.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_errno_codes.h
M compiler-rt/lib/sanitizer_common/sanitizer_linux.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_report.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_tls_get_addr.cpp
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/test/asan/TestCases/Linux/preinstalled_signal.cpp
M compiler-rt/test/asan/TestCases/Posix/coverage-fork.cpp
M compiler-rt/test/asan/TestCases/strtol_strict.c
A compiler-rt/test/nsan/fcmp.cpp
M compiler-rt/test/profile/Posix/instrprof-dlopen-norpath.test
A compiler-rt/test/rtsan/blocking_call.cpp
A compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
R compiler-rt/test/tsan/Darwin/variadic-open.cpp
A flang/include/flang/Optimizer/Transforms/CufOpConversion.h
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/CufImplicitDeviceGlobal.cpp
M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/lib/Semantics/mod-file.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/module/__fortran_builtins.f90
M flang/module/ieee_arithmetic.f90
M flang/test/Driver/target-cpu-features.f90
A flang/test/Evaluate/int8.f90
A flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Semantics/bad-forward-type.f90
A flang/test/Semantics/ieee_int.f90
A flang/test/Semantics/modfile69.f90
M libc/cmake/modules/CheckCompilerFeatures.cmake
A libc/cmake/modules/compiler_features/check_float16_conversion.cpp
M libc/config/gpu/entrypoints.txt
M libc/config/gpu/headers.txt
M libc/docs/gpu/support.rst
M libc/hdr/CMakeLists.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/wchar_t.h
A libc/hdr/types/wint_t.h
A libc/hdr/wchar_macros.h
A libc/hdr/wchar_overlay.h
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/math-function-macros.h
M libc/include/llvm-libc-types/rpc_opcodes_t.h
M libc/include/llvm-libc-types/wchar_t.h
M libc/include/llvm-libc-types/wint_t.h
M libc/newhdrgen/yaml/stdlib.yaml
M libc/newhdrgen/yaml_functions_sorted.py
M libc/spec/stdc.td
M libc/src/__support/CMakeLists.txt
M libc/src/__support/FPUtil/CMakeLists.txt
M libc/src/__support/FPUtil/ManipulationFunctions.h
A libc/src/__support/FPUtil/cast.h
M libc/src/__support/FPUtil/dyadic_float.h
M libc/src/__support/FPUtil/except_value_utils.h
M libc/src/__support/FPUtil/generic/CMakeLists.txt
M libc/src/__support/FPUtil/generic/FMA.h
M libc/src/__support/FPUtil/generic/add_sub.h
M libc/src/__support/FPUtil/generic/sqrt.h
M libc/src/__support/wctype_utils.h
M libc/src/math/generic/CMakeLists.txt
M libc/src/math/generic/ceilf16.cpp
M libc/src/math/generic/exp10f16.cpp
M libc/src/math/generic/exp2f16.cpp
M libc/src/math/generic/expf16.cpp
M libc/src/math/generic/expm1f16.cpp
M libc/src/math/generic/floorf16.cpp
M libc/src/math/generic/rintf16.cpp
M libc/src/math/generic/roundevenf16.cpp
M libc/src/math/generic/roundf16.cpp
M libc/src/math/generic/truncf16.cpp
M libc/src/stdio/gpu/CMakeLists.txt
A libc/src/stdio/gpu/rename.cpp
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/gpu/CMakeLists.txt
A libc/src/stdlib/gpu/system.cpp
A libc/src/stdlib/system.h
M libc/src/wchar/CMakeLists.txt
M libc/src/wchar/btowc.cpp
M libc/src/wchar/btowc.h
M libc/src/wchar/wctob.cpp
M libc/src/wchar/wctob.h
M libc/test/include/CMakeLists.txt
A libc/test/include/FpClassifyTest.h
A libc/test/include/IsNormalTest.h
A libc/test/include/IsSubnormalTest.h
A libc/test/include/IsZeroTest.h
A libc/test/include/fpclassify_test.c
A libc/test/include/fpclassify_test.cpp
A libc/test/include/fpclassifyf_test.cpp
A libc/test/include/fpclassifyl_test.cpp
A libc/test/include/isnormal_test.c
A libc/test/include/isnormal_test.cpp
A libc/test/include/isnormalf_test.cpp
A libc/test/include/isnormall_test.cpp
A libc/test/include/issubnormal_test.c
A libc/test/include/issubnormal_test.cpp
A libc/test/include/issubnormalf_test.cpp
A libc/test/include/issubnormall_test.cpp
A libc/test/include/iszero_test.c
A libc/test/include/iszero_test.cpp
A libc/test/include/iszerof_test.cpp
A libc/test/include/iszerol_test.cpp
M libc/test/src/math/smoke/AddTest.h
M libc/test/src/math/smoke/CMakeLists.txt
M libc/test/src/math/smoke/DivTest.h
M libc/test/src/math/smoke/FModTest.h
M libc/test/src/math/smoke/FmaTest.h
M libc/test/src/math/smoke/ModfTest.h
M libc/test/src/math/smoke/MulTest.h
M libc/test/src/math/smoke/NextTowardTest.h
M libc/test/src/math/smoke/SqrtTest.h
M libc/test/src/math/smoke/SubTest.h
M libc/test/src/math/smoke/exp10f16_test.cpp
M libc/test/src/math/smoke/exp2f16_test.cpp
M libc/test/src/math/smoke/expf16_test.cpp
M libc/test/src/math/smoke/expm1f16_test.cpp
M libc/test/src/wchar/btowc_test.cpp
M libc/utils/MPFRWrapper/CMakeLists.txt
M libc/utils/MPFRWrapper/MPFRUtils.cpp
M libc/utils/gpu/server/rpc_server.cpp
M libcxx/cmake/caches/AMDGPU.cmake
M libcxx/cmake/caches/NVPTX.cmake
M libcxx/docs/Status/Cxx23Issues.csv
M libcxx/include/__algorithm/comp.h
M libcxx/include/__algorithm/ranges_minmax.h
M libcxx/include/__algorithm/sort.h
M libcxx/include/__config
M libcxx/include/__functional/operations.h
M libcxx/include/__functional/ranges_operations.h
M libcxx/include/__memory/unique_temporary_buffer.h
M libcxx/include/__type_traits/common_type.h
M libcxx/include/__type_traits/desugars_to.h
M libcxx/include/__type_traits/is_trivially_copyable.h
M libcxx/include/module.modulemap
M libcxx/src/algorithm.cpp
M libcxx/src/include/config_elast.h
M libcxx/src/support/runtime/exception_fallback.ipp
M libcxx/src/support/runtime/exception_msvc.ipp
M libcxx/src/support/runtime/exception_pointer_unimplemented.ipp
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/test/test_demangle.pass.cpp
M lld/COFF/Driver.cpp
M lld/COFF/Writer.cpp
M lld/Common/DriverDispatcher.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Arch/Mips.cpp
M lld/ELF/Arch/MipsArchTree.cpp
M lld/ELF/Arch/PPC.cpp
M lld/ELF/Arch/PPC64.cpp
M lld/ELF/Arch/RISCV.cpp
M lld/ELF/Arch/SystemZ.cpp
M lld/ELF/Arch/X86.cpp
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/CallGraphSort.cpp
M lld/ELF/Config.h
M lld/ELF/DWARF.cpp
M lld/ELF/Driver.cpp
M lld/ELF/DriverUtils.cpp
M lld/ELF/EhFrame.cpp
M lld/ELF/ICF.cpp
M lld/ELF/InputFiles.cpp
M lld/ELF/InputFiles.h
M lld/ELF/InputSection.cpp
M lld/ELF/LTO.cpp
M lld/ELF/LTO.h
M lld/ELF/LinkerScript.cpp
M lld/ELF/LinkerScript.h
M lld/ELF/MapFile.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/ScriptLexer.cpp
M lld/ELF/ScriptLexer.h
M lld/ELF/ScriptParser.cpp
M lld/ELF/ScriptParser.h
M lld/ELF/SymbolTable.cpp
M lld/ELF/SymbolTable.h
M lld/ELF/Symbols.cpp
M lld/ELF/Symbols.h
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Target.cpp
M lld/ELF/Target.h
M lld/ELF/Thunks.cpp
M lld/ELF/Writer.cpp
M lld/ELF/Writer.h
M lld/MachO/InputSection.cpp
M lldb/bindings/python/python-swigsafecast.swig
M lldb/bindings/python/python-wrapper.swig
M lldb/docs/index.rst
A lldb/docs/resources/addinglanguagesupport.md
M lldb/docs/use/python-reference.rst
M lldb/examples/python/cmdtemplate.py
M lldb/examples/python/templates/parsed_cmd.py
M lldb/include/lldb/API/SBExecutionContext.h
A lldb/include/lldb/Interpreter/Interfaces/ScriptedStopHookInterface.h
M lldb/include/lldb/Interpreter/ScriptInterpreter.h
M lldb/include/lldb/Symbol/UnwindPlan.h
M lldb/include/lldb/Target/ABI.h
M lldb/include/lldb/Target/RegisterContextUnwind.h
M lldb/include/lldb/Target/StackFrameRecognizer.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/UnwindLLDB.h
M lldb/include/lldb/Utility/CompletionRequest.h
M lldb/include/lldb/lldb-forward.h
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectFrame.cpp
M lldb/source/Interpreter/Options.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ABI/AArch64/ABIAArch64.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.cpp
M lldb/source/Plugins/ABI/SystemZ/ABISysV_s390x.h
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptInterpreterPythonInterfaces.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.cpp
A lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedStopHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h
M lldb/source/Plugins/SymbolFile/Breakpad/SymbolFileBreakpad.cpp
M lldb/source/Plugins/UnwindAssembly/x86/UnwindAssembly-x86.cpp
M lldb/source/Plugins/UnwindAssembly/x86/x86AssemblyInspectionEngine.cpp
M lldb/source/Symbol/ArmUnwindInfo.cpp
M lldb/source/Symbol/DWARFCallFrameInfo.cpp
M lldb/source/Symbol/FuncUnwinders.cpp
M lldb/source/Symbol/UnwindPlan.cpp
M lldb/source/Target/ABI.cpp
M lldb/source/Target/RegisterContextUnwind.cpp
M lldb/source/Target/StackFrameRecognizer.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/UnwindLLDB.cpp
M lldb/source/Utility/Status.cpp
M lldb/test/API/commands/command/script/add/TestAddParsedCommand.py
M lldb/test/API/commands/command/script/add/test_commands.py
M lldb/test/API/commands/frame/recognizer/Makefile
M lldb/test/API/commands/frame/recognizer/TestFrameRecognizer.py
R lldb/test/API/commands/frame/recognizer/categories
A lldb/test/API/commands/frame/recognizer/main.c
R lldb/test/API/commands/frame/recognizer/main.m
M lldb/test/API/commands/target/stop-hooks/TestStopHookScripted.py
A lldb/test/API/functionalities/gdb_remote_client/TestAArch64XMLRegistersSVEOnly.py
M lldb/test/API/functionalities/gdb_remote_client/TestGDBRemotePlatformFile.py
M lldb/test/API/functionalities/scripted_process/dummy_scripted_process.py
A lldb/test/API/macosx/expedited-thread-pcs/Makefile
A lldb/test/API/macosx/expedited-thread-pcs/TestExpeditedThreadPCs.py
A lldb/test/API/macosx/expedited-thread-pcs/foo.c
A lldb/test/API/macosx/expedited-thread-pcs/main.cpp
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/test/API/tools/lldb-dap/evaluate/main.cpp
M lldb/test/API/tools/lldb-dap/extendedStackTrace/TestDAP_extendedStackTrace.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/LLDBUtils.cpp
M lldb/tools/lldb-dap/README.md
M lldb/tools/lldb-dap/lldb-dap.cpp
M lldb/tools/lldb-dap/package.json
M lldb/unittests/Host/FileSystemTest.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M lldb/unittests/Target/StackFrameRecognizerTest.cpp
M lldb/unittests/UnwindAssembly/ARM64/TestArm64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/PPC64/TestPPC64InstEmulation.cpp
M lldb/unittests/UnwindAssembly/x86/Testx86AssemblyInspectionEngine.cpp
M lldb/unittests/Utility/MockSymlinkFileSystem.h
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CMake.rst
M llvm/docs/LangRef.rst
M llvm/docs/NVPTXUsage.rst
M llvm/docs/ReleaseNotes.rst
M llvm/docs/RemoveDIsDebugInfo.md
M llvm/docs/TableGen/ProgRef.rst
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/ADT/SmallSet.h
M llvm/include/llvm/Analysis/AliasAnalysis.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/DXILMetadataAnalysis.h
M llvm/include/llvm/Analysis/GenericDomTreeUpdaterImpl.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/PtrUseVisitor.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.def
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/BinaryFormat/ELFRelocs/x86_64.def
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/LiveInterval.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachineBasicBlock.h
A llvm/include/llvm/CodeGen/MachineLICM.h
M llvm/include/llvm/CodeGen/Register.h
M llvm/include/llvm/CodeGen/RuntimeLibcallUtil.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
M llvm/include/llvm/ExecutionEngine/JITLink/x86_64.h
M llvm/include/llvm/ExecutionEngine/Orc/COFFPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/ELFNixPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/MachOPlatform.h
M llvm/include/llvm/ExecutionEngine/Orc/ObjectLinkingLayer.h
M llvm/include/llvm/IR/Attributes.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsWebAssembly.td
M llvm/include/llvm/IR/LLVMContext.h
M llvm/include/llvm/IR/Type.h
M llvm/include/llvm/MC/MCDwarf.h
M llvm/include/llvm/MC/MCInstrAnalysis.h
M llvm/include/llvm/MC/MCInstrDesc.h
M llvm/include/llvm/MC/MCObjectStreamer.h
M llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h
M llvm/include/llvm/MC/MCRegister.h
M llvm/include/llvm/MC/MCRegisterInfo.h
M llvm/include/llvm/MC/MCStreamer.h
M llvm/include/llvm/Object/COFF.h
M llvm/include/llvm/Object/ELF.h
M llvm/include/llvm/Object/XCOFFObjectFile.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
R llvm/include/llvm/ProfileData/RawMemProfReader.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Type.h
A llvm/include/llvm/SandboxIR/Utils.h
M llvm/include/llvm/Support/AutoConvert.h
M llvm/include/llvm/Support/Parallel.h
M llvm/include/llvm/Support/VirtualFileSystem.h
M llvm/include/llvm/Support/raw_ostream.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/TargetParser/AArch64CPUFeatures.inc
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/InstrInterval.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Region.h
M llvm/lib/Analysis/AliasAnalysis.cpp
M llvm/lib/Analysis/CallGraphSCCPass.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/DXILMetadataAnalysis.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetLibraryInfo.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/CGData/OutlinedHashTree.cpp
M llvm/lib/CGData/OutlinedHashTreeRecord.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/EarlyIfConversion.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/LLVMTargetMachine.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveInterval.cpp
M llvm/lib/CodeGen/LiveIntervals.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineLICM.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/DWARFLinker/Classic/DWARFStreamer.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerCompileUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
M llvm/lib/DWARFLinker/Parallel/DebugLineSectionEmitter.h
M llvm/lib/DebugInfo/GSYM/DwarfTransformer.cpp
M llvm/lib/ExecutionEngine/JITLink/DWARFRecordSectionSplitter.cpp
M llvm/lib/ExecutionEngine/JITLink/DefineExternalSectionStartAndEndSymbols.h
M llvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/x86_64.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ObjectLinkingLayer.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Attributes.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/LLVMContext.cpp
M llvm/lib/IRReader/IRReader.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/MCAsmStreamer.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCInstrDesc.cpp
M llvm/lib/MC/MCObjectStreamer.cpp
M llvm/lib/MC/MCObjectWriter.cpp
M llvm/lib/MC/MCParser/AsmParser.cpp
M llvm/lib/MC/MCParser/MasmParser.cpp
M llvm/lib/MC/MCRegisterInfo.cpp
M llvm/lib/MC/MCStreamer.cpp
M llvm/lib/MC/MCTargetOptionsCommandFlags.cpp
M llvm/lib/ObjCopy/wasm/WasmWriter.cpp
M llvm/lib/Object/COFFObjectFile.cpp
M llvm/lib/Object/ELF.cpp
M llvm/lib/Object/XCOFFObjectFile.cpp
M llvm/lib/ObjectYAML/CodeViewYAMLSymbols.cpp
M llvm/lib/ObjectYAML/ELFEmitter.cpp
M llvm/lib/ObjectYAML/GOFFEmitter.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/XCOFFEmitter.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/ProfileData/PGOCtxProfWriter.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/Support/AutoConvert.cpp
M llvm/lib/Support/FileCollector.cpp
M llvm/lib/Support/ModRef.cpp
M llvm/lib/Support/OptionStrCmp.cpp
M llvm/lib/Support/Parallel.cpp
M llvm/lib/Support/VirtualFileSystem.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/TableGen/TGLexer.cpp
M llvm/lib/TableGen/TGLexer.h
M llvm/lib/TableGen/TGParser.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FMV.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUArgumentUsageInfo.h
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
R llvm/lib/Target/AMDGPU/AMDGPUInsertSingleUseVDST.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/BUFInstructions.td
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/FLATInstructions.td
M llvm/lib/Target/AMDGPU/GCNPreRAOptimizations.cpp
M llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCTargetDesc.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SILowerSGPRSpills.cpp
A llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
M llvm/lib/Target/AMDGPU/SIMachineScheduler.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPCInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFeatures.td
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/ARMProcessors.td
M llvm/lib/Target/ARM/AsmParser/ARMAsmParser.cpp
M llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMTargetStreamer.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp
M llvm/lib/Target/DirectX/CMakeLists.txt
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
R llvm/lib/Target/DirectX/DXILMetadata.cpp
R llvm/lib/Target/DirectX/DXILMetadata.h
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/Hexagon/HexagonExpandCondsets.cpp
M llvm/lib/Target/Hexagon/HexagonSubtarget.cpp
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchBaseInfo.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
M llvm/lib/Target/Mips/Mips.h
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
R llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.cpp
M llvm/lib/Target/SPIRV/Analysis/SPIRVConvergenceRegionAnalysis.h
M llvm/lib/Target/SPIRV/CMakeLists.txt
M llvm/lib/Target/SPIRV/SPIRV.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVMergeRegionExitTargets.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
A llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.cpp
M llvm/lib/Target/SPIRV/SPIRVUtils.h
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmTypeCheck.h
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/AsmParser/X86Operand.h
M llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86EncodingOptimization.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86FixupKinds.h
M llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MachObjectWriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86WinCOFFObjectWriter.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLoweringCall.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86MCInstLower.cpp
M llvm/lib/Target/X86/X86WinEHState.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/Coroutines/CoroAnnotationElide.cpp
M llvm/lib/Transforms/IPO/IROutliner.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfFlattening.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/lib/Transforms/Scalar/DFAJumpThreading.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/MemCpyOptimizer.cpp
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopPeel.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/DependencyGraph.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Region.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
A llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/CostModel/AArch64/reduce-fadd.ll
M llvm/test/Analysis/CostModel/RISCV/abs.ll
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
M llvm/test/Analysis/CostModel/RISCV/fca-load-store.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-gather.ll
M llvm/test/Analysis/CostModel/RISCV/fixed-vector-scatter.ll
M llvm/test/Analysis/CostModel/RISCV/fp-min-max-abs.ll
M llvm/test/Analysis/CostModel/RISCV/fp-sqrt-pow.ll
M llvm/test/Analysis/CostModel/RISCV/fp-trig-log-exp.ll
M llvm/test/Analysis/CostModel/RISCV/gep.ll
M llvm/test/Analysis/CostModel/RISCV/int-bit-manip.ll
M llvm/test/Analysis/CostModel/RISCV/int-min-max.ll
M llvm/test/Analysis/CostModel/RISCV/int-sat-math.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-add.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-and.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fadd.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fmaximum.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-fminimum.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-max.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-min.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-or.ll
M llvm/test/Analysis/CostModel/RISCV/reduce-xor.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-cmp.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-extract_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-insert_subvector.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-reverse.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
A llvm/test/Analysis/CtxProfAnalysis/handle-select.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/finite-trip-count.ll
M llvm/test/Analysis/ScalarEvolution/ne-overflow.ll
M llvm/test/Analysis/ScalarEvolution/predicated-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/predicated-symbolic-max-backedge-taken-count.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-implied-addrec.ll
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/Bindings/llvm-c/atomics.ll
M llvm/test/Bindings/llvm-c/debug_info_new_format.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-cmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/arm64-fp128.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/mlicm-stack-write-check.mir
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
A llvm/test/CodeGen/AArch64/sincos-stack-slots.ll
M llvm/test/CodeGen/AArch64/sme-machine-licm-vg.mir
M llvm/test/CodeGen/AArch64/sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
M llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
M llvm/test/CodeGen/AArch64/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/AArch64/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.v2f16-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-atomic-cmpxchg-global.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global-saddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/agpr-to-agpr-copy.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-simplify-libcall-pow-codegen.ll
A llvm/test/CodeGen/AMDGPU/amdhsa-kernarg-preload-num-sgprs.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/expand-si-indirect.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-f16-fake16.mir
A llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/high-RP-reschedule.mir
M llvm/test/CodeGen/AMDGPU/illegal-sgpr-to-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/inline-asm.i128.ll
R llvm/test/CodeGen/AMDGPU/insert-singleuse-vdst.mir
M llvm/test/CodeGen/AMDGPU/licm-regpressure.mir
M llvm/test/CodeGen/AMDGPU/licm-valu.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umax.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.reduce.umin.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/machinelicm-convergent.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-copy-like-instrs.mir
M llvm/test/CodeGen/AMDGPU/machinelicm-undef-use.mir
M llvm/test/CodeGen/AMDGPU/merge-flat-with-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/merge-global-load-store.mir
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-pseudo-scalar-trans.ll
M llvm/test/CodeGen/AMDGPU/optimize-exec-mask-pre-ra-non-empty-but-used-interval.mir
M llvm/test/CodeGen/AMDGPU/partial-regcopy-and-spill-missed-at-regalloc.ll
M llvm/test/CodeGen/AMDGPU/ran-out-of-sgprs-allocation-failure.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-hang-weak-dep.mir
M llvm/test/CodeGen/AMDGPU/sched-barrier-pre-RA.mir
M llvm/test/CodeGen/AMDGPU/sched-group-barrier-pipeline-solver.mir
M llvm/test/CodeGen/AMDGPU/sched-group-barrier-pre-RA.mir
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/sgpr-spill-dead-frame-in-dbg-value.mir
A llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
M llvm/test/CodeGen/AMDGPU/sgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
A llvm/test/CodeGen/AMDGPU/shrink-v-cmp-wave32-dead-vcc-lo.mir
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/spill192.mir
M llvm/test/CodeGen/AMDGPU/unsupported-calls.ll
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
A llvm/test/CodeGen/AMDGPU/vgpr-spill-fi-skip-processing-stack-arg-dbg-value-list.mir
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/ARM/expand-pseudos.mir
M llvm/test/CodeGen/ARM/preferred-function-alignment.ll
M llvm/test/CodeGen/ARM/vbsl.ll
A llvm/test/CodeGen/DirectX/Metadata/lib-entries.ll
A llvm/test/CodeGen/DirectX/Metadata/multiple-entries-cs-error.ll
A llvm/test/CodeGen/DirectX/Metadata/target-profile-error.ll
A llvm/test/CodeGen/DirectX/atan2.ll
A llvm/test/CodeGen/DirectX/atan2_error.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags.ll
M llvm/test/CodeGen/DirectX/legalize-module-flags2.ll
M llvm/test/CodeGen/DirectX/strip-call-attrs.ll
M llvm/test/CodeGen/DirectX/typed_ptr.ll
M llvm/test/CodeGen/Generic/allow-check.ll
M llvm/test/CodeGen/Hexagon/expand-condsets-impuse2.mir
M llvm/test/CodeGen/Hexagon/expand-condsets-phys-reg.mir
M llvm/test/CodeGen/Hexagon/expand-condsets-rm-reg.mir
A llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties-conflict.mir
A llvm/test/CodeGen/MIR/Generic/machine-function-optionally-computed-properties.mir
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/Mips/cconv/illegal-vectors.ll
M llvm/test/CodeGen/Mips/llvm-ir/ashr.ll
M llvm/test/CodeGen/Mips/llvm-ir/lshr.ll
M llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/shl.ll
M llvm/test/CodeGen/Mips/llvm-ir/srem.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-mult.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-sdiv.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-srem.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-udiv.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-urem.ll
M llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/urem.ll
A llvm/test/CodeGen/NVPTX/fence-sm-90.ll
M llvm/test/CodeGen/NVPTX/fence.ll
R llvm/test/CodeGen/NVPTX/intrin-nocapture.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
A llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store.ll
M llvm/test/CodeGen/NVPTX/rotate.ll
M llvm/test/CodeGen/NVPTX/rotate_64.ll
M llvm/test/CodeGen/PowerPC/DisableHoistingDueToBlockHotnessNoProfileData.mir
M llvm/test/CodeGen/PowerPC/DisableHoistingDueToBlockHotnessProfileData.mir
M llvm/test/CodeGen/PowerPC/ctrloop-sh.ll
M llvm/test/CodeGen/PowerPC/machinelicm-cse-dead-flag.mir
M llvm/test/CodeGen/PowerPC/pr59074.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
A llvm/test/CodeGen/SPARC/salvage-debug-isel.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchUnreachable.ll
M llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll
M llvm/test/CodeGen/SPIRV/branching/if-merging.ll
M llvm/test/CodeGen/SPIRV/branching/if-non-merging.ll
M llvm/test/CodeGen/SPIRV/branching/switch-range-check.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-compilation-unit.ll
M llvm/test/CodeGen/SPIRV/instructions/ret-type.ll
M llvm/test/CodeGen/SPIRV/lit.local.cfg
M llvm/test/CodeGen/SPIRV/phi-ptrcast-dominate.ll
R llvm/test/CodeGen/SPIRV/scfg-add-pre-headers.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.cond-op.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.do.break.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.do.continue.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.do.nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.break.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.continue.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.plain.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.for.short-circuited-cond.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.if.const-cond.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.if.for.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.if.nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.if.plain.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.logical-and.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.logical-or.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.return.early.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.return.early.simple.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.return.void.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.simple.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.ifstmt.simple2.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.opswitch.literal.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.opswitch.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.switch.opswitch.simple.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.break.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.continue.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.plain.ll
A llvm/test/CodeGen/SPIRV/structurizer/cf.while.short-circuited-cond.ll
A llvm/test/CodeGen/SPIRV/structurizer/condition-linear.ll
A llvm/test/CodeGen/SPIRV/structurizer/do-break.ll
A llvm/test/CodeGen/SPIRV/structurizer/do-continue.ll
A llvm/test/CodeGen/SPIRV/structurizer/do-nested.ll
A llvm/test/CodeGen/SPIRV/structurizer/do-plain.ll
A llvm/test/CodeGen/SPIRV/structurizer/logical-or.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-convergence-in-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-multiple-break.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-simple-while-identity.ll
A llvm/test/CodeGen/SPIRV/structurizer/return-early.ll
M llvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll
M llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll
A llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
A llvm/test/CodeGen/X86/canonicalize-vars.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/extractelement-fp.ll
M llvm/test/CodeGen/X86/machine-licm-vs-wineh.mir
M llvm/test/CodeGen/X86/pmulh.ll
M llvm/test/CodeGen/X86/pr29222.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/pr57673.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/CodeGen/X86/section-stats.ll
M llvm/test/CodeGen/X86/shift-i128.ll
M llvm/test/CodeGen/X86/shift-i256.ll
M llvm/test/CodeGen/X86/shuffle-half.ll
M llvm/test/CodeGen/X86/sjlj-shadow-stack-liveness.mir
M llvm/test/CodeGen/X86/unfoldMemoryOperand.mir
M llvm/test/CodeGen/X86/vector-shuffle-combining-avx512vbmi.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/X86/widen-load-of-small-alloca-with-zero-upper-half.ll
M llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll
M llvm/test/DebugInfo/Generic/debug-ranges-duplication.ll
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-pre-regalloc.mir
M llvm/test/DebugInfo/NVPTX/debug-info.ll
M llvm/test/ExecutionEngine/JITLink/AArch64/ELF_ehframe.s
M llvm/test/ExecutionEngine/JITLink/AArch64/MachO_ehframe.s
M llvm/test/ExecutionEngine/JITLink/LoongArch/ELF_loongarch64_ehframe.s
M llvm/test/ExecutionEngine/JITLink/RISCV/ELF_ehframe.s
M llvm/test/ExecutionEngine/JITLink/ppc64/ELF_ppc64_ehframe.s
A llvm/test/ExecutionEngine/JITLink/x86-64/ELF_R_X86_64_PC.s
R llvm/test/ExecutionEngine/JITLink/x86-64/ELF_R_X86_64_PC8.s
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
A llvm/test/MC/AMDGPU/amdhsa-kd-kernarg-preload.s
M llvm/test/MC/AMDGPU/flat-global.s
A llvm/test/MC/AMDGPU/gfx10_flat_instructions_err.s
M llvm/test/MC/AMDGPU/gfx10_unsupported.s
R llvm/test/MC/AMDGPU/gfx1150_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp16_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_dpp8_from_vop1.s
M llvm/test/MC/AMDGPU/gfx11_asm_vop3_from_vop1.s
A llvm/test/MC/AMDGPU/gfx11_flat_instructions_err.s
M llvm/test/MC/AMDGPU/gfx11_unsupported.s
M llvm/test/MC/AMDGPU/gfx12_asm_sopp.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_dpp8.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop1_t16_promote.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp16.s
M llvm/test/MC/AMDGPU/gfx12_asm_vop3_from_vop1_dpp8.s
A llvm/test/MC/AMDGPU/gfx12_flat_instructions_err.s
M llvm/test/MC/AMDGPU/gfx12_unsupported.s
A llvm/test/MC/AMDGPU/gfx940_unsupported.s
M llvm/test/MC/AVR/inst-rjmp.s
M llvm/test/MC/Disassembler/AMDGPU/decode-err.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx10_flat.txt
R llvm/test/MC/Disassembler/AMDGPU/gfx1150_dasm_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp16_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_dpp8_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_sopp.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop1_dpp8.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp16.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3_from_vop1_dpp8.txt
M llvm/test/MC/Disassembler/X86/apx/kmov.txt
A llvm/test/MC/ELF/debug-loc-label.s
M llvm/test/MC/ELF/relocation-alias.s
R llvm/test/MC/RISCV/machine-csr-names-invalid.s
M llvm/test/MC/RISCV/pcrel-fixups.s
M llvm/test/MC/RISCV/rv64-relax-all.s
M llvm/test/MC/X86/apx/kmov-att.s
M llvm/test/MC/X86/apx/kmov-intel.s
M llvm/test/MC/X86/gotpcrelx.s
M llvm/test/MC/X86/reloc-directive-elf-64.s
A llvm/test/TableGen/listflatten-error.td
A llvm/test/TableGen/listflatten.td
A llvm/test/Transforms/AggressiveInstCombine/inline-strcmp-debugloc.ll
M llvm/test/Transforms/CorrelatedValuePropagation/add.ll
M llvm/test/Transforms/CorrelatedValuePropagation/ashr.ll
M llvm/test/Transforms/CorrelatedValuePropagation/basic.ll
M llvm/test/Transforms/CorrelatedValuePropagation/cond-using-block-value.ll
M llvm/test/Transforms/CorrelatedValuePropagation/select.ll
M llvm/test/Transforms/CorrelatedValuePropagation/vectors.ll
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
M llvm/test/Transforms/Inline/access-attributes-prop.ll
M llvm/test/Transforms/Inline/ret_attr_align_and_noundef.ll
A llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-insr.ll
M llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-sdiv.ll
M llvm/test/Transforms/InstCombine/compare-3way.ll
A llvm/test/Transforms/InstCombine/icmp-inttoptr.ll
M llvm/test/Transforms/InstCombine/phi-with-multiple-unsimplifiable-values.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-select.ll
M llvm/test/Transforms/InstCombine/sink_to_unreachable.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
M llvm/test/Transforms/InstCombine/xor.ll
A llvm/test/Transforms/LoopUnroll/pr109333.ll
M llvm/test/Transforms/LoopVectorize/AArch64/arbitrary-induction-step.ll
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/deterministic-type-shrinkage.ll
M llvm/test/Transforms/LoopVectorize/AArch64/divs-with-scalable-vfs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/extractvalue-no-scalarization-required.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-target-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-load-store.ll
M llvm/test/Transforms/LoopVectorize/AArch64/interleaving-reduction.ll
A llvm/test/Transforms/LoopVectorize/AArch64/invariant-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-recurrence-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
A llvm/test/Transforms/LoopVectorize/AArch64/scalable-fp-ext-trunc-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-cond-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-inloop-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect-strict-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-epilog-vect.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-inv-loads.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-live-out-pointer-induction.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-multiexit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-runtime-check-size-based-threshold.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-unroll.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-extractvalue.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
M llvm/test/Transforms/LoopVectorize/LoongArch/defaults.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/exit-branch-cost.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/divrem.ll
M llvm/test/Transforms/LoopVectorize/RISCV/first-order-recurrence-scalable-vf1.ll
M llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/RISCV/pr88802.ll
M llvm/test/Transforms/LoopVectorize/RISCV/riscv-vector-reverse.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/uniform-load-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-reduction.ll
M llvm/test/Transforms/LoopVectorize/SystemZ/pr47665.ll
M llvm/test/Transforms/LoopVectorize/X86/conversion-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/divs-with-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/X86/epilog-vectorization-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleaving.ll
M llvm/test/Transforms/LoopVectorize/X86/invariant-load-gather.ll
M llvm/test/Transforms/LoopVectorize/X86/iv-live-outs.ll
M llvm/test/Transforms/LoopVectorize/X86/limit-vf-by-tripcount.ll
M llvm/test/Transforms/LoopVectorize/X86/load-deref-pred.ll
M llvm/test/Transforms/LoopVectorize/X86/masked-store-cost.ll
M llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
M llvm/test/Transforms/LoopVectorize/X86/metadata-enable.ll
A llvm/test/Transforms/LoopVectorize/X86/pr109581-unused-blend.ll
M llvm/test/Transforms/LoopVectorize/X86/pr35432.ll
M llvm/test/Transforms/LoopVectorize/X86/pr47437.ll
M llvm/test/Transforms/LoopVectorize/X86/pr48340.ll
M llvm/test/Transforms/LoopVectorize/X86/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/X86/strided_load_cost.ll
M llvm/test/Transforms/LoopVectorize/X86/uniform_mem_op.ll
M llvm/test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorize-force-tail-with-evl.ll
M llvm/test/Transforms/LoopVectorize/X86/widened-value-used-as-scalar-and-first-lane.ll
M llvm/test/Transforms/LoopVectorize/blend-in-header.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/dont-fold-tail-for-const-TC.ll
A llvm/test/Transforms/LoopVectorize/first-order-recurrence-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-sink-replicate-region.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/float-induction.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/pr45679-fold-tail-by-masking.ll
M llvm/test/Transforms/LoopVectorize/pr55167-fold-tail-live-out.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-uf4.ll
M llvm/test/Transforms/LoopVectorize/reduction-odd-interleave-counts.ll
M llvm/test/Transforms/LoopVectorize/reverse_induction.ll
M llvm/test/Transforms/LoopVectorize/scalable-first-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/scalable-trunc-min-bitwidth.ll
M llvm/test/Transforms/LoopVectorize/scalar_after_vectorization.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
M llvm/test/Transforms/LoopVectorize/trip-count-expansion-may-introduce-ub.ll
M llvm/test/Transforms/LoopVectorize/trunc-extended-icmps.ll
M llvm/test/Transforms/LoopVectorize/trunc-loads-p16.ll
M llvm/test/Transforms/LoopVectorize/trunc-shifts.ll
M llvm/test/Transforms/LoopVectorize/vector-geps.ll
M llvm/test/Transforms/LoopVectorize/version-stride-with-integer-casts.ll
M llvm/test/Transforms/LoopVectorize/vplan-predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/vplan-printing-before-execute.ll
M llvm/test/Transforms/LoopVectorize/vplan-sink-scalars-and-merge.ll
M llvm/test/Transforms/LoopVectorize/widen-gep-all-indices-invariant.ll
M llvm/test/Transforms/MemCpyOpt/fca2memcpy.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduce-fadd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/mixed-extracts-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/remarks-insert-into-small-vector.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/revec-getGatherCost.ll
A llvm/test/Transforms/SLPVectorizer/RISCV/select-profitability.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
R llvm/test/Transforms/SLPVectorizer/X86/ext-int-reduced-not-operand.ll
R llvm/test/Transforms/SLPVectorizer/X86/extended-vectorized-gathered-inst.ll
R llvm/test/Transforms/SLPVectorizer/X86/external-user-instruction-minbitwidth.ll
R llvm/test/Transforms/SLPVectorizer/X86/extract-many-users-buildvector.ll
R llvm/test/Transforms/SLPVectorizer/X86/extractelement-insertpoint.ll
R llvm/test/Transforms/SLPVectorizer/X86/extractlements-gathered-first-node.ll
R llvm/test/Transforms/SLPVectorizer/X86/extracts-with-undefs.ll
R llvm/test/Transforms/SLPVectorizer/X86/gather_extract_from_vectorbuild.ll
R llvm/test/Transforms/SLPVectorizer/X86/gep-with-extractelement-many-users.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-crash-index.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector-const-undef.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector-inseltpoison.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector.ll
R llvm/test/Transforms/SLPVectorizer/X86/insert-element-multiple-uses.ll
R llvm/test/Transforms/SLPVectorizer/X86/insertelement-postpone.ll
R llvm/test/Transforms/SLPVectorizer/X86/insertelement-uses-vectorized-index.ll
R llvm/test/Transforms/SLPVectorizer/X86/int-bitcast-minbitwidth.ll
R llvm/test/Transforms/SLPVectorizer/X86/jumbled_store_crash.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
R llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-multiuse-with-insertelement.ll
R llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-node-with-multi-users.ll
R llvm/test/Transforms/SLPVectorizer/X86/minbitwidth-user-not-min.ll
R llvm/test/Transforms/SLPVectorizer/X86/multi-node-vectorized-insts.ll
R llvm/test/Transforms/SLPVectorizer/X86/multi-uses-with-deps-in-first.ll
R llvm/test/Transforms/SLPVectorizer/X86/one-element-vector.ll
R llvm/test/Transforms/SLPVectorizer/X86/peek-through-shuffle.ll
R llvm/test/Transforms/SLPVectorizer/X86/phi-node-bitwidt-op-not.ll
R llvm/test/Transforms/SLPVectorizer/X86/phi-undef-input.ll
R llvm/test/Transforms/SLPVectorizer/X86/postponed_gathers.ll
R llvm/test/Transforms/SLPVectorizer/X86/pr31599-inseltpoison.ll
R llvm/test/Transforms/SLPVectorizer/X86/pr31599.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduced-value-vectorized-later.ll
R llvm/test/Transforms/SLPVectorizer/X86/reduction-gather-non-scheduled-extracts.ll
R llvm/test/Transforms/SLPVectorizer/X86/reduction-modified-values.ll
R llvm/test/Transforms/SLPVectorizer/X86/reorder-clustered-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
R llvm/test/Transforms/SLPVectorizer/X86/reordered-top-scalars.ll
R llvm/test/Transforms/SLPVectorizer/X86/reordering-single-phi.ll
R llvm/test/Transforms/SLPVectorizer/X86/reused-buildvector-matching-vectorized-node.ll
R llvm/test/Transforms/SLPVectorizer/X86/root-trunc-extract-reuse.ll
R llvm/test/Transforms/SLPVectorizer/X86/same-scalar-in-same-phi-extract.ll
R llvm/test/Transforms/SLPVectorizer/X86/scalarazied-result.ll
R llvm/test/Transforms/SLPVectorizer/X86/scalarization-overhead.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
R llvm/test/Transforms/SLPVectorizer/X86/shrink_after_reorder2.ll
R llvm/test/Transforms/SLPVectorizer/X86/shuffle-multivector.ll
R llvm/test/Transforms/SLPVectorizer/X86/shufflebuilder-bug.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
R llvm/test/Transforms/SLPVectorizer/X86/stores-non-ordered.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
R llvm/test/Transforms/SLPVectorizer/X86/unknown-entries.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
R llvm/test/Transforms/SLPVectorizer/X86/zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
M llvm/test/Transforms/SLPVectorizer/arith-div-undef.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-insert-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/catchswitch.ll
M llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll
A llvm/test/Transforms/SLPVectorizer/ext-int-reduced-not-operand.ll
A llvm/test/Transforms/SLPVectorizer/extended-vectorized-gathered-inst.ll
A llvm/test/Transforms/SLPVectorizer/external-user-instruction-minbitwidth.ll
A llvm/test/Transforms/SLPVectorizer/extract-many-users-buildvector.ll
A llvm/test/Transforms/SLPVectorizer/extractelement-insertpoint.ll
A llvm/test/Transforms/SLPVectorizer/extractlements-gathered-first-node.ll
A llvm/test/Transforms/SLPVectorizer/extracts-with-undefs.ll
A llvm/test/Transforms/SLPVectorizer/gather_extract_from_vectorbuild.ll
A llvm/test/Transforms/SLPVectorizer/gep-with-extractelement-many-users.ll
A llvm/test/Transforms/SLPVectorizer/insert-crash-index.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-const-undef.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-build-vector-inseltpoison.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-build-vector.ll
A llvm/test/Transforms/SLPVectorizer/insert-element-multiple-uses.ll
A llvm/test/Transforms/SLPVectorizer/insertelement-postpone.ll
A llvm/test/Transforms/SLPVectorizer/insertelement-uses-vectorized-index.ll
A llvm/test/Transforms/SLPVectorizer/int-bitcast-minbitwidth.ll
A llvm/test/Transforms/SLPVectorizer/jumbled_store_crash.ll
A llvm/test/Transforms/SLPVectorizer/minbitwidth-multiuse-with-insertelement.ll
A llvm/test/Transforms/SLPVectorizer/minbitwidth-node-with-multi-users.ll
A llvm/test/Transforms/SLPVectorizer/minbitwidth-user-not-min.ll
A llvm/test/Transforms/SLPVectorizer/multi-node-vectorized-insts.ll
A llvm/test/Transforms/SLPVectorizer/multi-uses-with-deps-in-first.ll
A llvm/test/Transforms/SLPVectorizer/one-element-vector.ll
A llvm/test/Transforms/SLPVectorizer/peek-through-shuffle.ll
A llvm/test/Transforms/SLPVectorizer/phi-node-bitwidt-op-not.ll
A llvm/test/Transforms/SLPVectorizer/phi-undef-input.ll
A llvm/test/Transforms/SLPVectorizer/postponed_gathers.ll
A llvm/test/Transforms/SLPVectorizer/pr31599-inseltpoison.ll
A llvm/test/Transforms/SLPVectorizer/pr31599.ll
A llvm/test/Transforms/SLPVectorizer/reduction-gather-non-scheduled-extracts.ll
A llvm/test/Transforms/SLPVectorizer/reduction-modified-values.ll
A llvm/test/Transforms/SLPVectorizer/reorder-clustered-node.ll
A llvm/test/Transforms/SLPVectorizer/reordered-top-scalars.ll
A llvm/test/Transforms/SLPVectorizer/reordering-single-phi.ll
A llvm/test/Transforms/SLPVectorizer/reused-buildvector-matching-vectorized-node.ll
A llvm/test/Transforms/SLPVectorizer/root-trunc-extract-reuse.ll
A llvm/test/Transforms/SLPVectorizer/same-scalar-in-same-phi-extract.ll
A llvm/test/Transforms/SLPVectorizer/scalarazied-result.ll
A llvm/test/Transforms/SLPVectorizer/scalarization-overhead.ll
A llvm/test/Transforms/SLPVectorizer/shrink_after_reorder2.ll
A llvm/test/Transforms/SLPVectorizer/shuffle-multivector.ll
A llvm/test/Transforms/SLPVectorizer/shufflebuilder-bug.ll
A llvm/test/Transforms/SLPVectorizer/stores-non-ordered.ll
A llvm/test/Transforms/SLPVectorizer/unknown-entries.ll
A llvm/test/Transforms/SLPVectorizer/zext-incoming-for-neg-icmp.ll
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
M llvm/test/Transforms/SimplifyCFG/speculate-derefable-load.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
M llvm/test/lit.cfg.py
M llvm/test/tools/UpdateTestChecks/lit.local.cfg
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_err.s
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_asm_err.s.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm.txt
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_dasm.txt.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_multirun_dasm.txt
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/Inputs/amdgpu_multirun_dasm.txt.expected
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/amdgpu-basic.test
A llvm/test/tools/UpdateTestChecks/update_mc_test_checks/lit.local.cfg
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/if_target.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/if_target.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/if_target.test
A llvm/test/tools/dsymutil/X86/dwarf5-many-include-directories.test
A llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning-execution-mode.s
A llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning.s
A llvm/test/tools/llvm-readobj/COFF/arm64ec-chpe.yaml
R llvm/test/tools/llvm-readobj/arm64ec-chpe.yaml
M llvm/test/tools/llvm-reduce/mir/preserve-func-info.mir
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
M llvm/tools/llvm-c-test/debuginfo.c
M llvm/tools/llvm-c-test/main.c
M llvm/tools/llvm-ctxprof-util/llvm-ctxprof-util.cpp
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
M llvm/tools/llvm-readobj/COFFDumper.cpp
M llvm/tools/llvm-reduce/TestRunner.cpp
M llvm/tools/llvm-reduce/TestRunner.h
M llvm/tools/spirv-tools/CMakeLists.txt
M llvm/unittests/ADT/APIntTest.cpp
M llvm/unittests/ADT/APSIntTest.cpp
M llvm/unittests/ADT/StringExtrasTest.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
M llvm/unittests/Analysis/TargetLibraryInfoTest.cpp
M llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp
M llvm/unittests/CodeGen/InstrRefLDVTest.cpp
M llvm/unittests/CodeGen/LexicalScopesTest.cpp
M llvm/unittests/CodeGen/MFCommon.inc
M llvm/unittests/CodeGen/MachineBasicBlockTest.cpp
M llvm/unittests/CodeGen/MachineInstrTest.cpp
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/IR/InstructionsTest.cpp
M llvm/unittests/IR/MetadataTest.cpp
M llvm/unittests/IR/VerifierTest.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Support/ConvertUTFTest.cpp
M llvm/unittests/Support/DivisionByConstantTest.cpp
M llvm/unittests/Support/ParallelTest.cpp
M llvm/unittests/Support/SourceMgrTest.cpp
M llvm/unittests/Support/VirtualFileSystemTest.cpp
M llvm/unittests/Support/raw_ostream_test.cpp
M llvm/unittests/TargetParser/TripleTest.cpp
M llvm/unittests/Transforms/Utils/CloningTest.cpp
M llvm/unittests/Transforms/Utils/ValueMapperTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/CMakeLists.txt
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/DependencyGraphTest.cpp
A llvm/unittests/Transforms/Vectorize/SandboxVectorizer/InstrIntervalTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/RegionTest.cpp
M llvm/utils/TableGen/AsmMatcherEmitter.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.h
M llvm/utils/TableGen/Common/CodeGenHwModes.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.cpp
M llvm/utils/TableGen/Common/CodeGenInstAlias.h
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.cpp
M llvm/utils/TableGen/Common/CodeGenTarget.h
M llvm/utils/TableGen/Common/DAGISelMatcher.cpp
M llvm/utils/TableGen/Common/DAGISelMatcher.h
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.cpp
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTable.h
M llvm/utils/TableGen/Common/GlobalISel/GlobalISelMatchTableExecutorEmitter.cpp
M llvm/utils/TableGen/Common/GlobalISel/PatternParser.cpp
M llvm/utils/TableGen/Common/PredicateExpander.cpp
M llvm/utils/TableGen/Common/PredicateExpander.h
M llvm/utils/TableGen/DAGISelMatcherGen.cpp
M llvm/utils/TableGen/DAGISelMatcherOpt.cpp
M llvm/utils/TableGen/DecoderEmitter.cpp
M llvm/utils/TableGen/DisassemblerEmitter.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
M llvm/utils/TableGen/GlobalISelCombinerEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/RegisterInfoEmitter.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/TableGen/TableGenBackends.h
M llvm/utils/UpdateTestChecks/common.py
M llvm/utils/gn/secondary/clang/lib/Driver/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Interpreter/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/AST/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Transforms/Vectorize/SandboxVectorizer/BUILD.gn
A llvm/utils/update_mc_test_checks.py
M llvm/utils/update_test_checks.py
M mlir/docs/Dialects/Affine.md
M mlir/docs/Tutorials/UnderstandingTheIRStructure.md
M mlir/include/mlir-c/BuiltinTypes.h
M mlir/include/mlir/Bytecode/BytecodeWriter.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Mesh/IR/MeshOps.h
M mlir/include/mlir/Dialect/Tensor/IR/TensorOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/include/mlir/IR/Builders.h
M mlir/include/mlir/IR/BuiltinTypes.h
M mlir/include/mlir/IR/BuiltinTypes.td
M mlir/include/mlir/IR/CommonTypeConstraints.td
M mlir/include/mlir/IR/Types.h
M mlir/include/mlir/Target/LLVM/ROCDL/Utils.h
M mlir/lib/AsmParser/AsmParserState.cpp
M mlir/lib/AsmParser/TokenKinds.def
M mlir/lib/AsmParser/TypeParser.cpp
M mlir/lib/Bindings/Python/IRTypes.cpp
M mlir/lib/CAPI/IR/BuiltinTypes.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/GPUCommon/OpToFuncCallLowering.h
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
M mlir/lib/Conversion/LLVMCommon/TypeConverter.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/NVGPUToNVVM/NVGPUToNVVM.cpp
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/lib/Dialect/Affine/IR/AffineOps.cpp
M mlir/lib/Dialect/Arith/Transforms/EmulateUnsupportedFloats.cpp
M mlir/lib/Dialect/LLVMIR/IR/BasicPtxBuilderInterface.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Transform/IR/TransformDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/lib/ExecutionEngine/RocmRuntimeWrappers.cpp
M mlir/lib/IR/AsmPrinter.cpp
M mlir/lib/IR/Builders.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/lib/IR/MLIRContext.cpp
M mlir/lib/IR/Operation.cpp
M mlir/lib/IR/Types.cpp
M mlir/lib/Pass/PassTiming.cpp
M mlir/lib/Target/LLVM/ROCDL/Target.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Target/SPIRV/SPIRVBinaryUtils.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/python/mlir/_mlir_libs/_mlir/ir.pyi
M mlir/python/mlir/extras/types.py
M mlir/test/Conversion/AMDGPUToROCDL/amdgpu-to-rocdl.mlir
M mlir/test/Conversion/GPUCommon/lower-memset-to-gpu-runtime-calls.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
M mlir/test/Dialect/Affine/invalid.mlir
M mlir/test/Dialect/LLVMIR/rocdl.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/Linalg/mesh-sharding-propagation.mlir
M mlir/test/Dialect/Linalg/vectorize-convolution.mlir
M mlir/test/Dialect/Linalg/vectorize-tensor-extract.mlir
M mlir/test/Dialect/Mesh/sharding-propagation.mlir
M mlir/test/Dialect/SCF/loop-pipelining.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
M mlir/test/IR/attribute.mlir
M mlir/test/IR/print-ir-nesting.mlir
A mlir/test/Pass/scf-to-cf-and-print-liveness.mlir
M mlir/test/Target/LLVMIR/Import/basic.ll
M mlir/test/Target/LLVMIR/llvmir.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/python/ir/builtin_types.py
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/unittests/Support/IndentedOstreamTest.cpp
M mlir/unittests/Target/LLVM/SerializeNVVMTarget.cpp
M mlir/unittests/Target/LLVM/SerializeROCDLTarget.cpp
M mlir/utils/lldb-scripts/mlirDataFormatters.py
M mlir/utils/tree-sitter-mlir/grammar.js
M offload/include/OpenMP/OMPT/Callback.h
M offload/include/OpenMP/OMPT/Interface.h
M offload/plugins-nextgen/common/CMakeLists.txt
R offload/plugins-nextgen/common/OMPT/OmptCallback.cpp
M offload/src/OpenMP/OMPT/Callback.cpp
M offload/src/exports
M polly/lib/CodeGen/RuntimeDebugBuilder.cpp
M polly/lib/Support/RegisterPasses.cpp
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
M utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
set default to 3.fix tests
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/7be5f9edad29...312895c52341
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