[all-commits] [llvm/llvm-project] 234193: [mlir][linalg] Vectorization support for convoluti...
Nirvedh Meshram via All-commits
all-commits at lists.llvm.org
Tue Sep 24 10:25:21 PDT 2024
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 234193bae6cf8b19703c6e543b100517bb99a9f7
https://github.com/llvm/llvm-project/commit/234193bae6cf8b19703c6e543b100517bb99a9f7
Author: Nirvedh Meshram <96096277+nirvedhmeshram at users.noreply.github.com>
Date: 2024-09-24 (Tue, 24 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/vectorize-convolution.mlir
Log Message:
-----------
[mlir][linalg] Vectorization support for convolution of i1 type (#109480)
Normally convolutions present with the following linalg op region
```
^bb0(%arg14: i4, %arg15: i4, %arg16: i4):
%17 = arith.muli %arg14, %arg15 : i4
%18 = arith.addi %arg16, %17 : i4
linalg.yield %18 : i4
```
However, for i1 due to strength reduction we get something like
```
^bb0(%arg14: i1, %arg15: i1, %arg16: i1):
%17 = arith.andi %arg14, %arg15 : i1
%18 = arith.ori %arg16, %17 : i1
linalg.yield %18 : i1
```
This PR updates the logic to support this region for i1 types.
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