[all-commits] [llvm/llvm-project] 142920: [NFC][sanitizer] Debug errno in test
Fangrui Song via All-commits
all-commits at lists.llvm.org
Mon Sep 23 10:31:48 PDT 2024
Branch: refs/heads/users/MaskRay/spr/elf-move-elfsymtab-into-ctx
Home: https://github.com/llvm/llvm-project
Commit: 1429204352ec758c98a60e3d22773973e234615b
https://github.com/llvm/llvm-project/commit/1429204352ec758c98a60e3d22773973e234615b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Debug errno in test
Commit: 0d334d83a4c7ce16fa1bc0e5e56bbdeaf01c2b2d
https://github.com/llvm/llvm-project/commit/0d334d83a4c7ce16fa1bc0e5e56bbdeaf01c2b2d
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/test/MC/Disassembler/X86/apx/kmov.txt
M llvm/test/MC/X86/apx/kmov-att.s
M llvm/test/MC/X86/apx/kmov-intel.s
Log Message:
-----------
[X86][APX] Fix wrong encoding of promoted KMOV instructions due to missing NoCD8 (#109579)
Promoted KMOV* was encoded with CD8 incorrectly, see
https://godbolt.org/z/cax513hG1
Commit: 81c3499531c3fe03827bd8bc890e3a16db9e4c3c
https://github.com/llvm/llvm-project/commit/81c3499531c3fe03827bd8bc890e3a16db9e4c3c
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
Log Message:
-----------
[NFC][sanitizer] Skip test if O_TMPFILE EINVAL on some FS
Commit: 62f737f7409b5d2b33c746158c62f14e5bb78aed
https://github.com/llvm/llvm-project/commit/62f737f7409b5d2b33c746158c62f14e5bb78aed
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/test/Driver/target-cpu-features.f90
Log Message:
-----------
[Driver][X86] Add flang visibility for -m[no-]evex512 (#109598)
The `-m[no-]evex512` are nontrivial options which are used to control
vector size of other AVX512 features. Hence we expose both to flang for
Fortran users.
Commit: 9ed46fbe9fa153316b7b0bb0906f3c8db45a8f81
https://github.com/llvm/llvm-project/commit/9ed46fbe9fa153316b7b0bb0906f3c8db45a8f81
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M lld/COFF/Driver.cpp
M lld/Common/DriverDispatcher.cpp
M lld/ELF/Driver.cpp
M lld/MachO/InputSection.cpp
Log Message:
-----------
[lld] Use StringRef idioms (NFC) (#109584)
Commit: ba5e19580913d0b4cac249a81f0aabf7a0a3317f
https://github.com/llvm/llvm-project/commit/ba5e19580913d0b4cac249a81f0aabf7a0a3317f
Author: Shourya Goel <shouryagoel10000 at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libc/include/llvm-libc-macros/math-function-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/IsSubnormalTest.h
A libc/test/include/issubnormal_test.c
A libc/test/include/issubnormal_test.cpp
A libc/test/include/issubnormalf_test.cpp
A libc/test/include/issubnormall_test.cpp
Log Message:
-----------
[libc][math] Implement issubnormal macro. (#109572)
#109201
Commit: 80cdc3718036cd3ee33424953821ac01046d5278
https://github.com/llvm/llvm-project/commit/80cdc3718036cd3ee33424953821ac01046d5278
Author: Thomas Fransham <tfransham at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/tools/CMakeLists.txt
Log Message:
-----------
[Clang] Include the clang-shlib CMake project when building for MSVC (#109457)
Enable building clang-cpp shared library for windows when building with
explicit visibility macros enabled and LLVM is built as a shared
library(LLVM_BUILD_LLVM_DYLIB_VIS).
This is part of the effort to support for enabling plugins on windows by
adding better support for building LLVM and Clang as a DLL.
Commit: c3d3cef8d58377b02032b07b5f094a402a70435a
https://github.com/llvm/llvm-project/commit/c3d3cef8d58377b02032b07b5f094a402a70435a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-22 (Sun, 22 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/test/MC/RISCV/rv64-relax-all.s
Log Message:
-----------
[RISCV] Don't delete all fixups in RISCVMCCodeEmitter::expandLongCondBr. (#109513)
The Fixups vector passed into this function may already have fixups in
it from earlier instructions. We should not erase those. We just want to
erase fixups added by this function.
Fixes #108612.
Commit: 80b44517f571689ede9327b3122caff3c631408e
https://github.com/llvm/llvm-project/commit/80b44517f571689ede9327b3122caff3c631408e
Author: Elvis Wang <elvis.wang at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
Log Message:
-----------
[RISCV][TTI] Add instruction cost for vp.select. (#109381)
This patch make instruction cost for vp.select the same as its non-vp
counterpart.
Commit: 5a4c6f97997f3cdfa9d98f7f0b546e331ee9cc4a
https://github.com/llvm/llvm-project/commit/5a4c6f97997f3cdfa9d98f7f0b546e331ee9cc4a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/test/Transforms/SimplifyCFG/speculate-derefable-load.ll
Log Message:
-----------
[Loads] Check context instruction for context-sensitive derefability (#109277)
If a dereferenceability fact is provided through `!dereferenceable` (or
similar), it may only hold on the given control flow path. When we use
`isSafeToSpeculativelyExecute()` to check multiple instructions, we
might make use of `!dereferenceable` information that does not hold at
the speculation target. This doesn't happen when speculating
instructions one by one, because `!dereferenceable` will be dropped
while speculating.
Fix this by checking whether the instruction with `!dereferenceable`
dominates the context instruction. If this is not the case, it means we
are speculating, and cannot guarantee that it holds at the speculation
target.
Fixes https://github.com/llvm/llvm-project/issues/108854.
Commit: 8a6248b739d705577fa5414b4010605dca38aa79
https://github.com/llvm/llvm-project/commit/8a6248b739d705577fa5414b4010605dca38aa79
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
Log Message:
-----------
[SimplifyCFG] Don't separate a load/store from its gep during sinking (#102318)
If we can sink the a load/store, but not the gep producing its pointer
operand, don't sink the load/store either. This may prevent the gep from
being folded into an addressing mode, and may also negatively affect
further analysis.
Fixes https://github.com/llvm/llvm-project/issues/96838.
Commit: 84b1489c8f8d4fb3c541167301c29ee4dad1af78
https://github.com/llvm/llvm-project/commit/84b1489c8f8d4fb3c541167301c29ee4dad1af78
Author: David Green <david.green at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/CodeGen/ARM/vbsl.ll
Log Message:
-----------
[ARM] Update VBIC tests. NFC
Commit: df6855ba57b2cede7b1578e74276f3ad33c2ad5d
https://github.com/llvm/llvm-project/commit/df6855ba57b2cede7b1578e74276f3ad33c2ad5d
Author: Benji Smith <6193112+Benjins at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm-c/Core.h
M llvm/lib/IR/Core.cpp
M llvm/test/Bindings/llvm-c/atomics.ll
Log Message:
-----------
[C API] Add usub_cond and usub_sat atomic ops to C API (#109532)
These were added in the C++ API in
https://github.com/llvm/llvm-project/pull/105568 but were not exposed
via the C API previously
Commit: 6ad268e3913cb6814fabae420a8e80156e1632a7
https://github.com/llvm/llvm-project/commit/6ad268e3913cb6814fabae420a8e80156e1632a7
Author: dlav-sc <daniil.avdeev at syntacore.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/source/Target/Target.cpp
Log Message:
-----------
[lldb] refactor Target::Install function (#108996)
refactor Target::Install function
Commit: c8e0672864abf6fb624ddde5d6a1775d8634213a
https://github.com/llvm/llvm-project/commit/c8e0672864abf6fb624ddde5d6a1775d8634213a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
Log Message:
-----------
[Loops] Use forgetLcssaPhiWithNewPredecessor() in more places
Use the more aggressive invalidation method in a number of places
that add incoming values to lcssa phi nodes. It is likely that
it's possible to construct cases with incorrect SCEV preservation
similar to https://github.com/llvm/llvm-project/issues/109333 for
these.
Commit: 898fd396b836600ef857464941220d07894b859b
https://github.com/llvm/llvm-project/commit/898fd396b836600ef857464941220d07894b859b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/test/AST/ByteCode/new-delete.cpp
Log Message:
-----------
[clang][bytecode] Check allocation size limit for operator new (#109590)
Commit: 02711a77c0bf8b7921f48aaa601564449888e458
https://github.com/llvm/llvm-project/commit/02711a77c0bf8b7921f48aaa601564449888e458
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M compiler-rt/test/asan/TestCases/Linux/preinstalled_signal.cpp
Log Message:
-----------
[ASan][test] XFAIL Linux/preinstalled_signal.cpp on Linux/sparc64 (#109623)
With ASan testing enabled on SPARC as per PR #107405, the
```
AddressSanitizer-sparc-linux-dynamic :: TestCases/Linux/preinstalled_signal.cpp
```
test `FAIL`s on Linux/sparc64. See Issue #109573 for all the details,
but the core is that `syscall(__NR_rt_sigaction)` cannot be used because
it takes an additional argument that isn't accessible outside of `libc`,
while switching to `sigaction` instead changes the order of
`AsanInitInternal` and `Init`, breaking the test.
Therefore this patch `XFAIL`s the test.
Tested on `sparc64-unknown-linux-gnu` and `x86_64-pc-linux-gnu`.
Commit: db3569d2e5aa4d967a2e8c5b9893f9a49937e55d
https://github.com/llvm/llvm-project/commit/db3569d2e5aa4d967a2e8c5b9893f9a49937e55d
Author: Michal Rostecki <vadorovsky at protonmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/Bindings/llvm-c/debug_info_new_format.ll
M llvm/tools/llvm-c-test/main.c
Log Message:
-----------
[llvm-c-test] Rename --test-dibuilder-debuginfo-format to `--test-dibuilder` (#105702)
The former name was introduced during the split between debug info
intrinsic and `DbgRecord`. Before the split, it was named
`--test-dibuilder`.
However, the full migration to `DbgRecord` happened already and we have
just one test suite related to building debug info using LLVM-C API.
Therefore, it makes sense to rename it back to `--test-dibuilder`.
Commit: 8b4b7d28f7c344c728a9812aa99d9ad24edb40a2
https://github.com/llvm/llvm-project/commit/8b4b7d28f7c344c728a9812aa99d9ad24edb40a2
Author: Dmitry Chernenkov <dmitryc at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] additional fix for 65bc259a97cd8cc70907b65f59aff728245ba9c0
Commit: b953914e2fef53773baa1fa89e96671015d45852
https://github.com/llvm/llvm-project/commit/b953914e2fef53773baa1fa89e96671015d45852
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Object/COFFObjectFile.cpp
M llvm/test/tools/llvm-readobj/COFF/arm64ec-chpe.yaml
Log Message:
-----------
[Object][COFF] Fix CHPE metadata offset check (#109591)
Commit: 6fc2451167ec991361dd0568de9a9fa2926f8da8
https://github.com/llvm/llvm-project/commit/6fc2451167ec991361dd0568de9a9fa2926f8da8
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
A llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning-execution-mode.s
A llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning.s
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
Reland "[llvm-exegesis] Add support for pinning benchmarking process to a CPU (#85168)"
This reverts commit 5e3d48a68096a0017a0fa4bb89f2d48767c8a7e4.
This relands commit 9886788a8a500a1b429a6db64397c849b112251c.
This was originally causing build failures on more esoteric platforms
that have different definitions of getcpu. This is only intended to be
supported on x86-64 currently, so just use preprocessor definitions to
special case the function.
Commit: 02ee96eca90741031a26f0f06cd48bb0ba558d1a
https://github.com/llvm/llvm-project/commit/02ee96eca90741031a26f0f06cd48bb0ba558d1a
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/finite-trip-count.ll
M llvm/test/Analysis/ScalarEvolution/ne-overflow.ll
M llvm/test/Analysis/ScalarEvolution/predicated-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/predicated-symbolic-max-backedge-taken-count.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-implied-addrec.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/simple_early_exit.ll
Log Message:
-----------
[Analysis] Teach isDereferenceableAndAlignedInLoop about SCEV predicates (#106562)
Currently if a loop contains loads that we can prove at compile time
are dereferenceable when certain conditions are satisfied the function
isDereferenceableAndAlignedInLoop will still return false because
getSmallConstantMaxTripCount will return 0 when SCEV predicates
are required. This patch changes getSmallConstantMaxTripCount to take
an optional Predicates pointer argument so that we can permit
functions such as isDereferenceableAndAlignedInLoop to consider more
cases.
Commit: 0b0a37e158bcf6d0667b4744b3d335f91578e0c9
https://github.com/llvm/llvm-project/commit/0b0a37e158bcf6d0667b4744b3d335f91578e0c9
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaStmt.cpp
M clang/test/SemaCXX/attr-musttail.cpp
Log Message:
-----------
[clang] Lifetime of locals must end before musttail call (#109255)
The lifetimes of local variables and function parameters must end before
the call to a [[clang::musttail]] function, instead of before the
return, because we will not have a stack frame to hold them when doing
the call.
This documents this limitation, and adds diagnostics to warn about some
code which is invalid because of it.
Commit: f28a0355364b9f09fa3d47720af4cf7431721de6
https://github.com/llvm/llvm-project/commit/f28a0355364b9f09fa3d47720af4cf7431721de6
Author: abhishek-kaushik22 <abhishek.kaushik at intel.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/LLVMTargetMachine.cpp
Log Message:
-----------
Fix memory leak in LLVMTargetMachine.cpp (#109610)
Because `MAB` is a raw pointer, it could potentially leak memory because
of the `||` in the null check.
Commit: 8632e8bd64d6f02e571777390274c262d5c85167
https://github.com/llvm/llvm-project/commit/8632e8bd64d6f02e571777390274c262d5c85167
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
A llvm/test/CodeGen/AMDGPU/shrink-v-cmp-wave32-dead-vcc-lo.mir
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
AMDGPU: Fix implicit vcc def to vcc_lo on wave32 targets (#109514)
Commit: cd80ed424b13790a65365a0145fa9b1b51b13680
https://github.com/llvm/llvm-project/commit/cd80ed424b13790a65365a0145fa9b1b51b13680
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
Log Message:
-----------
[llvm-exegesis] Fix -Wunused-variable in BenchmarkRunner.cpp (NFC)
/llvm-project/llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp:415:18:
error: unused variable 'CurrentCPU' [-Werror,-Wunused-variable]
unsigned int CurrentCPU;
^
1 error generated.
Commit: 3e0a76b1fd10d2f5f36d34a91b525c1d29685185
https://github.com/llvm/llvm-project/commit/3e0a76b1fd10d2f5f36d34a91b525c1d29685185
Author: futog <54807384+futog at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/test/CodeGen/AArch64/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/AArch64/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/Mips/llvm-ir/ashr.ll
M llvm/test/CodeGen/Mips/llvm-ir/lshr.ll
M llvm/test/CodeGen/Mips/llvm-ir/shl.ll
M llvm/test/CodeGen/PowerPC/ctrloop-sh.ll
M llvm/test/CodeGen/PowerPC/pr59074.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/CodeGen/X86/shift-i128.ll
M llvm/test/CodeGen/X86/shift-i256.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/X86/widen-load-of-small-alloca-with-zero-upper-half.ll
M llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll
Log Message:
-----------
[Codegen][LegalizeIntegerTypes] Improve shift through stack (#96151)
Minor improvement on cc39c3b17fb2598e20ca0854f9fe6d69169d85c7.
Use an aligned stack slot to store the shifted value.
Use the native register width as shifting unit, so the load of the
shift result is aligned.
If the shift amount is a multiple of the native register width, there is
no need to do a follow-up shift after the load. I added new tests for
these cases.
Co-authored-by: Gergely Futo <gergely.futo at hightec-rt.com>
Commit: 2612316f72b92d7905717c358aeab8b8141738a1
https://github.com/llvm/llvm-project/commit/2612316f72b92d7905717c358aeab8b8141738a1
Author: Viktoriia Bakalova <115406782+VitaNuo at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/test/test_demangle.pass.cpp
M llvm/include/llvm/Demangle/ItaniumDemangle.h
Log Message:
-----------
[ItaniumDemangle] Add template name to the substitutions list during demangling (#108538)
When demangling a template template parameter (`method<bool,
Bar>(Bar<bool> b)`), the current demangler version first enters the
template argument (`bool`) into the substitutions list, then the whole
template specialization (`Bar<bool>`). The template name (`Bar`) never
becomes a substitution candidate on its own.
This is different when mangling. Mangling `method<bool, Bar>(Bar<bool>
b, Bar<int> i)` substitutes the `Bar` in the second parameter with the
substitution for `TemplateTemplateParmDecl`.
This leads to a discrepancy between mangler and demangler, see
https://github.com/llvm/llvm-project/issues/108009.
Commit: bad544461a72cdf0e8301b0e80eef4e6661eee2b
https://github.com/llvm/llvm-project/commit/bad544461a72cdf0e8301b0e80eef4e6661eee2b
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/test/AST/ByteCode/cxx20.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove an outdated comment
Commit: d36f66b42d7abec73bb5b953612eef26e6c12e0a
https://github.com/llvm/llvm-project/commit/d36f66b42d7abec73bb5b953612eef26e6c12e0a
Author: Michael Halkenhäuser <MichaelGerald.Halkenhauser at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M offload/include/OpenMP/OMPT/Callback.h
M offload/include/OpenMP/OMPT/Interface.h
M offload/plugins-nextgen/common/CMakeLists.txt
R offload/plugins-nextgen/common/OMPT/OmptCallback.cpp
M offload/src/OpenMP/OMPT/Callback.cpp
M offload/src/exports
Log Message:
-----------
[NFC][offload][OMPT] Cleanup of OMPT internals (#109005)
Removed `OmptCallbacks.cpp` since relevant contents were duplicated.
Because of the static linking there should be no change in
functionality.
Commit: 7a181980b900683fd3e1ac9601a627c758f19a61
https://github.com/llvm/llvm-project/commit/7a181980b900683fd3e1ac9601a627c758f19a61
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Log Message:
-----------
[InstCombine] Fix nits in new xor fold
Followup to https://github.com/llvm/llvm-project/pull/105992,
use the simplifyXorInst helper and use getWithInstruction
consistently.
Commit: a72d7eea5413444249670579fecea6823fb3c564
https://github.com/llvm/llvm-project/commit/a72d7eea5413444249670579fecea6823fb3c564
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/include/clang/Frontend/MultiplexConsumer.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Interpreter/IncrementalParser.h
M clang/lib/Interpreter/Interpreter.cpp
A clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/unittests/Interpreter/CodeCompletionTest.cpp
M clang/unittests/Interpreter/InterpreterExtensionsTest.cpp
Log Message:
-----------
[clang-repl] Simplify the value printing logic to enable out-of-process. (#107737)
This patch improves the design of the IncrementalParser and Interpreter
classes. Now the incremental parser is only responsible for building the
partial translation unit declaration and the AST, while the Interpreter
fills in the lower level llvm::Module and other JIT-related
infrastructure. Finally the Interpreter class now orchestrates the AST
and the LLVM IR with the IncrementalParser and IncrementalExecutor
classes.
The design improvement allows us to rework some of the logic that
extracts an interpreter value into the clang::Value object. The new
implementation simplifies use-cases which are used for out-of-process
execution by allowing interpreter to be inherited or customized with an
clang::ASTConsumer.
This change will enable completing the pretty printing work which is in
llvm/llvm-project#84769
Commit: 7e7009fc5725fc2a9157212834cc995c91969cf1
https://github.com/llvm/llvm-project/commit/7e7009fc5725fc2a9157212834cc995c91969cf1
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Interpreter/BUILD.gn
Log Message:
-----------
[gn build] Port a72d7eea5413
Commit: 31ac3d092bd047ab2c0bdcb6d527736472b9d4a6
https://github.com/llvm/llvm-project/commit/31ac3d092bd047ab2c0bdcb6d527736472b9d4a6
Author: sinan <sinan.lin at linux.alibaba.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Rewrite/RewriteInstance.cpp
R bolt/test/AArch64/Inputs/iplt.ld
R bolt/test/AArch64/ifunc.c
A bolt/test/AArch64/ifunc.test
A bolt/test/Inputs/ifunc.c
A bolt/test/Inputs/iplt.ld
A bolt/test/X86/ifunc.test
Log Message:
-----------
[BOLT] Add .iplt support to x86 (#106513)
Add X86 support for parsing .iplt section and symbols.
Commit: 57f5d8f2fe9ed55a03ce451811940726d6908f2e
https://github.com/llvm/llvm-project/commit/57f5d8f2fe9ed55a03ce451811940726d6908f2e
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Only store single vector per VPValue in VPTransformState. (NFC)
After 8ec406757cb92 (https://github.com/llvm/llvm-project/pull/95842),
VPTransformState only stores a single vector value per VPValue.
Simplify the code by replacing the SmallVector in PerPartOutput with a
single Value * and rename to VPV2Vector for clarity.
Also remove the redundant Part argument from various accessors.
Commit: cff753f8768ff3a7afbc27adaf318ebbf419dcfa
https://github.com/llvm/llvm-project/commit/cff753f8768ff3a7afbc27adaf318ebbf419dcfa
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] SimplifyDemandedVectorEltsForTargetNode - simplify X86ISD::VBROADCAST of 0'th element handling. NFC.
Avoid duplicate TLO.CombineTo calls.
Commit: 85220a0c651e565ab576c5be17c1ec5c9eb2a350
https://github.com/llvm/llvm-project/commit/85220a0c651e565ab576c5be17c1ec5c9eb2a350
Author: Kelvin Lee <kiyolee at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
Log Message:
-----------
[lldb][FreeBSD] Fix a typo in NativeProcessFreeBSD::MonitorSIGTRAP() (#109643)
Apparently a typo is causing compile error, added by https://github.com/llvm/llvm-project/pull/108504.
Commit: 677177bb60dbe0d551251058c28466c5d74cebac
https://github.com/llvm/llvm-project/commit/677177bb60dbe0d551251058c28466c5d74cebac
Author: yingopq <115543042+yingopq at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/Mips/Mips.h
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.h
M llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/srem.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-mult.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-sdiv.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-srem.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-udiv.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-urem.ll
M llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/urem.ll
Log Message:
-----------
[Mips] Fix mfhi/mflo hazard miscompilation about div and mult (#91449)
Fix issue1: In mips1-4, require a minimum of 2 instructions between a
mflo/mfhi and the next mul/dmult/div/ddiv/divu/ddivu instruction.
Fix issue2: In mips1-4, should not put mflo into the delay slot for the
return.
Fix https://github.com/llvm/llvm-project/issues/81291
Commit: 26f272ebbdf8dc4a81f3f7d7c8ccf99fd9398bfb
https://github.com/llvm/llvm-project/commit/26f272ebbdf8dc4a81f3f7d7c8ccf99fd9398bfb
Author: Pawan Nirpal <pawannirpal at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
A llvm/test/CodeGen/X86/canonicalize-vars.ll
Log Message:
-----------
[X86][SelectionDAG] - Add support for llvm.canonicalize intrinsic (#106370)
Enable support for fcanonicalize intrinsic lowering.
Commit: c712ab829b2050e2ac1652e032fa0786a43a31c0
https://github.com/llvm/llvm-project/commit/c712ab829b2050e2ac1652e032fa0786a43a31c0
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/AST/ByteCode/placement-new.cpp
Log Message:
-----------
[clang][bytecode] Implement placement-new (#107033)
If we have a placement-new destination already, use that instead of
allocating a new one.
Tests are partially based on
`test/SemaCXX/cxx2c-constexpr-placement-new.cpp`.
Commit: c35ea627df441a3650f986ca79954b4b9d16bf24
https://github.com/llvm/llvm-project/commit/c35ea627df441a3650f986ca79954b4b9d16bf24
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/if_target.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/if_target.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/if_target.test
M llvm/utils/update_test_checks.py
Log Message:
-----------
update_test_checks: recognize %if in RUN line (#108972)
Recognize %if for target-specific cases in RUN line and keep only tool
command with options
Commit: e0bd8d3485075d24ecff2b4f5d9e2117853bd08b
https://github.com/llvm/llvm-project/commit/e0bd8d3485075d24ecff2b4f5d9e2117853bd08b
Author: Elvina Yakubova <eyakubova at nvidia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
M llvm/test/Transforms/SLPVectorizer/arith-div-undef.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-insert-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/catchswitch.ll
M llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll
Log Message:
-----------
[SLP] Better way to filter target-specific tests (#106720)
When only an exclusive target e.g AArch64 was enabled, these tests were
previously shown as UNSUPPORTED.
This change allows us to run tests for cases with only a build for one
target.
Commit: 7773dcd16389b07e055a10336c42e71ffd57ad3d
https://github.com/llvm/llvm-project/commit/7773dcd16389b07e055a10336c42e71ffd57ad3d
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
Log Message:
-----------
[X86][NFC] Change test name and add a new test (#109638)
Address post commit comments in #108754.
Commit: 785337e2d97a712612a5956657e8dbf1cd140e46
https://github.com/llvm/llvm-project/commit/785337e2d97a712612a5956657e8dbf1cd140e46
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/scalable-fp-ext-trunc-illegal-type.ll
Log Message:
-----------
[LV][AArch64] Don't query registers for illegal scalable vector elts (#109411)
When trying to maximize vector bandwidth we ask TTI for the number of
registers required for a given operation. If the type of that operation
happens to be something illegal for scalable vectors (e.g.
<vscale x 4 x fp128>) then we would see a crash.
Instead, just return a default value and let the cost model reject the
invalid operation later.
Commit: f4eeae1244c83486e38e4b73715fa688d34bc244
https://github.com/llvm/llvm-project/commit/f4eeae1244c83486e38e4b73715fa688d34bc244
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/simple_early_exit.ll
Log Message:
-----------
[LoopVectorize] Address comments on PR #107004 left post-commit (#109300)
* Rename Speculative -> Uncountable and update tests.
* Add comments explaining why it's safe to ignore the predicates when
building up a list of exiting blocks.
* Reshuffle some code to do (hopefully) cheaper checks first.
Commit: b0dc7b5b8617e188a926cbe06918fedab2fd5df9
https://github.com/llvm/llvm-project/commit/b0dc7b5b8617e188a926cbe06918fedab2fd5df9
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/xtn.ll
Log Message:
-----------
[AArch64][GlobalISel] Prefer to use Vector Truncate (#105692)
Tries to combine scalarised truncates into vector truncate operations
EXAMPLE:
`%a(i32), %b(i32) = G_UNMERGE %src(<2 x i32>)`
`%T_a(i16) = G_TRUNC %a(i32)`
`%T_b(i16) = G_TRUNC %b(i32)`
`%Imp(i16) = G_IMPLICIT_DEF(i16)`
`%dst(v8i16) = G_MERGE_VALUES %T_a(i16), %T_b(i16), %Imp(i16),
%Imp(i16)`
===>
`%Imp(<2 x i32>) = G_IMPLICIT_DEF(<2 x i32>)`
`%Mid(<4 x s16>) = G_CONCAT_VECTORS %src(<2 x i32>), %Imp(<2 x i32>)`
`%dst(<4 x s16>) = G_TRUNC %Mid(<4 x s16>)`
Commit: f8f41bf92c92ebc9b113a2a573d12880b86d5af3
https://github.com/llvm/llvm-project/commit/f8f41bf92c92ebc9b113a2a573d12880b86d5af3
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaCXX/attr-gsl-owner-pointer-std.cpp
Log Message:
-----------
[clang] Apply the [[gsl::Owner]] or [[gsl::Pointer]] attributes to the STL template specialization declarations. (#109653)
Fixes #109442
Commit: 6f194a6dea4b4067336431e699ea3588417d4b96
https://github.com/llvm/llvm-project/commit/6f194a6dea4b4067336431e699ea3588417d4b96
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
Log Message:
-----------
[SimplifyCFG] Avoid truncation in linear map overflow check
This is supposed to test multiplication of the linear multiplifier
with the largest value it can be multiplied with. However, if
we truncate TableSize-1 here, it might not actually be the largest
value. I think in practice this still works out, because in cases
where we'd truncate the value here we'd also fail the NonMonotonic
check. But to match the intent of the code, we should treat the
truncating case as overflowing.
Commit: 6d216fb7b8546c04223e56002152c556926d1a1d
https://github.com/llvm/llvm-project/commit/6d216fb7b8546c04223e56002152c556926d1a1d
Author: Kristof Beyls <kristof.beyls at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/unittests/Core/BinaryContext.cpp
Log Message:
-----------
[perf2bolt] Improve heuristic to map in-process addresses to specific… (#109397)
… segments in Elf binary.
The heuristic is improved by also taking into account that only
executable segments should contain instructions.
Fixes #109384.
Commit: 3e0d37fd79faeb60a47ed8aace1c594ff7f637f2
https://github.com/llvm/llvm-project/commit/3e0d37fd79faeb60a47ed8aace1c594ff7f637f2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/tools/llvm-reduce/TestRunner.cpp
M llvm/tools/llvm-reduce/TestRunner.h
Log Message:
-----------
llvm-reduce: Simplify argument setup for ExecuteAndWait
Only need to append the input file for each iteration.
Commit: cee65092c95a216e63d970b5da1495eb33dd506a
https://github.com/llvm/llvm-project/commit/cee65092c95a216e63d970b5da1495eb33dd506a
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Log Message:
-----------
[ARM] Avoid repeated hash lookups (NFC) (#109602)
Commit: 9a3348856ced274b9c7136d6726a18ca8975dad1
https://github.com/llvm/llvm-project/commit/9a3348856ced274b9c7136d6726a18ca8975dad1
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
Log Message:
-----------
[DWARFLinker] Avoid repeated hash lookups (NFC) (#109604)
Commit: ff9f1a6ea2a0031387d23ce510d43edd81a18a1e
https://github.com/llvm/llvm-project/commit/ff9f1a6ea2a0031387d23ce510d43edd81a18a1e
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
Log Message:
-----------
[Rewrite] Avoid repeated hash lookups (NFC) (#109605)
Commit: d6a6e25c5158be8a1b820aedf067fce394f7a313
https://github.com/llvm/llvm-project/commit/d6a6e25c5158be8a1b820aedf067fce394f7a313
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[AST] Avoid repeated hash lookups (NFC) (#109603)
Commit: a4232dc676908548afa36d4f4ad740131ce385e2
https://github.com/llvm/llvm-project/commit/a4232dc676908548afa36d4f4ad740131ce385e2
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
Log Message:
-----------
[rtsan][tsan] Fix va_args handling in open functions (#108291)
Check oflag to see if it contains O_CREAT / O_TMPFILE before unpacking parameters to avoid UB
Commit: 21627236363d629f6a5b820f45a6071371e4b8db
https://github.com/llvm/llvm-project/commit/21627236363d629f6a5b820f45a6071371e4b8db
Author: Chao Chen <116223022+chencha3 at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
[MLIR][XeGPU] Updates XeGPU TensorDescAttr and Refine Gather/Scatter definition. (#109144)
The PR makes the following refine changes to the XeGPU dialect.
1. Separated the old `TensorDescAttr` into two independent attributes: `BlockTensorDescAttr` and `ScatterTensorDescAttr`
2. Renamed the `MemoryScopeAttr` to `MemorySpaceAttr` and updated the enumeration value for shared memory following OpenCL standard.
3. Introduced `transpose` UnitAttr to `StoreScatterOp`and `LoadGatherOp`
4. Added memory space check for `CreateNdDesc` and `CreateDesc` op, as well as valid and invalid test cases for them.
Commit: 0b524efa953ce4a1f41ff6abaa8e3c5f757e40e2
https://github.com/llvm/llvm-project/commit/0b524efa953ce4a1f41ff6abaa8e3c5f757e40e2
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
Log Message:
-----------
[RISCV][TTI] Reduce cost of a <N x i1> build_vector pattern (#109449)
This is a follow up to 7f6bbb3. When lowering a <N x i1> build_vector,
we currently chose to extend to i8, perform the build_vector there, and
then truncate back in vector. Our costing on the other hand accounts for
it as if we performed a vector extend, an insert, and a vector extract
for every element. This significantly over estimates the cost.
Note that we can likely do better in our build_vector lowering here by
packing the bits in scalar, and doing a build_vector of the packed bits.
Regardless, our costing should match our lowering.
Commit: ecb98f9fed65801d9ad2c138da7194496e18aeec
https://github.com/llvm/llvm-project/commit/ecb98f9fed65801d9ad2c138da7194496e18aeec
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M llvm/include/llvm-c/Core.h
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M polly/lib/CodeGen/RuntimeDebugBuilder.cpp
Log Message:
-----------
[IRBuilder] Remove uses of CreateGlobalStringPtr() (NFC)
Since the migration to opaque pointers, CreateGlobalStringPtr()
is the same as CreateGlobalString(). Normalize to the latter.
Commit: 09e94d09fd0f6ca7daac86f2c019473e0bd2f54e
https://github.com/llvm/llvm-project/commit/09e94d09fd0f6ca7daac86f2c019473e0bd2f54e
Author: Chao Chen <116223022+chencha3 at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUTypes.td
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp
M mlir/test/Dialect/XeGPU/XeGPUOps.mlir
M mlir/test/Dialect/XeGPU/invalid.mlir
Log Message:
-----------
Revert "[MLIR][XeGPU] Updates XeGPU TensorDescAttr and Refine Gather/Scatter definition. " (#109666)
Reverts llvm/llvm-project#109144
Commit: bf791566e1585cac21bd89f7d1381272f2ad40c9
https://github.com/llvm/llvm-project/commit/bf791566e1585cac21bd89f7d1381272f2ad40c9
Author: Piotr Sobczak <piotr.sobczak at amd.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
Log Message:
-----------
[AMDGPU] Add test for readfirstlane with i1 type (#109657)
Add test for readfirstlane with i1 type to demonstrate the lowering
works.
Also simplify existing tests a bit - the declarations are not strictly
needed anymore.
Commit: b189b89bdeb74a933016bef6d85ae42b0c62b40e
https://github.com/llvm/llvm-project/commit/b189b89bdeb74a933016bef6d85ae42b0c62b40e
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/phi-with-multiple-unsimplifiable-values.ll
Log Message:
-----------
[InstCombine] Relax the conditons of fold of `ucmp`/`scmp` into phi by allowing the phi node to use the result of `ucmp`/`scmp` more than once (#109593)
This extends the optimisation implemented in #107769 by relaxing the
condtions to make it happen. Now, the value produced by `ucmp`/`scmp`
doesn't need to be one-use, but only one-user, meaning it can be present
in a single phi node more than once.
Commit: 04d8e364bbf758b2ecbc06b782f1b5dd91bd16e6
https://github.com/llvm/llvm-project/commit/04d8e364bbf758b2ecbc06b782f1b5dd91bd16e6
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
Log Message:
-----------
[IRBuilder] Deprecate CreateGlobalStringPtr() (NFC)
In favor of CreateGlobalString(), which has the same behavior.
The distinction used to be meaningful prior to the introduction
of opaque pointers.
Commit: 40d6497a97a61ef5ea38e615cc324104cb34072a
https://github.com/llvm/llvm-project/commit/40d6497a97a61ef5ea38e615cc324104cb34072a
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
A llvm/test/Transforms/AggressiveInstCombine/inline-strcmp-debugloc.ll
Log Message:
-----------
[DebugInfo] Transfer strcmp DILocation to generated inline code (#108531)
When AggressiveInstCombine inlines a strcmp call, we currently copy the
strcmp's DILocation only to the br instruction that jumps to the inline
code. While this is roughly analogous to the original call, it leaves
the generated code without any source location, which is precarious for
a memory operation. This patch copies the strcmp call's DILocation to
all the generated code.
An alternative solution would be to generate a new DILocation with a
line 0 location and an inlinedAt pointing to the original call location,
but this would still give limited attribution to the generated code
without traversing the DIE, whereas the submitted solution allows
attribution with just the line table; even though it would be
technically more accurate, pragmatically I believe that copying the
call's location will be more useful for users.
Commit: d4798498c4a30efb03eebb56415a69fa60107414
https://github.com/llvm/llvm-project/commit/d4798498c4a30efb03eebb56415a69fa60107414
Author: Volodymyr Vasylkun <vvmposeydon at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/compare-3way.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-select.ll
M llvm/test/Transforms/InstCombine/sink_to_unreachable.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
Log Message:
-----------
[InstCombine] Fold `(x == y) ? 0 : (x > y ? 1 : -1)` into `ucmp/scmp(x,y)` (#107314)
This also handles commuted cases of the same fold, with either the
condition or the true/false values of the inner select being swapped.
Commit: be0b1142df7733633354ef1f73d0379bcd2ccb54
https://github.com/llvm/llvm-project/commit/be0b1142df7733633354ef1f73d0379bcd2ccb54
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/test/Analysis/stack-addr-ps.cpp
Log Message:
-----------
[analyzer][StackAddrEscapeChecker] Fix assert failure for alloca regions (#109655)
Fixes #107852
Make it explicit that the checker skips `alloca` regions to avoid the
risk of producing false positives for code with advanced memory
management.
StackAddrEscapeChecker already used this strategy when it comes to
malloc'ed regions, so this change relaxes the assertion and explicitly
silents the issues related to memory regions generated with `alloca`.
Commit: 53abbced3032b555d43f5b91fafa741c8a11a050
https://github.com/llvm/llvm-project/commit/53abbced3032b555d43f5b91fafa741c8a11a050
Author: Paul T Robinson <paul.robinson at sony.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
A clang/test/CodeGenCXX/debug-info-line-if-2.cpp
Log Message:
-----------
[DebugInfo] Correct the line attribution for IF branches (#108300)
An 'if' statement introduces a scope, but in some cases the conditional
branch to the then/else blocks had a debug-info attribution that did not
include the scope. This led to some inefficiency in the DWARF line
table.
Commit: 606557ddd68bcb082fb82fd21b0afb260222ae14
https://github.com/llvm/llvm-project/commit/606557ddd68bcb082fb82fd21b0afb260222ae14
Author: Wael Yehia <wyehia at ca.ibm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M compiler-rt/test/profile/Posix/instrprof-dlopen-norpath.test
Log Message:
-----------
[PGO] use atomics for profile counters in instrprof-dlopen-norpath.test
When two threads dlopen a shared library, one instance of the library
is loaded. Hence, code inside the library needs to be thread safe,
so use atomic updates for profile counters.
Commit: 50a1ab12abbe948e6d3f8418f11bfa1951c8d19e
https://github.com/llvm/llvm-project/commit/50a1ab12abbe948e6d3f8418f11bfa1951c8d19e
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
Log Message:
-----------
[LAA] Don't assume libcalls with output/input pointers can be vectorized (#108980)
LoopAccessAnalysis currently does not check/track aliasing from the
output pointers, but assumes vectorizing library calls with a mapping is
safe.
This can result in incorrect codegen if something like the following is
vectorized:
```
for(int i=0; i<N; i++) {
// No aliasing between input and output pointers detected.
sincos(cos_out[0], sin_out+i, cos_out+i);
}
```
Where for VF >= 2 `cos_out[1]` to `cos_out[VF-1]` is the cosine of the
original value of `cos_out[0]` not the updated value.
Commit: d61b2590f8e360695a5298311855c8649337969f
https://github.com/llvm/llvm-project/commit/d61b2590f8e360695a5298311855c8649337969f
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/CMakeLists.txt
Log Message:
-----------
[Clang-BOLT] Drop CDSplit flag
Breaks AArch64 Clang-BOLT builds:
https://github.com/llvm/llvm-project/pull/109351#issuecomment-2368584365
Commit: cce1fa39eabfca4907ff8d616618683eec1a5486
https://github.com/llvm/llvm-project/commit/cce1fa39eabfca4907ff8d616618683eec1a5486
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
Log Message:
-----------
[RISCV] Add zvfbfmin arithmetic cost model test coverage. NFC
Commit: 2cd20c255684257b86940bdda6861897f0bf3c00
https://github.com/llvm/llvm-project/commit/2cd20c255684257b86940bdda6861897f0bf3c00
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
R llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning-execution-mode.s
R llvm/test/tools/llvm-exegesis/X86/latency/cpu-pinning.s
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.cpp
M llvm/tools/llvm-exegesis/lib/BenchmarkRunner.h
M llvm/tools/llvm-exegesis/llvm-exegesis.cpp
Log Message:
-----------
Revert "[llvm-exegesis] Add support for pinning benchmarking process to a CPU (#85168)"
This reverts commit 6fc2451167ec991361dd0568de9a9fa2926f8da8.
This broke some more buildbots.
Commit: ce9a2c652104197a051db3788f3ec503cab3a79b
https://github.com/llvm/llvm-project/commit/ce9a2c652104197a051db3788f3ec503cab3a79b
Author: MichelleCDjunaidi <michellechrisalyn at gmail.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
A clang-tools-extra/docs/clang-tidy/ExternalClang-TidyExamples.rst
M clang-tools-extra/docs/clang-tidy/index.rst
Log Message:
-----------
[clang-tidy][doc] Add external examples (#106675)
Clang has a page where they list out external examples:
https://clang.llvm.org/docs/ExternalClangExamples.html. This mimics this page by adding some useful links specific to clang-tidy.
Commit: caf0897c9c7f6f2a142af06bff8680a23d1d4bf5
https://github.com/llvm/llvm-project/commit/caf0897c9c7f6f2a142af06bff8680a23d1d4bf5
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
Log Message:
-----------
[SPIR-V] Fix deprecation warnings after #102608 (#109447)
Follow up to fix warnings in the SPIRV backend after 2f50b280dc8e
"[DebugInfo] Enable deprecation of iterator-insertion methods (#102608)"
Commit: 40d8888f13fb54b0fe840deef23054de6544c184
https://github.com/llvm/llvm-project/commit/40d8888f13fb54b0fe840deef23054de6544c184
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/Status.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Utility/Status.cpp
M lldb/unittests/Utility/StatusTest.cpp
Log Message:
-----------
[lldb] Change the implementation of Status to store an llvm::Error (NFC) (#106774)
(based on a conversation I had with @labath yesterday in
https://github.com/llvm/llvm-project/pull/106442)
Most APIs that currently vend a Status would be better served by
returning llvm::Expected<> instead. If possibles APIs should be
refactored to avoid Status. The only legitimate long-term uses of Status
are objects that need to store an error for a long time (which should be
questioned as a design decision, too).
This patch makes the transition to llvm::Error easier by making the
places that cannot switch to llvm::Error explicit: They are marked with
a call to Status::clone(). Every other API can and should be refactored
to use llvm::Expected. In the end Status should only be used in very few
places.
Whenever an unchecked Error is dropped by Status it logs this to the
verbose API channel.
Implementation notes:
This patch introduces two new kinds of error_category as well as new
llvm::Error types. Here is the mapping of lldb::ErrorType to
llvm::Errors:
```
(eErrorTypeInvalid)
eErrorTypeGeneric llvm::StringError
eErrorTypePOSIX llvm::ECError
eErrorTypeMachKernel MachKernelError
eErrorTypeExpression llvm::ErrorList<ExpressionError>
eErrorTypeWin32 Win32Error
```
Relanding with built-in cloning support for llvm::ECError, and support
for initializing a Windows error with a NO_ERROR error code.
Commit: 8a9f66ca3118245f1ece5ba7ae6312889222eff9
https://github.com/llvm/llvm-project/commit/8a9f66ca3118245f1ece5ba7ae6312889222eff9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
R llvm/test/MC/RISCV/machine-csr-names-invalid.s
Log Message:
-----------
[RISCV] Remove machine-csr-names-invalid.s. NFC (#109595)
This appears to be redundant with rv32-only-csr-names.s which tests the
same registers and many more.
Commit: 27b5dc422cd3dc15b3d4410ba910d4b12272384d
https://github.com/llvm/llvm-project/commit/27b5dc422cd3dc15b3d4410ba910d4b12272384d
Author: Sean Perry <perry at ca.ibm.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/test/CodeGen/Generic/allow-check.ll
M llvm/test/lit.cfg.py
Log Message:
-----------
Add target-byteorder for cases where endian in target triple is what matters (#107915)
I came across the subtly when setting up lit for z/OS and running it on
a Linux on Power machine. Linux on Power is little endian. This was
resulting in all of these tests being run even though the target triple
was z/OS which is big endian. The lit should really be checking if the
target is little endian not the host. The previous way didn't handle
cross compilation while running lit.
Commit: 8e8a0724c28642f49aeb313110522521d8359037
https://github.com/llvm/llvm-project/commit/8e8a0724c28642f49aeb313110522521d8359037
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
Log Message:
-----------
[llvm-debuginfod-find] Remove old parameter comment (#109637)
This patch removes a comment in llvm-debuginfod-find containing all the
cl::opt entries, which are redundant after the conversion to using
optTable. These seem to have been introduced in #108082 along with a
conversion to optTable.
Commit: 78ae2de4c692bea03d03e4c149b350543d220490
https://github.com/llvm/llvm-project/commit/78ae2de4c692bea03d03e4c149b350543d220490
Author: gonzalobg <65027571+gonzalobg at users.noreply.github.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
A llvm/test/CodeGen/NVPTX/fence-sm-90.ll
M llvm/test/CodeGen/NVPTX/fence.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
A llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store.ll
Log Message:
-----------
[NVPTX] Load/Store/Fence syncscope support (#106101)
Adds "initial" support for `syncscope` to the NVPTX backend
`load`/`store`/`fence` instructions.
Atomic Read-Modify-Write operations intentionally not supported as part
of this initial PR.
Commit: 93baa018e09bb3d4d5f4da0232321aff204caaeb
https://github.com/llvm/llvm-project/commit/93baa018e09bb3d4d5f4da0232321aff204caaeb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
Log Message:
-----------
[LegalizeVectorTypes] Preserve original MemoryOperand and MemVT when widening fixed vector load to vp_load. (#109473)
Previously we were building a new memoperand with the size of the widened VT. This was causing a failure in our downstream with non-power of 2 vectorization. Alias analysis allowed rescheduling a 3 element vector load past 2 out of 3 scalar stores that overwrite what it was supposed to read.
Alias analysis considers it undefined behavior to read more than the size of the underlying object. There is an exception if the underying objects is sufficiently aligned, but that doesn't apply in my failing case.
Commit: f7d088b6168608682975759bf27b7c2ad0ae7117
https://github.com/llvm/llvm-project/commit/f7d088b6168608682975759bf27b7c2ad0ae7117
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/test/Sema/riscv-asm.c
Log Message:
-----------
[RISCV] Implement validateGlobalRegisterVariable. (#109596)
Only allow GPR registers and verify the size is the same as XLen.
This fixes the crash seen in #109588 by making it a frontend error.
gcc does accept the code so we may need to consider if we can fix the
backend. Some other targets I tried appear to have similar issues so it
might not be straightforward to fix.
Commit: 19f04e908667aade0efe2de9ae705baaf68c0ce2
https://github.com/llvm/llvm-project/commit/19f04e908667aade0efe2de9ae705baaf68c0ce2
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
Log Message:
-----------
[AArch64] Use MCRegister in more places. NFC
Commit: a30d4b9a5df35deaff8dd4476318fe8371bbd6f9
https://github.com/llvm/llvm-project/commit/a30d4b9a5df35deaff8dd4476318fe8371bbd6f9
Author: Fangrui Song <i at maskray.me>
Date: 2024-09-23 (Mon, 23 Sep 2024)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Rewrite/RewriteInstance.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
R bolt/test/AArch64/Inputs/iplt.ld
R bolt/test/AArch64/ifunc.c
A bolt/test/AArch64/ifunc.test
A bolt/test/Inputs/ifunc.c
A bolt/test/Inputs/iplt.ld
A bolt/test/X86/ifunc.test
M bolt/unittests/Core/BinaryContext.cpp
A clang-tools-extra/docs/clang-tidy/ExternalClang-TidyExamples.rst
M clang-tools-extra/docs/clang-tidy/index.rst
M clang/CMakeLists.txt
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/MultiplexConsumer.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/Basic/Targets/RISCV.cpp
M clang/lib/Basic/Targets/RISCV.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/Frontend/MultiplexConsumer.cpp
M clang/lib/Frontend/Rewrite/RewriteObjC.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/IncrementalExecutor.cpp
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Interpreter/IncrementalParser.h
M clang/lib/Interpreter/Interpreter.cpp
A clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/AST/ByteCode/new-delete.cpp
A clang/test/AST/ByteCode/placement-new.cpp
M clang/test/Analysis/stack-addr-ps.cpp
A clang/test/CodeGenCXX/debug-info-line-if-2.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn.cl
M clang/test/Sema/riscv-asm.c
M clang/test/SemaCXX/attr-gsl-owner-pointer-std.cpp
M clang/test/SemaCXX/attr-musttail.cpp
M clang/tools/CMakeLists.txt
M clang/unittests/Interpreter/CodeCompletionTest.cpp
M clang/unittests/Interpreter/InterpreterExtensionsTest.cpp
M compiler-rt/lib/rtsan/rtsan_interceptors.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_posix.h
M compiler-rt/lib/tsan/rtl/tsan_interceptors_posix.cpp
M compiler-rt/test/asan/TestCases/Linux/preinstalled_signal.cpp
M compiler-rt/test/profile/Posix/instrprof-dlopen-norpath.test
M compiler-rt/test/sanitizer_common/TestCases/Posix/variadic-open.cpp
M flang/test/Driver/target-cpu-features.f90
M libc/include/llvm-libc-macros/math-function-macros.h
M libc/test/include/CMakeLists.txt
A libc/test/include/IsSubnormalTest.h
A libc/test/include/issubnormal_test.c
A libc/test/include/issubnormal_test.cpp
A libc/test/include/issubnormalf_test.cpp
A libc/test/include/issubnormall_test.cpp
M libcxxabi/src/demangle/ItaniumDemangle.h
M libcxxabi/test/test_demangle.pass.cpp
M lld/COFF/Driver.cpp
M lld/Common/DriverDispatcher.cpp
M lld/ELF/Arch/ARM.cpp
M lld/ELF/Driver.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/InputSection.cpp
M lldb/include/lldb/Utility/Status.h
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/Status.cpp
M lldb/unittests/Utility/StatusTest.cpp
M llvm/docs/ReleaseNotes.rst
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/Demangle/ItaniumDemangle.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/MemDerefPrinter.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/LLVMTargetMachine.cpp
M llvm/lib/CodeGen/MachineOperand.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/StackProtector.cpp
M llvm/lib/DWARFLinker/Parallel/DWARFLinkerTypeUnit.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/Object/COFFObjectFile.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64InstPrinter.cpp
M llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/Mips/Mips.h
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.h
M llvm/lib/Target/NVPTX/MCTargetDesc/NVPTXInstPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.h
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXReplaceImageHandles.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.cpp
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVRegularizer.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/GCOVProfiling.cpp
M llvm/lib/Transforms/Utils/LoopConstrainer.cpp
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUnrollRuntime.cpp
M llvm/lib/Transforms/Utils/LoopVersioning.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Analysis/CostModel/RISCV/arith-fp.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-intrinsics.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-select.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
M llvm/test/Analysis/ScalarEvolution/finite-trip-count.ll
M llvm/test/Analysis/ScalarEvolution/ne-overflow.ll
M llvm/test/Analysis/ScalarEvolution/predicated-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/predicated-symbolic-max-backedge-taken-count.ll
M llvm/test/Analysis/ScalarEvolution/trip-count-implied-addrec.ll
M llvm/test/Bindings/llvm-c/atomics.ll
M llvm/test/Bindings/llvm-c/debug_info_new_format.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-insert-vector-elt.mir
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/AArch64/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
A llvm/test/CodeGen/AMDGPU/shrink-v-cmp-wave32-dead-vcc-lo.mir
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/ARM/vbsl.ll
M llvm/test/CodeGen/Generic/allow-check.ll
M llvm/test/CodeGen/MIR/NVPTX/floating-point-immediate-operands.mir
M llvm/test/CodeGen/Mips/llvm-ir/ashr.ll
M llvm/test/CodeGen/Mips/llvm-ir/lshr.ll
M llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/shl.ll
M llvm/test/CodeGen/Mips/llvm-ir/srem.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-mult.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-sdiv.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-srem.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-udiv.ll
A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-urem.ll
M llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
M llvm/test/CodeGen/Mips/llvm-ir/urem.ll
A llvm/test/CodeGen/NVPTX/fence-sm-90.ll
M llvm/test/CodeGen/NVPTX/fence.ll
M llvm/test/CodeGen/NVPTX/load-store-sm-70.ll
A llvm/test/CodeGen/NVPTX/load-store-sm-90.ll
M llvm/test/CodeGen/NVPTX/load-store.ll
M llvm/test/CodeGen/PowerPC/ctrloop-sh.ll
M llvm/test/CodeGen/PowerPC/pr59074.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/PowerPC/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/RISCV/shifts.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/RISCV/wide-scalar-shift-legalization.ll
A llvm/test/CodeGen/X86/canonicalize-vars-f16-type.ll
A llvm/test/CodeGen/X86/canonicalize-vars.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/scheduler-backtracking.ll
M llvm/test/CodeGen/X86/shift-i128.ll
M llvm/test/CodeGen/X86/shift-i256.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-legalization.ll
M llvm/test/CodeGen/X86/widen-load-of-small-alloca-with-zero-upper-half.ll
M llvm/test/CodeGen/X86/widen-load-of-small-alloca.ll
M llvm/test/MC/Disassembler/X86/apx/kmov.txt
R llvm/test/MC/RISCV/machine-csr-names-invalid.s
M llvm/test/MC/RISCV/rv64-relax-all.s
M llvm/test/MC/X86/apx/kmov-att.s
M llvm/test/MC/X86/apx/kmov-intel.s
A llvm/test/Transforms/AggressiveInstCombine/inline-strcmp-debugloc.ll
M llvm/test/Transforms/InstCombine/compare-3way.ll
M llvm/test/Transforms/InstCombine/phi-with-multiple-unsimplifiable-values.ll
M llvm/test/Transforms/InstCombine/scmp.ll
M llvm/test/Transforms/InstCombine/select-select.ll
M llvm/test/Transforms/InstCombine/sink_to_unreachable.ll
M llvm/test/Transforms/InstCombine/ucmp.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
A llvm/test/Transforms/LoopVectorize/AArch64/scalable-fp-ext-trunc-illegal-type.ll
M llvm/test/Transforms/LoopVectorize/AArch64/veclib-function-calls.ll
M llvm/test/Transforms/LoopVectorize/AArch64/vector-call-linear-args.ll
M llvm/test/Transforms/LoopVectorize/load-deref-pred-align.ll
M llvm/test/Transforms/LoopVectorize/simple_early_exit.ll
M llvm/test/Transforms/SLPVectorizer/alternate-cmp-swapped-pred-parent.ll
M llvm/test/Transforms/SLPVectorizer/alternate-opcode-sindle-bv.ll
M llvm/test/Transforms/SLPVectorizer/arith-div-undef.ll
M llvm/test/Transforms/SLPVectorizer/bool-logical-op-reduction-with-poison.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-insert-mask-size.ll
M llvm/test/Transforms/SLPVectorizer/buildvector-nodes-dependency.ll
M llvm/test/Transforms/SLPVectorizer/call-arg-reduced-by-minbitwidth.ll
M llvm/test/Transforms/SLPVectorizer/catchswitch.ll
M llvm/test/Transforms/SLPVectorizer/crash_exceed_scheduling.ll
M llvm/test/Transforms/SLPVectorizer/diamond_broadcast.ll
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
M llvm/test/Transforms/SimplifyCFG/X86/switch_to_lookup_table.ll
M llvm/test/Transforms/SimplifyCFG/speculate-derefable-load.ll
M llvm/test/Transforms/VectorCombine/RISCV/shuffle-of-intrinsics.ll
M llvm/test/lit.cfg.py
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/if_target.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/if_target.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/if_target.test
M llvm/test/tools/llvm-readobj/COFF/arm64ec-chpe.yaml
M llvm/tools/llvm-c-test/main.c
M llvm/tools/llvm-debuginfod-find/llvm-debuginfod-find.cpp
M llvm/tools/llvm-reduce/TestRunner.cpp
M llvm/tools/llvm-reduce/TestRunner.h
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/utils/gn/secondary/clang/lib/Interpreter/BUILD.gn
M llvm/utils/update_test_checks.py
M offload/include/OpenMP/OMPT/Callback.h
M offload/include/OpenMP/OMPT/Interface.h
M offload/plugins-nextgen/common/CMakeLists.txt
R offload/plugins-nextgen/common/OMPT/OmptCallback.cpp
M offload/src/OpenMP/OMPT/Callback.cpp
M offload/src/exports
M polly/lib/CodeGen/RuntimeDebugBuilder.cpp
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
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