[all-commits] [llvm/llvm-project] 677177: [Mips] Fix mfhi/mflo hazard miscompilation about d...

[yingopq via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 677177bb60dbe0d551251058c28466c5d74cebac
      https://github.com/llvm/llvm-project/commit/677177bb60dbe0d551251058c28466c5d74cebac
  Author: yingopq <115543042+yingopq at users.noreply.github.com>
  Date:   2024-09-23 (Mon, 23 Sep 2024)

  Changed paths:
    M llvm/lib/Target/Mips/Mips.h
    M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
    M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
    M llvm/lib/Target/Mips/MipsInstrInfo.cpp
    M llvm/lib/Target/Mips/MipsInstrInfo.h
    M llvm/test/CodeGen/Mips/llvm-ir/sdiv.ll
    M llvm/test/CodeGen/Mips/llvm-ir/srem.ll
    A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-mult.ll
    A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-sdiv.ll
    A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-srem.ll
    A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-udiv.ll
    A llvm/test/CodeGen/Mips/llvm-ir/two-consecutive-urem.ll
    M llvm/test/CodeGen/Mips/llvm-ir/udiv.ll
    M llvm/test/CodeGen/Mips/llvm-ir/urem.ll

  Log Message:
  -----------
  [Mips] Fix mfhi/mflo hazard miscompilation about div and mult (#91449)

Fix issue1: In mips1-4, require a minimum of 2 instructions between a
mflo/mfhi and the next mul/dmult/div/ddiv/divu/ddivu instruction.
Fix issue2: In mips1-4, should not put mflo into the delay slot for the
return.

Fix https://github.com/llvm/llvm-project/issues/81291



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