[all-commits] [llvm/llvm-project] 4c5011: [AArch64] Add patterns for 64bit vector addp

[David Green via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 4c50112ba1fb6b3847decebd6f1e374c61950be9
      https://github.com/llvm/llvm-project/commit/4c50112ba1fb6b3847decebd6f1e374c61950be9
  Author: David Green <david.green at arm.com>
  Date:   2024-09-19 (Thu, 19 Sep 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64InstrInfo.td
    M llvm/test/CodeGen/AArch64/addp-shuffle.ll

  Log Message:
  -----------
  [AArch64] Add patterns for 64bit vector addp

This extends the existing patterns for addp to 64bit outputs with a single
input. Whilst the general pattern is similar to the 128bit patterns
(add(uzp1(extract_lo, extract_hi), uzp2(extract_lo, extract_hi))), at the late
stage other optimzations have happened to turn the first uzp1 into trunc and
the second into extract(uzp2) with undef.

Fixes #109108



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