[all-commits] [llvm/llvm-project] d21a43: [LegalizeVectorOps][RISCV] Don't scalarize FNEG in...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d21a43579e36af4aa90bf541aa8bab33e7500297
      https://github.com/llvm/llvm-project/commit/d21a43579e36af4aa90bf541aa8bab33e7500297
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-18 (Wed, 18 Sep 2024)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
    M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll

  Log Message:
  -----------
  [LegalizeVectorOps][RISCV] Don't scalarize FNEG in ExpandFNEG if FSUB is marked Promote.

We have a special check that tries to determine if vector FP
operations are supported for the type to determine whether to
scalarize or not. If FP arithmetic would be promoted, don't unroll.

This improves Zvfhmin codegen on RISC-V.



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