[all-commits] [llvm/llvm-project] 95a0b4: Revert "[clang][ExprConst] Allow comparisons with ...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Tue Sep 17 10:52:46 PDT 2024
Branch: refs/heads/users/vitalybuka/spr/main.tsan-switch-to-dlsymallocator
Home: https://github.com/llvm/llvm-project
Commit: 95a0b4f729310d95d89f01f4d92ab7d2bf09941c
https://github.com/llvm/llvm-project/commit/95a0b4f729310d95d89f01f4d92ab7d2bf09941c
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/cxx20.cpp
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
Revert "[clang][ExprConst] Allow comparisons with string literals (#106733)"
This reverts commit 5d1d2f08c4a92580e7f6b3b6b77b2b6f6184e126.
See the discussion in https://github.com/llvm/llvm-project/pull/106733
and https://github.com/llvm/llvm-project/issues/58754
Commit: 2f7ffbaad3e7bd14b7a82d4887ef1640272ba1be
https://github.com/llvm/llvm-project/commit/2f7ffbaad3e7bd14b7a82d4887ef1640272ba1be
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-16 (Mon, 16 Sep 2024)
Changed paths:
M llvm/lib/Support/FormatVariadic.cpp
M llvm/unittests/Support/FormatVariadicTest.cpp
Log Message:
-----------
[Support] Fix bugs in formatv automatic index assignment (#108384)
Fix bugs found when actually trying to use formatv() automatic index
assignment in IntrinsicEmitter.cpp:
- Assign automatic index only for `ReplacementType::Format`.
- Make the check for all replacement indices being either automatic orexplicit more accurate.
The existing check fails for formatv("{}{0}{}", 0, 1) (added as a unit test). Explicitly track if we
have seen any explicit and any automatic index instead.
Commit: 884ff9e3f9741ac282b6cf8087b8d3f62b8e138a
https://github.com/llvm/llvm-project/commit/884ff9e3f9741ac282b6cf8087b8d3f62b8e138a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-16 (Mon, 16 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll
Log Message:
-----------
[LegalizeVectorOps] Make the AArch64 hack in ExpandFNEG more specific.
Only scalarize single element vectors when vector FSUB is not
supported and scalar FNEG is supported.
Commit: 6af2f225a0f820d331f251af69c2dad0c845964e
https://github.com/llvm/llvm-project/commit/6af2f225a0f820d331f251af69c2dad0c845964e
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vfwadd-vp.ll
Log Message:
-----------
[RISCV] Restrict combineOp_VLToVWOp_VL w/ bf16 to vfwmadd_vl with zvfbfwma (#108798)
We currently make sure to check that if folding an op to an f16 widening
op that we have zvfh. We need to do the same for bf16 vectors, but with
the further restriction that we can only combine vfmadd_vl to vfwmadd_vl
(to get vfwmaccbf16.v{v,f}).
The added test case currently crashes because we try to fold an add to a
bf16 widening add, which doesn't exist in zvfbfmin or zvfbfwma
This moves the checks into the extension support checks to keep it one
place.
Commit: 41f1b467a29d2ca4e35df37c3aa79a0a8c04bc4f
https://github.com/llvm/llvm-project/commit/41f1b467a29d2ca4e35df37c3aa79a0a8c04bc4f
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
A llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
A llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
Log Message:
-----------
[RISCV] Account for zvfhmin and zvfbfmin promotion in register usage (#108370)
A half with only zvfhmin or bfloat will end up getting promoted to a f32
for most instructions.
Unless the loop consists only of memory ops and permutation instructions
which don't need promoted (is this common?), we'll end up using double
the LMUL than what's currently being returned by getRegUsageForType.
Since this is used by the loop vectorizer, it seems better to be
conservative and assume that any usage of a zvfhmin half/bfloat will end
up being widened to a f32
Commit: 30d7dcc1db476b828d3b0a7b5c9bcfbe5bd5f216
https://github.com/llvm/llvm-project/commit/30d7dcc1db476b828d3b0a7b5c9bcfbe5bd5f216
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
M llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
Log Message:
-----------
[RISCV] Add asserts requirement to loop vectorizer tests
Hopefully this fixes a buildbot failure on fuchsia where opt doesn't
have -debug-only
Commit: 827dd1ef2f104a98b9912694e5938d6d12808200
https://github.com/llvm/llvm-project/commit/827dd1ef2f104a98b9912694e5938d6d12808200
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M bolt/test/lit.local.cfg
Log Message:
-----------
[Bolt] Explicitly request PIE in tests (#108818)
When clang is built with `-DCLANG_DEFAULT_PIE_ON_LINUX=OFF`, a number of
bolt tests fail:
BOLT :: AArch64/build_id.c
BOLT :: AArch64/plt-call.test
BOLT :: X86/dwarf5-dwarf4-types-backward-forward-cross-reference.test
BOLT :: X86/dwarf5-locexpr-referrence.test
BOLT :: X86/internal-call-instrument.s
BOLT :: X86/linux-static-keys.s
BOLT :: X86/plt-call.test
Avoid this by explicitly adding `-fPIE` and `-pie` to the default flags
in tests, so we don't depend on the clang-side default.
Commit: 539f9161a28e1c90743586a2d7664160ce3815c8
https://github.com/llvm/llvm-project/commit/539f9161a28e1c90743586a2d7664160ce3815c8
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
A llvm/test/Instrumentation/sanitizers-naked.ll
Log Message:
-----------
[Instrumentation] Precommit tests for PR108552 (NFC)
Commit: 8d8bedef0d0a6a65927d5684ff332453fb6507ee
https://github.com/llvm/llvm-project/commit/8d8bedef0d0a6a65927d5684ff332453fb6507ee
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
Log Message:
-----------
[Bufferization] Avoid repeated hash lookups (NFC) (#108925)
Commit: 65a5b18aa04087ffba11760bd4654aaae211aa38
https://github.com/llvm/llvm-project/commit/65a5b18aa04087ffba11760bd4654aaae211aa38
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
Log Message:
-----------
[Shape] Avoid repeated hash lookups (NFC) (#108926)
Commit: 9825d1ffcdee409864dc499394b1c2d2247822f0
https://github.com/llvm/llvm-project/commit/9825d1ffcdee409864dc499394b1c2d2247822f0
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M mlir/lib/Dialect/PDL/IR/PDL.cpp
Log Message:
-----------
[PDL] Avoid repeated hash lookups (NFC) (#108927)
Commit: 71a39eca1e1b8eb9fb3da8ff7c86f88a73b1ec47
https://github.com/llvm/llvm-project/commit/71a39eca1e1b8eb9fb3da8ff7c86f88a73b1ec47
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
Log Message:
-----------
[MLProgram] Avoid repeated hash lookups (NFC) (#108928)
Commit: 942e872d5b1a06bcb2388593dc14234f02961618
https://github.com/llvm/llvm-project/commit/942e872d5b1a06bcb2388593dc14234f02961618
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/test/Instrumentation/sanitizers-naked.ll
Log Message:
-----------
[Instrumentation] Do not request sanitizers for naked functions
Sanitizers instrumentation may be incompatible with naked functions,
which lack of standard prologue/epilogue.
Commit: acfa294b5e2b10dfe9b9fc075259d849a3897493
https://github.com/llvm/llvm-project/commit/acfa294b5e2b10dfe9b9fc075259d849a3897493
Author: Thorsten Schütt <schuett at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/CodeGen/GlobalISel/CombinerHelperCompares.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/combine-cannonicalize-fcmp.mir
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
Log Message:
-----------
[GlobalIsel] Canonicalize G_FCMP (#108891)
As a side-effect, we start constant folding fcmps.
Commit: c970e96eaedf76f349fcb95309a85fec29844c0e
https://github.com/llvm/llvm-project/commit/c970e96eaedf76f349fcb95309a85fec29844c0e
Author: Guillaume Chatelet <gchatelet at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
Log Message:
-----------
[libc][bazel] Enable software prefetching for memset (#108860)
This will affect only Bazel configuration for now.
Commit: c91f2a259f378a9a4817c675b9a01557fcf7cae8
https://github.com/llvm/llvm-project/commit/c91f2a259f378a9a4817c675b9a01557fcf7cae8
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/lib/Target/X86/X86ScheduleZnver4.td
M llvm/test/CodeGen/X86/apx/domain-reassignment.mir
M llvm/test/CodeGen/X86/domain-reassignment.mir
M llvm/test/CodeGen/X86/masked_compressstore_isel.ll
M llvm/test/CodeGen/X86/masked_expandload_isel.ll
Log Message:
-----------
[X86] Consistently use 'k' for predicate mask registers in instruction names (#108780)
We use 'k' for move instructions and to indicate masked variants of evex instructions, but otherwise we're very inconsistent when we use 'k' vs 'r'.
Commit: c48a1ebec150e09ccb1fa13b26d284b8324d365d
https://github.com/llvm/llvm-project/commit/c48a1ebec150e09ccb1fa13b26d284b8324d365d
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
Log Message:
-----------
[LV] Remove force-vector-width/force-vector-interleave from X86 test.
Update target-specific test to not force VF/UF, but instead use the
cost-model. There are similar tests arleady outside X86 and those force
VF & UF.
With this change, the target specific test checks the cost model.
Changes in picked VF/UF are limited to test_pr62954_scalar_epilogue_required,
and should preserve the original spirit of the test.
Commit: f25b09199ab8026bf50364cfc8d49a860fb9a760
https://github.com/llvm/llvm-project/commit/f25b09199ab8026bf50364cfc8d49a860fb9a760
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
A llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll
R llvm/test/Analysis/ValueTracking/shift-recurrence-knownbits.ll
Log Message:
-----------
ValueTracking/test: increase recurrence coverage (#108836)
The shift-recurrence-knownbits.ll test file only covers shift
instructions while testing recurrence patterns with knownbits. Add tests
for add, sub, mul, and, and or as well, and rename the file
recurrence-knownbits.ll.
Commit: 79d380f2ca288b3d2f9aafb1149f4239e8a8308e
https://github.com/llvm/llvm-project/commit/79d380f2ca288b3d2f9aafb1149f4239e8a8308e
Author: SpencerAbson <Spencer.Abson at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/aarch64-sve2-faminmax.ll
Log Message:
-----------
[AArch64][SVE2] Add codegen patterns for SVE2 FAMINMAX (#107284)
Tablegen patterns were previously added to lower the following sequences
from generic IR to NEON FAMIN/FAMAX instructions
- `fminimum((abs(a), abs(b)) -> famin(a, b)`
- `fmaximum((abs(a)), abs(b)) -> famax(a, b)`
- https://github.com/llvm/llvm-project/pull/103027
- `fminnum[nnan](abs(a), abs(b)) -> famin(a, b)`
- `fmaxnum[nnan](abs(a), abs(b)) -> famax(a, b)`
- https://github.com/llvm/llvm-project/pull/104766
The same idea has been applied for the scalable vector variants of
[FAMIN](https://developer.arm.com/documentation/ddi0602/2024-06/SVE-Instructions/FAMIN--Floating-point-absolute-minimum--predicated--)/[FAMAX](https://developer.arm.com/documentation/ddi0602/2024-06/SVE-Instructions/FAMAX--Floating-point-absolute-maximum--predicated--).
('nnan' documenatation:
https://llvm.org/docs/LangRef.html#fast-math-flags).
- Changes to LLVM
- lib/target/AArch64/AArch64SVEInstrInfo.td
- Add 'AArch64fminnm_p_nnan' and 'AArch64fmaxnm_p_nnan' patfrags
(patterns predicated on the 'nnan' flag).
- Add 'AArch64famax_p' and 'AArch64famin_p'
- test/CodeGen/AArch64/aarch64-sve2-faminmax.ll
- Add tests to verify the new patterns, including both positive and
negative tests for 'nnan' predicated behavior.
Commit: 3c5c61a4149181381f775383bc06e48457b76d7b
https://github.com/llvm/llvm-project/commit/3c5c61a4149181381f775383bc06e48457b76d7b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
Log Message:
-----------
[LV] Add first order rec test where hoisting can improve over sinking.
Commit: 4de7026ce36564ef2f86ddcd7f183d837ad0901d
https://github.com/llvm/llvm-project/commit/4de7026ce36564ef2f86ddcd7f183d837ad0901d
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel] Split linux time targets to avoid dependency cycles
clock_gettime is much heavier than the others as it depends on vdso.
Commit: 3e32e455913f0fe56f53f2f5711ea0130473d99a
https://github.com/llvm/llvm-project/commit/3e32e455913f0fe56f53f2f5711ea0130473d99a
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
Log Message:
-----------
[NVPTX] Verify ptx in the right version
Commit: 6357781e3f9fbc5a14a794b8769b451c863c65c7
https://github.com/llvm/llvm-project/commit/6357781e3f9fbc5a14a794b8769b451c863c65c7
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/ForwardingReferenceOverloadCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/forwarding-reference-overload.cpp
Log Message:
-----------
[clang-tidy] fix nullptr dereference in bugprone-forwarding-reference (#106856)
Previously, when checking if a `TemplateSpecializationType` is either
`enable_if` or `enable_if_t`, the AST matcher would call
`getTemplateName`, `getASTemplateDecl` and `getTemplatedDecl` in
succession to check the `NamedDecl` returned from `getTemplatedDecl` is
an `std::enable_if[_t]`. In the linked issue, the pointer returned by
`getTemplatedDecl` is a `nullptr` that is unconditionally accessed,
resulting in a crash. Instead, the checking is done on the
`TemplateDecl`
returned by `getASTemplateDecl`.
Fixes #106333
Commit: 50320ec967a2c6546e53998225dddb76c4016dc5
https://github.com/llvm/llvm-project/commit/50320ec967a2c6546e53998225dddb76c4016dc5
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/misc/definitions-in-headers.hpp
Log Message:
-----------
[NFC][clang-tidy] reword diagnostic note in definitions-in-headers (#106862)
`make as inline` made little sense here, so I changed the `make` to
`mark`
and added `the definition` as well.
Commit: 605a9adb4340b347f480a95a6eef3c9045e8416f
https://github.com/llvm/llvm-project/commit/605a9adb4340b347f480a95a6eef3c9045e8416f
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/MinMaxUseInitializerListCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/min-max-use-initializer-list.cpp
Log Message:
-----------
[clang-tidy] fix false positive in modernize-min-max-use-initializer-list (#107649)
Previously, whenever a replacement was generated by the analysis, a
diagnostic was generated. This became an issue when a call to
`std::min` or `std::max` consisted only of an initializer list with at
least one argument to the list requiring a type cast.
In this case, a single replacement that added a `static_cast` was
created,
that resulted in a diagnostic being issued but with no nested call
to `std::min` or `std::max`.
Instead, explicitly track if a nested call was detected and only emit a
diagnostic if this is the case.
Fixes #107594
Commit: caaac84ab2ef3f56e5204c9fae5cddf7b6e9a1c0
https://github.com/llvm/llvm-project/commit/caaac84ab2ef3f56e5204c9fae5cddf7b6e9a1c0
Author: Julian Schmidt <git.julian.schmidt at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.c
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.cpp
Log Message:
-----------
[clang-tidy] only diagnose definitions in readability-enum-initial-value (#107652)
With the `isDefinition` matcher, the analysis and diagnostics will be
constrained to definitions only. Previously forward declarations were
diagnosed as well.
Fixes #107590
Commit: 24ccdc5f291048b70e424bb4a63cadce6d891f11
https://github.com/llvm/llvm-project/commit/24ccdc5f291048b70e424bb4a63cadce6d891f11
Author: Amr Hesham <amr96 at programmer.net>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/tools/llvm-as/llvm-as.cpp
Log Message:
-----------
[llvm][llvm-as] Fix file input extension description (#108295)
Input file extension description should mention that it should be `.ll`
not `.llvm`
Commit: 50d55dc175fb4766ca15d5095412c92284df196c
https://github.com/llvm/llvm-project/commit/50d55dc175fb4766ca15d5095412c92284df196c
Author: Amr Hesham <amr96 at programmer.net>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/tools/llvm-cat/llvm-cat.cpp
Log Message:
-----------
[llvm][llvm-cat] Fix typo in the Input file name option (#108294)
Current usage printed by llvm-cat
`USAGE: llvm-cat [options] <input files>`
Should be changed to
`USAGE: llvm-cat [options] <input files>`
Commit: 88a9bcaf7074d21aa818cfa3952300dc9547be77
https://github.com/llvm/llvm-project/commit/88a9bcaf7074d21aa818cfa3952300dc9547be77
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang][NFC] Update `cxx_dr_status.html`
Commit: 1e64864c6fdcbd9cb78b69b1a3a3f3da84ec2e7a
https://github.com/llvm/llvm-project/commit/1e64864c6fdcbd9cb78b69b1a3a3f3da84ec2e7a
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/StackArrays.cpp
Log Message:
-----------
[flang][StackArrays] run in parallel on different functions (#108842)
Since #108562, StackArrays no longer has to create function declarations
at the module level to use stacksave/stackrestore LLVM intrinsics. This
will allow it to run in parallel on multiple functions at the same time.
Commit: 270ee6549c9368b2ff86ef9794a7fd5e5496ef00
https://github.com/llvm/llvm-project/commit/270ee6549c9368b2ff86ef9794a7fd5e5496ef00
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[Analysis][NFC] Clean-up in ScalarEvolution when copying predicates (#108851)
There are a few places in ScalarEvolution.cpp where we copy predicates
from one list to another and they have a similar pattern:
for (const auto *P : ENT.Predicates)
Predicates->push_back(P);
We can avoid the loop by writing them like this:
Predicates->append(ENT.Predicates.begin(), ENT.Predicates.end());
which may end up being more efficient since we only have to try
reserving more space once.
Commit: b39a100ff4ec16f1f9cafcc48ea7fed920726650
https://github.com/llvm/llvm-project/commit/b39a100ff4ec16f1f9cafcc48ea7fed920726650
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/memory/main.cpp
Log Message:
-----------
[lldb][lldb-dap] Remove unused includes in memory test
Added in 3acb1eac5eb6ef4e60dd64b7845615e076cc6a3e
Commit: 64cfce95d38d6884d501fd1ece959e7809a94025
https://github.com/llvm/llvm-project/commit/64cfce95d38d6884d501fd1ece959e7809a94025
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M mlir/docs/Dialects/OpenMPDialect/_index.md
Log Message:
-----------
[MLIR][OpenMP][Docs] Document operand structures (NFC) (#108824)
This patch updates the OpenMP dialect top-level documentation to
describe the operand structures, when they can be used and how they are
automatically generated.
Commit: 83220e9c2b370a985620fe90fa9acc9a473ba3fb
https://github.com/llvm/llvm-project/commit/83220e9c2b370a985620fe90fa9acc9a473ba3fb
Author: Daniel Bertalan <dani at danielbertalan.dev>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/lld/test/BUILD.gn
Log Message:
-----------
[gn build] Add llvm-cgdata dependency to check-lld
This ports f4763b3d2.
Commit: 731a68383f0e0a38e727b839f92a225c5e809b45
https://github.com/llvm/llvm-project/commit/731a68383f0e0a38e727b839f92a225c5e809b45
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
Log Message:
-----------
[AMDGPU] Refine operand iterators in the SIInsertWaitcnts. NFCI. (#108884)
Commit: bc8a5d104c69cee9cb9a870785da1eac62b58e32
https://github.com/llvm/llvm-project/commit/bc8a5d104c69cee9cb9a870785da1eac62b58e32
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
A llvm/test/Transforms/SimplifyCFG/patchpoint-invalid-sink.ll
M llvm/test/Verifier/intrinsic-immarg.ll
Log Message:
-----------
[Patchpoint] Add immarg attributes to patchpoint arguments (#97276)
Commit: 1fc288bf481726393c73133eef9aa73c0f78312e
https://github.com/llvm/llvm-project/commit/1fc288bf481726393c73133eef9aa73c0f78312e
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/test/Transforms/debug-assumed-size-array.fir
Log Message:
-----------
[flang][debug] Handle lower bound in assumed size arrays. (#108523)
Fixes #108411
Commit: 1603f99a37c5b179a21dbb8000c39a471a950927
https://github.com/llvm/llvm-project/commit/1603f99a37c5b179a21dbb8000c39a471a950927
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M libcxx/include/__algorithm/mismatch.h
M libcxx/include/__algorithm/simd_utils.h
Log Message:
-----------
[libc++] Explicitly convert to masks in SIMD code (#107983)
This makes it clearer when we use masks and avoids MSan complaining.
Commit: b1d7694c128fd200a23f4494530aa3ae50fa76ce
https://github.com/llvm/llvm-project/commit/b1d7694c128fd200a23f4494530aa3ae50fa76ce
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/init-aarch64.c
Log Message:
-----------
[AArch64] Add missing ACLE predefined macros and update __ARM_ACLE. (#108857)
Adds __ARM_ACLE_VERSION and __FUNCTION_MULTI_VERSIONING_SUPPORT_LEVEL
as defined here https://github.com/ARM-software/acle/pull/301 and
here https://github.com/ARM-software/acle/pull/302.
Also bumps __ARM_ACLE to 202420.
Commit: b6f72fc1e202c749333bd5b8ecb879d661af16b6
https://github.com/llvm/llvm-project/commit/b6f72fc1e202c749333bd5b8ecb879d661af16b6
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/test/Transforms/debug-fn-info.fir
Log Message:
-----------
[flang][debug] Generate correct subroutine type. (#108605)
We pass a list of types when creating a subroutine type. The first one
is supposed to be return type and the rest are the argument types. A
subroutine does not have a return type so an argument type could be
confused as a return type. To fix this, if there is no return type, we
generate a null type as a place holder.
Fixes #108564.
Commit: 20c5432d0fb4ac852482141d89287e3fcc2d1278
https://github.com/llvm/llvm-project/commit/20c5432d0fb4ac852482141d89287e3fcc2d1278
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/private-assoc.f90
Log Message:
-----------
[flang][Semantics][OpenMP] Don't privatise associate names (#108856)
The associate name preserves the association with the selector
established in the associate statement. Therefore it is incorrect to
change the data-sharing attribute of the name.
Closes #58041
Commit: 72901fe19eb1e55d0ee1c380ab7a9f57d2f187c5
https://github.com/llvm/llvm-project/commit/72901fe19eb1e55d0ee1c380ab7a9f57d2f187c5
Author: Csanád Hajdú <csanad.hajdu at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll
M llvm/test/CodeGen/AArch64/arm64_32.ll
M llvm/test/CodeGen/AArch64/bitfield-extract.ll
M llvm/test/CodeGen/AArch64/fast-isel-int-ext3.ll
M llvm/test/CodeGen/AArch64/fast-isel-shift.ll
M llvm/test/CodeGen/AArch64/machine_cse_impdef_killflags.ll
M llvm/test/CodeGen/AArch64/trunc-to-tbl.ll
M llvm/test/CodeGen/AArch64/xbfiz.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
Log Message:
-----------
[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)
Using the LSR or LSL aliases of UBFM can be faster on some CPUs, so it
is worth changing 64 bit UBFM instructions, that are equivalent to 32
bit LSR/LSL operations, to 32 bit variants.
This change folds the following patterns:
* If `Imms == 31` and `Immr <= Imms`:
`UBFMXri %0, Immr, Imms` -> `UBFMWri %0.sub_32, Immr, Imms`
* If `Immr == Imms + 33`:
`UBFMXri %0, Immr, Imms` -> `UBFMWri %0.sub_32, Immr - 32, Imms`
Commit: 8411214c56eb3f9fb77fe3a9f156d4e6ef6cec06
https://github.com/llvm/llvm-project/commit/8411214c56eb3f9fb77fe3a9f156d4e6ef6cec06
Author: David Green <david.green at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/vecreduce-bitext.ll
Log Message:
-----------
[AArch64] Tests for vecreduce.or(sext(x)), with or/and/xor and sext/zext. NFC
Commit: 742e04de96d4094e7070beb9afab10279c8b179e
https://github.com/llvm/llvm-project/commit/742e04de96d4094e7070beb9afab10279c8b179e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
Log Message:
-----------
[X86] combineConcatVectorOps - handle *_EXTEND nodes
Commit: b222ec18653c0324a330b8ef5b783fad1f9d7637
https://github.com/llvm/llvm-project/commit/b222ec18653c0324a330b8ef5b783fad1f9d7637
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
Log Message:
-----------
[X86] vector-reduce-add-mask.ll - regenerate vpmulhuw asm comments. NFC
Commit: ce73407015f38e681159165a4c6267b2379acea7
https://github.com/llvm/llvm-project/commit/ce73407015f38e681159165a4c6267b2379acea7
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
Log Message:
-----------
Fix MachineInstr::uses() doc. NFC. (#108950)
Uses was documented as register uses, which is not true.
Commit: b1339abb713063363e7804124b8fb3d84143a003
https://github.com/llvm/llvm-project/commit/b1339abb713063363e7804124b8fb3d84143a003
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/assume-align.ll
Log Message:
-----------
[InstCombine] Add tests for folding align assumes into load metadata.
Commit: de1f5b96adcea52bf7c9670c46123fe1197050d2
https://github.com/llvm/llvm-project/commit/de1f5b96adcea52bf7c9670c46123fe1197050d2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
Log Message:
-----------
[SLP]Vectorize gathered loads
Final gather/buildvector nodes may have scalar loads, which are not
vectorized (since they are part of the gather nodes) but may form full
vector loads, being combined. This patch walks over all gather nodes,
"gathering" and sorting gathered scalar loads and then tries to build
vector loads, which later are reshuffled between the gather nodes.
It allows later to add support for segmented loads (kind of AOS to SOA
load kind for RISC-V RVV) and may help with the removal of the alternat
e opcodes support.
Currently, alternate nodes may depend on each other because of the
consecutive loads between their operands. Because of that we cannot
simply remove alternate vectorization. But this approach may help to
remove most of the stuff for it, since we'll be able to vectorize loads
in between lanes.
Metric: size..text, AVX512
Program size..text
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 238381.00 250669.00 5.2%
test-suite :: SingleSource/UnitTests/Vectorizer/VPlanNativePath/outer-loop-vect.test 25753.00 26329.00 2.2%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-psadbw.test 3028.00 3092.00 2.1%
test-suite :: MultiSource/Benchmarks/Rodinia/hotspot/hotspot.test 4243.00 4275.00 0.8%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 649765.00 653877.00 0.6%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 649765.00 653877.00 0.6%
test-suite :: SingleSource/Benchmarks/BenchmarkGame/n-body.test 4199.00 4222.00 0.5%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-mask_set_bw.test 12933.00 12997.00 0.5%
test-suite :: SingleSource/Benchmarks/Misc/flops.test 8282.00 8314.00 0.4%
test-suite :: SingleSource/UnitTests/Vector/AVX512BWVL/Vector-AVX512BWVL-unpack_msasm.test 10065.00 10097.00 0.3%
test-suite :: SingleSource/Benchmarks/Misc-C++/Large/ray.test 5160.00 5176.00 0.3%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 12472220.00 12509612.00 0.3%
test-suite :: MultiSource/Benchmarks/Prolangs-C++/city/city.test 6908.00 6924.00 0.2%
test-suite :: MultiSource/Benchmarks/MiBench/consumer-lame/consumer-lame.test 202830.00 203278.00 0.2%
test-suite :: SingleSource/Benchmarks/CoyoteBench/fftbench.test 9133.00 9149.00 0.2%
test-suite :: MultiSource/Benchmarks/Olden/power/power.test 6792.00 6803.00 0.2%
test-suite :: External/SPEC/CFP2017rate/538.imagick_r/538.imagick_r.test 1395585.00 1397473.00 0.1%
test-suite :: External/SPEC/CFP2017speed/638.imagick_s/638.imagick_s.test 1395585.00 1397473.00 0.1%
test-suite :: External/SPEC/CINT2017speed/631.deepsjeng_s/631.deepsjeng_s.test 97662.00 97758.00 0.1%
test-suite :: External/SPEC/CFP2006/447.dealII/447.dealII.test 595179.00 595739.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniAMR/miniAMR.test 70603.00 70667.00 0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/unix-smail/unix-smail.test 19877.00 19893.00 0.1%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/PENNANT/PENNANT.test 90231.00 90279.00 0.1%
test-suite :: External/SPEC/CINT2006/473.astar/473.astar.test 33738.00 33754.00 0.0%
test-suite :: External/SPEC/CFP2017speed/619.lbm_s/619.lbm_s.test 13262.00 13268.00 0.0%
test-suite :: External/SPEC/CFP2006/453.povray/453.povray.test 1139964.00 1140460.00 0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 849507.00 849875.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 1158379.00 1158859.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/CoMD/CoMD.test 38724.00 38740.00 0.0%
test-suite :: External/SPEC/CFP2006/470.lbm/470.lbm.test 15180.00 15186.00 0.0%
test-suite :: External/SPEC/CFP2017rate/519.lbm_r/519.lbm_r.test 15484.00 15490.00 0.0%
test-suite :: External/SPEC/CINT2006/456.hmmer/456.hmmer.test 167391.00 167455.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/ControlFlow-dbl/ControlFlow-dbl.test 137448.00 137496.00 0.0%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 2030254.00 2030766.00 0.0%
test-suite :: MicroBenchmarks/LCALS/SubsetALambdaLoops/lcalsALambda.test 302870.00 302934.00 0.0%
test-suite :: MicroBenchmarks/LCALS/SubsetARawLoops/lcalsARaw.test 303126.00 303190.00 0.0%
test-suite :: External/SPEC/CFP2006/444.namd/444.namd.test 241107.00 241155.00 0.0%
test-suite :: External/SPEC/CFP2006/482.sphinx3/482.sphinx3.test 162974.00 163006.00 0.0%
test-suite :: MultiSource/Applications/siod/siod.test 167168.00 167200.00 0.0%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 1048796.00 1048988.00 0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/CLAMR/CLAMR.test 201623.00 201655.00 0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 501734.00 501798.00 0.0%
test-suite :: MultiSource/Applications/ClamAV/clamscan.test 580888.00 580952.00 0.0%
test-suite :: MultiSource/Benchmarks/MallocBench/gs/gs.test 168319.00 168335.00 0.0%
test-suite :: MicroBenchmarks/ImageProcessing/Interpolation/Interpolation.test 226022.00 226038.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/StatementReordering-flt/StatementReordering-flt.test 118011.00 118015.00 0.0%
test-suite :: External/SPEC/CINT2006/471.omnetpp/471.omnetpp.test 550589.00 550605.00 0.0%
test-suite :: External/SPEC/CINT2006/403.gcc/403.gcc.test 3072477.00 3072541.00 0.0%
test-suite :: External/SPEC/CINT2006/483.xalancbmk/483.xalancbmk.test 2385563.00 2385579.00 0.0%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 389171.00 389155.00 -0.0%
test-suite :: MultiSource/Applications/lua/lua.test 234764.00 234748.00 -0.0%
test-suite :: MultiSource/Benchmarks/mafft/pairlocalalign.test 227694.00 227678.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/NodeSplitting-flt/NodeSplitting-flt.test 119819.00 119807.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/Recurrences-flt/Recurrences-flt.test 117995.00 117983.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/InductionVariable-flt/InductionVariable-flt.test 123610.00 123594.00 -0.0%
test-suite :: MultiSource/Benchmarks/FreeBench/pifft/pifft.test 81414.00 81398.00 -0.0%
test-suite :: External/SPEC/CINT2006/464.h264ref/464.h264ref.test 782040.00 781880.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 9597420.00 9595292.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 9597420.00 9595292.00 -0.0%
test-suite :: External/SPEC/CINT2006/445.gobmk/445.gobmk.test 911832.00 911608.00 -0.0%
test-suite :: MultiSource/Applications/oggenc/oggenc.test 192507.00 192459.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/LoopRestructuring-flt/LoopRestructuring-flt.test 122843.00 122811.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-flt/CrossingThresholds-flt.test 122292.00 122260.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 777363.00 777155.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/Expansion-flt/Expansion-flt.test 123265.00 123205.00 -0.0%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 315534.00 315358.00 -0.1%
test-suite :: MultiSource/Benchmarks/TSVC/ControlFlow-flt/ControlFlow-flt.test 128163.00 128083.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 6562.00 6555.00 -0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/compiler/compiler.test 23428.00 23396.00 -0.1%
test-suite :: MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow.test 22749.00 22717.00 -0.1%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 39549.00 39485.00 -0.2%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 39546.00 39482.00 -0.2%
test-suite :: MultiSource/Benchmarks/Prolangs-C/bison/mybison.test 57214.00 57118.00 -0.2%
test-suite :: SingleSource/Benchmarks/Adobe-C++/loop_unroll.test 413668.00 412804.00 -0.2%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 1044047.00 1041487.00 -0.2%
test-suite :: MultiSource/Benchmarks/McCat/18-imp/imp.test 12414.00 12382.00 -0.3%
test-suite :: MultiSource/Benchmarks/Prolangs-C/gnugo/gnugo.test 31161.00 30969.00 -0.6%
test-suite :: MultiSource/Benchmarks/MallocBench/espresso/espresso.test 224726.00 223254.00 -0.7%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 93512.00 92824.00 -0.7%
test-suite :: MultiSource/Benchmarks/Prolangs-C/TimberWolfMC/timberwolfmc.test 281151.00 278463.00 -1.0%
test-suite :: MultiSource/Benchmarks/Olden/tsp/tsp.test 2820.00 2788.00 -1.1%
test-suite :: External/SPEC/CFP2006/433.milc/433.milc.test 156819.00 154739.00 -1.3%
test-suite :: MultiSource/Benchmarks/MiBench/security-blowfish/security-blowfish.test 11560.00 11160.00 -3.5%
test-suite :: MultiSource/Benchmarks/McCat/08-main/main.test 6734.00 6382.00 -5.2%
results results0 diff
ASCI_Purple/SMG2000 - extra vector code
VPlanNativePath/outer-loop-vect - extra vectorization, better vector
code
AVX512BWVL/Vector-AVX512BWVL-psadbw - better vector code
Rodinia/hotspot - small variations
CINT2017speed/625.x264_s
CINT2017rate/525.x264_r - extra vector code, better vectorization
BenchmarkGame/n-body - better vector code.
AVX512BWVL/Vector-AVX512BWVL-unpack_msasm - small variations
Misc/flops - extra vector code
AVX512BWVL/Vector-AVX512BWVL-mask_set_bw - small variations
Misc-C++/Large - better vector code
CFP2017rate/526.blender_r - extra vector code
Prolangs-C++/city - extra vector code
MiBench/consumer-lame - extra vector code
CoyoteBench/fftbench - extra vector code
Olden/power - better vector code
CFP2017rate/538.imagick_r
CFP2017speed/638.imagick_s - extra vector code
CINT2017rate/531.deepsjeng_r - extra vector code
CFP2006/447.dealII - small variations
DOE-ProxyApps-C/miniAMR - small variations
Prolangs-C/unix-smail - small variations
DOE-ProxyApps-C++/PENNANT - small variations
CINT2006/473.astar - small variations
CFP2006/453.povray - small variations
JM/lencod - extra vector code
CFP2017rate/511.povray_r - small variations
DOE-ProxyApps-C/CoMD - small variations
CFP2006/470.lbm - extra vector code
CFP2017speed/619.lbm_s
CFP2017rate/519.lbm_r - extra vector code
CINT2006/456.hmmer - extra code vectorized
TSVC/ControlFlow-dbl - extra vector code
CFP2017rate/510.parest_r - better vector code
LCALS/SubsetALambdaLoops - extra code vectorized
LCALS/SubsetARawLoops - extra code vectorized
CFP2006/444.namd - extra code vectorized
CFP2006/482.sphinx3 - better vector code
Applications/siod - better vector code
Benchmarks/7zip - better vector code
DOE-ProxyApps-C++/CLAMR - extra code vectorized
Applications/sqlite3 - extra code vectorized
Applications/ClamAV - smaller vector code
MallocBench/gs - small variations
MicroBenchmarks/ImageProcessing - small variations
TSVC/StatementReordering-flt - extra code vectorized
CINT2006/471.omnetpp - small variations
CINT2006/403.gcc - extra code vectorized
CINT2006/483.xalancbmk - extra code vectorized
JM/ldecod - small variations
Applications/lua - extra code vectorized
mafft/pairlocalalign - small variations
TSVC/NodeSplitting-flt - extra code vectorized
TSVC/Recurrences-flt - extra code vectorized
TSVC/InductionVariable-flt - extra code vectorized
FreeBench/pifft - small variations
CINT2006/464.h264ref - extra code vectorized
CINT2017speed/602.gcc_s
CINT2017rate/502.gcc_r - some extra code vectorized, extra code inlined
CINT2006/445.gobmk - small variations
Applications/oggenc - small variations
TSVC/LoopRestructuring-flt - extra code vectorized
TSVC/CrossingThresholds-flt - extra code vectorized
CFP2017rate/508.namd_r - small variations
TSVC/ControlFlow-flt - extra code vectorized
mediabench/g721 - small variations
Prolangs-C/compiler - small variations
FreeBench/fourinarow - better vector code
MiBench/telecomm-gsm - small variation in vector code
mediabench/gsm - same
Prolangs-C/bison - small variations
Adobe-C++/loop_unroll - extra code vectorized
Benchmarks/tramp3d-v4 - extra code gets inlined, small changes in vetor
code
McCat/18-imp - variations in vector code
Prolangs-C/gnugo - variations in vector code
MallocBench/espresso - extra code vectorized
DOE-ProxyApps-C++/miniFE - small variations in vector code
Prolangs-C/TimberWolfMC - extra code vectorized, small changes in
previously vectorized code.
Olden/tsp - small changes in vector code
CFP2006/433.milc - extra code gets inlined, vectorized 2 x stores to 4 x stores
MiBench/security-blowfish - extra code vectorized
McCat/08-main - better vector code.
Metric: size..text, RISCV, sifive-p670
Program size..text
results results0 diff
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C++/miniFE/miniFE.test 63580.00 64020.00 0.7%
test-suite :: MultiSource/Benchmarks/MiBench/automotive-susan/automotive-susan.test 21388.00 21406.00 0.1%
test-suite :: MultiSource/Benchmarks/Bullet/bullet.test 296992.00 297088.00 0.0%
test-suite :: External/SPEC/CFP2017rate/511.povray_r/511.povray_r.test 968112.00 968208.00 0.0%
test-suite :: MultiSource/Benchmarks/TSVC/StatementReordering-dbl/StatementReordering-dbl.test 45160.00 45164.00 0.0%
test-suite :: External/SPEC/CINT2017rate/523.xalancbmk_r/523.xalancbmk_r.test 2635902.00 2635854.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/623.xalancbmk_s/623.xalancbmk_s.test 2635902.00 2635854.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/502.gcc_r/502.gcc_r.test 7568730.00 7568578.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/602.gcc_s/602.gcc_s.test 7568730.00 7568578.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-flt/CrossingThresholds-flt.test 49764.00 49762.00 -0.0%
test-suite :: MultiSource/Applications/sqlite3/sqlite3.test 449132.00 449108.00 -0.0%
test-suite :: MultiSource/Applications/JM/lencod/lencod.test 695932.00 695892.00 -0.0%
test-suite :: External/SPEC/CINT2017rate/525.x264_r/525.x264_r.test 508820.00 508788.00 -0.0%
test-suite :: External/SPEC/CINT2017speed/625.x264_s/625.x264_s.test 508820.00 508788.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/526.blender_r/526.blender_r.test 9594152.00 9593336.00 -0.0%
test-suite :: MultiSource/Benchmarks/ASCI_Purple/SMG2000/smg2000.test 166522.00 166490.00 -0.0%
test-suite :: External/SPEC/CFP2017rate/508.namd_r/508.namd_r.test 722252.00 722092.00 -0.0%
test-suite :: MultiSource/Benchmarks/DOE-ProxyApps-C/miniGMG/miniGMG.test 27554.00 27546.00 -0.0%
test-suite :: SingleSource/UnitTests/Vectorizer/VPlanNativePath/outer-loop-vect.test 10900.00 10896.00 -0.0%
test-suite :: MultiSource/Benchmarks/TSVC/CrossingThresholds-dbl/CrossingThresholds-dbl.test 46754.00 46732.00 -0.0%
test-suite :: MultiSource/Benchmarks/tramp3d-v4/tramp3d-v4.test 631570.00 631226.00 -0.1%
test-suite :: MultiSource/Benchmarks/7zip/7zip-benchmark.test 850698.00 850218.00 -0.1%
test-suite :: MultiSource/Benchmarks/MiBench/telecomm-gsm/telecomm-gsm.test 24816.00 24800.00 -0.1%
test-suite :: MultiSource/Benchmarks/mediabench/gsm/toast/toast.test 24814.00 24798.00 -0.1%
test-suite :: External/SPEC/CFP2017rate/510.parest_r/510.parest_r.test 1599946.00 1598394.00 -0.1%
test-suite :: MultiSource/Applications/hbd/hbd.test 27236.00 27204.00 -0.1%
test-suite :: MultiSource/Applications/JM/ldecod/ldecod.test 293848.00 293480.00 -0.1%
test-suite :: MultiSource/Benchmarks/Prolangs-C/compiler/compiler.test 20160.00 20048.00 -0.6%
test-suite :: MultiSource/Benchmarks/MallocBench/espresso/espresso.test 182088.00 181040.00 -0.6%
test-suite :: MultiSource/Benchmarks/mediabench/g721/g721encode/encode.test 4788.00 4748.00 -0.8%
DOE-ProxyApps-C++/miniFE - extra vector code
MiBench/automotive-susan - small variations
Benchmarks/Bullet - extra vector code
CFP2017rate/511.povray_r - slightly better vector code
TSVC/StatementReordering-dbl - small variations
CINT2017rate/523.xalancbmk_r
CINT2017speed/623.xalancbmk_s - extra vector code
CINT2017rate/502.gcc_r
CINT2017speed/602.gcc_s - extra vector code
TSVC/CrossingThresholds-flt - small variations
Applications/sqlite3 - extra vector code
JM/lencod - extra vector code, small variations
CINT2017rate/525.x264_r
CINT2017speed/625.x264_s - small variations
CFP2017rate/526.blender_r - extra vector code, small variations
DOE-ProxyApps-C/miniGMG - small variations
Vectorizer/VPlanNativePath/outer-loop-vect - small variations
TSVC/CrossingThresholds-dbl - small variations
Benchmarks/tramp3d-v4 - small variations
Benchmarks/7zip - extra vector code
MiBench/telecomm-gsm - small variations
mediabench/gsm/toast - small variations
CFP2017rate/510.parest_r - extra vector code
Applications/hbd - extra vector code
JM/ldecod - better vector code
Prolangs-C/compiler - extra vector code
MallocBench/espresso - extra vector code
mediabench/g721/g721encode - extra vectorization
Reviewers: RKSimon
Reviewed By: RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/107461
Commit: b3a2208c566c475f7d1b6d40c67aec100ae29103
https://github.com/llvm/llvm-project/commit/b3a2208c566c475f7d1b6d40c67aec100ae29103
Author: Adrian Kuegel <akuegel at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/ForallToFor.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
Log Message:
-----------
[mlir] Apply ClangTidy fixes.
- Prefer to check empty() instead of size() == 0.
- Remove unused using declarations.
Commit: 1e23a6142a827cda89fa4d8335afebd89701991d
https://github.com/llvm/llvm-project/commit/1e23a6142a827cda89fa4d8335afebd89701991d
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/test/Driver/ps4-linker.c
M clang/test/Driver/ps4-ps5-header-search.c
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/ps5-sdk-root.c
Log Message:
-----------
[PS4,PS5][Driver] Detangle --sysroot and -isysroot (#107410)
The following discrepancies concerning `-isysroot` and `--sysroot`
motivated this change:
- The SDK directory can be specified via `-isysroot`, but `--sysroot`
has no influence over this. Yet, we check for the presence of either
switch to determine whether we ought to warn about a missing SDK
*headers*.
- The presence of `-isysroot` is ignored when deciding whether to warn
about missing SDK *libraries*, depsite it being the only switch capable
of specifying a non-default SDK location.
- The `--sysroot`s passed to the PlayStation linkers by the driver are
unrelated to the SDK directory resolved in the PS4PS5Base constructor.
Following this change, we attempt to derive an SDK root from a platform-
specific environment variable. Failing that, we derive it from the location of
the driver. This then becomes the default root directory for both header and
library search. `--sysroot` overrides both search roots. `-isysroot` overrides
only the header search root. If both are specified, `--sysroot` specifies the
library search root and `-isysroot` specifies the header search root.
For each search root that was not overridden, a warning is emitted if expected
header/library search paths are missing inside that root.
The test updates to ps{4,5}-sdk-root.c were of the scale of a rewrite so
I also took the opportunity to clarify the purpose of each part,
eliminate some redundancy and add some missing coverage.
SIE tracker: TOOLCHAIN-16704
Commit: 17a3bdb529552a7891f43c9c28d987a5a1b63050
https://github.com/llvm/llvm-project/commit/17a3bdb529552a7891f43c9c28d987a5a1b63050
Author: Sam Elliott <quic_aelliott at quicinc.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/docs/RISCVUsage.rst
Log Message:
-----------
[RISCV][docs] Fix List Formatting
Commit: b84c42944a89afb63d74f54096d50c3913491005
https://github.com/llvm/llvm-project/commit/b84c42944a89afb63d74f54096d50c3913491005
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
Log Message:
-----------
[NFC][LoopVectorize] Rename variable in replaceVPBBWithIRVPBB (#108543)
I've renamed the variable in replaceVPBBWithIRVPBB from IRMiddleVPBB ->
IRVPBB, since the function is used for more than just replacing the
middle VP block.
Commit: d0438d2d087e78571a671c98cbb42308e4dcfcec
https://github.com/llvm/llvm-project/commit/d0438d2d087e78571a671c98cbb42308e4dcfcec
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M libcxx/include/__locale_dir/locale_base_api/ibm.h
M libcxx/include/__support/xlocale/__nop_locale_mgmt.h
M libcxx/src/atomic.cpp
M libcxx/src/locale.cpp
M libcxx/src/support/ibm/mbsnrtowcs.cpp
M libcxx/src/support/ibm/wcsnrtombs.cpp
M libcxx/src/support/ibm/xlocale_zos.cpp
M libcxx/src/support/win32/support.cpp
M libcxx/src/support/win32/thread_win32.cpp
Log Message:
-----------
[libc++][NFC] Replace uses of NULL by nullptr (#108847)
Closes #108741
Commit: 07e0b8a7717aecc1133a08bfe013b58fb4c596f5
https://github.com/llvm/llvm-project/commit/07e0b8a7717aecc1133a08bfe013b58fb4c596f5
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Log Message:
-----------
[ast-matcher] Fixed a crash when traverse lambda expr with invalid captures (#108689)
Fixes: #106444
Commit: a17a2451dbb0f31d31bec4c1194b893f914b1bc0
https://github.com/llvm/llvm-project/commit/a17a2451dbb0f31d31bec4c1194b893f914b1bc0
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M lld/COFF/DLL.cpp
M lld/COFF/DLL.h
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/Writer.cpp
M lld/test/COFF/Inputs/loadconfig-arm64ec.s
M lld/test/COFF/arm64ec-import.test
Log Message:
-----------
[LLD][COFF] Add Support for auxiliary IAT copy (#108610)
In addition to the auxiliary IAT, ARM64EC modules also contain a copy of
it. At runtime, the auxiliary IAT is filled with the addresses of actual
ARM64EC functions when possible. If patching is detected, the OS may use
the IAT copy to revert the auxiliary IAT, ensuring that the call checker
is used for calls to imported functions.
Commit: ab38ec9ac312460e4f71c8ad3f50b9b5723469f6
https://github.com/llvm/llvm-project/commit/ab38ec9ac312460e4f71c8ad3f50b9b5723469f6
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/memory/TestDAP_memory.py
Log Message:
-----------
[lldb][lldb-dap] Disable read memory test on Windows
This isn't strictly a Windows issue but for now it's the only bot
that was hit by this failure.
It can happen on Linux too but I expect we'll fix it and remove the
skip soon anyway.
Test was added in #104317.
Commit: 5fdf07dda697a7752aad64ba93d4c38de21f8d3b
https://github.com/llvm/llvm-project/commit/5fdf07dda697a7752aad64ba93d4c38de21f8d3b
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
Log Message:
-----------
[LLVM][TableGen] Change ARMTargetDefEmitter to use const RecordKeeper (#108916)
Change ARMTargetDefEmitter to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: 8e2dbab24276a8521d241463b4161c78bc4d39d2
https://github.com/llvm/llvm-project/commit/8e2dbab24276a8521d241463b4161c78bc4d39d2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Program.cpp
A clang/test/AST/ByteCode/extern.cpp
Log Message:
-----------
[clang][bytecode] Fix defining extern variables (#108940)
At the point of defintion of the variable, a function might already
refert to the variable by its index. Replace the index with the new one.
Commit: 34e16b6b9c8628e562e237aaa9a3bc2625980ca1
https://github.com/llvm/llvm-project/commit/34e16b6b9c8628e562e237aaa9a3bc2625980ca1
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Log Message:
-----------
[IndVars] Fix strict weak ordering violation (#108947)
The sort used the block name as a tie-breaker, which will not work for
unnamed blocks and can result in a strict weak ordering violation.
Fix this by checking that all exiting blocks dominate the latch first,
which means that we have a total dominance order. This makes the code
structure here align with what optimizeLoopExits() does.
Fixes https://github.com/llvm/llvm-project/issues/108618.
Commit: cb98fd977a25d3d778244da4012fd34acf7fab45
https://github.com/llvm/llvm-project/commit/cb98fd977a25d3d778244da4012fd34acf7fab45
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
Fix use of an uninitialized variable; NFC intended
This was causing debug builds with Visual Studio to fail a number of
HLSL tests.
Commit: 49a754a43d5592e08ef177db794126ddc676d6b5
https://github.com/llvm/llvm-project/commit/49a754a43d5592e08ef177db794126ddc676d6b5
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M clang/www/make_cxx_dr_status
Log Message:
-----------
[Clang] Mark Clang 19 language changes as being released [NFC] (#108978)
Commit: ee2add06836afdda6c86792441e6afdf6993f770
https://github.com/llvm/llvm-project/commit/ee2add06836afdda6c86792441e6afdf6993f770
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/MachineVerifier/test_g_extract_subvector.mir
M llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
Log Message:
-----------
[GISEL] Fix bugs and clarify spec of G_EXTRACT_SUBVECTOR (#108848)
The implementation was missing the fact that `G_EXTRACT_SUBVECTOR`
destination and source vector can be different types.
Also fix a bug in the MIR builder for `G_EXTRACT_SUBVECTOR` to generate
the correct opcode.
Clarify the G_EXTRACT_SUBVECTOR specification.
Commit: d2125e1db6bc5c3c2db9e358a8b69e498455ee9d
https://github.com/llvm/llvm-project/commit/d2125e1db6bc5c3c2db9e358a8b69e498455ee9d
Author: Mikhail R. Gadelha <mikhail at igalia.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
Log Message:
-----------
[RISCV] Support STRICT_UINT_TO_FP and STRICT_SINT_TO_FP (#102503)
This patch adds support for the missing STRICT_UINT_TO_FP and
STRICT_SINT_TO_FP for riscv and adds a test case for rv32 which was
previously crashing.
The code is in line with how other strict_* nodes are handled
(e.g., getting op(1) instead of op(0) when it's a strict node, as op(0)
in a strict node is the entry token).
Commit: 2242cd2b6a60d5c0f233a091fc5d642af1cb0d90
https://github.com/llvm/llvm-project/commit/2242cd2b6a60d5c0f233a091fc5d642af1cb0d90
Author: David Green <david.green at arm.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/AArch64/vecreduce-bitext.ll
Log Message:
-----------
[DAG] Fold vecreduce.or(sext(x)) to sext(vecreduce.or(x)) (#108959)
The same is true for and / xor reductions, where the sext / zext can be
sank down through the bitwise operation.
https://alive2.llvm.org/ce/z/TvzCd5
Commit: f4172f6659ef14cbc235e3d690957de068cd55d4
https://github.com/llvm/llvm-project/commit/f4172f6659ef14cbc235e3d690957de068cd55d4
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/include/clang/Basic/AMDGPUTypes.def
M clang/lib/AST/ASTContext.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
Log Message:
-----------
[Clang][AMDGPU] Simplify builtin type definitions. NFC. (#108968)
Remove the MangledName field since these types just use the normal Name
for mangling purposes.
Commit: 267ad430fc54d6d548cd7d25c7e59c3b6b650097
https://github.com/llvm/llvm-project/commit/267ad430fc54d6d548cd7d25c7e59c3b6b650097
Author: Zoltán Porkoláb <zporky at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.h
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/sizeof-expression.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/arr39-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
R clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-2.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics-c11.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer.cpp
Log Message:
-----------
[clang-tidy] Extend `bugprone-sizeof-expression` with matching `P +- sizeof(T)` and `P +- N */ sizeof(T)` cases, add `cert-arr39-c` alias (#106061)
Improved `bugprone-sizeof-expression` check to find suspicious pointer
arithmetic calculations where the pointer is offset by an `alignof()`,
`offsetof()`, or `sizeof()` expression.
Pointer arithmetic expressions implicitly scale the offset added to or
subtracted from the address by the size of the pointee type. Using an
offset expression that is already scaled by the size of the underlying
type effectively results in a squared offset, which is likely an invalid
pointer that points beyond the end of the intended array.
```c
void printEveryEvenIndexElement(int *Array, size_t N) {
int *P = Array;
while (P <= Array + N * sizeof(int)) { // Suspicious pointer arithmetics using sizeof()!
printf("%d ", *P);
P += 2 * sizeof(int); // Suspicious pointer arithmetics using sizeof()!
}
}
```
---------
Co-authored-by: Whisperity <whisperity at gmail.com>
Commit: b153cc5c2bd9f08bf34ec13016f7b436b3e8a1d9
https://github.com/llvm/llvm-project/commit/b153cc5c2bd9f08bf34ec13016f7b436b3e8a1d9
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/compress-opt-select.ll
Log Message:
-----------
[RISCV] Fix boundary error in compress-opt-select.ll
Per the comment, this test is intending to test the first constant which
can't be encoded via a c.addi. However, -32 *can* be encoded as in a
c.addi, and all that's preventing it from doing so is the register
allocators choice to use a difference destination register on the
add than it's source. (Which compressed doesn't support.)
The current LLC codegen for this test looks like:
addi a1, a0, -32
li a0, -99
bnez a1, .LBB0_2
li a0, 42
.LBB0_2:
ret
After https://github.com/llvm/llvm-project/pull/108889, we sink the LI, and
the register allocator picks the same source and dest register for the addi
resulting in the c.addi form being emitted. So, to avoid a confusing diff
let's fix the test to check what was originally intended.
Commit: 848cec11f54f1433d19c847fe0296147549ef44a
https://github.com/llvm/llvm-project/commit/848cec11f54f1433d19c847fe0296147549ef44a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/tsc-s116.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vectorizable-selects-uniform-cmps.ll
M llvm/test/Transforms/SLPVectorizer/X86/crash_dequeue.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-minmax.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/load-merge.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr47629.ll
M llvm/test/Transforms/SLPVectorizer/X86/pr48879-sroa.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder-possible-strided-node.ll
M llvm/test/Transforms/SLPVectorizer/X86/scatter-vectorize-reorder.ll
M llvm/test/Transforms/SLPVectorizer/X86/sin-sqrt.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-load8_2-unord.ll
M llvm/test/Transforms/SLPVectorizer/X86/supernode.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-calls.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec_list_bias_external_insert_shuffled.ll
Log Message:
-----------
Revert "[SLP]Vectorize gathered loads"
This reverts commit de1f5b96adcea52bf7c9670c46123fe1197050d2.
This has a very large compile-time impact in some cases, in
particular lencod. See:
http://llvm-compile-time-tracker.com/compare.php?from=b1339abb713063363e7804124b8fb3d84143a003&to=de1f5b96adcea52bf7c9670c46123fe1197050d2&stat=instructions:u
Commit: 53bc35a80a844601c10c8bb75832cbee3ba841ac
https://github.com/llvm/llvm-project/commit/53bc35a80a844601c10c8bb75832cbee3ba841ac
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M polly/lib/Analysis/ScopDetectionDiagnostic.cpp
M polly/lib/Analysis/ScopInfo.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/Exchange/JSONExporter.cpp
Log Message:
-----------
[polly] Tidy uses of raw_string_ostream (NFC)
As specified in the docs,
1) raw_string_ostream is always unbuffered and
2) the underlying buffer may be used directly
( 65b13610a5226b84889b923bae884ba395ad084d for further reference )
* Don't call raw_string_ostream::flush(), which is essentially a no-op.
* Avoid unneeded calls to raw_string_ostream::str(), to avoid excess indirection.
Commit: 6f5dd6563017a11cf1486654d2350ef97054abef
https://github.com/llvm/llvm-project/commit/6f5dd6563017a11cf1486654d2350ef97054abef
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M libcxx/docs/Contributing.rst
Log Message:
-----------
[libc++][docs] Fix inline code style - use double backticks (#108974)
This is an apparrent omission. Single backick (Markdown style) was used
instead of double backtick for inline code style.
Commit: adeae925dcd7db0d49256f687c66a662d6604128
https://github.com/llvm/llvm-project/commit/adeae925dcd7db0d49256f687c66a662d6604128
Author: David Benjamin <davidben at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M libcxx/include/__assert
Log Message:
-----------
[libc++] Make _LIBCPP_ASSUME usable when it is appropriate (#91801)
libc++ turned off _LIBCPP_ASSUME because turning every debug assert into
__builtin_assume tripped [1]. However, this means we can't use _LIBCPP_ASSUME
when there is a clear optimization intent. See [2] for discussion of a place
where _LIBCPP_ASSUME would be valuable.
This patch fixes this by not undefining the definition of _LIBCPP_ASSUME and
making sure that we don't attempt to `_LIBCPP_ASSSUME` every assertion in
the library.
[1]: https://discourse.llvm.org/t/llvm-assume-blocks-optimization/71609
[2]: https://github.com/llvm/llvm-project/pull/78929#issuecomment-1936582711
Commit: c3d78a7af8e74c588501a2555b4a4ed7bdc55ef5
https://github.com/llvm/llvm-project/commit/c3d78a7af8e74c588501a2555b4a4ed7bdc55ef5
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M libc/benchmarks/MemorySizeDistributions.cpp
M libc/benchmarks/automemcpy/unittests/CodeGenTest.cpp
Log Message:
-----------
[libc][benchmarks] Tidy uses of raw_string_ostream (NFC)
As specified in the docs,
1) raw_string_ostream is always unbuffered and
2) the underlying buffer may be used directly
( 65b13610a5226b84889b923bae884ba395ad084d for further reference )
Avoid unneeded calls to raw_string_ostream::str(), to avoid excess indirection.
Commit: c532e6db274d4edeb65e9436d44e33f0ccc1cb83
https://github.com/llvm/llvm-project/commit/c532e6db274d4edeb65e9436d44e33f0ccc1cb83
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/compress-opt-select.ll
Log Message:
-----------
[RISCV] Restructure compress-opt-select.ll
Two major changes:
- Remove use of sed preprocessing - this was being used to create two
versions of each test, and the result is much more readable if we
just duplicate the tests.
- Use a regex for matching the condition. An upcoming change causes
us to reverse the branch direction (which doesn't matter to the
purpose of these tests at all), so using the regex makes the test
more stable.
Commit: 8663a75fa2f31299ab8d1d90288d9df92aadee88
https://github.com/llvm/llvm-project/commit/8663a75fa2f31299ab8d1d90288d9df92aadee88
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU] Add link to RDNA 3.5 docs (#108977)
Commit: 78f7aae89570bca93d0f1ef85752f20b16394462
https://github.com/llvm/llvm-project/commit/78f7aae89570bca93d0f1ef85752f20b16394462
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/VirtRegMap.h
Log Message:
-----------
[VirtRegMap] Remove unused MAX_STACK_SLOT. NFC (#108781)
I think this has been unuesd since
92255f27f1c1884585cbcb3fcbd72bd4b0b533f7 in 2011.
Commit: f36580fcb535b46deaf659702958b7f203259ecf
https://github.com/llvm/llvm-project/commit/f36580fcb535b46deaf659702958b7f203259ecf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Log Message:
-----------
[LegalizeVectorOps] Remove calls to DAG.UnrollVectorsOps from some expansion handlers. NFC (#108930)
Instead, return SDValue() to tell the caller to do the unrolling. This
is consistent with how some other handler work. Especially the handlers
that live in TLI.
ExpandBITREVERSE was rewritten to not take the Results vector an
argument.
Commit: 0f97b4824a8cf040bd3ce7b644dee9d60065ac61
https://github.com/llvm/llvm-project/commit/0f97b4824a8cf040bd3ce7b644dee9d60065ac61
Author: Farzon Lotfi <1802579+farzonl at users.noreply.github.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/DirectX/CMakeLists.txt
A llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/test/CodeGen/DirectX/frac.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/rsqrt.ll
Log Message:
-----------
[Scalarizer][DirectX] Add support for scalarization of Target intrinsics (#108776)
Since we are using the Scalarizer pass in the backend we needed a way to
allow this pass to operate on Target intrinsics.
We achieved this by adding `TargetTransformInfo ` to the Scalarizer
pass. This allowed us to call a function available to the DirectX
backend to know if an intrinsic is a target intrinsic that should be
scalarized.
Commit: 2e7c7d20d55be51f907d87a2298660d73a1cc190
https://github.com/llvm/llvm-project/commit/2e7c7d20d55be51f907d87a2298660d73a1cc190
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll
Log Message:
-----------
[RISCV][TTI] Adjust cost for extract/insert element when VLEN is known (#108595)
If we know an exact VLEN, then the index is effectively modulo the
number of elements in a single vector register. Our lowering performs
this subvector optimization.
A bit of context. This change may look a bit strange on it's own given
we are currently *not* scaling insert/extract cost by LMUL. This costing
decision needs to change, but is very intertwined with SLP
profitability, and is thus a bit hard to adjust. I'm hoping that
https://github.com/llvm/llvm-project/pull/108419 will let me start to
untangle this. This change is basically a case of finding a subset I can
tackle before other dependencies are in place which does no real harm in
the meantime.
Commit: 55808d84671153c37747b54c1fde05ad2c22770e
https://github.com/llvm/llvm-project/commit/55808d84671153c37747b54c1fde05ad2c22770e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
Log Message:
-----------
[AVR] Use MCRegister in AsmParser. NFC
Commit: 594579b7af82dab786bb75786451ca582543a697
https://github.com/llvm/llvm-project/commit/594579b7af82dab786bb75786451ca582543a697
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/compress-opt-select.ll
Log Message:
-----------
[RISCV] Autogenerate compress-opt-select.ll
I realized after spending way too much time looking at this, that
we can avoid objdump entirely here by having the assembly simply
not print the aliases. Once we do that, we can simply autogen
this test, and updates become trivial and understandable.
Commit: 09fc1781807b46e2c6a92e744e70a1ffb530c3ad
https://github.com/llvm/llvm-project/commit/09fc1781807b46e2c6a92e744e70a1ffb530c3ad
Author: Anton Sidorenko <anton.sidorenko at syntacore.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
A llvm/test/tools/llvm-mca/RISCV/SyntacoreSCR/SCR7-ALU.s
A llvm/test/tools/llvm-mca/RISCV/SyntacoreSCR/SCR7-FPALU_D.s
A llvm/test/tools/llvm-mca/RISCV/SyntacoreSCR/SCR7-FPALU_S.s
A llvm/test/tools/llvm-mca/RISCV/SyntacoreSCR/SCR7-LSU.s
Log Message:
-----------
[RISCV] Add scheduling model for Syntacore SCR7 (#108814)
Syntacore SCR7 is rv64imafdcv_zba_zbb_zbc_zbs_zkn.
Scheduling model for RVV will be added later.
Overview: https://syntacore.com/products/scr7
---------
Co-authored-by: Dmitrii Petrov <dmitrii.petrov at syntacore.com>
Co-authored-by: Anton Afanasyev <anton.afanasyev at syntacore.com>
Co-authored-by: Elena Lepilkina <elena.lepilkina at syntacore.com>
Commit: 433bc6b741198aba34dd305eed143e0637c307e6
https://github.com/llvm/llvm-project/commit/433bc6b741198aba34dd305eed143e0637c307e6
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/utils/TableGen/IntrinsicEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Adopt formatv() automatic index in IntrinsicEmitter (#108954)
Adopt the use of formatv() automatic index assignment feature in
IntrinsicEmitter.
Commit: 100b34bbc1a421133f197d1e05c1cb769414368c
https://github.com/llvm/llvm-project/commit/100b34bbc1a421133f197d1e05c1cb769414368c
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp
M llvm/utils/TableGen/Common/VarLenCodeEmitterGen.h
Log Message:
-----------
[LLVM][TableGen] Change VarLenCodeEmitterGen to use const RecordKeeper (#108960)
Change VarLenCodeEmitterGen to use const RecordKeeper.
This is a part of effort to have better const correctness in TableGen
backends:
https://discourse.llvm.org/t/psa-planned-changes-to-tablegen-getallderiveddefinitions-api-potential-downstream-breakages/81089
Commit: da46244e49b1e4b90e51635cff2134d1664841df
https://github.com/llvm/llvm-project/commit/da46244e49b1e4b90e51635cff2134d1664841df
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/test/CodeGen/NVPTX/f16-instructions.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/Thumb2/mve-fp-negabs.ll
Log Message:
-----------
Revert "[LegalizeVectorOps] Make the AArch64 hack in ExpandFNEG more specific."
This reverts commit 884ff9e3f9741ac282b6cf8087b8d3f62b8e138a.
Regression was reported in Halide for arm32.
Commit: e5bc842a9c56c1d83543f0232a888db6210efd85
https://github.com/llvm/llvm-project/commit/e5bc842a9c56c1d83543f0232a888db6210efd85
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[NFC][sanitizer] Remove #elif to simplify ThreadDescriptorSizeFallback (#108911)
Commit: 3d87e21ac86432b089120703a35ad4b16285e808
https://github.com/llvm/llvm-project/commit/3d87e21ac86432b089120703a35ad4b16285e808
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[NFC][sanitizer] Consolidate version checking branches of ThreadDescriptorSizeFallback (#108912)
Commit: 0050503b7a278a50b406a47378f6161bf55059ec
https://github.com/llvm/llvm-project/commit/0050503b7a278a50b406a47378f6161bf55059ec
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/shifts.cpp
Log Message:
-----------
[clang][bytecode] Allow right-shift of negative values (#108987)
We used to incorrectly diagnose this as a "left shift of negative
value".
Commit: a0d00c94c251ba7aff9d58a42a8e41c4ed432b8b
https://github.com/llvm/llvm-project/commit/a0d00c94c251ba7aff9d58a42a8e41c4ed432b8b
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
Log Message:
-----------
[SimplifyCFG] Swap range metadata to attribute for calls. (#108984)
Among the last usages of range metadata for call before being able to
deprecate and only have the range attribute for calls.
Commit: 2bda9e1c29ccb9a09eabd41ac4ff1e925acf2206
https://github.com/llvm/llvm-project/commit/2bda9e1c29ccb9a09eabd41ac4ff1e925acf2206
Author: Mainak Sil <mainaksil0 at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-format.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-print.rst
Log Message:
-----------
[docs][clang-tidy] Correct StrictMode example in modernize-use-std-print (#108805)
Fix #101397.
Commit: 6b3b63cd3736ebe0ed93324ef54ea1c5a2c06438
https://github.com/llvm/llvm-project/commit/6b3b63cd3736ebe0ed93324ef54ea1c5a2c06438
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M libcxx/utils/synchronize_csv_status_files.py
Log Message:
-----------
[libc++] Avoid synchronizing status files for "In Progress" issues
This doesn't provide much value and it creates a lot of churn in the
CSV files.
Commit: ac1194538607c2c1f3413d895286d4323f43a25c
https://github.com/llvm/llvm-project/commit/ac1194538607c2c1f3413d895286d4323f43a25c
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
Log Message:
-----------
[mlir][GPU] block_id has the grid size as its range
Commit: e1971a8f018823615da619780620e8bfcced58dd
https://github.com/llvm/llvm-project/commit/e1971a8f018823615da619780620e8bfcced58dd
Author: Wanyi <kusmour at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M lldb/source/Plugins/Trace/intel-pt/CommandObjectTraceStartIntelPT.cpp
Log Message:
-----------
[lldb][intel-pt] Fix build error on conversion from llvm::Error to Status::FromError (#108719)
Summary: This introduced from upstream
[#107163](https://github.com/llvm/llvm-project/pull/107163)
Test Plan: I can build
Closes: #107580
Commit: b9e13045abc6e4a179cc46e20e876ecc98fcc7cd
https://github.com/llvm/llvm-project/commit/b9e13045abc6e4a179cc46e20e876ecc98fcc7cd
Author: Зишан Мирза <zmirza at tutanota.de>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M libc/docs/date_and_time.rst
Log Message:
-----------
[libc] add `ctime` and `ctime_r` to `date_and_time` documentation (#108665)
closes #108664
Commit: 12b88f835dc47ba2b4f29e6caf710cb8da876367
https://github.com/llvm/llvm-project/commit/12b88f835dc47ba2b4f29e6caf710cb8da876367
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M libcxx/docs/Status/Cxx20Papers.csv
Log Message:
-----------
[libc++][NFC] Mark P1424R1 as partially implemented (#107751)
`hh_mm_ss` and related functions from https://wg21.link/P1466R3 were
partially implemented in LLVM 10 (fde236b1f719b3a).
Commit: ae8d0200b052234c38a89b93dcac447e95f99554
https://github.com/llvm/llvm-project/commit/ae8d0200b052234c38a89b93dcac447e95f99554
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/test/Transforms/SimplifyCFG/sink-and-convert-switch.ll
Log Message:
-----------
[SimplifyCFG] Add test for sinking div/rem with const remainder; NFC
Commit: 419c53477eae62c716ca8f4e18109342f0398d95
https://github.com/llvm/llvm-project/commit/419c53477eae62c716ca8f4e18109342f0398d95
Author: Noah Goldstein <goldstein.w.n at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/sink-and-convert-switch.ll
Log Message:
-----------
[SimplifyCFG] Mark div/rem as not-cheap to sink if we are replacing const denominator
Close #109007
Commit: c23d6df60d62f971d957e730f6fe55ea89541f6b
https://github.com/llvm/llvm-project/commit/c23d6df60d62f971d957e730f6fe55ea89541f6b
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets/AArch64.cpp
Log Message:
-----------
[AArch64] Don't define reserved macros
It's not allowed. It also prevents Clang from compiling itself on
Aarch64.
lib/Basic/Targets/AArch64.cpp:404:9: warning: '__ARM_ACLE_VERSION' macro redefined [-Wmacro-redefined]
404 | #define __ARM_ACLE_VERSION(Y, Q, P) (100 * (Y) + 10 * (Q) + (P))
Commit: a729e706de3fc6ebee49ede3c50afb47f2e29191
https://github.com/llvm/llvm-project/commit/a729e706de3fc6ebee49ede3c50afb47f2e29191
Author: Greg Roth <grroth at microsoft.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/GlobalDestructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-subscript.hlsl
A clang/test/CodeGenHLSL/inline-constructors.hlsl
A clang/test/CodeGenHLSL/inline-functions.hlsl
Log Message:
-----------
[HLSL] set alwaysinline on HLSL functions (#106588)
HLSL inlines all its functions by default. This uses the alwaysinline
attribute to make the alwaysinliner pass inline any function not
explicitly marked noinline by the user or autogeneration. The
alwayslinline marking takes place in `SetLLVMFunctionAttributesForDefinitions`
where all other inlining interactions are determined.
The outermost entry function is marked noinline because there's no
reason to inline it. Any user calls to an entry function will instead call
the internal mangled version of the entry function.
Adds tests for function and constructor inlining and augments some
existing tests to verify correct inlining of implicitly created
functions as well.
Incidentally restore RUN line that I believe was mistakenly removed as
part of #88918
Fixes #89282
Commit: 64972834c193632cbc47e54c0f0c721636b077e6
https://github.com/llvm/llvm-project/commit/64972834c193632cbc47e54c0f0c721636b077e6
Author: Michael Maitland <michaeltmaitland at gmail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
A llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerLowering.cpp
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
Log Message:
-----------
[RISCV][GISEL] Introduce the RISCVPostLegalizerLowering pass (#108991)
This is mostly a copy of the AArch64PostLegalizerLoweringPass, except it
removes all of the AArch64 combines.
This pass allows us to lower instructions after the generic
post-legalization combiner has had a chance to run.
We will be adding combines to this pass in future patches.
Commit: d5dd7d230ecaf8242f4429a5e3653e16bf55bcd6
https://github.com/llvm/llvm-project/commit/d5dd7d230ecaf8242f4429a5e3653e16bf55bcd6
Author: Youngsuk Kim <youngsuk.kim at hpe.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M flang/include/flang/Parser/dump-parse-tree.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Semantics/tools.cpp
M flang/lib/Semantics/type.cpp
M flang/unittests/Evaluate/real.cpp
M flang/unittests/Frontend/CodeGenActionTest.cpp
M flang/unittests/Frontend/CompilerInstanceTest.cpp
Log Message:
-----------
[flang] Tidy uses of raw_string_ostream (NFC)
As specified in the docs,
1) raw_string_ostream is always unbuffered and
2) the underlying buffer may be used directly
( 65b13610a5226b84889b923bae884ba395ad084d for further reference )
Avoid unneeded calls to raw_string_ostream::str(), to avoid excess indirection.
Commit: b9bf831e8db38efcd930397516cbc4ca2c53d098
https://github.com/llvm/llvm-project/commit/b9bf831e8db38efcd930397516cbc4ca2c53d098
Author: vporpo <vporpodas at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Implement GlobalVariable (#108642)
This patch implements sandboxir::GlobalVariable mirroring
llvm::GlobalVariable.
Commit: 090850f15dba926e2436089ff679b7015bb59e11
https://github.com/llvm/llvm-project/commit/090850f15dba926e2436089ff679b7015bb59e11
Author: Sushant Gokhale <sgokhale at nvidia.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
A llvm/test/Analysis/CostModel/AArch64/extract_float.ll
Log Message:
-----------
[AArch64][CostModel] Add NFC tests for extractelement cost (#108941)
A successive patch aims to reduce the extractelement cost where the only
user(s) is fmul instruction.
Commit: 51a29b5f16efab7f46106b6ce14cbfa50d991040
https://github.com/llvm/llvm-project/commit/51a29b5f16efab7f46106b6ce14cbfa50d991040
Author: Stephen Tozer <stephen.tozer at sony.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/test/CodeGen/Thumb2/pr52817.ll
M llvm/test/CodeGen/X86/fsafdo_test1.ll
M llvm/test/CodeGen/X86/fsafdo_test4.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
M llvm/test/DebugInfo/X86/discriminator.ll
M llvm/test/DebugInfo/X86/empty-line-info.ll
R llvm/test/DebugInfo/X86/is_stmt-at-block-start.ll
Log Message:
-----------
Revert2 "[DebugInfo][DWARF] Set is_stmt on first non-line-0 instruction in BB (#105524)"
Reverted due to large .debug_line size regressions for some
configurations; work currently in place to improve the output of this
behaviour in PR #108251.
This patch also modifies two tests that were created or modified after
the original commit landed and are affected by the revert:
llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
llvm/test/DebugInfo/X86/empty-line-info.ll
This reverts commit 5fef40c2c477e92187bd4e5c18091eca6b8465cc.
Commit: d3532d1b670546dd36e535982d23dfef903cfda0
https://github.com/llvm/llvm-project/commit/d3532d1b670546dd36e535982d23dfef903cfda0
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Port 64972834c193632cbc47e54c0f0c721636b077e6
Commit: 6153582c9c62335ac911bed2b884b13626b99301
https://github.com/llvm/llvm-project/commit/6153582c9c62335ac911bed2b884b13626b99301
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
Log Message:
-----------
[X86] combineX86ShuffleChainWithExtract - peek through insert_subvector(undef,vec,0) widening patterns when tracking subvector sources
Helps replace a number of X86ISD::VPERMV3 nodes that are shuffling subvectors from the same source with X86ISD::VPERMV equivalents.
Commit: f4fe26ddfde0d5bb1c512e89a9cdd442a7518ee1
https://github.com/llvm/llvm-project/commit/f4fe26ddfde0d5bb1c512e89a9cdd442a7518ee1
Author: Greg Roth <grroth at microsoft.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M clang/test/CodeGenHLSL/builtins/StructuredBuffer-subscript.hlsl
Log Message:
-----------
[HLSL] update StructuredBuffer subscript test for alwaysinline (#109023)
The Alwaysinline change made the mangled form of entry points get
removed. The StructuredBuffer-subscript.hlsl test was introduced in the
meantime depending on that version of the entry point. This revises it
in the same way as RWBuffer-subscript
Follow up to #89282
Commit: 2c69a09bee94acca859a1adf5b04d01dc13f7295
https://github.com/llvm/llvm-project/commit/2c69a09bee94acca859a1adf5b04d01dc13f7295
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
Log Message:
-----------
[NFC][sanitizer] Move ThreadDescriptorSize into GLIBC/FREEBSD block (#108913)
Commit: 270b2b588470237729dfd3b6013fe95adfe41480
https://github.com/llvm/llvm-project/commit/270b2b588470237729dfd3b6013fe95adfe41480
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-17 (Tue, 17 Sep 2024)
Changed paths:
M bolt/test/lit.local.cfg
M clang-tools-extra/clang-tidy/bugprone/ForwardingReferenceOverloadCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/SizeofExpressionCheck.h
M clang-tools-extra/clang-tidy/cert/CERTTidyModule.cpp
M clang-tools-extra/clang-tidy/misc/DefinitionsInHeadersCheck.cpp
M clang-tools-extra/clang-tidy/modernize/MinMaxUseInitializerListCheck.cpp
M clang-tools-extra/clang-tidy/readability/EnumInitialValueCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/sizeof-expression.rst
A clang-tools-extra/docs/clang-tidy/checks/cert/arr39-c.rst
M clang-tools-extra/docs/clang-tidy/checks/list.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-format.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-std-print.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/forwarding-reference-overload.cpp
R clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-2.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics-c11.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression-pointer-arithmetics.c
A clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.c
M clang-tools-extra/test/clang-tidy/checkers/bugprone/sizeof-expression.cpp
M clang-tools-extra/test/clang-tidy/checkers/cppcoreguidelines/prefer-member-initializer.cpp
M clang-tools-extra/test/clang-tidy/checkers/misc/definitions-in-headers.hpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/min-max-use-initializer-list.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.c
M clang-tools-extra/test/clang-tidy/checkers/readability/enum-initial-value.cpp
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/AMDGPUTypes.def
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/ASTMatchers/ASTMatchFinder.cpp
M clang/lib/Basic/Targets/AArch64.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/Driver/ToolChains/PS4CPU.h
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/ByteCode/cxx20.cpp
A clang/test/AST/ByteCode/extern.cpp
M clang/test/AST/ByteCode/shifts.cpp
M clang/test/CodeGenHLSL/GlobalConstructorFunction.hlsl
M clang/test/CodeGenHLSL/GlobalConstructorLib.hlsl
M clang/test/CodeGenHLSL/GlobalDestructors.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-constructor.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-subscript.hlsl
M clang/test/CodeGenHLSL/builtins/StructuredBuffer-subscript.hlsl
A clang/test/CodeGenHLSL/inline-constructors.hlsl
A clang/test/CodeGenHLSL/inline-functions.hlsl
M clang/test/Driver/ps4-linker.c
M clang/test/Driver/ps4-ps5-header-search.c
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-linker.c
M clang/test/Driver/ps5-sdk-root.c
M clang/test/Preprocessor/aarch64-target-features.c
M clang/test/Preprocessor/init-aarch64.c
M clang/test/SemaCXX/constant-expression-cxx11.cpp
M clang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M clang/www/cxx_status.html
M clang/www/make_cxx_dr_status
M compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/dump-parse-tree.h
M flang/lib/Evaluate/formatting.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/pointer-assignment.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/scope.cpp
M flang/lib/Semantics/tools.cpp
M flang/lib/Semantics/type.cpp
A flang/test/Semantics/OpenMP/private-assoc.f90
M flang/test/Transforms/debug-assumed-size-array.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/unittests/Evaluate/real.cpp
M flang/unittests/Frontend/CodeGenActionTest.cpp
M flang/unittests/Frontend/CompilerInstanceTest.cpp
M libc/benchmarks/MemorySizeDistributions.cpp
M libc/benchmarks/automemcpy/unittests/CodeGenTest.cpp
M libc/docs/date_and_time.rst
M libcxx/docs/Contributing.rst
M libcxx/docs/Status/Cxx20Papers.csv
M libcxx/include/__algorithm/mismatch.h
M libcxx/include/__algorithm/simd_utils.h
M libcxx/include/__assert
M libcxx/include/__locale_dir/locale_base_api/ibm.h
M libcxx/include/__support/xlocale/__nop_locale_mgmt.h
M libcxx/src/atomic.cpp
M libcxx/src/locale.cpp
M libcxx/src/support/ibm/mbsnrtowcs.cpp
M libcxx/src/support/ibm/wcsnrtombs.cpp
M libcxx/src/support/ibm/xlocale_zos.cpp
M libcxx/src/support/win32/support.cpp
M libcxx/src/support/win32/thread_win32.cpp
M libcxx/utils/synchronize_csv_status_files.py
M lld/COFF/DLL.cpp
M lld/COFF/DLL.h
M lld/COFF/Driver.cpp
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/Writer.cpp
M lld/test/COFF/Inputs/loadconfig-arm64ec.s
M lld/test/COFF/arm64ec-import.test
M lldb/source/Plugins/Trace/intel-pt/CommandObjectTraceStartIntelPT.cpp
M lldb/test/API/tools/lldb-dap/memory/TestDAP_memory.py
M lldb/test/API/tools/lldb-dap/memory/main.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/GlobalISel/GenericOpcode.rst
M llvm/docs/RISCVUsage.rst
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/VirtRegMap.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/Target/GenericOpcodes.td
M llvm/include/llvm/Target/GlobalISel/Combine.td
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelperCompares.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/MachineVerifier.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/Support/FormatVariadic.cpp
M llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
M llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
M llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
M llvm/lib/Target/DirectX/CMakeLists.txt
A llvm/lib/Target/DirectX/DirectXTargetTransformInfo.cpp
M llvm/lib/Target/DirectX/DirectXTargetTransformInfo.h
M llvm/lib/Target/RISCV/CMakeLists.txt
A llvm/lib/Target/RISCV/GISel/RISCVPostLegalizerLowering.cpp
M llvm/lib/Target/RISCV/RISCV.h
M llvm/lib/Target/RISCV/RISCV.td
M llvm/lib/Target/RISCV/RISCVCombine.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVProcessors.td
A llvm/lib/Target/RISCV/RISCVSchedSyntacoreSCR7.td
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/X86/X86DomainReassignment.cpp
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrVecCompiler.td
M llvm/lib/Target/X86/X86SchedIceLake.td
M llvm/lib/Target/X86/X86SchedSapphireRapids.td
M llvm/lib/Target/X86/X86SchedSkylakeServer.td
M llvm/lib/Target/X86/X86ScheduleZnver4.td
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerBinaryMetadata.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Scalar/IndVarSimplify.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
A llvm/test/Analysis/CostModel/AArch64/extract_float.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-extractelement.ll
M llvm/test/Analysis/CostModel/RISCV/rvv-insertelement.ll
A llvm/test/Analysis/ValueTracking/recurrence-knownbits.ll
R llvm/test/Analysis/ValueTracking/shift-recurrence-knownbits.ll
A llvm/test/CodeGen/AArch64/GlobalISel/combine-cannonicalize-fcmp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/aarch64-sve2-faminmax.ll
M llvm/test/CodeGen/AArch64/addsub-24bit-imm.mir
M llvm/test/CodeGen/AArch64/arm64-bitfield-extract.ll
M llvm/test/CodeGen/AArch64/arm64-ld-from-st.ll
M llvm/test/CodeGen/AArch64/arm64_32.ll
M llvm/test/CodeGen/AArch64/bitfield-extract.ll
M llvm/test/CodeGen/AArch64/fast-isel-int-ext3.ll
M llvm/test/CodeGen/AArch64/fast-isel-shift.ll
M llvm/test/CodeGen/AArch64/machine_cse_impdef_killflags.ll
M llvm/test/CodeGen/AArch64/trunc-to-tbl.ll
A llvm/test/CodeGen/AArch64/vecreduce-bitext.ll
M llvm/test/CodeGen/AArch64/xbfiz.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/fdiv_flags.f32.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/DirectX/frac.ll
M llvm/test/CodeGen/DirectX/llc-pipeline.ll
M llvm/test/CodeGen/DirectX/rsqrt.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/RISCV/GlobalISel/gisel-commandline-option.ll
M llvm/test/CodeGen/RISCV/compress-opt-select.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/rvv/vfwadd-vp.ll
M llvm/test/CodeGen/Thumb2/pr52817.ll
M llvm/test/CodeGen/X86/any_extend_vector_inreg_of_broadcast.ll
M llvm/test/CodeGen/X86/apx/domain-reassignment.mir
M llvm/test/CodeGen/X86/avx512-shuffles/partial_permute.ll
M llvm/test/CodeGen/X86/domain-reassignment.mir
M llvm/test/CodeGen/X86/fsafdo_test1.ll
M llvm/test/CodeGen/X86/fsafdo_test4.ll
M llvm/test/CodeGen/X86/masked_compressstore_isel.ll
M llvm/test/CodeGen/X86/masked_expandload_isel.ll
M llvm/test/CodeGen/X86/pseudo_cmov_lower2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-reduce-add-mask.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg.ll
M llvm/test/CodeGen/X86/zero_extend_vector_inreg_of_broadcast.ll
M llvm/test/DebugInfo/MIR/X86/empty-inline.mir
M llvm/test/DebugInfo/X86/discriminator.ll
M llvm/test/DebugInfo/X86/empty-line-info.ll
R llvm/test/DebugInfo/X86/is_stmt-at-block-start.ll
A llvm/test/Instrumentation/sanitizers-naked.ll
M llvm/test/MachineVerifier/test_g_extract_subvector.mir
M llvm/test/Transforms/InstCombine/assume-align.ll
A llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-bf16.ll
A llvm/test/Transforms/LoopVectorize/RISCV/reg-usage-f16.ll
M llvm/test/Transforms/LoopVectorize/X86/fixed-order-recurrence.ll
M llvm/test/Transforms/LoopVectorize/first-order-recurrence-multiply-recurrences.ll
M llvm/test/Transforms/SimplifyCFG/X86/hoist-loads-stores-with-cf.ll
A llvm/test/Transforms/SimplifyCFG/patchpoint-invalid-sink.ll
M llvm/test/Transforms/SimplifyCFG/sink-and-convert-switch.ll
M llvm/test/Verifier/intrinsic-immarg.ll
A llvm/test/tools/llvm-mca/RISCV/SyntacoreSCR/SCR7-ALU.s
A llvm/test/tools/llvm-mca/RISCV/SyntacoreSCR/SCR7-FPALU_D.s
A llvm/test/tools/llvm-mca/RISCV/SyntacoreSCR/SCR7-FPALU_S.s
A llvm/test/tools/llvm-mca/RISCV/SyntacoreSCR/SCR7-LSU.s
M llvm/tools/llvm-as/llvm-as.cpp
M llvm/tools/llvm-cat/llvm-cat.cpp
M llvm/unittests/CodeGen/GlobalISel/MachineIRBuilderTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/unittests/Support/FormatVariadicTest.cpp
M llvm/utils/TableGen/ARMTargetDefEmitter.cpp
M llvm/utils/TableGen/Common/VarLenCodeEmitterGen.cpp
M llvm/utils/TableGen/Common/VarLenCodeEmitterGen.h
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/gn/secondary/lld/test/BUILD.gn
M mlir/docs/Dialects/OpenMPDialect/_index.md
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/lib/Dialect/MLProgram/Transforms/PipelineGlobalOps.cpp
M mlir/lib/Dialect/PDL/IR/PDL.cpp
M mlir/lib/Dialect/SCF/Transforms/ForallToFor.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
M mlir/lib/Dialect/Shape/Transforms/OutlineShapeComputation.cpp
M mlir/test/Conversion/GPUToNVVM/gpu-to-nvvm.mlir
M polly/lib/Analysis/ScopDetectionDiagnostic.cpp
M polly/lib/Analysis/ScopInfo.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/Exchange/JSONExporter.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_configure_options.bzl
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.4
[skip ci]
Compare: https://github.com/llvm/llvm-project/compare/28b3ccb28062...270b2b588470
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