[all-commits] [llvm/llvm-project] a36632: [RISCV][GISel] Restore s32 support for G_ABS on RV64.

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a366323c8db13616d6eaa603c0ab3895acaea669
      https://github.com/llvm/llvm-project/commit/a366323c8db13616d6eaa603c0ab3895acaea669
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-16 (Mon, 16 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/iabs.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-abs-rv64.mir

  Log Message:
  -----------
  [RISCV][GISel] Restore s32 support for G_ABS on RV64.

This reverts commit 5e6a1987a5d4574d3c3811f878ddbbbf7c35fa01.

I was was plannig to remove s32 as a legal type on RV64, but
I'm rethinking that.


  Commit: f022111e640f10f5f5e879c1dd585ddd0a40acf3
      https://github.com/llvm/llvm-project/commit/f022111e640f10f5f5e879c1dd585ddd0a40acf3
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-16 (Mon, 16 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
    M llvm/test/CodeGen/RISCV/GlobalISel/alu-roundtrip.ll
    M llvm/test/CodeGen/RISCV/GlobalISel/instruction-select/alu_m-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-div-rv64.mir
    M llvm/test/CodeGen/RISCV/GlobalISel/legalizer/legalize-rem-rv64.mir

  Log Message:
  -----------
  [RISCV][GISel] Restore s32 support on RV64 for DIV, and REM.

This reverts commit 2599d695128381e6932b43f0e95649c533308d6d.

I was was plannig to remove s32 as a legal type on RV64, but
I'm rethinking that.


Compare: https://github.com/llvm/llvm-project/compare/bffb26f1531e...f022111e640f

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