[all-commits] [llvm/llvm-project] 375517: [RFC] IR: Define noalias.addrspace metadata

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/noalias-addrspace-metadata
  Home:   https://github.com/llvm/llvm-project
  Commit: 3755175d37abb81dafd5b041d9594d22375e4b78
      https://github.com/llvm/llvm-project/commit/3755175d37abb81dafd5b041d9594d22375e4b78
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-09-15 (Sun, 15 Sep 2024)

  Changed paths:
    M llvm/docs/LangRef.rst
    M llvm/docs/ReleaseNotes.rst
    M llvm/include/llvm/IR/FixedMetadataKinds.def
    M llvm/lib/IR/Verifier.cpp
    A llvm/test/Assembler/noalias-addrspace-md.ll
    A llvm/test/Verifier/noalias-addrspace.ll

  Log Message:
  -----------
  [RFC] IR: Define noalias.addrspace metadata

This is intended to solve a problem with lowering atomics in
OpenMP and C++ common to AMDGPU and NVPTX.

In OpenCL and CUDA, it is undefined behavior for an atomic instruction
to modify an object in thread private memory. In OpenMP, it is defined.
Correspondingly, the hardware does not handle this correctly. For AMDGPU,
32-bit atomics work and 64-bit atomics are silently dropped. We therefore
need to codegen this by inserting a runtime address space check, performing
the private case without atomics, and fallback to issuing the real atomic
otherwise. This metadata allows us to avoid this extra check and branch.

Handle this by introducing metadata intended to be applied to atomicrmw,
indicating they cannot access the forbidden address space.


  Commit: 9c8cf990656873a78a46aeeb4dd9bbd4e9baaedb
      https://github.com/llvm/llvm-project/commit/9c8cf990656873a78a46aeeb4dd9bbd4e9baaedb
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-09-15 (Sun, 15 Sep 2024)

  Changed paths:
    M llvm/lib/IR/Verifier.cpp

  Log Message:
  -----------
  Use enum for range like metadata kinds


  Commit: 4c3aa097956e85d0e083d31817917afd512ea8f2
      https://github.com/llvm/llvm-project/commit/4c3aa097956e85d0e083d31817917afd512ea8f2
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-09-15 (Sun, 15 Sep 2024)

  Changed paths:
    M llvm/docs/LangRef.rst

  Log Message:
  -----------
  Fix doc build


  Commit: 9bed16c3f0084a2810df9e5d456547f33743e67b
      https://github.com/llvm/llvm-project/commit/9bed16c3f0084a2810df9e5d456547f33743e67b
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-09-15 (Sun, 15 Sep 2024)

  Changed paths:
    M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
    M llvm/test/Transforms/SimplifyCFG/hoist-with-metadata.ll

  Log Message:
  -----------
  Add baseline tests for some optimization handling


  Commit: b6a59fc98f502a763ef4161610d51a5c63d570fe
      https://github.com/llvm/llvm-project/commit/b6a59fc98f502a763ef4161610d51a5c63d570fe
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-09-15 (Sun, 15 Sep 2024)

  Changed paths:
    M llvm/docs/LangRef.rst

  Log Message:
  -----------
  Add another comment


  Commit: 79e1e8bdff47016f500445c3f0d669725ea93216
      https://github.com/llvm/llvm-project/commit/79e1e8bdff47016f500445c3f0d669725ea93216
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2024-09-15 (Sun, 15 Sep 2024)

  Changed paths:
    M llvm/docs/LangRef.rst

  Log Message:
  -----------
  Reword langref slightly


Compare: https://github.com/llvm/llvm-project/compare/c3dbcec29379...79e1e8bdff47

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