[all-commits] [llvm/llvm-project] e42f47: Reland "[NVPTX] Support copysign PTX instruction" ...

[Alex MacLean via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: e42f4734c61ac139eba6f880e204c5231b431b9b
      https://github.com/llvm/llvm-project/commit/e42f4734c61ac139eba6f880e204c5231b431b9b
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2024-09-12 (Thu, 12 Sep 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.h
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    A llvm/test/CodeGen/NVPTX/copysign.ll
    M llvm/test/CodeGen/NVPTX/math-intrins.ll

  Log Message:
  -----------
  Reland "[NVPTX] Support copysign PTX instruction" (#108125)

Lower `fcopysign` SDNodes into `copysign` PTX instructions where
possible. See [PTX ISA: 9.7.3.2. Floating Point Instructions: copysign]
(https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#floating-point-instructions-copysign).

Copysign SDNodes with mismatched types are expanded as before, since the
PTX instruction requires the types to match.



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