[all-commits] [llvm/llvm-project] ba4bcc: [GlobalIsel] Combine trunc of binop (#107721)

[Thorsten Schütt via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: ba4bcce5f5ffa9e7d4af72c20fe4f1baf97075fc
      https://github.com/llvm/llvm-project/commit/ba4bcce5f5ffa9e7d4af72c20fe4f1baf97075fc
  Author: Thorsten Schütt <schuett at gmail.com>
  Date:   2024-09-11 (Wed, 11 Sep 2024)

  Changed paths:
    M llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
    M llvm/include/llvm/Target/GlobalISel/Combine.td
    M llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/combine-narrow-binop.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/inline-memset.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-divrem-insertpt-conflict.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-itofp.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-zext-trunc.mir
    M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fshr.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
    M llvm/test/CodeGen/AMDGPU/constrained-shift.ll
    M llvm/test/CodeGen/AMDGPU/ctlz.ll

  Log Message:
  -----------
  [GlobalIsel] Combine trunc of binop (#107721)

trunc (binop X, C) --> binop (trunc X, trunc C)  --> binop (trunc X, C`)

Try to narrow the width of math or bitwise logic instructions by pulling
a truncate ahead of binary operators.

Vx and Nx cores consider 32-bit and 64-bit basic arithmetic equal in
costs.



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