[all-commits] [llvm/llvm-project] 5537ae: [RISCV] Fix fneg.d/fabs.d aliasing handling for Zd...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 5537ae87b3a87b3abeb4e6983cecd9b103648243
      https://github.com/llvm/llvm-project/commit/5537ae87b3a87b3abeb4e6983cecd9b103648243
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-10 (Tue, 10 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoD.td
    M llvm/lib/Target/RISCV/RISCVInstrInfoF.td
    M llvm/test/MC/RISCV/rv32zdinx-invalid.s
    M llvm/test/MC/RISCV/rv32zfinx-invalid.s
    M llvm/test/MC/RISCV/rvzdinx-aliases-valid.s
    M llvm/test/MC/RISCV/rvzfinx-aliases-valid.s
    M llvm/test/MC/RISCV/rvzhinx-aliases-valid.s

  Log Message:
  -----------
  [RISCV] Fix fneg.d/fabs.d aliasing handling for Zdinx. Add missing fmv.s/d aliases.

We were missing test coverage for fneg.d/fabs.d for Zdinx. When I
added it revealed it only worked on RV64. The assembler was not
creating a GPRPair register class on RV32 so the alias couldn't match.
The disassembler was also not using GPRPair registers preventing the
aliases from printing in disassembly too.

I've fixed the assembler by adding new parsing methods in an attempt
to get decent diagnostics. This is hard since the mnemonics are
ambiguous between D and Zdinx. Tests have been adjusted for some
differences in what errors are reported first.



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