[all-commits] [llvm/llvm-project] 14b435: [RISCV] Separate more of scalar FP in CC_RISCV. NF...

Craig Topper via All-commits all-commits at lists.llvm.org
Tue Sep 10 09:29:26 PDT 2024


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 14b43563d1618c71385f3ac15a475adf9d0ef5f9
      https://github.com/llvm/llvm-project/commit/14b43563d1618c71385f3ac15a475adf9d0ef5f9
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-10 (Tue, 10 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVCallingConv.cpp

  Log Message:
  -----------
  [RISCV] Separate more of scalar FP in CC_RISCV. NFC (#107908)

Scalar FP calling convention has gotten more complicated with recent
changes to Zfinx/Zdinx, proposed addition of a GPRF16 register class,
and using customReg for f16/bf16 and other FP types small than XLen.

The previous code tried to share a single getReg and getMem call for
many different cases. This patch separates all the FP register handling
to the top of the function with their own getReg calls. The only
exception is f64 with XLen==32, when we are out of FPRs or not able to
use FPRs due to ABI.

The way I've structured this, we no longer need to correct the LocVT for
FP back to ValVT before the call to getMem.



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