[all-commits] [llvm/llvm-project] 26b786: [NVPTX] Restrict combining to properly aligned v16...

[Artem Belevich via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 26b786ae2f15bfbf6f0925856a788ae0bfb2f8c1
      https://github.com/llvm/llvm-project/commit/26b786ae2f15bfbf6f0925856a788ae0bfb2f8c1
  Author: Artem Belevich <tra at google.com>
  Date:   2024-09-09 (Mon, 09 Sep 2024)

  Changed paths:
    M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
    M llvm/test/CodeGen/NVPTX/LoadStoreVectorizer.ll

  Log Message:
  -----------
  [NVPTX] Restrict combining to properly aligned v16i8 vectors. (#107919)

Fixes generation of invalid loads leading to misaligned access errors.
The bug got exposed by SLP vectorizer change ec360d6 which allowed SLP
to produce `v16i8` vectors.

Also updated the tests to use automatic check generator.



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