[all-commits] [llvm/llvm-project] 49660e: [RISCV] Pass f32/f64 directly without a bitcast fo...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 49660e5565a3b4f1ec29d6c95b6d6576d398eaf1
      https://github.com/llvm/llvm-project/commit/49660e5565a3b4f1ec29d6c95b6d6576d398eaf1
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-06 (Fri, 06 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVCallingConv.cpp
    M llvm/test/CodeGen/RISCV/double-arith.ll
    M llvm/test/CodeGen/RISCV/double-bitmanip-dagcombines.ll
    M llvm/test/CodeGen/RISCV/double-imm.ll
    M llvm/test/CodeGen/RISCV/double-intrinsics.ll
    M llvm/test/CodeGen/RISCV/fastcc-without-f-reg.ll
    M llvm/test/CodeGen/RISCV/float-arith.ll
    M llvm/test/CodeGen/RISCV/float-bitmanip-dagcombines.ll
    M llvm/test/CodeGen/RISCV/float-intrinsics.ll
    M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
    M llvm/test/CodeGen/RISCV/half-convert.ll
    M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll

  Log Message:
  -----------
  [RISCV] Pass f32/f64 directly without a bitcast for Zfinx/Zdinx. (#107464)

With Zfinx/Zdinx, f32/f64 are legal types for a GPR, we don't need a
bitcast.

This avoids turning fneg/fabs into bitwise operations purely because of
these bitcasts. If the bitwise operations are faster for some reason on
a Zfinx CPU, then that seems like it should be done for all fneg/fabs,
not just ones near function arguments/returns.

I don't have much interest in Zfinx, this just makes the code more
similar to what I proposed for Zhinx in #107446.



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