[all-commits] [llvm/llvm-project] dd5d73: [lldb] Better matching of types in anonymous names...
wanglei via All-commits
all-commits at lists.llvm.org
Fri Sep 6 00:46:40 PDT 2024
Branch: refs/heads/users/wangleiat/spr/loongarch-legalize-isdctpop-for-grlenvt-type-with-lsx
Home: https://github.com/llvm/llvm-project
Commit: dd5d73007240712957f2b633f795d9965afaadd6
https://github.com/llvm/llvm-project/commit/dd5d73007240712957f2b633f795d9965afaadd6
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M lldb/include/lldb/Symbol/Type.h
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABI/ItaniumABILanguageRuntime.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Symbol/Type.cpp
M lldb/test/API/lang/cpp/dynamic-value/Makefile
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
A lldb/test/API/lang/cpp/dynamic-value/a.h
A lldb/test/API/lang/cpp/dynamic-value/anonymous-b.cpp
M lldb/test/API/lang/cpp/dynamic-value/pass-to-base.cpp
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/unittests/Symbol/TestType.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
Log Message:
-----------
[lldb] Better matching of types in anonymous namespaces (#102111)
This patch extends TypeQuery matching to support anonymous namespaces. A
new flag is added to control the behavior. In the "strict" mode, the
query must match the type exactly -- all anonymous namespaces included.
The dynamic type resolver in the itanium abi (the motivating use case
for this) uses this flag, as it queries using the name from the
demangles, which includes anonymous namespaces.
This ensures we don't confuse a type with a same-named type in an
anonymous namespace. However, this does *not* ensure we don't confuse
two types in anonymous namespacs (in different CUs). To resolve this, we
would need to use a completely different lookup algorithm, which
probably also requires a DWARF extension.
In the "lax" mode (the default), the anonymous namespaces in the query
are optional, and this allows one search for the type using the usual
language rules (`::A` matches `::(anonymous namespace)::A`).
This patch also changes the type context computation algorithm in
DWARFDIE, so that it includes anonymous namespace information. This
causes a slight change in behavior: the algorithm previously stopped
computing the context after encountering an anonymous namespace, which
caused the outer namespaces to be ignored. This meant that a type like
`NS::(anonymous namespace)::A` would be (incorrectly) recognized as
`::A`). This can cause code depending on the old behavior to misbehave.
The fix is to specify all the enclosing namespaces in the query, or use
a non-exact match.
Commit: d2ce9dc85e5d94e19a69d4a72e7b9197447d480a
https://github.com/llvm/llvm-project/commit/d2ce9dc85e5d94e19a69d4a72e7b9197447d480a
Author: Brad Smith <brad at comstyle.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Support/Unix/Threading.inc
Log Message:
-----------
Add support for retrieving the thread ID on DragonFly BSD (#106938)
Commit: f044564db1cbc588d0cad4f953d38f6c787dadd4
https://github.com/llvm/llvm-project/commit/f044564db1cbc588d0cad4f953d38f6c787dadd4
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
Log Message:
-----------
[InstCombine] Make backedge check in op of phi transform more precise (#106075)
The op of phi transform wants to prevent moving an operation across a
backedge, as this may lead to an infinite combine loop.
Currently, this is done using isPotentiallyReachable(). The problem with
that is that all blocks inside a loop are reachable from each other.
This means that the op of phi transform is effectively completely
disabled for code inside loops, even when it's not actually operating on
a loop phi (just a phi that happens to be in a loop).
Fix this by explicitly computing the backedges inside the function
instead. Do this via RPOT, which is a bit more efficient than using
FindFunctionBackedges() (which does it without any pre-computed
analyses).
For irreducible cycles, there may be multiple possible choices of
backedge, and this just picks one of them. This is still sufficient to
prevent combine loops.
This also removes the last use of LoopInfo in InstCombine -- I'll drop
the analysis in a followup.
Commit: c950ecb90e1945012ef3180aacbf92c994b7ee83
https://github.com/llvm/llvm-project/commit/c950ecb90e1945012ef3180aacbf92c994b7ee83
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
R llvm/test/CodeGen/RISCV/zfbfmin.ll
Log Message:
-----------
[RISCV] Remove zfbfmin.ll. NFC (#106937)
Most of it is redundant with bfloat-convert.ll. One testcase is found in
bfloat-imm.ll. The load and stores are more thoroughly tested in
bfloat-mem.ll.
Commit: cd3667d1dbc9c1db05aaf3cd5b39f33b143bd8b5
https://github.com/llvm/llvm-project/commit/cd3667d1dbc9c1db05aaf3cd5b39f33b143bd8b5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
Log Message:
-----------
[CodeGen] Update a few places that were passing Register to raw_ostream::operator<< (#106877)
These would implicitly cast the register to `unsigned`. Switch most of
them to use printReg will give a more readable output. Change some
others to use Register::id() so we can eventually remove the implicit
cast to `unsigned`.
Commit: 08a72cbd6b12b5ccffb82c657bd668938f1b42e1
https://github.com/llvm/llvm-project/commit/08a72cbd6b12b5ccffb82c657bd668938f1b42e1
Author: Lang Hames <lhames at gmail.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/include/clang/Basic/DiagnosticIDs.h
Log Message:
-----------
[clang] Bump up DIAG_SIZE_SEMA by 500 for downstream diagnostics.
Recently added HLSL diagnostics (89fb8490a99e) pushed the Swift compiler over
the existing limit.
rdar://135126738
Commit: fe1006b7f25258742173304c7c32e891be31d14e
https://github.com/llvm/llvm-project/commit/fe1006b7f25258742173304c7c32e891be31d14e
Author: pudge62 <70063806+pudge62 at users.noreply.github.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_mac.cpp
Log Message:
-----------
[TSan] fix crash when symbolize on darwin platforms (#99441)
The `dli_sname` filed in `Dl_info` may be `NULL`, which could cause a
crash
Commit: ed6d9f6d2af7da90ac089cf648a1f8b2e8e4eb10
https://github.com/llvm/llvm-project/commit/ed6d9f6d2af7da90ac089cf648a1f8b2e8e4eb10
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
A llvm/test/Transforms/CodeGenPrepare/revert-constant-ptr-propagation-on-calls.ll
Log Message:
-----------
[CGP] Introduce test for PR102926 (NFC)
Commit: e4e0dfb0c24c9bcd4bef835bd6a162967f097584
https://github.com/llvm/llvm-project/commit/e4e0dfb0c24c9bcd4bef835bd6a162967f097584
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/Transforms/CodeGenPrepare/revert-constant-ptr-propagation-on-calls.ll
Log Message:
-----------
[CGP] Undo constant propagation of pointers across calls
It may be profitable to revert SCCP propagation of C++ static values,
if such constants are pointers, in order to avoid redundant pointer
computation, since the method returning the constant is non-removable.
Commit: 30cc198c2d4ad784f18cc10a03d45a19145357af
https://github.com/llvm/llvm-project/commit/30cc198c2d4ad784f18cc10a03d45a19145357af
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
M llvm/lib/Support/APInt.cpp
M llvm/unittests/ADT/APIntTest.cpp
Log Message:
-----------
[APInt] Add default-disabled assertion to APInt constructor (#106524)
If the uint64_t constructor is used, assert that the value is actually a
signed or unsigned N-bit integer depending on whether the isSigned flag
is set. Provide an implicitTrunc flag to restore the previous behavior,
where the argument is silently truncated instead.
In this commit, implicitTrunc is enabled by default, which means that
the new assertions are disabled and no actual change in behavior occurs.
The plan is to flip the default once all places violating the assertion
have been fixed. See #80309 for the scope of the necessary changes.
The primary motivation for this change is to avoid incorrectly specified
isSigned flags. A recurring problem we have is that people write
something like `APInt(BW, -1)` and this works perfectly fine -- until
the code path is hit with `BW > 64`. Most of our i128 specific
miscompilations are caused by variants of this issue.
The cost of the change is that we have to specify the correct isSigned
flag (and make sure there are no excess bits) for uses where BW is
always <= 64 as well.
Commit: 9cf68679c4f45e79d67c94ef1f968c7c1213b610
https://github.com/llvm/llvm-project/commit/9cf68679c4f45e79d67c94ef1f968c7c1213b610
Author: Oliver Stannard <oliver.stannard at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
A llvm/test/CodeGen/ARM/atomic-64bit-fast-regalloc.ll
M llvm/test/CodeGen/ARM/atomic-load-store.ll
M llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
M llvm/test/CodeGen/ARM/cmpxchg-O0.ll
M llvm/test/CodeGen/ARM/cmpxchg.mir
M llvm/test/CodeGen/Thumb2/cmpxchg.mir
Log Message:
-----------
[ARM] Fix failure to register-allocate CMP_SWAP_64 pseudo-inst (#106721)
This test case was failing to compile with a "ran out of registers
during register allocation" error at -O0. This was because CMP_SWAP_64
has 3 operands which must be an even-odd register pair, and two other
GPR operands. All of the def operands are also early-clobber, so
registers can't be shared between uses and defs. Because the function
has an over-aligned alloca it needs frame and base pointers, so r6 and
r11 are both reserved. That leaves r0/r1, r2/r3, r4/r5 and r8/r9 as the
only valid register pairs, and if the two individual GPR operands happen
to get allocated to registers in different pairs then only 2 pairs will
be available for the three GPRPair operands.
To fix this, I've merged the two GPR operands into a single GPRPair
operand. This means that the instruction now has 4 GPRPair operands,
which can always be allocated without relying on luck. This does
constrain register allocation a bit more, but this pseudo instruction is
only used at -O0, so I don't think that's a problem.
Commit: d79c4c111952990062173f30bb83084cb2993f39
https://github.com/llvm/llvm-project/commit/d79c4c111952990062173f30bb83084cb2993f39
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/test/Transforms/CodeGenPrepare/revert-constant-ptr-propagation-on-calls.ll
Log Message:
-----------
[CGP] Regenerate `revert-constant-ptr-propagation-on-calls.ll` test (NFC)
Multiple buildbots were previously failing.
Commit: 5bd3ee0ac02880df0c4d7e89026ee8b9d8f1039e
https://github.com/llvm/llvm-project/commit/5bd3ee0ac02880df0c4d7e89026ee8b9d8f1039e
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M libcxx/test/std/language.support/cmp/cmp.alg/strong_order.pass.cpp
Log Message:
-----------
[libcxx][test] Use long double test macro in strong_order.pass.cpp (#106742)
Commit: 34b10e165d809bb133d37dfe934859800f21a100
https://github.com/llvm/llvm-project/commit/34b10e165d809bb133d37dfe934859800f21a100
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/InstCombine/InstCombine.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Other/new-pm-print-pipeline.ll
M llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
Log Message:
-----------
[InstCombine] Remove optional LoopInfo dependency
https://github.com/llvm/llvm-project/pull/106075 has removed the
last dependency on LoopInfo in InstCombine, so don't fetch the
analysis anymore and remove the use-loop-info pass option.
Commit: 0fa78b6c7bd43c2498700a98c47a02cf4fd06388
https://github.com/llvm/llvm-project/commit/0fa78b6c7bd43c2498700a98c47a02cf4fd06388
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate braces in macro definition (#106662)
Fixes #106418.
Commit: a156b5a47df58a1ac75cf67e26f557b1a4d26dc9
https://github.com/llvm/llvm-project/commit/a156b5a47df58a1ac75cf67e26f557b1a4d26dc9
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
A llvm/test/Transforms/SLPVectorizer/X86/arith-scmp.ll
A llvm/test/Transforms/SLPVectorizer/X86/arith-ucmp.ll
Log Message:
-----------
[SLP] Add vectorization support for [u|s]cmp (#106747)
This patch adds vectorization support for [u|s]cmp intrinsic calls.
Commit: a0a253181e3eb2e7173a37b043b82325c7cddd67
https://github.com/llvm/llvm-project/commit/a0a253181e3eb2e7173a37b043b82325c7cddd67
Author: Alastair Houghton <ahoughton at apple.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
Log Message:
-----------
[RuntimeDyld][Windows] Allocate space for dllimport things. (#102586)
We weren't taking account of the space we require in the stubs for
things that are dllimported, and as a result we could hit the assertion
failure for running out of stub space. Fix that.
rdar://133473673
---------
Co-authored-by: Saleem Abdulrasool <compnerd at compnerd.org>
Co-authored-by: Lang Hames <lhames at gmail.com>
Co-authored-by: Ben Barham <b.n.barham at gmail.com>
Commit: cde3838c430502620cb4c1663e843e465c6e67b5
https://github.com/llvm/llvm-project/commit/cde3838c430502620cb4c1663e843e465c6e67b5
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
Log Message:
-----------
[flang][runtime] long double isn't always f80 (#106746)
f80 is only a thing on x86, and even then the size of long double can be
changed with compiler flags. Instead set the size according to the host
system (this is what is already done for integer types).
Commit: eaea4d15acd4cab92e6287d692d2652066c3368a
https://github.com/llvm/llvm-project/commit/eaea4d15acd4cab92e6287d692d2652066c3368a
Author: c8ef <c8ef at outlook.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/builtins.cpp
Log Message:
-----------
[clang] The ms-extension __noop should return zero in a constexpr context. (#106849)
Fixes #106713.
Commit: 87d904871fe96a01dfa1f254ca2a7639de67960c
https://github.com/llvm/llvm-project/commit/87d904871fe96a01dfa1f254ca2a7639de67960c
Author: Alastair Houghton <ahoughton at apple.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
Log Message:
-----------
Revert "[RuntimeDyld][Windows] Allocate space for dllimport things." (#106954)
Looks like I missed an `override` (maybe that warning was enabled recently?). Will revert and fix.
Reverts llvm/llvm-project#102586
Commit: 24fe1d4fd61983277c8061ce591970bc775a0fb5
https://github.com/llvm/llvm-project/commit/24fe1d4fd61983277c8061ce591970bc775a0fb5
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/test/CodeGen/attr-counted-by.c
M llvm/include/llvm/Transforms/Utils/SCCPSolver.h
M llvm/lib/Transforms/IPO/SCCP.cpp
M llvm/lib/Transforms/Scalar/SCCP.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/test/Transforms/PhaseOrdering/icmp-ashr-breaking-select-idiom.ll
M llvm/test/Transforms/SCCP/exact-flags.ll
M llvm/test/Transforms/SCCP/phis.ll
M llvm/test/Transforms/SCCP/pointer-nonnull.ll
Log Message:
-----------
[SCCP] Infer return attributes in SCCP as well (#106732)
We can infer the range/nonnull attributes in non-interprocedural SCCP as
well. The results may be better after the function has been simplified.
Commit: d7100111f41ca314c094987d880d1648b78256af
https://github.com/llvm/llvm-project/commit/d7100111f41ca314c094987d880d1648b78256af
Author: Brad Smith <brad at comstyle.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Support/Unix/Threading.inc
Log Message:
-----------
[llvm][Support] Adjust maximum thread name length to the right value for OpenBSD (#106956)
The thread name length is derived from _MAXCOMLEN which is 24.
Commit: b9bba6ca9fc62c5ae3ee402196b11a523a500fdc
https://github.com/llvm/llvm-project/commit/b9bba6ca9fc62c5ae3ee402196b11a523a500fdc
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/test/Analysis/BasicAA/gep-nuw-alias.ll
Log Message:
-----------
[BasicAA] Track nuw through decomposed expressions (#106512)
When we decompose the GEP offset expression, and the arithmetic is not
performed using nuw operations, we cannot retain the nuw flag on the
decomposed GEP.
For example, if we have `gep nuw p, (a-1)`, this is not at all the same
as `gep nuw (gep nuw p, a), -1`.
Fix this by tracking NUW through linear expression decomposition,
similarly to what we already do for the NSW flag.
This fixes the miscompilation reported in
https://github.com/llvm/llvm-project/pull/105496#issuecomment-2315322220.
Commit: c42512436b23ab50e7637f239abe8371407104a1
https://github.com/llvm/llvm-project/commit/c42512436b23ab50e7637f239abe8371407104a1
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/lib/Conversion/ArithToArmSME/ArithToArmSME.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/test/Conversion/ArithToArmSME/arith-to-arm-sme.mlir
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir
M mlir/test/Conversion/VectorToArmSME/vector-to-arm-sme.mlir
M mlir/test/Dialect/ArmSME/invalid.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
M mlir/test/Dialect/ArmSME/tile-allocation-copies.mlir
M mlir/test/Dialect/ArmSME/tile-allocation-liveness.mlir
Log Message:
-----------
[mlir][ArmSME] Rename slice move operations to insert/extract_tile_slice (#106755)
This renames:
- `arm_sme.move_tile_slice_to_vector` to `arm_sme.extract_tile_slice`
- `arm_sme.move_vector_to_tile_slice` to `arm_sme.insert_tile_slice`
The new names are more consistent with the rest of MLIR and should be
easier to understand. The current names (to me personally) are hard to
parse and easy to mix up when skimming through code.
Additionally, the syntax for `insert_tile_slice` has changed from:
```mlir
%4 = arm_sme.insert_tile_slice %0, %1, %2
: vector<[16]xi8> into vector<[16]x[16]xi8>
```
To:
```mlir
%4 = arm_sme.insert_tile_slice %0, %1[%2]
: vector<[16]xi8> into vector<[16]x[16]xi8>
```
This is for consistency with `extract_tile_slice`, but also helps with
readability as it makes it clear which operand is the index.
Commit: 1e65b765879fb39214b28d96e3305fa3599581db
https://github.com/llvm/llvm-project/commit/1e65b765879fb39214b28d96e3305fa3599581db
Author: Brad Smith <brad at comstyle.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/cmake/config-ix.cmake
M llvm/include/llvm/Config/config.h.cmake
M llvm/lib/Support/Unix/Threading.inc
Log Message:
-----------
[llvm][Support] Add support for thread naming under DragonFly BSD and Solaris/illumos (#106944)
Commit: 751975530e1041e5a8fb12cf57d5378c058d6d93
https://github.com/llvm/llvm-project/commit/751975530e1041e5a8fb12cf57d5378c058d6d93
Author: Tobias Gysi <tobias.gysi at nextsilicon.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/test/CAPI/llvm.c
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
Log Message:
-----------
Reapply "[MLIR][LLVM] Make DISubprogramAttr cyclic" (#106571) with fixes (#106947)
This reverts commit fa93be4, restoring
commit d884b77, with fixes that ensure the CAPI declarations are
exported properly.
This commit implements LLVM_DIRecursiveTypeAttrInterface for the
DISubprogramAttr to ensure cyclic subprograms can be imported properly.
In the process multiple shortcuts around the recently introduced
DIImportedEntityAttr can be removed.
Commit: 5dcea4628d7206d4351101850655356d4a8fc24a
https://github.com/llvm/llvm-project/commit/5dcea4628d7206d4351101850655356d4a8fc24a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
A llvm/test/Bitcode/intrinsics-struct-upgrade-attributes.ll
Log Message:
-----------
[AutoUpgrade] Preserve attributes when upgrading named struct return
For example, if the argument has an alignment attribute, preserve it.
Commit: 25f87f2d703178bb4bc13a62cb3df001b186cba2
https://github.com/llvm/llvm-project/commit/25f87f2d703178bb4bc13a62cb3df001b186cba2
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/TypeFinder.cpp
A llvm/test/DebugInfo/type-finder-w-dbg-records.ll
Log Message:
-----------
[DebugInfo][RemoveDIs] Find types hidden in DbgRecords (#106547)
When serialising to textual IR, there can be constant Values referred to
by DbgRecords that don't appear anywhere else, and have types hidden
even deeper in side them. Enumerate these when enumerating all types.
Test by Mikael Holmén.
Commit: f79722b932ce40edf2937f3b9386e6fb43757bce
https://github.com/llvm/llvm-project/commit/f79722b932ce40edf2937f3b9386e6fb43757bce
Author: Timm Bäder <tbaeder at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/test/AST/ByteCode/references.cpp
Log Message:
-----------
[clang][bytecode][NFC] Move test case to -verify=both style
Commit: f19dff1b80172ff5628bb9ecef760c65f78ba0d9
https://github.com/llvm/llvm-project/commit/f19dff1b80172ff5628bb9ecef760c65f78ba0d9
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/test/CodeGen/X86/scmp.ll
M llvm/test/CodeGen/X86/ucmp.ll
Log Message:
-----------
[X86] scmp/ucmp - add SSE42/AVX2/AVX512 test coverage to show current state of vector legalization/lowering
Commit: a9c71d36655bd188521c74ce7834983e8c2a86cc
https://github.com/llvm/llvm-project/commit/a9c71d36655bd188521c74ce7834983e8c2a86cc
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
Log Message:
-----------
[mlir][vector] Add more tests for ConvertVectorToLLVM (5/n) (#106510)
Commit: e90b21959a95df9a31056ec7fd6be9881cc63b95
https://github.com/llvm/llvm-project/commit/e90b21959a95df9a31056ec7fd6be9881cc63b95
Author: Christian Sigg <csigg at google.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
[llvm][bazel] Port 1e65b76 to bazel.
https://github.com/llvm/llvm-project/commit/1e65b765879fb39214b28d96e3305fa3599581db
Commit: bdfd7804902b92f53ace85afb96bc54054d03f9c
https://github.com/llvm/llvm-project/commit/bdfd7804902b92f53ace85afb96bc54054d03f9c
Author: Alastair Houghton <ahoughton at apple.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
Log Message:
-----------
[RuntimeDyld][Windows] Allocate space for dllimport things. (#106958)
We weren't taking account of the space we require in the stubs for
things that are dllimported, and as a result we could hit the assertion
failure for running out of stub space. Fix that.
Also add a couple of `override` specifiers that were missing last time
(#102586).
rdar://133473673
Commit: 4ed90920a84272a4e1737db9bdd50d57cade3cf4
https://github.com/llvm/llvm-project/commit/4ed90920a84272a4e1737db9bdd50d57cade3cf4
Author: Roger Ferrer Ibáñez <rofirrim at gmail.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M flang/lib/Lower/Mangler.cpp
A flang/test/Lower/module-generic-with-specific-mangling.f90
Log Message:
-----------
[Flang][Lower] Handle mangling of a generic name with a homonym specific procedure (#106693)
This may happen when using modules.
Fixes #93707
Commit: f838d6b1b2d84d3149685c3a3896dc82889563f7
https://github.com/llvm/llvm-project/commit/f838d6b1b2d84d3149685c3a3896dc82889563f7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/ms.cpp
Log Message:
-----------
[clang][bytecode] Implement __noop (#106714)
This does nothing and returns 0.
Commit: a9006bffa994d5afe9ad0b661b69d655658ab5e8
https://github.com/llvm/llvm-project/commit/a9006bffa994d5afe9ad0b661b69d655658ab5e8
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/SemaObjC/non-trivial-c-union.m
Log Message:
-----------
[clang][bytecode] Fix zero-init of first union member (#106962)
... if done via a ImplicitValueInitExpr.
We were already doing this later in visitZeroRecordInitializer().
Commit: 224112f8334f944ecb354bff8d57d85274037b85
https://github.com/llvm/llvm-project/commit/224112f8334f944ecb354bff8d57d85274037b85
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/test/CodeGen/ARM/arm-vld1.ll
Log Message:
-----------
[ARM] Regenerate test checks (NFC)
Commit: 60ed1043d76554a48f66fc0c15fb97ac8b3af7b0
https://github.com/llvm/llvm-project/commit/60ed1043d76554a48f66fc0c15fb97ac8b3af7b0
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
Log Message:
-----------
[include-cleaner] Report refs for enum constants used through namespace aliases (#106706)
Commit: 8b2ad5c8f18096c8ef25d77906391b7c09342137
https://github.com/llvm/llvm-project/commit/8b2ad5c8f18096c8ef25d77906391b7c09342137
Author: Marius Brehler <marius.brehler at amd.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/test/Target/Cpp/common-cpp.mlir
Log Message:
-----------
[mlir][EmitC] Remove restrictions on include op (#106953)
An `emitc.include` should be usable even though the parent is not a
ModuleOp. This requirement is therefore removed.
Commit: b32dc677325ccf992f7e957e15e97f41fdfa9c77
https://github.com/llvm/llvm-project/commit/b32dc677325ccf992f7e957e15e97f41fdfa9c77
Author: Martin Storsjö <martin at martin.st>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
Log Message:
-----------
Revert "[compiler-rt][fuzzer] SetThreadName build fix for Mingwin attempt (#106902)"
This reverts commit 7c4cffd9d8be424e9e9542be9aec3b5a6f69073e.
This commit broke compilation in environments that don't use
winpthreads.
Commit: dc3f66af58db258287e1c2dbfb3f06916b463227
https://github.com/llvm/llvm-project/commit/dc3f66af58db258287e1c2dbfb3f06916b463227
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/include/clang/Basic/TargetCXXABI.def
Log Message:
-----------
[NFC] Fix dead links in TargetCXXABI.def (#96348)
http://itanium-cxx-abi.github.io/cxx-abi/
> This website may be mirrored in many places, some of which may become
stale. The current canonical location is:
> * http://itanium-cxx-abi.github.io/cxx-abi/
https://github.com/ARM-software/abi-aa
> This is the official place for the latest documents of the Application
Binary Interface for the Arm® Architecture, both for source files and
officially released documents.
Commit: dc6c3ba4c4372172f504fcbe440f62932edf1cc1
https://github.com/llvm/llvm-project/commit/dc6c3ba4c4372172f504fcbe440f62932edf1cc1
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
Log Message:
-----------
[NFC][IR] Add CreateCountTrailingZeroElems helper (#106711)
The LoopIdiomVectorize pass already creates calls to the intrinsic
experimental_cttz_elts, but PR #88385 will start calling this more
too so I've created a helper for it.
Commit: 0c0bac94c08e73d4c35b454ba02317f2db313f93
https://github.com/llvm/llvm-project/commit/0c0bac94c08e73d4c35b454ba02317f2db313f93
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/test/Transforms/InstCombine/ARM/neon-intrinsics.ll
Log Message:
-----------
[InstCombine] Add additional tests for arm intrinsic alignment (NFC)
Commit: 181cc75ea8be70e3fa7145456e1bf2331e0bc5e4
https://github.com/llvm/llvm-project/commit/181cc75ea8be70e3fa7145456e1bf2331e0bc5e4
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
A lldb/test/API/functionalities/memory/holes/Makefile
A lldb/test/API/functionalities/memory/holes/TestMemoryHoles.py
A lldb/test/API/functionalities/memory/holes/main.cpp
Log Message:
-----------
[lldb/linux] Make truncated reads work (#106532)
Previously, we were returning an error if we couldn't read the whole
region. This doesn't matter most of the time, because lldb caches memory
reads, and in that process it aligns them to cache line boundaries. As
(LLDB) cache lines are smaller than pages, the reads are unlikely to
cross page boundaries.
Nonetheless, this can cause a problem for large reads (which bypass the
cache), where we're unable to read anything even if just a single byte
of the memory is unreadable. This patch fixes the lldb-server to do
that, and also changes the linux implementation, to reuse any partial
results it got from the process_vm_readv call (to avoid having to
re-read everything again using ptrace, only to find that it stopped at
the same place).
This matches debugserver behavior. It is also consistent with the gdb
remote protocol documentation, but -- notably -- not with actual
gdbserver behavior (which returns errors instead of partial results). We
filed a
[clarification
bug](https://sourceware.org/bugzilla/show_bug.cgi?id=24751) several
years ago. Though we did not really reach a conclusion there, I think
this is the most logical behavior.
The associated test does not currently pass on windows, because the
windows memory read APIs don't support partial reads (I have a WIP patch
to work around that).
Commit: b0de7fa4668743aec14c6ccae287ac9f8f7d343b
https://github.com/llvm/llvm-project/commit/b0de7fa4668743aec14c6ccae287ac9f8f7d343b
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
Log Message:
-----------
[VPlan] Use op from underlying call in computeCost if needed.
This fixes a divergence between legacy and VPlan-based cost model, e.g.
if one of the operands has an first-order recurrence phi as operand.
Commit: ef26afcb88dcb5f2de79bfc3cf88a8ea10f230ec
https://github.com/llvm/llvm-project/commit/ef26afcb88dcb5f2de79bfc3cf88a8ea10f230ec
Author: Hans <hans at hanshq.net>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/utils/release/build_llvm_release.bat
Log Message:
-----------
Win release packaging: Don't try to use rpmalloc for 32-bit x86 (#106969)
because that doesn't work (results in `LINK : error LNK2001: unresolved
external symbol malloc`).
Based on the title of #91862 it was only intended for use in 64-bit
builds.
Commit: df3d70b5a72fee43af3793c8b7a138bd44cac8cf
https://github.com/llvm/llvm-project/commit/df3d70b5a72fee43af3793c8b7a138bd44cac8cf
Author: David Sherwood <david.sherwood at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
A llvm/test/Analysis/ScalarEvolution/predicated-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/predicated-symbolic-max-backedge-taken-count.ll
Log Message:
-----------
[Analysis] Add getPredicatedExitCount to ScalarEvolution (#105649)
Due to a reviewer request on PR #88385 I have created this patch
to add a getPredicatedExitCount function, which is similar to
getExitCount except that it uses the predicated backedge taken
information. With PR #88385 we will start to care about more
loops with multiple exits, and want the ability to query exit
counts for a particular exiting block. Such loops may require
predicates in order to be vectorised.
New tests added here:
Analysis/ScalarEvolution/predicated-exit-count.ll
Commit: 44cfbef1b3cb0dd33886cc27441930008a245963
https://github.com/llvm/llvm-project/commit/44cfbef1b3cb0dd33886cc27441930008a245963
Author: Sam Tebbs <samuel.tebbs at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
A llvm/test/CodeGen/AArch64/partial-reduce-dot-product.ll
Log Message:
-----------
[AArch64] Lower partial add reduction to udot or svdot (#101010)
This patch introduces lowering of the partial add reduction intrinsic to
a udot or svdot for AArch64. This also involves adding a
`shouldExpandPartialReductionIntrinsic` target hook, which AArch64 will
return false from in the cases that it can be lowered.
Commit: b47d7ce8121b1cb1923e879d58eaa1d63aeaaae2
https://github.com/llvm/llvm-project/commit/b47d7ce8121b1cb1923e879d58eaa1d63aeaaae2
Author: kadir çetinkaya <kadircet at google.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang-tools-extra/clangd/TidyFastChecks.inc
Log Message:
-----------
[clangd] Update TidyFastChecks for release/19.x (#106354)
Run for clang-tidy checks available in release/19.x branch.
Some notable findings:
- altera-id-dependent-backward-branch, stays slow with 13%.
- misc-const-correctness become faster, going from 261% to 67%, but
still above
8% threshold.
- misc-header-include-cycle is a new SLOW check with 10% runtime
implications
- readability-container-size-empty went from 16% to 13%, still SLOW.
Commit: ad30a050caae724c1f4f0dfa8f26e6bee45aa0ad
https://github.com/llvm/llvm-project/commit/ad30a050caae724c1f4f0dfa8f26e6bee45aa0ad
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/unittests/Support/FormatVariadicTest.cpp
Log Message:
-----------
[NFC][Support] Add FormatVariadic sub-test for validation (#106578)
- Add validation subtest that tests assert failures in assert enabled
builds, and that validation is disabled in assert disabled builds.
Commit: e5c7cde5c812535c1ac8368ffdda3f503ccce013
https://github.com/llvm/llvm-project/commit/e5c7cde5c812535c1ac8368ffdda3f503ccce013
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/utils/TableGen/IntrinsicEmitter.cpp
Log Message:
-----------
[NFC][TableGen] Refactor `getIntrinsicFnAttributeSet` (#106587)
Fix intrinsic function attributes to not generate attribute sets that
are empty in `getIntrinsicFnAttributeSet`. Refactor the code to use
helper functions to get effective memory effects for an intrinsic and to
check if it has non-default attributes.
This eliminates one case statement in `getIntrinsicFnAttributeSet` that
we generate today for the case when intrinsic attributes are default
ones.
Also rename `Intrinsic` to `Int` to follow the naming convention used in
this file and adjust emission code to not emit unnecessary empty line
between cases generated.
Commit: b6a4ab5a12c9ced0642769e4b2d8f77859541ba8
https://github.com/llvm/llvm-project/commit/b6a4ab5a12c9ced0642769e4b2d8f77859541ba8
Author: Orlando Cazalet-Hyams <orlando.hyams at sony.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/docs/AssignmentTracking.md
Log Message:
-----------
[NFC] Fix #106873 - update assignment tracking docs (#106959)
Commit: 4a505e15e768011e47101cf9aeb0c7787fdc9acf
https://github.com/llvm/llvm-project/commit/4a505e15e768011e47101cf9aeb0c7787fdc9acf
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/test/CXX/drs/cwg14xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add tests for CWG issues about friend declaration matching (#106117)
This patch covers CWG issues regarding declaration matching when
`friend` declarations are involved:
[CWG138](https://cplusplus.github.io/CWG/issues/138.html),
[CWG386](https://cplusplus.github.io/CWG/issues/386.html),
[CWG1477](https://cplusplus.github.io/CWG/issues/1477.html), and
[CWG1900](https://cplusplus.github.io/CWG/issues/1900.html). Atypical
for our CWG tests, the ones in this patch are quite extensively
commented in-line, explaining the mechanics. PR description focuses on
high-level concerns and references.
[CWG138](https://cplusplus.github.io/CWG/issues/138.html) "Friend
declaration name lookup"
-----------
[P1787R6](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1787r6.html):
> [CWG138](https://cplusplus.github.io/CWG/issues/138.html) is resolved
according to [N1229](http://wg21.link/n1229), except that
using-directives that nominate nested namespaces are considered.
I find it hard to pin down the scope of this issue, so I'm relying on
three examples from the filing to define it. Because of that, it's also
hard to pinpoint exact wording changes that resolve it. Relevant
references are:
[[dcl.meaning.general]/2](http://eel.is/c++draft/dcl.meaning#general-2),
[[namespace.udecl]/10](https://eel.is/c++draft/namespace.udecl#10),
[[dcl.type.elab]/3](https://eel.is/c++draft/dcl.type.elab#3),
[[basic.lookup.elab]/1](https://eel.is/c++draft/basic.lookup.elab#1).
[CWG386](https://cplusplus.github.io/CWG/issues/386.html) "Friend
declaration of name brought in by _using-declaration_"
-----------
[P1787R6](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1787r6.html):
> [CWG386](https://cplusplus.github.io/CWG/issues/386.html),
[CWG1839](https://cplusplus.github.io/CWG/issues/1839.html),
[CWG1818](https://cplusplus.github.io/CWG/issues/1818.html),
[CWG2058](https://cplusplus.github.io/CWG/issues/2058.html),
[CWG1900](https://cplusplus.github.io/CWG/issues/1900.html), and
Richard’s observation in [“are non-type names ignored in a
class-head-name or
enum-head-name?”](http://lists.isocpp.org/core/2017/01/1604.php) are
resolved by describing the limited lookup that occurs for a
declarator-id, including the changes in Richard’s [proposed resolution
for
CWG1839](http://wiki.edg.com/pub/Wg21cologne2019/CoreWorkingGroup/cwg1839.html)
(which also resolves CWG1818 and what of CWG2058 was not resolved along
with CWG2059) and rejecting the example from
[CWG1477](https://cplusplus.github.io/CWG/issues/1477.html).
Wording
([[dcl.meaning.general]/2](http://eel.is/c++draft/dcl.meaning#general-2)):
> — If the
[id-expression](http://eel.is/c++draft/expr.prim.id.general#nt:id-expression)
E in the
[declarator-id](http://eel.is/c++draft/dcl.decl.general#nt:declarator-id)
of the
[declarator](http://eel.is/c++draft/dcl.decl.general#nt:declarator) is a
[qualified-id](http://eel.is/c++draft/expr.prim.id.qual#nt:qualified-id)
or a [template-id](http://eel.is/c++draft/temp.names#nt:template-id):
> — [...]
> — The
[declarator](http://eel.is/c++draft/dcl.decl.general#nt:declarator)
shall correspond to one or more declarations found by the lookup; they
shall all have the same target scope, and the target scope of the
[declarator](http://eel.is/c++draft/dcl.decl.general#nt:declarator) is
that
scope[.](http://eel.is/c++draft/dcl.meaning#general-2.2.2.sentence-1)
This issue focuses on interaction of `friend` declarations with
template-id and qualified-id with using-declarations. The short answer
is that terminal name in such declarations undergo lookup, and
using-declarations do what they usually do helping that lookup. Target
scope of such friend declaration is the target scope of lookup result,
so no conflicts arise with the using-declarations.
[CWG1477](https://cplusplus.github.io/CWG/issues/1477.html) "Definition
of a `friend` outside its namespace"
-----------
[P1787R6](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1787r6.html):
> [...] and rejecting the example from
[CWG1477](https://cplusplus.github.io/CWG/issues/1477.html).
Wording
([[dcl.meaning.general]/3.4](http://eel.is/c++draft/dcl.meaning#general-3.4)):
> Otherwise, the terminal name of the
[declarator-id](http://eel.is/c++draft/dcl.decl.general#nt:declarator-id)
is not looked
up[.](http://eel.is/c++draft/dcl.meaning#general-3.4.sentence-1)
If it is a qualified name, the
[declarator](http://eel.is/c++draft/dcl.decl.general#nt:declarator)
shall correspond to one or more declarations nominable in S; all the
declarations shall have the same target scope and the target scope of
the [declarator](http://eel.is/c++draft/dcl.decl.general#nt:declarator)
is that
scope[.](http://eel.is/c++draft/dcl.meaning#general-3.4.sentence-2)
This issue focuses on befriending a function in one scope, then defining
it from other scope using qualified-id. Contrary to what P1787R6 says in
prose, this example is accepted by the wording in that paper. In the
wording quote above, note the absence of a statement like "terminal name
of the declarator-id is not bound", contrary to similar statements made
before that in [dcl.meaning.general] about friend declarations and
template-ids.
There's also a note in [basic.scope.scope] that supports the rejection,
but it's considered incorrect and expected to be removed in the future.
This is tracked in https://github.com/cplusplus/draft/pull/7238.
[CWG1900](https://cplusplus.github.io/CWG/issues/1900.html) "Do `friend`
declarations count as “previous declarations”?"
------------------
[P1787R6](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1787r6.html):
> [CWG386](https://cplusplus.github.io/CWG/issues/386.html),
[CWG1839](https://cplusplus.github.io/CWG/issues/1839.html),
[CWG1818](https://cplusplus.github.io/CWG/issues/1818.html),
[CWG2058](https://cplusplus.github.io/CWG/issues/2058.html),
[CWG1900](https://cplusplus.github.io/CWG/issues/1900.html), and
Richard’s observation in [“are non-type names ignored in a
class-head-name or
enum-head-name?”](http://lists.isocpp.org/core/2017/01/1604.php) are
resolved by describing the limited lookup that occurs for a
declarator-id, including the changes in Richard’s [proposed resolution
for
CWG1839](http://wiki.edg.com/pub/Wg21cologne2019/CoreWorkingGroup/cwg1839.html)
(which also resolves CWG1818 and what of CWG2058 was not resolved along
with CWG2059) and rejecting the example from
[CWG1477](https://cplusplus.github.io/CWG/issues/1477.html).
Wording
([[dcl.meaning.general]/2.3](http://eel.is/c++draft/dcl.meaning#general-2.3)):
> The declaration's target scope is the innermost enclosing namespace
scope; if the declaration is contained by a block scope, the declaration
shall correspond to a reachable
([[module.reach]](http://eel.is/c++draft/module.reach)) declaration that
inhabits the innermost block
scope[.](http://eel.is/c++draft/dcl.meaning#general-2.3.sentence-2)
Wording
([[basic.scope.scope]/7](http://eel.is/c++draft/basic.scope#scope-7)):
> A declaration is
[nominable](http://eel.is/c++draft/basic.scope#def:nominable) in a
class, class template, or namespace E at a point P if it precedes P, it
does not inhabit a block scope, and its target scope is the scope
associated with E or, if E is a namespace, any element of the inline
namespace set of E
([[namespace.def]](http://eel.is/c++draft/namespace.def))[.](http://eel.is/c++draft/basic.scope#scope-7.sentence-1)
Wording
([[dcl.meaning.general]/3.4](http://eel.is/c++draft/dcl.meaning#general-3.4)):
> If it is a qualified name, the
[declarator](http://eel.is/c++draft/dcl.decl.general#nt:declarator)
shall correspond to one or more declarations nominable in S; [...]
In the new wording it's clear that while `friend` declarations of
functions do not bind names, declaration is still introduced, and is
nominable, making it eligible for a later definition by qualified-id.
Commit: 30d56bedd0a77c4c075e4cdc6191611bb84c8a49
https://github.com/llvm/llvm-project/commit/30d56bedd0a77c4c075e4cdc6191611bb84c8a49
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_context.cpp
M compiler-rt/lib/rtsan/rtsan_context.h
M compiler-rt/lib/rtsan/tests/rtsan_test_context.cpp
Log Message:
-----------
[compiler-rt][rtsan] NFC: Refactor context helper functions (#106869)
Commit: 26bf0b4ae7df7f5350f71afd40a57cdf8f98c588
https://github.com/llvm/llvm-project/commit/26bf0b4ae7df7f5350f71afd40a57cdf8f98c588
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/docs/Multilib.rst
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Driver/Multilib.h
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
A clang/test/Driver/baremetal-multilib-custom-error.yaml
M clang/unittests/Driver/MultilibBuilderTest.cpp
M clang/unittests/Driver/MultilibTest.cpp
M clang/unittests/Driver/SimpleDiagnosticConsumer.h
Log Message:
-----------
[clang][Driver] Add a custom error option in multilib.yaml. (#105684)
Sometimes a collection of multilibs has a gap in it, where a set of
driver command-line options can't work with any of the available
libraries.
For example, the Arm MVE extension requires special startup code (you
need to initialize FPSCR.LTPSIZE), and also benefits greatly from
-mfloat-abi=hard. So a multilib provider might build a library for
systems without MVE, and another for MVE with -mfloat-abi=hard,
anticipating that that's what most MVE users would want. But then if a
user compiles for MVE _without_ -mfloat-abi=hard, thhey can't use either
of those libraries – one has an ABI mismatch, and the other will fail to
set up LTPSIZE.
In that situation, it's useful to include a multilib.yaml entry for the
unworkable intermediate situation, and have it map to a fatal error
message rather than a set of actual libraries. Then the user gets a
build failure with a sensible explanation, instead of selecting an
unworkable library and silently generating bad output. The new
regression test demonstrates this case.
This patch introduces extra syntax into multilib.yaml, so that a record
in the `Variants` list can omit the `Dir` key, and in its place, provide
a `FatalError` key. Then, if that variant is selected, the error message
is emitted as a clang diagnostic, and multilib selection fails.
In order to emit the error message in `MultilibSet::select`, I had to
pass a `Driver &` to that function, which involved plumbing one through
to every call site, and in the unit tests, constructing one specially.
Commit: f32f0289fd57971759d7cab9da8d56863eee86ae
https://github.com/llvm/llvm-project/commit/f32f0289fd57971759d7cab9da8d56863eee86ae
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
Log Message:
-----------
[NFC] Update check lines of the test case `llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll`
Commit: cb949b74e8fdfd04821c0fa5da961f91496d3682
https://github.com/llvm/llvm-project/commit/cb949b74e8fdfd04821c0fa5da961f91496d3682
Author: Shilei Tian <i at tianshilei.me>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
Log Message:
-----------
[NFC][FIX] Work around update_test_checks bug
Commit: 38ae53da15c6636c0d13ccf20415b5ce8541aefd
https://github.com/llvm/llvm-project/commit/38ae53da15c6636c0d13ccf20415b5ce8541aefd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[clang][AST][NFC] Make ASTContext::UnwrapSimilar{Array,}Types const (#106992)
They don't mutate the context at all, so mark them const.
Commit: 55eb93b2688de99ada14c71804af99502276ac79
https://github.com/llvm/llvm-project/commit/55eb93b2688de99ada14c71804af99502276ac79
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
Log Message:
-----------
[RISCV] Remove RISCVISD::FP_EXTEND_BF16. (#106939)
I don't think we need this node. We can isel fp_extend directly.
fp_extend to f64 requires two instructions, but we can emit them with an
isel pattern.
I have not removed RISCVISD::FP_ROUND_BF16 because f64->bf16 needs more
work to fix the double rounding.
Commit: a586b5a49dbd3b6c658f9edbf0b4a9be0b108a14
https://github.com/llvm/llvm-project/commit/a586b5a49dbd3b6c658f9edbf0b4a9be0b108a14
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
A llvm/test/MC/AArch64/SVE/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE/directive-cpu-negative.s
M llvm/test/MC/AArch64/directive-arch-negative.s
M llvm/test/MC/AArch64/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/directive-cpu-err.s
Log Message:
-----------
Reland [AArch64][AsmParser] Directives should clear transitively implied features (#106625) (#106850)
Relands 24977395592f addressing the buffer overflow caused when
dereferencing an iterator past the end of ExtensionMap.
Commit: 50a02e7c68f964c5d8338369746c849ed8d3bef4
https://github.com/llvm/llvm-project/commit/50a02e7c68f964c5d8338369746c849ed8d3bef4
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
Log Message:
-----------
[VPlan] Pass intrinsic inst to TTI in VPWidenCallRecipe::computeCost.
Follow-up to 9ccf825, adjust computeCost to also pass IntrinsicInst to
TTI if available, as there are multiple places in TTI which use the
IntrinsicInst.
Fixes https://github.com/llvm/llvm-project/issues/107016.
Commit: 954ed05c1001489802ae43d4bea403181570a799
https://github.com/llvm/llvm-project/commit/954ed05c1001489802ae43d4bea403181570a799
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
A llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
Log Message:
-----------
[VPlan] Simplify MUL operands at recipe construction.
This moves the logic to create simplified operands using SCEV to MUL
recipe creation. This is needed to match the behavior of the legacy's cost
model. TODOs are to extend to other opcodes and move to a transform.
Note that this also restricts the number of SCEV simplifications we
apply to more precisely match the cases handled by the legacy cost
model.
Fixes https://github.com/llvm/llvm-project/issues/107015.
Commit: ecc9aece72989461167ba39541dce51032c0d76d
https://github.com/llvm/llvm-project/commit/ecc9aece72989461167ba39541dce51032c0d76d
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M lld/COFF/InputFiles.cpp
A lld/test/COFF/arm64ec-lib.test
Log Message:
-----------
[LLD][COFF] Use archive's ECSYMBOLS on ARM64EC target when available. (#106904)
Commit: 7e8aba2b993014d975cf35f1f9831c951c4ab292
https://github.com/llvm/llvm-project/commit/7e8aba2b993014d975cf35f1f9831c951c4ab292
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M clang/lib/Basic/OpenMPKinds.cpp
Log Message:
-----------
[clang][OpenMP] `masked` and `master` are not capturing (#106787)
Commit: 0ba006daf5d9f10017ba15b4287c272912a34d73
https://github.com/llvm/llvm-project/commit/0ba006daf5d9f10017ba15b4287c272912a34d73
Author: Jesse D <jesse.a.deguire at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/test/MC/Mips/cnmips/invalid-wrong-error.s
M llvm/test/MC/Mips/eva/invalid-noeva-wrong-error.s
M llvm/test/MC/Mips/eva/invalid_R6.s
M llvm/test/MC/Mips/micromips32r6/invalid-wrong-error.s
M llvm/test/MC/Mips/mips1/invalid-mips2-wrong-error.s
M llvm/test/MC/Mips/mips1/invalid-mips3-wrong-error.s
M llvm/test/MC/Mips/mips1/invalid-mips3.s
M llvm/test/MC/Mips/mips1/invalid-mips4-wrong-error.s
M llvm/test/MC/Mips/mips1/invalid-mips4.s
M llvm/test/MC/Mips/mips1/invalid-mips5.s
M llvm/test/MC/Mips/mips2/invalid-mips3-wrong-error.s
M llvm/test/MC/Mips/mips2/invalid-mips3.s
M llvm/test/MC/Mips/mips2/invalid-mips4-wrong-error.s
M llvm/test/MC/Mips/mips2/invalid-mips4.s
M llvm/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s
M llvm/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s
M llvm/test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s
M llvm/test/MC/Mips/target-soft-float.s
Log Message:
-----------
[MIPS] Fix error messages when rejecting certain assembly not supported by ISA (#94695)
… instructions.
This is a fix I stumbled upon while working on something else. I decided
to break it out since it seems like a good "first issue" to submit. I
updated the comments in the "wrong error" test files to indicate that
the messages are no longer incorrect, but I left the names of the test
files alone. I was not sure what to do with those, so I would appreciate
thoughts or guidance.
Commit: 366ac8c09051b6e293ecc0390168f505b56f6654
https://github.com/llvm/llvm-project/commit/366ac8c09051b6e293ecc0390168f505b56f6654
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
Log Message:
-----------
[LegalizeVectorOps] Defer UnrollVectorOp in ExpandFNEG to caller. (#106783)
Make ExpandFNEG return SDValue() when it doesn't expand. The caller
already knows how to Unroll when Results is empty.
Commit: b6597f521d8a040f2b9fee54b3f89c380de8e432
https://github.com/llvm/llvm-project/commit/b6597f521d8a040f2b9fee54b3f89c380de8e432
Author: Nico Weber <thakis at chromium.org>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
Log Message:
-----------
[gn] port 1e65b765879fb39
Apparently DragonFly BSD and Solaris/illumos call these APIs
`pthread_get_name_np` / `pthread_set_name_np` (with an extra
underscore) instead of `pthread_getname_np` / `pthread_setname_np`.
Commit: ba3c1edcc8cf96206df259bd07001fa7ee9957cb
https://github.com/llvm/llvm-project/commit/ba3c1edcc8cf96206df259bd07001fa7ee9957cb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
Log Message:
-----------
[RISCV] Correct the scheduler class for FCVT_S_BF16. (#107028)
Use FCvtF16ToF32 instead of FCvtF32ToF16.
Commit: 9a1d14a8d26778a5d2d24928ba11cc557c2df24b
https://github.com/llvm/llvm-project/commit/9a1d14a8d26778a5d2d24928ba11cc557c2df24b
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
Log Message:
-----------
[LTO] Don't make unnecessary copies of ImportIDTable (#106998)
Without this patch, {ImportMapTy,SortedImportList}::{begin,end} make
unnecessary copies of ImportIDTable via:
map_iterator(Imports.begin(), IDs);
The second parameter, IDs, is passed by value, so we make a copy of
MapVector inside ImportIDTable every time we call begin and end.
These begin and end show up as time-consuming functions in the
performance profile.
This patch fixes the problem by passing IDs by reference with
std::cref.
While we are at it, this patch deletes the copy constructor and
assignment operator. I cannot think of any legitimate need reason to
make a copy of the deduplication table.
Commit: dc19b59ea2502193c0e7bc16bb7d711c8053edcf
https://github.com/llvm/llvm-project/commit/dc19b59ea2502193c0e7bc16bb7d711c8053edcf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
Log Message:
-----------
[RISCV] Rename test cases in bfloat-arith.ll and half-arith.ll. NFC
Use _bf16 or _h instead of _s. The _s was copied from float-arith.ll
Commit: 2cbd1bc830861bc08f78fb6cc11747b82f66c4c6
https://github.com/llvm/llvm-project/commit/2cbd1bc830861bc08f78fb6cc11747b82f66c4c6
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/test/Modules/no-local-decl-in-reduced-bmi.cppm
M clang/test/Modules/reduced-bmi-empty-module-purview-std.cppm
M clang/test/Modules/reduced-bmi-empty-module-purview.cppm
M clang/test/Modules/unreached-static-entities.cppm
Log Message:
-----------
Revert "[C++20] [Modules] Embed all source files for C++20 Modules (#102444)"
This reverts commit 2eeeff842f993a694159183a2834b4d305549cad.
See the post commit discussion in
https://github.com/llvm/llvm-project/commit/2eeeff842f993a694159183a2834b4d305549cad
Commit: 78abeca1d88593d7f2a27f3c3e140abe77236e7e
https://github.com/llvm/llvm-project/commit/78abeca1d88593d7f2a27f3c3e140abe77236e7e
Author: s-watanabe314 <watanabe.shu-06 at fujitsu.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDecl.cpp
M clang/test/SemaCXX/extern-c.cpp
Log Message:
-----------
[clang][Sema] Fix diagnostic for function overloading in extern "C" (#106033)
Fixes #80235
When trying to overload a function within `extern "C"`, the diagnostic
`functions that differ only in their return type cannot be overloaded`
is given. This diagnostic is inappropriate because overloading is
basically not allowed in the C language. However, if the redeclared
function has the `((overloadable))` attribute, it should be diagnosed as
`functions that differ only in their return type cannot be overloaded`.
This patch uses `isExternC()` to provide an appropriate diagnostic
during the diagnostic process. `isExternC()` updates the linkage
information cache internally, so calling it before merging functions can
cause clang to crash. An example is declaring `static void foo()` and
`void foo()` within an `extern "C"` block. Therefore, I decided to call
`isExternC()` after the compilation error is confirmed and select the
diagnostic message. The diagnostic message is `conflicting types for
'func'` similar to the diagnostic in C, and `functions that differ only
in their return type cannot be overloaded` if the `((overloadable))`
attribute is given.
Regression tests verify that the expected diagnostics are given when
trying to overload functions within `extern "C"` and when the
`((overloadable))` attribute is present.
---------
Co-authored-by: Sirraide <aeternalmail at gmail.com>
Commit: 9a1eded9b9afa3eab1e0b5cad5dbff3117d22391
https://github.com/llvm/llvm-project/commit/9a1eded9b9afa3eab1e0b5cad5dbff3117d22391
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-02 (Mon, 02 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
Log Message:
-----------
[RISCV] Custom legalize f16/bf16 FCOPYSIGN with Zfhmin/Zbfmin. (#107039)
The LegalizeDAG expansion will go through memory since i16 isn't a legal
type. Avoid this by using FMV nodes.
Similar to what we did for #106886 for FNEG and FABS. Special care is
needed to handle the Sign operand being a different type.
Commit: 042104985cc37d28db5f22f8bdf582c1108977d8
https://github.com/llvm/llvm-project/commit/042104985cc37d28db5f22f8bdf582c1108977d8
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
A llvm/lib/Target/AMDGPU/SIShrinkInstructions.h
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
M llvm/test/CodeGen/AMDGPU/fold-multiple.mir
M llvm/test/CodeGen/AMDGPU/shrink-i32-kimm.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-flags.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
M llvm/test/CodeGen/AMDGPU/shrink-insts-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
M llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
Log Message:
-----------
[AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (#106967)
Commit: 8e5b43c8effc0a01745bb7c53ca21fb6c8384c51
https://github.com/llvm/llvm-project/commit/8e5b43c8effc0a01745bb7c53ca21fb6c8384c51
Author: Akshat Oke <76596238+Akshat-Oke at users.noreply.github.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
Log Message:
-----------
[AMDGPU][NewPM] Have consistent property changes in GCNDPPCombine (#106520)
Commit: 7d7d2d2b54172f97300c02ec80bb568d35403cce
https://github.com/llvm/llvm-project/commit/7d7d2d2b54172f97300c02ec80bb568d35403cce
Author: Da-Viper <57949090+Da-Viper at users.noreply.github.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
Log Message:
-----------
[lldb-dap][test] Fix: Typo in unresolved test (#107030)
There is a typo in an assertion that causes the instruction break-point
test to be unresolved
Commit: 00c198b2ca6b6bee2d90e62d78816686ab056b1b
https://github.com/llvm/llvm-project/commit/00c198b2ca6b6bee2d90e62d78816686ab056b1b
Author: Michael Marjieh <99331190+mmarjieh at users.noreply.github.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
A llvm/test/CodeGen/PowerPC/sms-recmii.ll
M llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir
Log Message:
-----------
[MachinePipeliner] Make Recurrence MII More Accurate (#105475)
Current RecMII calculation is bigger than it needs to be. The
calculation was refined in this patch.
Commit: 7e6bad112c978d1dabfd2c6bef4674224b63583c
https://github.com/llvm/llvm-project/commit/7e6bad112c978d1dabfd2c6bef4674224b63583c
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/test/CodeGen/RISCV/rvv/copyprop.mir
Log Message:
-----------
[RISCV] Rename `vcix_state` register to `sf_vcix_state`. NFC (#106995)
Since it's SiFive VCIX specific register, it's better to have a prefix
so that it's more understandable.
Commit: af5c18ad356ee334f3ec629149940f84d4b5f06d
https://github.com/llvm/llvm-project/commit/af5c18ad356ee334f3ec629149940f84d4b5f06d
Author: Martin Storsjö <martin at martin.st>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M compiler-rt/www/index.html
Log Message:
-----------
[compiler-rt] [docs] Mention Windows as one of the supported OSes (#106874)
Compiler-rt can be built for Windows, and most parts of it work. Some
parts only really work on x86/x86_64 (like address sanitizers), but the
OS overall is supported.
Commit: 525ffd626231a8c6fecb0b886c272ff4568f09f5
https://github.com/llvm/llvm-project/commit/525ffd626231a8c6fecb0b886c272ff4568f09f5
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/docs/analyzer/checkers.rst
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/test/Analysis/mmap-writeexec.c
Log Message:
-----------
[clang][analyzer] Bring alpha.security.MmapWriteExec checker out of alpha package (#102636)
Commit: 04ed12ca3f027a3a189d181e5e5880285ebc7916
https://github.com/llvm/llvm-project/commit/04ed12ca3f027a3a189d181e5e5880285ebc7916
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/test/API/functionalities/memory/holes/TestMemoryHoles.py
Log Message:
-----------
[lldb] Support partial memory reads on windows (#106981)
ReadProcessMemory will not perform the read if part of the memory is
unreadable (and even though the API has a `number_of_bytes_read`
argument). To make this work, I explicitly inspect the memory region
being read and only read the accessible part.
Commit: 6c8746b6e36260e31067765ac1c8dd6cd3f5b868
https://github.com/llvm/llvm-project/commit/6c8746b6e36260e31067765ac1c8dd6cd3f5b868
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
Log Message:
-----------
[Analysis] getIntrinsicForCallSite - add vectorization support for acos/asin/atan and cosh/sinh/tanh libcalls (#106844)
Followup to #106584 - ensure acos/asin/atan and cosh/sinh/tanh libcalls correctly map to the llvm intrinsic equivalents
Commit: 733a92d7bced7119986a93a1b4e1c760f92b9583
https://github.com/llvm/llvm-project/commit/733a92d7bced7119986a93a1b4e1c760f92b9583
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/test/AST/ByteCode/constexpr-frame-describe.cpp
Log Message:
-----------
[clang][bytecode] Print Pointers via APValue (#107056)
Instead of doing this ourselves, just rely on printing the APValue.
Commit: a70d999203702e245a54bc694048c8817215c65e
https://github.com/llvm/llvm-project/commit/a70d999203702e245a54bc694048c8817215c65e
Author: Christian Sigg <csigg at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M utils/bazel/.bazelrc
Log Message:
-----------
[bazel] Attempt to fix issue fetching remote blob
Bazel builds currently fail with `Failed to fetch blobs because they do not exist remotely.`. These extra bazel flags hopefully fix it.
Commit: 6c59dfb0184aa11ec202f1cd8aee9e971a1565a4
https://github.com/llvm/llvm-project/commit/6c59dfb0184aa11ec202f1cd8aee9e971a1565a4
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/test/CodeGen/X86/movmsk-cmp.ll
Log Message:
-----------
[X86] Add test showing failure to remove freeze from all_of pattern
Commit: 851bacb7ce66213d667c6ed375ce43ab0ed3cd56
https://github.com/llvm/llvm-project/commit/851bacb7ce66213d667c6ed375ce43ab0ed3cd56
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/IR/DebugProgramInstruction.cpp
Log Message:
-----------
[IR] DebugProgramInstruction.cpp - fix GCC Wparentheses warning. NFC.
Commit: 4befe65cf065a1be8bb8f30d76a3f45ea45aa63f
https://github.com/llvm/llvm-project/commit/4befe65cf065a1be8bb8f30d76a3f45ea45aa63f
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
A flang/test/Semantics/OpenMP/clause-order.f90
Log Message:
-----------
[flang][semantics][OpenMP] store DSA using ultimate sym (#107002)
Previously we tracked data sharing attributes by the symbol itself not
by the ultimate symbol. When the private clause came first, subsequent
uses of the symbol found a host-associated version instead of the
ultimate symbol and so the check didn't consider them to be the same
symbol. Always adding and checking for the ultimate symbol ensures that
we have the same behaviour no matter the order of clauses.
The modified list is only used for this multiple clause check.
Closes #78235
Commit: 377045ece6471a1e59bb5239707aad54ba035ff2
https://github.com/llvm/llvm-project/commit/377045ece6471a1e59bb5239707aad54ba035ff2
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/movmsk-cmp.ll
Log Message:
-----------
[X86] canCreateUndefOrPoisonForTargetNode - X86ISD::CMPP (CMPPS/D) nodes do not generate poison
Commit: fe1a1eee2ff864d2ba00ad67e6360b7178e67d5c
https://github.com/llvm/llvm-project/commit/fe1a1eee2ff864d2ba00ad67e6360b7178e67d5c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/test/Transforms/JumpThreading/pr22086.ll
M llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
M llvm/test/Transforms/SCCP/loadtest2.ll
M llvm/test/Transforms/SCCP/select.ll
Log Message:
-----------
[Tests] Regenerate test checks (NFC)
Commit: c3d8124617a0f7916123174001547eb3b4968644
https://github.com/llvm/llvm-project/commit/c3d8124617a0f7916123174001547eb3b4968644
Author: Nathan Gauër <brioche at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
A llvm/test/Other/spirv-sim/branch.spv
A llvm/test/Other/spirv-sim/call.spv
A llvm/test/Other/spirv-sim/constant.spv
A llvm/test/Other/spirv-sim/lit.local.cfg
A llvm/test/Other/spirv-sim/loop.spv
A llvm/test/Other/spirv-sim/simple-bad-result.spv
A llvm/test/Other/spirv-sim/simple.spv
A llvm/test/Other/spirv-sim/simulator-args.spv
A llvm/test/Other/spirv-sim/switch.spv
A llvm/test/Other/spirv-sim/wave-get-lane-index.spv
A llvm/test/Other/spirv-sim/wave-read-lane-first.spv
M llvm/test/lit.cfg.py
A llvm/utils/spirv-sim/instructions.py
A llvm/utils/spirv-sim/spirv-sim.py
Log Message:
-----------
[Utils][SPIR-V] Adding spirv-sim to LLVM (#104020)
Currently, the testing infrastructure for SPIR-V is based on FileCheck.
Those tests are great to check some level of codegen, but when the test
needs check both the CFG layout and the content of each basic-block,
things becomes messy.
- Because the CHECK/CHECK-DAG/CHECK-NEXT state is limited, it is
sometimes hard to catch the good block: if 2 basic blocks have similar
instructions, FileCheck can match the wrong one.
- Cross-lane interaction can be a bit difficult to understand, and
writting a FileCheck test that is strong enough to catch bad CFG
transforms while not being broken everytime some unrelated codegen part
changes is hard.
And lastly, the spirv-val tooling we have checks that the generated
SPIR-V respects the spec, not that it is correct in regards to the
source IR.
For those reasons, I believe the best way to test the structurizer is
to:
- run spirv-val to make sure the CFG respects the spec.
- simulate the function to validate result for each lane, making sure
the generated code is correct.
This simulator has no other dependencies than core python. It also only
supports a very limited set of instructions as we can test most features
through control-flow and some basic cross-lane interactions.
As-is, the added tests are just a harness for the simulator itself. If
this gets merged, the structurizer PR will benefit from this as I'll be
able to add extensive testing using this.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: d24a2fd38e42f58d6f34f3e985d9387139c12478
https://github.com/llvm/llvm-project/commit/d24a2fd38e42f58d6f34f3e985d9387139c12478
Author: Aditi Medhane <Aditi.Medhane at amd.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
A llvm/test/MachineVerifier/AMDGPU/lit.local.cfg
A llvm/test/MachineVerifier/AMDGPU/register-killed-inside-loop.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_bitcast.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic_w_side_effects.mir
A llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir
A llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-entry-block.mir
A llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-nonentry-block.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-pseudo-terminators.mir
A llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir
A llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir
A llvm/test/MachineVerifier/AMDGPU/writelane_m0.mir
R llvm/test/MachineVerifier/register-killed-inside-loop.mir
R llvm/test/MachineVerifier/test_g_bitcast.mir
R llvm/test/MachineVerifier/test_g_intrinsic.mir
R llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
R llvm/test/MachineVerifier/undef-should-only-be-set-on-subreg-defs.mir
R llvm/test/MachineVerifier/undef-virt-reg-entry-block.mir
R llvm/test/MachineVerifier/undef-virt-reg-nonentry-block.mir
R llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir
R llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
R llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
R llvm/test/MachineVerifier/verify-implicit-def.mir
R llvm/test/MachineVerifier/verify-reg-sequence.mir
R llvm/test/MachineVerifier/writelane_m0.mir
Log Message:
-----------
[AMDGPU] Create dir for amdgpu specific machineverifier tests (#106960)
Move the AMDGPU target specific testcases in MachineVerifier separately
into new directory.
Reference :
https://github.com/llvm/llvm-project/pull/105494#discussion_r1735055750
Commit: 4d8903bd4e6ec29ab28be0d8949c7fde4a740fbe
https://github.com/llvm/llvm-project/commit/4d8903bd4e6ec29ab28be0d8949c7fde4a740fbe
Author: Pablo Antonio Martinez <pablo.antonio.martinez at huawei.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
Log Message:
-----------
[mlir][vector] Refactor vector-transfer-to-vector-load-store.mlir (NFC) (#105509)
Overview of changes:
- All memref input arguments are re-named to %mem.
- All vector input arguments are re-named to %vec.
- All index input arguments are re-named to %idx.
- All tensor input arguments are re-named to %src/%dst.
- LIT variables were updated to be consistent with input arguments.
- Renamed all output arguments as %res.
- Removed unused argument in `transfer_write_broadcast_unit_dim`.
- Unified identation of `FileCheck` commands.
- Split `transfer_write_permutations` and `transfer_write_broadcast_unit_dim` into tensor and memref variants.
- Renamed `transfer_write_permutations_tensor` as `transfer_write_permutations_tensor_masked`.
Commit: 52b879594fa1e80c871fe227e96443c3c8a8cfc2
https://github.com/llvm/llvm-project/commit/52b879594fa1e80c871fe227e96443c3c8a8cfc2
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
Log Message:
-----------
[LoopUnroll] Avoid undef values in test (NFC)
Avoid most of the code being optimized away as a result of
optimization improvements.
Commit: 8861328303a5b1c45443bbd02338623e41df1da4
https://github.com/llvm/llvm-project/commit/8861328303a5b1c45443bbd02338623e41df1da4
Author: Nathan Gauër <brioche at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
R llvm/test/Other/spirv-sim/branch.spv
R llvm/test/Other/spirv-sim/call.spv
R llvm/test/Other/spirv-sim/constant.spv
R llvm/test/Other/spirv-sim/lit.local.cfg
R llvm/test/Other/spirv-sim/loop.spv
R llvm/test/Other/spirv-sim/simple-bad-result.spv
R llvm/test/Other/spirv-sim/simple.spv
R llvm/test/Other/spirv-sim/simulator-args.spv
R llvm/test/Other/spirv-sim/switch.spv
R llvm/test/Other/spirv-sim/wave-get-lane-index.spv
R llvm/test/Other/spirv-sim/wave-read-lane-first.spv
M llvm/test/lit.cfg.py
R llvm/utils/spirv-sim/instructions.py
R llvm/utils/spirv-sim/spirv-sim.py
Log Message:
-----------
Revert "[Utils][SPIR-V] Adding spirv-sim to LLVM" (#107084)
Reverts llvm/llvm-project#104020
Looks like it caused build failures.
Commit: 5e19e317c0c996b913fddf7f07b6b93285e8dea8
https://github.com/llvm/llvm-project/commit/5e19e317c0c996b913fddf7f07b6b93285e8dea8
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M libcxx/test/benchmarks/format.bench.cpp
M libcxx/test/benchmarks/format_to.bench.cpp
M libcxx/test/benchmarks/format_to_n.bench.cpp
M libcxx/test/benchmarks/formatted_size.bench.cpp
M libcxx/test/benchmarks/formatter_int.bench.cpp
M libcxx/test/benchmarks/lexicographical_compare_three_way.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/benchmarks/to_chars.bench.cpp
M libcxx/test/benchmarks/variant_visit_1.bench.cpp
M libcxx/test/benchmarks/variant_visit_2.bench.cpp
M libcxx/test/benchmarks/variant_visit_3.bench.cpp
Log Message:
-----------
[libc++][NFC] Canonicalize the benchmark suite a bit
This replaces `BENCHMARK_TEMPLATE` with `BENCHMARK` and uses
`BENCHMARK_MAIN()` when possible.
Commit: a5f03b4adcd147aeecc0e0d029660c12fb4d2951
https://github.com/llvm/llvm-project/commit/a5f03b4adcd147aeecc0e0d029660c12fb4d2951
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/source/Plugins/Language/CPlusPlus/GenericOptional.cpp
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/TestDataFormatterGenericOptional.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/main.cpp
Log Message:
-----------
[lldb] Support "dereferencing" std::optional in `frame var` (#107077)
Commit: 4353530a6fc92c5748a73042371c2ddf487433e7
https://github.com/llvm/llvm-project/commit/4353530a6fc92c5748a73042371c2ddf487433e7
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/unittests/Host/MainLoopTest.cpp
Log Message:
-----------
[lldb/windows] Reset MainLoop events after handling them (#107061)
This prevents the callback function from being called in a busy loop.
Discovered by @slydiman on #106955.
Commit: 3d5e1ec6508c8425601d4cfaba4c8a8f18791e2b
https://github.com/llvm/llvm-project/commit/3d5e1ec6508c8425601d4cfaba4c8a8f18791e2b
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/include/lldb/Host/common/TCPSocket.h
M lldb/source/Host/common/TCPSocket.cpp
M lldb/unittests/Host/SocketTest.cpp
Log Message:
-----------
[lldb] Add a callback version of TCPSocket::Accept (#106955)
The existing function already used the MainLoop class, which allows one
to wait on multiple events at once. It needed to do this in order to
wait for v4 and v6 connections simultaneously. However, since it was
creating its own instance of MainLoop, this meant that it was impossible
to multiplex these sockets with anything else.
This patch simply adds a version of this function which uses an
externally provided main loop instance, which allows the caller to add
any events it deems necessary. The previous function becomes a very thin
wrapper over the new one.
Commit: 0748f4227cd6a4a32b155d4bb9ad3f07e1b54bfe
https://github.com/llvm/llvm-project/commit/0748f4227cd6a4a32b155d4bb9ad3f07e1b54bfe
Author: Him188 <tguan at nvidia.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
A llvm/test/CodeGen/AArch64/fabs-fp128.ll
Log Message:
-----------
[AArch64][GlobalISel] Legalize 128-bit types for FABS (#104753)
This patch adds a common lower action for `G_FABS`, which generates `and
x8, x8, #0x7fffffffffffffff` to reset the sign bit. The action does not
support vectors since `G_AND` does not support fp128.
This approach is different than what SDAG is doing. SDAG stores the
value onto stack, clears the sign bit in the most significant byte, and
loads the value back into register. This involves multiple memory ops
and sounds slower.
Commit: aa4f81efb99c93da3283ff3178be8db51cd655e2
https://github.com/llvm/llvm-project/commit/aa4f81efb99c93da3283ff3178be8db51cd655e2
Author: Arseniy Zaostrovnykh <necto.ne at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/test/Analysis/stack-addr-ps.cpp
Log Message:
-----------
[analyzer] Fix false positive for stack-addr leak on simple param ptr (#107003)
Assigning to a pointer parameter does not leak the stack address because
it stays within the function and is not shared with the caller.
Previous implementation reported any association of a pointer parameter
with a local address, which is too broad.
This fix enforces that the pointer to a stack variable is related by at
least one level of indirection.
CPP-5642
Fixes #106834
Commit: f77f60400f7a4c0c50bc3e3144cdade3bdf9aa3d
https://github.com/llvm/llvm-project/commit/f77f60400f7a4c0c50bc3e3144cdade3bdf9aa3d
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
Log Message:
-----------
[CodeGen] Remove checks that implicit operands are implicit
Commit: 0f5f440f24bc2af4e8ab481a99e03de438b12987
https://github.com/llvm/llvm-project/commit/0f5f440f24bc2af4e8ab481a99e03de438b12987
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
Log Message:
-----------
[clang][bytecode] Pass FPOptions to floating point ops (#107063)
So we don't have to retrieve them from the InterpFrame, which is slow.
Commit: c80cabfcbe88d2f67372bba982eadf45330a5e1b
https://github.com/llvm/llvm-project/commit/c80cabfcbe88d2f67372bba982eadf45330a5e1b
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/test/Transforms/SCCP/widening.ll
Log Message:
-----------
[SCCP] Avoid use of undef value in test (NFC)
Avoid optimization away most of the code if we resolve this to
a specific value.
Commit: 1a0cf245ac86c2f35c89cab47f83e9b474032e41
https://github.com/llvm/llvm-project/commit/1a0cf245ac86c2f35c89cab47f83e9b474032e41
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M offload/CMakeLists.txt
M offload/plugins-nextgen/host/CMakeLists.txt
M offload/test/api/is_initial_device.c
M offload/test/lit.cfg
M offload/test/mapping/declare_mapper_nested_default_mappers_array.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_array_subscript.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_complex_structure.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_ptr_subscript.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_var.cpp
M offload/test/mapping/map_both_pointer_pointee.c
M offload/test/mapping/target_pointers_members_map.cpp
M offload/test/offloading/CUDA/basic_launch.cu
M offload/test/offloading/CUDA/basic_launch_blocks_and_threads.cu
M offload/test/offloading/CUDA/basic_launch_multi_arg.cu
M offload/test/offloading/CUDA/launch_tu.cu
M offload/test/offloading/dynamic-schedule-non-spmd.cpp
M offload/test/offloading/dynamic-schedule.cpp
M offload/test/offloading/fortran/dtype-array-constant-index-map.f90
M offload/test/offloading/fortran/dump_map_tables.f90
M offload/test/offloading/fortran/target-depend.f90
M offload/test/offloading/fortran/target-map-all-common-block-members.f90
M offload/test/offloading/fortran/target-map-common-block.f90
M offload/test/offloading/fortran/target-map-declare-target-link-common-block.f90
M offload/test/offloading/fortran/target-map-first-common-block-member.f90
M offload/test/offloading/fortran/target-map-mix-imp-exp-common-block-members.f90
M offload/test/offloading/fortran/target-map-second-common-block-member.f90
M offload/test/offloading/high_trip_count_block_limit.cpp
M offload/test/offloading/schedule.c
M offload/test/sanitizer/double_free.c
M offload/test/sanitizer/double_free_racy.c
M offload/test/sanitizer/free_host_ptr.c
M offload/test/sanitizer/free_wrong_ptr_kind.c
M offload/test/sanitizer/free_wrong_ptr_kind.cpp
M offload/test/sanitizer/kernel_crash.c
M offload/test/sanitizer/kernel_crash_async.c
M offload/test/sanitizer/kernel_crash_many.c
M offload/test/sanitizer/kernel_crash_single.c
M offload/test/sanitizer/kernel_trap.c
M offload/test/sanitizer/kernel_trap.cpp
M offload/test/sanitizer/kernel_trap_async.c
M offload/test/sanitizer/kernel_trap_many.c
M offload/test/sanitizer/ptr_outside_alloc_1.c
M offload/test/sanitizer/ptr_outside_alloc_2.c
M offload/test/sanitizer/use_after_free_1.c
M offload/test/sanitizer/use_after_free_2.c
Log Message:
-----------
[Offload] Change x86_64-pc-linux to x86_64-unknown-linux (#107023)
It appears that the RUNTIMES build prefers the x86-64-unknown-linux-gnu
triple notation for the host. This fixes runtime / test breakages when
compiler-rt is used as the CLANG_DEFAULT_RTLIB.
Commit: 70a19adbc60c738903bbbb8e6d5ef2d41b681089
https://github.com/llvm/llvm-project/commit/70a19adbc60c738903bbbb8e6d5ef2d41b681089
Author: Rainer Orth <ro at gcc.gnu.org>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformFuchsia.c
M compiler-rt/test/profile/ContinuousSyncMode/runtime-counter-relocation.c
M compiler-rt/test/profile/ContinuousSyncMode/set-file-object.c
Log Message:
-----------
[profile] Change __llvm_profile_counter_bias etc. types to match llvm (#102747)
As detailed in Issue #101667, two `profile` tests `FAIL` on 32-bit
SPARC, both Linux/sparc64 and Solaris/sparcv9 (where the tests work when
enabled):
```
Profile-sparc :: ContinuousSyncMode/runtime-counter-relocation.c
Profile-sparc :: ContinuousSyncMode/set-file-object.c
```
The Solaris linker provides the crucial clue as to what's wrong:
```
ld: warning: symbol '__llvm_profile_counter_bias' has differing sizes:
(file runtime-counter-relocation-17ff25.o value=0x8; file libclang_rt.profile-sparc.a(InstrProfilingFile.c.o) value=0x4);
runtime-counter-relocation-17ff25.o definition taken
```
In fact, the types in `llvm` and `compiler-rt` differ:
- `__llvm_profile_counter_bias`/`INSTR_PROF_PROFILE_COUNTER_BIAS_VAR` is
created in `llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp`
(`InstrLowerer::getCounterAddress`) as `int64_t`, while
`compiler-rt/lib/profile/InstrProfilingFile.c` uses `intptr_t`. While
this doesn't matter in the 64-bit case, the type sizes differ for
32-bit.
- `__llvm_profile_bitmap_bias`/`INSTR_PROF_PROFILE_BITMAP_BIAS_VAR` has
the same issue: created in `InstrProfiling.cpp`
(`InstrLowerer::getBitmapAddress`) as `int64_t`, while
`InstrProfilingFile.c` again uses `intptr_t`.
This patch changes the `compiler-rt` types to match `llvm`. At the same
time, the affected testcases are enabled on Solaris, too, where they now
just `PASS`.
Tested on `sparc64-unknown-linux-gnu`, `sparcv9-sun-solaris2.11`,
`x86_64-pc-linux-gnu`, and `amd64-pc-solaris2.11.
Commit: f381cd069965dabfeb277f30a4e532d7fd498f6e
https://github.com/llvm/llvm-project/commit/f381cd069965dabfeb277f30a4e532d7fd498f6e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/minbw-user-non-sizable.ll
Log Message:
-----------
[SLP]Fix PR107036: Check if the type of the user is sizable before requesting its size.
Only some instructions should be considered as potentially reducing the
size of the operands types, not all instructions should be considered.
Fixes https://github.com/llvm/llvm-project/issues/107036
Commit: 0797c184c636889f2897746dc71390ae28005c7c
https://github.com/llvm/llvm-project/commit/0797c184c636889f2897746dc71390ae28005c7c
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
Log Message:
-----------
[SCCP] Explicitly mark gep as overdefined if ct eval fails
Don't just leave the result as unknown. I think this currently
works out thanks to undef resolution, but the correct thing to
do is set it to overdefined explicitly.
Commit: dd94537b40cfb8c480df27c08fc715ce91ba4089
https://github.com/llvm/llvm-project/commit/dd94537b40cfb8c480df27c08fc715ce91ba4089
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
Log Message:
-----------
[LV] Update call widening decision when scalarzing calls.
collectInstsToScalarize may decide to scalarize a call. If so, we have
to update the widening decision for the call, otherwise the call won't
be scalarized as expected during VPlan construction.
This issue was uncovered by f82543d509.
Commit: b74e09cb20e6218320013b54c9ba2f5c069d44b9
https://github.com/llvm/llvm-project/commit/b74e09cb20e6218320013b54c9ba2f5c069d44b9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/RISCV/unique-loads-insert-non-power-of-2.ll
Log Message:
-----------
[SLP]Check for the whole vector vectorization in unique scalars analysis
Need to check that thr whole number of register is attempted to
vectorize before actually trying to build the node to avoid compiler
crash.
Commit: ce8ec31298d5fbd81712af0f6bc34dae87f7f30c
https://github.com/llvm/llvm-project/commit/ce8ec31298d5fbd81712af0f6bc34dae87f7f30c
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
Log Message:
-----------
[SLP][REVEC] Support more mask pattern usage in shufflevector. (#106212)
Commit: a424b792053a48ef7e00636f28f3cc8faa23d637
https://github.com/llvm/llvm-project/commit/a424b792053a48ef7e00636f28f3cc8faa23d637
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_context.cpp
M compiler-rt/lib/rtsan/rtsan_context.h
M compiler-rt/lib/rtsan/rtsan_stack.cpp
M compiler-rt/lib/rtsan/rtsan_stack.h
M compiler-rt/test/rtsan/basic.cpp
Log Message:
-----------
[compiler-rt][rtsan] Record pc and bp higher up in the stack (#107014)
Functionally, this change affects only our printed stack traces. New
version does not expose any internal rtsan interworking
Commit: 20fa37bbfabca512b16a8497eb671a3bd4b5b96b
https://github.com/llvm/llvm-project/commit/20fa37bbfabca512b16a8497eb671a3bd4b5b96b
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[Vectorize] Fix -Wunused-variable in SLPVectorizer.cpp (NFC)
/llvm-project/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp:10310:26:
error: unused variable 'isExtractSubvectorMask' [-Werror,-Wunused-variable]
bool isExtractSubvectorMask =
^
1 error generated.
Commit: d7c44eff42f7c05d364e4a00048c534a30cea24b
https://github.com/llvm/llvm-project/commit/d7c44eff42f7c05d364e4a00048c534a30cea24b
Author: Han-Kuan Chen <hankuan.chen at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP][REVEC] Update test. NFC.
Commit: 7852ebc088b925ef1c1940cbd56a93d9f8e3e330
https://github.com/llvm/llvm-project/commit/7852ebc088b925ef1c1940cbd56a93d9f8e3e330
Author: yonghong-song <yhs at fb.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets/BPF.cpp
M clang/test/Preprocessor/bpf-predefined-macros.c
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/test/CodeGen/BPF/32-bit-subreg-cond-select.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
M llvm/test/CodeGen/BPF/CORE/no-narrow-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp1.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp2.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp3.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp4.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp5.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp6.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative1.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative2.ll
M llvm/test/CodeGen/BPF/alu8.ll
M llvm/test/CodeGen/BPF/atomics.ll
M llvm/test/CodeGen/BPF/basictest.ll
M llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
M llvm/test/CodeGen/BPF/cc_args.ll
M llvm/test/CodeGen/BPF/cc_args_be.ll
M llvm/test/CodeGen/BPF/cc_ret.ll
M llvm/test/CodeGen/BPF/cmp.ll
M llvm/test/CodeGen/BPF/cttz-ctlz.ll
M llvm/test/CodeGen/BPF/ex1.ll
M llvm/test/CodeGen/BPF/fi_ri.ll
M llvm/test/CodeGen/BPF/i128.ll
M llvm/test/CodeGen/BPF/intrinsics.ll
M llvm/test/CodeGen/BPF/load.ll
M llvm/test/CodeGen/BPF/loops.ll
M llvm/test/CodeGen/BPF/many_args1.ll
M llvm/test/CodeGen/BPF/objdump_atomics.ll
M llvm/test/CodeGen/BPF/objdump_cond_op.ll
M llvm/test/CodeGen/BPF/objdump_cond_op_2.ll
M llvm/test/CodeGen/BPF/objdump_imm_hex.ll
M llvm/test/CodeGen/BPF/objdump_intrinsics.ll
M llvm/test/CodeGen/BPF/objdump_nop.ll
M llvm/test/CodeGen/BPF/objdump_static_var.ll
M llvm/test/CodeGen/BPF/objdump_trivial.ll
M llvm/test/CodeGen/BPF/pr57872.ll
M llvm/test/CodeGen/BPF/reloc-2.ll
M llvm/test/CodeGen/BPF/remove_truncate_1.ll
M llvm/test/CodeGen/BPF/remove_truncate_2.ll
M llvm/test/CodeGen/BPF/remove_truncate_3.ll
M llvm/test/CodeGen/BPF/remove_truncate_6.ll
M llvm/test/CodeGen/BPF/remove_truncate_8.ll
M llvm/test/CodeGen/BPF/rodata_1.ll
M llvm/test/CodeGen/BPF/rodata_2.ll
M llvm/test/CodeGen/BPF/rodata_3.ll
M llvm/test/CodeGen/BPF/rodata_4.ll
M llvm/test/CodeGen/BPF/rodata_6.ll
M llvm/test/CodeGen/BPF/rodata_7.ll
M llvm/test/CodeGen/BPF/sanity.ll
M llvm/test/CodeGen/BPF/setcc.ll
M llvm/test/CodeGen/BPF/shifts.ll
M llvm/test/CodeGen/BPF/sockex2.ll
M llvm/test/CodeGen/BPF/undef.ll
M llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/BPF/xadd_legal.ll
M llvm/test/tools/llvm-objdump/BPF/interleaved-source-test.ll
Log Message:
-----------
[BPF] Make -mcpu=v3 as the default (#107008)
Before llvm20, (void)__sync_fetch_and_add(...) always generates locked
xadd insns. In linux kernel upstream discussion [1], it is found that
for arm64 architecture, the original semantics of
(void)__sync_fetch_and_add(...), i.e., __atomic_fetch_add(...), is
preferred in order for jit to emit proper native barrier insns.
In llvm commits [2] and [3], (void)__sync_fetch_and_add(...) will
generate the following insns:
- for cpu v1/v2: locked xadd insns to keep backward compatibility
- for cpu v3/v4: __atomic_fetch_add() insns
To ensure proper barrier semantics for (void)__sync_fetch_and_add(...),
cpu v3/v4 is recommended.
This patch enables cpu=v3 as the default cpu version. For users wanting
to use cpu v1, -mcpu=v1 needs to be explicitly added to clang/llc
command line.
[1]
https://lore.kernel.org/bpf/ZqqiQQWRnz7H93Hc@google.com/T/#mb68d67bc8f39e35a0c3db52468b9de59b79f021f
[2] https://github.com/llvm/llvm-project/pull/101428
[3] https://github.com/llvm/llvm-project/pull/106494
Commit: f70ccdaeb4ef9681ea490ea7779efbe72e643eda
https://github.com/llvm/llvm-project/commit/f70ccdaeb4ef9681ea490ea7779efbe72e643eda
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
Log Message:
-----------
[clang][bytecode][NFC] Move Call ops into Interp.cpp (#107104)
They are quite long and not templated.
Commit: df159d3cf8e681f8d225bd0b4ed0cbd97b16c588
https://github.com/llvm/llvm-project/commit/df159d3cf8e681f8d225bd0b4ed0cbd97b16c588
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
Log Message:
-----------
[GISEL][AArch64][NFC] Stop using wip_match_opcode for some opcodes (#106702)
This patch moves to the new style of writing
pattern for matching opcodes and thus deprecates using wip_match_opcoee.
It moves G_FCONSTANT, G_ICMP, G_STORE, and G_OR.
Commit: 05f5a91d00b02f4369f46d076411c700755ae041
https://github.com/llvm/llvm-project/commit/05f5a91d00b02f4369f46d076411c700755ae041
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/sink-foldable.ll
Log Message:
-----------
LICM: use IRBuilder in hoist BO assoc (#106978)
Use IRBuilder when creating the new invariant instruction, so that the
constant-folder has an opportunity to constant-fold the new Instruction
that we desire to create.
Commit: fedc7556ad5237cd11e29b8e70d412bdc39a4fa6
https://github.com/llvm/llvm-project/commit/fedc7556ad5237cd11e29b8e70d412bdc39a4fa6
Author: Nick Sarnie <sarnex at users.noreply.github.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/LTO/LTO.cpp
Log Message:
-----------
[ThinLTO] Don't always print ModulesToCompile debugging information (#106769)
Nothing went wrong in this case, we just successfully matched a module
by identifier. No need to print to std::error like we would for
something that should be user-visible.
Signed-off-by: Sarnie, Nick <nick.sarnie at intel.com>
Commit: 3b6e255c8339b0945f5f55757ee193fe23b47e2c
https://github.com/llvm/llvm-project/commit/3b6e255c8339b0945f5f55757ee193fe23b47e2c
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/test/Transforms/LICM/update-scev-after-hoist.ll
Log Message:
-----------
LICM/test: regen a test with UTC (NFC) (#107117)
Commit: b7017ef44827314758ba32c97eacb2d3f08c18e6
https://github.com/llvm/llvm-project/commit/b7017ef44827314758ba32c97eacb2d3f08c18e6
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
Log Message:
-----------
[RISCV] Rename sf_vcix_state to sf.vcix_state. NFC (#107115)
This PR: https://github.com/llvm/llvm-project/pull/106995 names the
vendor CSR in a wrong way, it should be `sf.` rather than `sf_` for
prefix.
Commit: e1bde1c5b203224b0fa68ee141ec2c7a079f5eac
https://github.com/llvm/llvm-project/commit/e1bde1c5b203224b0fa68ee141ec2c7a079f5eac
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Log Message:
-----------
[SDAG] Fix a typo in comment
Commit: 2a9f93bf13c717af3fe06bc226047f96b3f9c21a
https://github.com/llvm/llvm-project/commit/2a9f93bf13c717af3fe06bc226047f96b3f9c21a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/MC/RISCV/fp-default-rounding-mode.s
M llvm/test/MC/RISCV/rv32zfbfmin-valid.s
Log Message:
-----------
[RISCV] Use RNE rounding mode for fcvt.s.bf16. Don't print the rounding mode if RNE. (#106948)
The rounding mode has no effect on the instruction behavior. Using RNE
matches what we do for fcvt.s.h, fcvt.d.f, fcvt.d.h which are similarily
not affected by the rounding mode.
This appears to match the behavior of binutils. According to compiler
explore, objdump is unable to disassembler fcvt.s.bf16 with a non-zero
rounding mode.
Commit: 59a3b4156836c3ea8589d7a39e7b4712fc8698ec
https://github.com/llvm/llvm-project/commit/59a3b4156836c3ea8589d7a39e7b4712fc8698ec
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M llvm/include/llvm/ADT/DenseMap.h
M mlir/lib/Transforms/SROA.cpp
Log Message:
-----------
[ADT] Deprecate DenseMap::getOrInsertDefault (#107040)
This patch deprecates DenseMap::getOrInsertDefault in favor of
DenseMap::operator[], which does the same thing, has been around
longer, and is also a household name as part of std::map and
std::unordered_map.
Note that DenseMap provides several equivalent ways to insert or
default-construct a key-value pair:
- operator[Key]
- try_emplace(Key).first->second
- getOrInsertDefault(Key)
- FindAndConstruct(Key).second
Commit: 86835d2d5a24ed00ed3747b77029c896ba935036
https://github.com/llvm/llvm-project/commit/86835d2d5a24ed00ed3747b77029c896ba935036
Author: Daniel Grumberg <dgrumberg at apple.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
Log Message:
-----------
[clang][ExtractAPI] Remove erroneous module name check in MacroCallbacks (#107059)
rdar://135044923
Commit: 93857afc24abeeacdd58277b4ab32d38daa1e531
https://github.com/llvm/llvm-project/commit/93857afc24abeeacdd58277b4ab32d38daa1e531
Author: Christian Sigg <csigg at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/unittests/Driver/SimpleDiagnosticConsumer.h
Log Message:
-----------
[clang][Driver] Add missing include after 26bf0b4ae7df7f5350f71afd40a57cdf8f98c588.
https://github.com/llvm/llvm-project/commit/26bf0b4ae7df7f5350f71afd40a57cdf8f98c588
Commit: 903d1c6ee5de4ee87c1737906c264e219c05d4cb
https://github.com/llvm/llvm-project/commit/903d1c6ee5de4ee87c1737906c264e219c05d4cb
Author: Harald van Dijk <harald.vandijk at codeplay.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/tools/driver/CMakeLists.txt
M libclc/CMakeLists.txt
M llvm/tools/llvm-as/CMakeLists.txt
M llvm/tools/llvm-link/CMakeLists.txt
M llvm/tools/opt/CMakeLists.txt
Log Message:
-----------
[libclc] More cross compilation fixes (#97811)
* Move the setup_host_tool calls to the directories of their tool.
Although it works to call it in libclc, it can only appear in a single
location so it fails the "what if everyone did this?" test and causes
problems for downstream code that also wants to use native versions of
these tools from other projects.
* Correct the TARGET "${${tool}_target}" check. "${${tool}_target}" may
be set to the path to the executable, which works in dependencies but
cannot be tested using if(TARGET). For lack of a better alternative,
just check that "${${tool}_target}" is non-empty and trust that if it
is, it is set to a meaningful value. If somehow it turns out to be a
valid target, its value will still show up in error messages anyway.
* Account for llvm-spirv possibly being provided in-tree. Per
https://github.com/KhronosGroup/SPIRV-LLVM-Translator?tab=readme-ov-file#llvm-in-tree-build
it is possible to drop llvm-spirv into LLVM and have it built as part of
LLVM's build. In this configuration, cross builds of LLVM require a
native version of llvm-spirv to be built.
Commit: f1ef67ded5371ddeb0ee72ea435f61f58c9127c6
https://github.com/llvm/llvm-project/commit/f1ef67ded5371ddeb0ee72ea435f61f58c9127c6
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/hoist-binop.ll
M llvm/test/Transforms/LICM/update-scev-after-hoist.ll
Log Message:
-----------
LICM: extend hoist BO assoc to mul case (#106991)
Trivially extend hoistBOAssociation to also handle the BinaryOperator
Mul.
Alive2 proofs: https://alive2.llvm.org/ce/z/zjtR5g
Commit: 4da0aa382a706b002504134d38385e377bf20c89
https://github.com/llvm/llvm-project/commit/4da0aa382a706b002504134d38385e377bf20c89
Author: Daniel Bertalan <dani at danielbertalan.dev>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/lld/test/BUILD.gn
Log Message:
-----------
[gn build] Add missing llvm-strings dependency to check-lld (#106896)
This has been required by `lld/test/ELF/zsectionheader.s` since it was
added in 5d972c58.
Commit: df4746d1d076016095059da4af2a3c3cc54657fe
https://github.com/llvm/llvm-project/commit/df4746d1d076016095059da4af2a3c3cc54657fe
Author: Christian Sigg <csigg at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M utils/bazel/.bazelrc
Log Message:
-----------
[bazel] Change cache-silo-key to fix blob fetch issue.
Bazel builds currently fail with `Failed to fetch blobs because they do not exist remotely.`.
Set a cache-silo-key to start a new cache.
Commit: 2c7786e94a1058bd4f96794a1d4f70dcb86e5cc5
https://github.com/llvm/llvm-project/commit/2c7786e94a1058bd4f96794a1d4f70dcb86e5cc5
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/reverse_extract_elements.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
Log Message:
-----------
Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (#106770)
This is a follow up to 924907bc6, and is mostly motivated by consistency
but does include one additional optimization. In general, we prefer 0.0
over -0.0 as the identity value for an fadd. We use that value in
several places, but don't in others. So, let's be consistent and use the
same identity (when nsz allows) everywhere.
This creates a bunch of test churn, but due to 924907bc6, most of that
churn doesn't actually indicate a change in codegen. The exception is
that this change enables the use of 0.0 for nsz, but *not* reasoc, fadd
reductions. Or said differently, it allows the neutral value of an
ordered fadd reduction to be 0.0.
Commit: 8e4b8155c1b80a68fcf854c305f06602b37da218
https://github.com/llvm/llvm-project/commit/8e4b8155c1b80a68fcf854c305f06602b37da218
Author: Michael Liao <michael.hliao at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/test/CodeGen/M68k/pipeline.ll
Log Message:
-----------
[M68k] Fix compilation pipeline check
- After 'RemoveLoadsIntoFakeUses' is enabled to support llvm.fake.use
Commit: 9626e84faeaab200665bae9694458c2beb3d49c7
https://github.com/llvm/llvm-project/commit/9626e84faeaab200665bae9694458c2beb3d49c7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode][NFC] Simplify builtin-functions.cpp (#107118)
The effect is the same, but this version doesn't take as long to
evaluate.
Commit: 0b2f2537a5b717539b200bd7fa31cbc24679e96f
https://github.com/llvm/llvm-project/commit/0b2f2537a5b717539b200bd7fa31cbc24679e96f
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[LV] Separate AnyOf recurrence from getRecurrenceIdentity [NFC]
These recurrence types don't have a meaningful identity, and the
routine was abused to return the start value instead. Out of the
three callers to this routine, only one actually wants this
behavior. This is a prep change for removing the routine entirely
and commoning it with other copies of the same logic.
Commit: a8e1c6f99abc273677afed5eaaeee2c0296db59f
https://github.com/llvm/llvm-project/commit/a8e1c6f99abc273677afed5eaaeee2c0296db59f
Author: Giuseppe Rossini <giuseppe.rossini at amd.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
A mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
Log Message:
-----------
[MLIR][AMDGPU] Add support for fp8 ops on gfx12 (#106388)
This PR is adding support for `fp8` and `bfp8` on gfx12
Commit: ebdadcfeb9c63f56703bf47dfeb6aff5a66ddfa1
https://github.com/llvm/llvm-project/commit/ebdadcfeb9c63f56703bf47dfeb6aff5a66ddfa1
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchEmpty.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchUnreachable.ll
M llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll
M llvm/test/CodeGen/SPIRV/transcoding/GlobalFunAnnotate.ll
Log Message:
-----------
[SPIR-V] Improve correctness of emitted MIR between passes for branching instructions (#106966)
This PR improves correctness of emitted MIR between passes for branching
instructions and thus increase number of passing tests when expensive
checks are on. Specifically, we address here such issues with machine
verifier as:
* fix switch generation: generate correct successors and undo the
"address taken" status to reflect that a successor doesn't actually
correspond to an IR-level basic block;
* fix incorrect definition of OpBranch and OpBranchConditional in
TableGen (SPIRVInstrInfo.td) to set isBarrier status properly and set a
correct type of virtual registers;
* fix a case when Phi refers to a type definition that goes after the
Phi instruction, so that the virtual register definition of the type
doesn't dominate all uses.
This PR decrease number of failing tests under expensive checks from 56
to 50.
Commit: 4f403e88f260cd1df3633fbcbe8fa8d1c8e0a745
https://github.com/llvm/llvm-project/commit/4f403e88f260cd1df3633fbcbe8fa8d1c8e0a745
Author: Vyacheslav Levytskyy <vyacheslav.levytskyy at intel.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
A llvm/test/CodeGen/SPIRV/debug-info/no-misplaced-opextinst.ll
Log Message:
-----------
[SPIR-V] Ensure that OpExtInst instructions generated by NonSemantic_Shader_DebugInfo_100 are not mixed up with other OpExtInst instructions (#107007)
This PR is to ensure that OpExtInst instructions generated by
NonSemantic_Shader_DebugInfo_100 are not mixed up with other OpExtInst
instructions.
Original implementation
(https://github.com/llvm/llvm-project/pull/97558) has introduced an
issue by moving OpExtInst instruction with the 3rd operand equal to
DebugSource (value 35) or DebugCompilationUnit (value 1) even if
OpExtInst is not generated by NonSemantic_Shader_DebugInfo_100
implementation code.
The reproducer is attached as a new test case. The code of the test case
reproduces the issue, because "lgamma" has the same code (35) inside
OpenCL_std as DebugSource inside NonSemantic_Shader_DebugInfo_100.
Commit: e89bcfc0e86cd4952c03fdf920d11c598ae6e16a
https://github.com/llvm/llvm-project/commit/e89bcfc0e86cd4952c03fdf920d11c598ae6e16a
Author: Jorge Gorbe Moya <jgorbe at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Add tracking for ShuffleVectorInst::commute. (#106644)
Track it as an operand swap + a `setShuffleMask` and delegate to the
`llvm::ShuffleVectorInst` implementation.
Commit: fdc1b5d290edfefe93c2bf0582e8e4363bda63ee
https://github.com/llvm/llvm-project/commit/fdc1b5d290edfefe93c2bf0582e8e4363bda63ee
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/optdriver.cpp
Log Message:
-----------
[NFC][opt] Rename VerifierKind enums (#106789)
Make into enum class.
Output really should be InputOutput since it also verifies the input IR.
Commit: 46407366166dc84c95075cf273acc005605967fe
https://github.com/llvm/llvm-project/commit/46407366166dc84c95075cf273acc005605967fe
Author: Hristo Hristov <hghristov.rmm at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M libcxx/modules/std/type_traits.inc
Log Message:
-----------
[libc++] Add missing `std::is_virtual_base_of` to `type_traits.inc` (#107009)
std::is_virtual_base_of was implemented in https://github.com/llvm/llvm-project/pull/105847
Commit: 26a4edf655aac138ef4f8cebf865d34b9ab4ff2d
https://github.com/llvm/llvm-project/commit/26a4edf655aac138ef4f8cebf865d34b9ab4ff2d
Author: Petr Hosek <phosek at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2.cmake
M cmake/Modules/HandleCompilerRT.cmake
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
Log Message:
-----------
[CMake][compiler-rt] Support for using compiler-rt atomic library (#106603)
Not every toolchain provides and want to use libatomic which is a part
of GCC, some toolchains may opt into using compiler-rt atomic library.
Commit: b91b1f0bd38c8e5d8f7eb30413ec799581e3d46e
https://github.com/llvm/llvm-project/commit/b91b1f0bd38c8e5d8f7eb30413ec799581e3d46e
Author: vporpo <vporpodas at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Type.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[SandboxIR] Implement remaining ConstantInt functions (#106775)
This patch adds the remaining ConstantInt:: functions and it also
implements the IntegerType class.
Commit: fb14f1df54c3e4edaaf3aa34268147f4da11d3b4
https://github.com/llvm/llvm-project/commit/fb14f1df54c3e4edaaf3aa34268147f4da11d3b4
Author: Arthur Eubanks <aeubanks at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/test/CodeGen/pgo-force-function-attrs.ll
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/test/Instrumentation/PGOForceFunctionAttrs/basic.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Log Message:
-----------
[PGO][Pipeline] Enable PGOForceFunctionAttrs in PGO optimization pipelines (#106790)
Remove flag that turns on the PGOForceFunctionAttrs pass and always add
it to default pipelines when using PGO.
This is NFC by default since PGOOpt->ColdOptType is by default
ColdFuncOpt::Default.
Remove -O2 RUN line in basic.ll since we now have the pipeline tests.
Commit: 42f5277de16cd7fad01285ade9004675b8253ced
https://github.com/llvm/llvm-project/commit/42f5277de16cd7fad01285ade9004675b8253ced
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M libcxx/include/__config
M libcxx/include/__type_traits/datasizeof.h
M libcxx/test/libcxx/type_traits/datasizeof.compile.pass.cpp
Log Message:
-----------
[libc++] Fix __datasizeof_v for Clang17 and 18 in C++03 (#106832)
This also disables the use of `__datasizeof`, since it's currently
broken for empty types.
Commit: 24b6b82487f15dd9d6cbe8a716dd13a6808a2528
https://github.com/llvm/llvm-project/commit/24b6b82487f15dd9d6cbe8a716dd13a6808a2528
Author: Damyan Pepper <damyanp at microsoft.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
Log Message:
-----------
[NFC] Add llvm_unreachable to getRCPrefix (#106822)
Commit: 884d7c137a587fdd7549bd8a26f887bbeda0cc86
https://github.com/llvm/llvm-project/commit/884d7c137a587fdd7549bd8a26f887bbeda0cc86
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
R llvm/test/Transforms/SLPVectorizer/RISCV/unique-loads-insert-non-power-of-2.ll
Log Message:
-----------
Revert "[SLP]Check for the whole vector vectorization in unique scalars analysis"
This reverts commit b74e09cb20e6218320013b54c9ba2f5c069d44b9 after
post-commit review. The number of parts is calculated incorrectly.
Commit: 571c8c2c88122d318ed84cd9e948613e3f1aac5f
https://github.com/llvm/llvm-project/commit/571c8c2c88122d318ed84cd9e948613e3f1aac5f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/reduction-whole-regs-loads.ll
Log Message:
-----------
Revert "[SLP]Initial support for non-power-of-2 (but still whole register) number of elements in operands."
This reverts commit a3ea90ffbbe47d9a1b3eab03324f09d7b8e0dcb3 after the
post commit review. The number of parts is calculated incorrectly.
Commit: 126940bde3e48ad9bf0a6966fc473e22d4dade7d
https://github.com/llvm/llvm-project/commit/126940bde3e48ad9bf0a6966fc473e22d4dade7d
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLPVectorizer] Use DenseMap::{find,try_emplace} (NFC) (#107123)
I'm planning to deprecate and eventually remove
DenseMap::FindAndConstruct in favor of operator[].
Commit: 15fa3ba547bc3ee04af5c32b8f723a97e3feefd8
https://github.com/llvm/llvm-project/commit/15fa3ba547bc3ee04af5c32b8f723a97e3feefd8
Author: Amir Ayupov <aaupov at fb.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M bolt/lib/Profile/YAMLProfileReader.cpp
A bolt/test/X86/yaml-unknown-keys.test
M bolt/tools/merge-fdata/merge-fdata.cpp
Log Message:
-----------
[BOLT][YAML] Allow unknown keys in the input (#100824)
This ensures forward compatibility, where old BOLT versions can consume
the profile created by newer versions with extra keys.
Test Plan: added yaml-unknown-keys.test
Commit: eec1fac9b51d06c8afafe9952a20ba7cd4c3ce1c
https://github.com/llvm/llvm-project/commit/eec1fac9b51d06c8afafe9952a20ba7cd4c3ce1c
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/test/SemaCXX/cxx2c-placeholder-vars.cpp
Log Message:
-----------
[Clang] Fix handling of placeholder variables name in init captures (#107055)
We were incorrectly not deduplicating results when looking up `_` which,
for a lambda init capture, would result in an ambiguous lookup.
The same bug caused some diagnostic notes to be emitted twice.
Fixes #107024
Commit: 1fbb6b4efc9e9d257f0f7e5065f40f9b9677ca7c
https://github.com/llvm/llvm-project/commit/1fbb6b4efc9e9d257f0f7e5065f40f9b9677ca7c
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
Log Message:
-----------
[LV] Prefer FLT_MIN/MAX for fmin/fmax reductions with ninf (#107141)
Analogous to 2c7786e94a1058bd4f96794a1d4f70dcb86e5cc5, cleanup a case
where the vectorizer is emitting a non-canonical identity value given
the available flags. We use largest/smallest value during ISEL, and VP
expansion, but not during vectorization.
Since the fmin/fmax/fminimum/fmaximum intrinsics don't require a start
value, this difference is only visible when masking of inactive lanes is
required.
Primary motivation of this change is simply to remove a difference
between version of code which reason about the identity value of a
reduction so I can kill all but one off.
In review, it was pointed out that this is actually a functional fix as well.
The old code used inf on a noinf reduction instruction - whose
result is poison! That wasn't the intent of the code.
Commit: 451a3135a7afece0b6e7605376ce208435605934
https://github.com/llvm/llvm-project/commit/451a3135a7afece0b6e7605376ce208435605934
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/DominanceFrontierImpl.h
M llvm/include/llvm/CodeGen/MachineDominanceFrontier.h
Log Message:
-----------
[DominanceFrontier] Remove unused functions (#106913)
Commit: eb05e8fde1ebc4cda2106b1236620a8a89b36b7c
https://github.com/llvm/llvm-project/commit/eb05e8fde1ebc4cda2106b1236620a8a89b36b7c
Author: Martin Storsjö <martin at martin.st>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/www/c_status.html
Log Message:
-----------
[clang] [docs] Clarify the issue with compiler-rt on Windows/MSVC (#106875)
Compiler-rt does support Windows just fine, even if outdated docs pages
didn't list it as one of the supported OSes, this is being rectified in
https://github.com/llvm/llvm-project/pull/106874.
MinGW is another environment configuration on Windows, where compiler-rt
or libgcc is linked in automatically, so there's no issue with having
such builtins functions available.
For MSVC style environments, compiler-rt builtins do work just fine, but
Clang doesn't automatically link them in. See e.g.
https://discourse.llvm.org/t/improve-autolinking-of-compiler-rt-and-libc-on-windows-with-lld-link/71392
for a discussion on how to improve this situation. But none of that
issue is that compiler-rt itself wouldn't support Windows.
Commit: fcb7b390ccd5b4cfc71f13b5e16a846f3f400c10
https://github.com/llvm/llvm-project/commit/fcb7b390ccd5b4cfc71f13b5e16a846f3f400c10
Author: Martin Storsjö <martin at martin.st>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/debug-options-as.c
Log Message:
-----------
[clang] Don't add DWARF debug info when assembling .s with clang-cl /Z7 (#106686)
This fixes a regression from f58330cbe44598eb2de0cca3b812f67fea0a71ca.
That commit changed the clang-cl options /Zi and /Z7 to be implemented
as aliases of -g rather than having separate handling.
This had the unintended effect, that when assembling .s files with
clang-cl, the /Z7 option (which implies using CodeView debug info) was
treated as a -g option, which causes `ClangAs::ConstructJob` to pick up
the option as part of `Args.getLastArg(options::OPT_g_Group)`, which
sets the `WantDebug` variable.
Within `Clang::ConstructJob`, we check for whether explicit `-gdwarf` or
`-gcodeview` options have been set, and if not, we pick the default
debug format for the current toolchain. However, in `ClangAs`, if debug
info has been enabled, it always adds DWARF debug info.
Add similar logic in `ClangAs` - check if the user has explicitly
requested either DWARF or CodeView, otherwise look up the toolchain
default. If we (either implicitly or explicitly) should be producing
CodeView, don't enable the default `ClangAs` DWARF generation.
This fixes the issue, where assembling a single `.s` file with clang-cl,
with the /Z7 option, causes the file to contain some DWARF sections.
This causes the output executable to contain DWARF, in addition to the
separate intended main PDB file.
By having the output executable contain DWARF sections, LLDB only looks
at the (very little) DWARF info in the executable, rather than looking
for a separate standalone PDB file. This caused an issue with LLDB's
tests, https://github.com/llvm/llvm-project/issues/101710.
Commit: 3bd161e98d89d31696002994771b7761f1c74859
https://github.com/llvm/llvm-project/commit/3bd161e98d89d31696002994771b7761f1c74859
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
Log Message:
-----------
[LV] Honor forced scalars in setVectorizedCallDecision.
Similarly to dd94537b4, setVectorizedCallDecision also did not consider
ForcedScalars. This lead to VPlans not reflecting the decision by the
legacy cost model (cost computation would use scalar cost, VPlan would
have VPWidenCallRecipe).
To fix this, check if the call has been forced to scalar in
setVectorizedCallDecision.
Note that this requires moving setVectorizedCallDecision after
collectLoopUniforms (which sets ForcedScalars). collectLoopUniforms does
not depend on call decisions and can safely be moved.
Fixes https://github.com/llvm/llvm-project/issues/107051.
Commit: 70f3511adaea4d3a9f8fadb23e84f518cc0654ab
https://github.com/llvm/llvm-project/commit/70f3511adaea4d3a9f8fadb23e84f518cc0654ab
Author: Martin Storsjö <martin at martin.st>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/test/Driver/debug-options-as.c
Log Message:
-----------
[clang] [test] Fix the debug-options-as.c test on macOS
Separate the path, which may begin with e.g. /Users, with "--" from
the other options, to make it clear that it is a path, not an
option.
This fixes a test from fcb7b390ccd5b4cfc71f13b5e16a846f3f400c10.
Commit: ec8e1c623a78536b956cc2c1d42ae75c4024ad66
https://github.com/llvm/llvm-project/commit/ec8e1c623a78536b956cc2c1d42ae75c4024ad66
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert.ll
Log Message:
-----------
[RISCV] Custom promote f16/bf16 (s/u)int_to_fp. (#107026)
This avoids having isel patterns that emit two instrutions. It also
allows us to remove sext.w and slli+srli pairs by using fcvt.s.w(u) on
RV64.
Commit: 319e8cd201e6744199da377fba237dd276063e49
https://github.com/llvm/llvm-project/commit/319e8cd201e6744199da377fba237dd276063e49
Author: Ian Anderson <iana at apple.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/Sema/SemaAvailability.cpp
M clang/test/FixIt/fixit-availability-maccatalyst.m
M clang/test/FixIt/fixit-availability.mm
Log Message:
-----------
[Clang][Sema] clang generates incorrect fix-its for API_AVAILABLE (#105855)
Apple's API_AVAILABLE macro has its own notion of platform names which
are supported by \_\_API_AVAILABLE_PLATFORM_<name> macros. They don't
follow a consistent naming convention, but there's at least one that
matches a valid availability attribute platform name. Instead of
lowercasing the source spelling name, search for a defined macro and use
that in the fix-it.
Commit: cdab6ffd6d32566277f71d9733e4b21750ea38c8
https://github.com/llvm/llvm-project/commit/cdab6ffd6d32566277f71d9733e4b21750ea38c8
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/clobber_frame_ptr.ll
Log Message:
-----------
[X86] Don't save/restore fp/bp around terminator (#106462)
In function spillFPBP we already try to skip terminator, but there is a
logic error, so when there is only terminator instruction in the MBB, it
still tries to save/restore fp/bp around it if the terminator clobbers
fp/bp, for example a tail call with ghc calling convention.
Now this patch really skips terminator even if it is the only
instruction in the MBB.
Commit: cbb5f03f5042aa6d7c5d17963eba192861c9165c
https://github.com/llvm/llvm-project/commit/cbb5f03f5042aa6d7c5d17963eba192861c9165c
Author: Martin Storsjö <martin at martin.st>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/test/Driver/debug-options-as.c
Log Message:
-----------
[clang] [test] Fix the debug-options-as.c test on PowerPC
Use an explicit MSVC triple with an architecture that does
have proper handling for MSVC style targets.
This fixes a test from fcb7b390ccd5b4cfc71f13b5e16a846f3f400c10.
Commit: 0ef7b1d21ca7ce55f1c8d3ec739e64775572e9cc
https://github.com/llvm/llvm-project/commit/0ef7b1d21ca7ce55f1c8d3ec739e64775572e9cc
Author: Joshua Baehring <98630690+JoshuaMBa at users.noreply.github.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/secondary.h
Log Message:
-----------
[scudo] Update secondary cache released pages bound. (#106466)
`MaxReleasedCachePages` has been set to 4. Initially, in #105009 , we
set `MaxReleasedCachePages` to 0 so that the partial chunk heuristic
could be introduced incrementally as we observed its impact on retrieval
order and more generally, performance.
Co-authored-by: Joshua Baehring <josh.baehring at yale.edu>
Commit: 334d1238aafa8ca017d433caaf8f6e00f2622111
https://github.com/llvm/llvm-project/commit/334d1238aafa8ca017d433caaf8f6e00f2622111
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
Log Message:
-----------
[HLSL] Adjust resource binding diagnostic flags code (#106657)
Adjust register binding diagnostic flags code in a couple of ways:
- Store the resource class in the Flags struct to avoid duplicated
scanning for HLSLResourceClassAttribute
- Avoid unnecessary indirection when converting resource class to
register type
- Remove recursion and reduce duplicated code
Also fixes a case where struct with an array was incorrectly diagnosed
unfit for `c` register binding.
This will also simplify work that is needed to be done in this area for
llvm/llvm-project#104861.
Commit: dfc21acdfa0eb7f6f6bb563445959fb18ea863da
https://github.com/llvm/llvm-project/commit/dfc21acdfa0eb7f6f6bb563445959fb18ea863da
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/test/Fir/CUDA/cuda-allocate.fir
Log Message:
-----------
[flang][cuda] Convert global allocation for pinned variable (#106807)
ALLOCATE/DEALLOCATE statements for module allocatable variable with the
pinned attribute can be lowered to the standard runtime call and do not
need further action since these variables will have a unique descriptor
that is on the host.
Commit: b2dabd2b06cb0ca5ea534bafe33c5cff5521be18
https://github.com/llvm/llvm-project/commit/b2dabd2b06cb0ca5ea534bafe33c5cff5521be18
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[Sema] Fix warnings
This patch fixes:
clang/lib/Sema/SemaHLSL.cpp:838:12: error: unused variable
'TheVarDecl' [-Werror,-Wunused-variable]
clang/lib/Sema/SemaHLSL.cpp:840:19: error: unused variable
'CBufferOrTBuffer' [-Werror,-Wunused-variable]
Commit: d966d4708fe5084e47ca3d9d411935d6870aefff
https://github.com/llvm/llvm-project/commit/d966d4708fe5084e47ca3d9d411935d6870aefff
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/SupportFile.h
Log Message:
-----------
[lldb] Make SupportFile's FileSpec and Checksum const (NFC)
Commit: 98bde7fd872c10e49035d5dc5d2f2b44489f6a07
https://github.com/llvm/llvm-project/commit/98bde7fd872c10e49035d5dc5d2f2b44489f6a07
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/Symbol/LineTable.cpp
Log Message:
-----------
[lldb] Avoid FileSpec indirection where we can use SupportFiles directly
Now that more parts of LLDB know about SupportFiles, avoid going through
FileSpec (and losing the Checksum in the process). Instead, use the
SupportFile directly.
Commit: 53d3d1ab9abf28e92a27fce0a99ae83720d27d75
https://github.com/llvm/llvm-project/commit/53d3d1ab9abf28e92a27fce0a99ae83720d27d75
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLPVectorizer] Avoid two successive hash lookups on the same key (#107143)
This patch replaces the find-try_emplace sequence with just one call
to try_emplace, thereby avoiding two successive hash lookups on the
same key. I am not using the "inserted" boolean from try_emplace to
preserve the original behavior (that is, before PR 107123) that checks
to see if the value is nullptr or not.
Commit: db8ca88f578c2270ab2d461fa0dd5e7a1d1bad43
https://github.com/llvm/llvm-project/commit/db8ca88f578c2270ab2d461fa0dd5e7a1d1bad43
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/utils/TableGen/VTEmitter.cpp
Log Message:
-----------
[TableGen] Print all arguments to GET_VT_ATTR in the comment in GenVT.inc. NFC
Commit: 18cf14efe3e82b2343817fd174bcac48244c8f50
https://github.com/llvm/llvm-project/commit/18cf14efe3e82b2343817fd174bcac48244c8f50
Author: Scott Linder <Scott.Linder at amd.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/docs/conf.py
M llvm/docs/conf.py
Log Message:
-----------
[Docs] Use cacheable myst_heading_slug_func value
Avoid creating an uncacheable conf variable by using a string instead of
a function reference. Also has the effect of avoiding triggering the
"config.cache" sphinx warning.
Requires myst_parser 0.19.0 (specifically
https://github.com/executablebooks/MyST-Parser/pull/696) which is over a
year old by now. Do we mandate any minimum version for these
dependencies?
Commit: db3792b87a4fd759e336c44946a3e2ec0008c993
https://github.com/llvm/llvm-project/commit/db3792b87a4fd759e336c44946a3e2ec0008c993
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptoi-constrained-sdnode.ll
Log Message:
-----------
[RISCV] Custom promote f16/bf16 fp_to_(s/u)int to reduce isel patterns that emit two instructions. (#107011)
All of the test changes are because integer type legalization prefers to promote
fp_to_uint to fp_to_sint if neither is "Legal".
Commit: 7d3b81d06f96bc27673f31a7bd7d141ce4a2777b
https://github.com/llvm/llvm-project/commit/7d3b81d06f96bc27673f31a7bd7d141ce4a2777b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/tools/lldb-dap/package.json
Log Message:
-----------
[lldb] Bump the lldb-dap version number
Bump the lldb-dap version number so that we can publish and updated
version in the Visual Studio Marketplace.
Commit: 98bb354a0add4aeb614430f48a23f87992166239
https://github.com/llvm/llvm-project/commit/98bb354a0add4aeb614430f48a23f87992166239
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/multi-tracked-reduced-value.ll
Log Message:
-----------
[SLP]Fix PR107037: correctly track origonal/modified after vectorizations reduced values
Need to correctly track reduced values with multiple uses in the same
reduction emission attempt. Otherwise, the number of the reuses might be
calculated incorrectly, and may cause compiler crash.
Fixes https://github.com/llvm/llvm-project/issues/107037
Commit: d3c10b51a99d4476261f57ceaa7db60960cd5493
https://github.com/llvm/llvm-project/commit/d3c10b51a99d4476261f57ceaa7db60960cd5493
Author: Peter Lafreniere <peter at n8pjl.ca>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/test/CodeGen/M68k/Arith/add.ll
R llvm/test/CodeGen/M68k/Arith/sext-i1.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
A llvm/test/CodeGen/M68k/Data/link-unlnk.ll
A llvm/test/CodeGen/M68k/Data/load-extend.ll
A llvm/test/CodeGen/M68k/Data/load-imm.ll
A llvm/test/CodeGen/M68k/Data/sext-i1.ll
R llvm/test/CodeGen/M68k/link-unlnk.ll
R llvm/test/CodeGen/M68k/load-extend.ll
Log Message:
-----------
[M68k] Introduce more MOVI cases (#98377)
Add three more special cases for loading registers with immediates.
The first allows values in the range of [-255, 255] to be loaded with
MOVEQ, even if the register is more than 8 bits and the sign extention
is unwanted. This is done by loading the bitwise complement of the
desired value, then performing a NOT instruction on the loaded register.
This special case is only used when a simple MOVEQ cannot be used, and
is only used for 32 bit data registers. Address registers cannot support
MOVEQ, and the two-instruction sequence is no faster or smaller than a
plain MOVE instruction when loading 16 bit immediates on the 68000, and
likely slower for more sophisticated microarchitectures. However, the
instruction sequence is both smaller and faster than the corresponding
MOVE instruction for 32 bit register widths.
The second special case is for zeroing address registers. This simply
expands to subtracting a register with itself, consuming one instruction
word rather than 2-3, with a small improvement in speed as well.
The last special case is for assigning sign-extended 16-bit values to a
full address register. This takes advantage of the fact that the movea.w
instruction sign extends the output, permitting the immediate to be
smaller. This is similar to using lea with a 16-bit address, which is
not added in this patch as 16-bit absolute addressing is not yet
implemented.
This is a v2 submission of #90817. It also creates a 'Data' test
directory to better align with the backend's tablegen layout.
Commit: 1c874bbbd67c5795113fa307512ea514f06dac29
https://github.com/llvm/llvm-project/commit/1c874bbbd67c5795113fa307512ea514f06dac29
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-select-icmp.ll
M llvm/test/CodeGen/RISCV/half-select-fcmp.ll
M llvm/test/CodeGen/RISCV/half-select-icmp.ll
Log Message:
-----------
[RISCV] Don't promote f16/bf16 SELECT with Zfhmin/Zfbfmin. (#107138)
Select only needs branches and moves so we don't need to promote it.
Promoting would canonicalize NaNs which select shouldn't do.
Commit: b24a304435632710bb54a0cd9cda1757abb8c160
https://github.com/llvm/llvm-project/commit/b24a304435632710bb54a0cd9cda1757abb8c160
Author: Daniel Bertalan <dani at danielbertalan.dev>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lld/MachO/Symbols.cpp
M lld/MachO/Symbols.h
Log Message:
-----------
[lld-macho] Always store symbol name length eagerly (NFC) (#106906)
The only instance where we weren't already passing a `StringRef` with a
known length to `Symbol`'s constructor is where the argument is a string
literal. Even in that case, lazy `strlen` calls don't make sense, as the
compiler can constant-evaluate the `StringRef(const char*)` constructor.
For symbols that go into the symbol table we need the length when
calculating the hash anyway. We could get away with not calling
`getName()` for local symbols, but the total contribution of `strlen` to
the run time is already below 1%, so that would just complicate the code
for a negligible benefit.
Commit: 3209766608d14fbb0add96916a28c3f98fed9460
https://github.com/llvm/llvm-project/commit/3209766608d14fbb0add96916a28c3f98fed9460
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
A llvm/test/Analysis/CtxProfAnalysis/inline.ll
A llvm/test/Analysis/CtxProfAnalysis/json_equals.py
M llvm/test/Analysis/CtxProfAnalysis/load.ll
M llvm/unittests/Transforms/Utils/CallPromotionUtilsTest.cpp
Log Message:
-----------
[ctx_prof] Add Inlining support (#106154)
Add an overload of `InlineFunction` that updates the contextual profile. If there is no contextual profile, this overload is equivalent to the non-contextual profile variant.
Post-inlining, the update mainly consists of:
- making the PGO instrumentation of the callee "the caller's": the owner function (the "name" parameter of the instrumentation instructions) becomes the caller, and new index values are allocated for each of the callee's indices (this happens for both increment and callsite instrumentation instructions)
- in the contextual profile:
- each context corresponding to the caller has its counters updated to incorporate the counters inherited from the callee at the inlined callsite. Counter values are copied as-is because no scaling is required since the profile is contextual.
- the contexts of the callee (at the inlined callsite) are moved to the caller.
- the callee context at the inlined callsite is deleted.
Commit: dce73e115e11cf75c0e50fb96a9ba046c880838e
https://github.com/llvm/llvm-project/commit/dce73e115e11cf75c0e50fb96a9ba046c880838e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
R llvm/test/Transforms/SLPVectorizer/X86/multi-tracked-reduced-value.ll
Log Message:
-----------
Revert "[SLP]Fix PR107037: correctly track origonal/modified after vectorizations reduced values"
This reverts commit 98bb354a0add4aeb614430f48a23f87992166239 to fix
buildbots https://lab.llvm.org/buildbot/#/builders/155/builds/2056 and https://lab.llvm.org/buildbot/#/builders/11/builds/4407
Commit: 18263c319092b878f25dd4025830f8e6691245d4
https://github.com/llvm/llvm-project/commit/18263c319092b878f25dd4025830f8e6691245d4
Author: Chris Apple <cja-private at pm.me>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M compiler-rt/lib/rtsan/rtsan_context.cpp
Log Message:
-----------
[compiler-rt][rtsan] Add scoped reporting lock (#107167)
Uses a static lock to ensure multiple threads reporting issues at the
same time don't have printing collisions. This isn't so important now,
but will be with continue mode in the future.
Commit: b076f6640e3c2781410588f4a8e4ccfeed8eb606
https://github.com/llvm/llvm-project/commit/b076f6640e3c2781410588f4a8e4ccfeed8eb606
Author: Jason Molenda <jmolenda at apple.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M lldb/source/Target/TargetProperties.td
M lldb/test/API/functionalities/memory/big-read/TestMemoryReadMaximumSize.py
Log Message:
-----------
[lldb] Remove limit on max memory read size (#105765)
`memory read` will return an error if you try to read more than 1k bytes
in a single command, instructing you to set
`target.max-memory-read-size` or use `--force` if you intended to read
more than that. This is a safeguard for a command where people are being
explicit about how much memory they would like lldb to read (either to
display, or save to a file) and is an annoyance every time you need to
read more than a small amount. If someone confuses the --count argument
with the start address, lldb may begin dumping gigabytes of data but I'd
rather that behavior than requiring everyone to special-case their way
around a common use case.
I don't want to remove the setting because many people have added (much
larger) default max read sizes to their ~/.lldbinit files after hitting
this behavior. Another option would be to stop reading/using the value
in Target.cpp, but I see no harm in leaving the setting if someone
really does prefer to have a small cap on their memory read size.
Commit: 3e8840ba71bfcceeb598c2ca28d2d8784e24ba1e
https://github.com/llvm/llvm-project/commit/3e8840ba71bfcceeb598c2ca28d2d8784e24ba1e
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/VectorBuilder.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
Remove "Target" from createXReduction naming [nfc]
Despite the stale comments, none of these actually use TTI, and they're
solely generating standard LLVM IR.
Commit: eaa95a1c2bd38332c1a4e634595f29d22b28ffea
https://github.com/llvm/llvm-project/commit/eaa95a1c2bd38332c1a4e634595f29d22b28ffea
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/test/CXX/drs/cwg24xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add test for CWG2486 (`noexcept` and function pointer conversion) (#107131)
[CWG2486](https://cplusplus.github.io/CWG/issues/2486.html) "Call to
`noexcept` function via `noexcept(false)` pointer/lvalue" allows
`noexcept` functions to be called via `noexcept(false)` pointers or
values. There appears to be no implementation divergence whatsoever:
https://godbolt.org/z/3afTfeEM8. That said, in C++14 and earlier we do
not issue all the diagnostics we issue in C++17 and newer, so I'm
specifying the status of the issue accordingly.
Commit: 83ad644afaac23577e3563d3ec1fac1b1fde37f4
https://github.com/llvm/llvm-project/commit/83ad644afaac23577e3563d3ec1fac1b1fde37f4
Author: Freddy Ye <freddy.ye at intel.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsX86.def
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/avx10_2_512bf16intrin.h
A clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/immintrin.h
M clang/lib/Sema/SemaX86.cpp
A clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
A clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
A llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
A llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
A llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
A llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
A llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
A llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
A llvm/test/MC/X86/avx10.2-bf16-32-att.s
A llvm/test/MC/X86/avx10.2-bf16-32-intel.s
A llvm/test/MC/X86/avx10.2-bf16-64-att.s
A llvm/test/MC/X86/avx10.2-bf16-64-intel.s
M llvm/test/TableGen/x86-fold-tables.inc
Log Message:
-----------
[X86][AVX10.2] Support AVX10.2-BF16 new instructions. (#101603)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Commit: 814aa432abf8e9f644903061029e6e27f6a418a8
https://github.com/llvm/llvm-project/commit/814aa432abf8e9f644903061029e6e27f6a418a8
Author: vporpo <vporpodas at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Type.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[SandboxIR] Implement ConstantAggregate (#107136)
This patch implements sandboxir:: ConstantAggregate, ConstantStruct,
ConstantArray and ConstantVector, mirroring LLVM IR.
Commit: 48bc8b0f7f49f5b23884a0d9d21056ec0bfffe24
https://github.com/llvm/llvm-project/commit/48bc8b0f7f49f5b23884a0d9d21056ec0bfffe24
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[gn build] Port 83ad644afaac
Commit: ff0f2011e475141454028bce9cf7c6ff37a49620
https://github.com/llvm/llvm-project/commit/ff0f2011e475141454028bce9cf7c6ff37a49620
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
Log Message:
-----------
[RISCV] Bitcast fixed length bf16/f16 build_vector to i16 with Zvfbfmin/Zvfhmin+Zfbfmin/Zfhmin. (#106637)
Previously, if Zfbfmin/Zfhmin were enabled, we only handled
build_vectors that could be turned into splat_vectors. We promoted them
to f32 splats by extending in the scalar domain and narrowing in the
vector domain.
This patch fixes a crash where we failed to account for whether the f32
vector type fit in LMUL<=8.
Because the new lowering occurs after type legalization, we have to be
careful to use XLenVT for the scalar integer type and use custom cast
nodes.
Commit: f1615e32379ff1ea125a8b3ac8792c3e0b5e6f2c
https://github.com/llvm/llvm-project/commit/f1615e32379ff1ea125a8b3ac8792c3e0b5e6f2c
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
Log Message:
-----------
[WebAssembly] Remove Kind argument from WebAssemblyOperand (NFC) (#107157)
The `Kind` argument does not need to passed separately.
Commit: c8763f04bf2162d3f0f4f967dfeb2f0feda0c75b
https://github.com/llvm/llvm-project/commit/c8763f04bf2162d3f0f4f967dfeb2f0feda0c75b
Author: Yun-Fly <yunfei.song at intel.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
Log Message:
-----------
[mlir][tensor] Fix consumer fusion for `tensor.pack` without explicit `outer_dims_perm` attribute (#106687)
Commit: 99f02a874984f2b79c3fbd8ae6bbceb7366521ad
https://github.com/llvm/llvm-project/commit/99f02a874984f2b79c3fbd8ae6bbceb7366521ad
Author: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
A clang/test/CXX/drs/cwg1818.cpp
M clang/test/CXX/drs/cwg18xx.cpp
A clang/test/CXX/drs/cwg563.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[clang] Add tests for CWG issues about language linkage (#107019)
This patch covers Core issues about language linkage during declaration
matching resolved in
[P1787R6](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1787r6.html),
namely [CWG563](https://cplusplus.github.io/CWG/issues/563.html) and
[CWG1818](https://cplusplus.github.io/CWG/issues/1818.html).
[CWG563](https://cplusplus.github.io/CWG/issues/563.html) "Linkage
specification for objects"
-----------
[P1787R6](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1787r6.html):
> [CWG563](https://cplusplus.github.io/CWG/issues/563.html) is resolved
by simplifications that follow its suggestions.
Wording ([[dcl.link]/5](https://eel.is/c++draft/dcl.link#5)):
> In a
[linkage-specification](https://eel.is/c++draft/dcl.link#nt:linkage-specification),
the specified language linkage applies to the function types of all
function declarators and to all functions and variables whose names have
external linkage[.](https://eel.is/c++draft/dcl.link#5.sentence-5)
Now the wording clearly says that linkage-specification applies to
variables with external linkage.
[CWG1818](https://cplusplus.github.io/CWG/issues/1818.html) "Visibility
and inherited language linkage"
------------
[P1787R6](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2020/p1787r6.html):
>
[CWG386](http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_active.html#386),
[CWG1839](http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_active.html#1839),
[CWG1818](http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_active.html#1818),
[CWG2058](http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_active.html#2058),
[CWG1900](http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_active.html#1900),
and Richard’s observation in [“are non-type names ignored in a
class-head-name or
enum-head-name?”](http://lists.isocpp.org/core/2017/01/1604.php) are
resolved by describing the limited lookup that occurs for a
declarator-id, including the changes in Richard’s [proposed resolution
for
CWG1839](http://wiki.edg.com/pub/Wg21cologne2019/CoreWorkingGroup/cwg1839.html)
(which also resolves CWG1818 and what of CWG2058 was not resolved along
with CWG2059) and rejecting the example from
[CWG1477](http://www.open-std.org/jtc1/sc22/wg21/docs/cwg_defects.html#1477).
Wording ([[dcl.link]/6](https://eel.is/c++draft/dcl.link#6)):
> A redeclaration of an entity without a linkage specification inherits
the language linkage of the entity and (if applicable) its
type[.](https://eel.is/c++draft/dcl.link#6.sentence-2).
Answer to the question in the example is `extern "C"`, and not linkage
mismatch. Further analysis of the example is provided as inline comments
in the test itself. Note that https://eel.is/c++draft/dcl.link#7 does
NOT apply in this example, as it's focused squarely at declarations that
are already known to have C language linkage, and declarations of
variables in the global scope.
Commit: b057e16740311b9c690c0c991c48b5087bf24d9a
https://github.com/llvm/llvm-project/commit/b057e16740311b9c690c0c991c48b5087bf24d9a
Author: Reid Kleckner <rnk at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/MemorySSA.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/OperandTraits.h
M llvm/include/llvm/IR/Operator.h
M llvm/include/llvm/IR/User.h
M llvm/lib/IR/ConstantsContext.h
Log Message:
-----------
[IR] Remove unused MINARITY operand trait tpl args, NFC (#107165)
These don't look like they've been used since the original 'use-diet'
branch was merged in 2008 ( f6caff66a1bfa6464e6a17c0bcfcf06a09a9b909)
Commit: ed220e15718498d0f854f1044ddcbfee00739aa7
https://github.com/llvm/llvm-project/commit/ed220e15718498d0f854f1044ddcbfee00739aa7
Author: Elvis Wang <110374989+ElvisWang123 at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan][NFC] Implement `VPWidenMemoryRecipe::computeCost()`. (#105614)
In this patch, we implement the `computeCost()` function in
`VPWidenMemoryRecipe`.
Commit: 9b5971ad0355d43a9bd37b1067d93ff8b08eba81
https://github.com/llvm/llvm-project/commit/9b5971ad0355d43a9bd37b1067d93ff8b08eba81
Author: chuongg3 <chuong.goh at arm.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector-widen-crash.ll
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-build-vector-to-dup.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-splat.mir
M llvm/test/CodeGen/AArch64/aarch64-bif-gen.ll
M llvm/test/CodeGen/AArch64/aarch64-bit-gen.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/abs.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-dup.ll
M llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll
M llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-tbl.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
M llvm/test/CodeGen/AArch64/fabs.ll
M llvm/test/CodeGen/AArch64/faddsub.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/fcopysign.ll
M llvm/test/CodeGen/AArch64/fcvt.ll
M llvm/test/CodeGen/AArch64/fdiv.ll
M llvm/test/CodeGen/AArch64/fexplog.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fminimummaximum.ll
M llvm/test/CodeGen/AArch64/fminmax.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/fmul.ll
M llvm/test/CodeGen/AArch64/fneg.ll
M llvm/test/CodeGen/AArch64/fpow.ll
M llvm/test/CodeGen/AArch64/fpowi.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/frem.ll
M llvm/test/CodeGen/AArch64/fsincos.ll
M llvm/test/CodeGen/AArch64/fsqrt.ll
M llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/AArch64/insertextract.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/llvm.exp10.ll
M llvm/test/CodeGen/AArch64/load.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/neon-extadd.ll
M llvm/test/CodeGen/AArch64/neon-extmul.ll
M llvm/test/CodeGen/AArch64/neon-perm.ll
M llvm/test/CodeGen/AArch64/ptradd.ll
M llvm/test/CodeGen/AArch64/rem.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AArch64/xtn.ll
M llvm/test/CodeGen/AArch64/zext.ll
Log Message:
-----------
[AArch64][GlobalISel] Lower G_BUILD_VECTOR to G_INSERT_VECTOR_ELT (#105686)
The lowering happens in post-legalizer lowering if any source registers
from G_BUILD_VECTOR are not constants.
Add pattern pragment setting `scalar_to_vector ($src)` asequivalent to
`vector_insert (undef), ($src), (i61 0)`
Commit: 12c0823d67a8d5a61d6430aac609ef5e468267a6
https://github.com/llvm/llvm-project/commit/12c0823d67a8d5a61d6430aac609ef5e468267a6
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/tools/clang-format/git-clang-format.bat
Log Message:
-----------
[clang-format] Handle spaces in file paths in git-clang-format.bat (#107041)
This patch is provided by @jeliebig.
Fixes #107017.
Commit: a27ff17034d66d852ba83be7d237d6a623cb4ff4
https://github.com/llvm/llvm-project/commit/a27ff17034d66d852ba83be7d237d6a623cb4ff4
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Fix a regression in annotating ObjCBlockLParen (#107021)
Fixes #106994.
Commit: b55186eefd73b3848e01c8471c47a9354969d652
https://github.com/llvm/llvm-project/commit/b55186eefd73b3848e01c8471c47a9354969d652
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/test/Preprocessor/init-ppc.c
M clang/test/Preprocessor/init-ppc64.c
Log Message:
-----------
[clang][Driver] Define soft float macros for PPC. (#106012)
Fixes #105972.
Co-authored-by: Qiu Chaofan <qcf at ecnelises.com>
Commit: 8d0816615f920b0783bafa903804b9e2a2fa4e91
https://github.com/llvm/llvm-project/commit/8d0816615f920b0783bafa903804b9e2a2fa4e91
Author: yifeizh2 <yifei.zhang at intel.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[MLIR][Tensor] Fix source/dest type check in UnPackOp canonicalize (#106094)
Fix `RankedTensorType` equality check in unpack op canonicalization.
Commit: 812c96e8b9354e5e84d513f5b03172db5ad3b491
https://github.com/llvm/llvm-project/commit/812c96e8b9354e5e84d513f5b03172db5ad3b491
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Handle pointer/reference in macro definitions (#107074)
A macro definition needs its own scope stack in the annotator, so we add
the MacroBodyScopes stack and use ScopeStack to refer to it when in the
macro definition body.
Also, we need to have a scope type for a child block because its parent
line is parsed (and thus the scope type for the braces is popped off the
scope stack) before the lines in the child block are.
Fixes #99271.
Commit: f4b9839d6f7c9ec2967a42f2d5546a2a2ae77ca4
https://github.com/llvm/llvm-project/commit/f4b9839d6f7c9ec2967a42f2d5546a2a2ae77ca4
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Conversion/TensorToSPIRV/TensorToSPIRV.cpp
M mlir/test/Conversion/TensorToSPIRV/tensor-ops-to-spirv.mlir
Log Message:
-----------
[mlir][TensorToSPIRV] Add type check for `tensor.extract` in TensorToSPIRV (#107110)
This patch add a type check for `tensor.extract` in TensorToSPIRV.
Only convert `tensor.extract` with supported element type. Fix #74466.
Commit: 37263b6c6741894ffbc0f61979c5c85db515ef2d
https://github.com/llvm/llvm-project/commit/37263b6c6741894ffbc0f61979c5c85db515ef2d
Author: Longsheng Mou <moulongsheng at huawei.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/test/Dialect/Tosa/invalid.mlir
Log Message:
-----------
[mlir][tosa] Add verifier for `tosa.pad` (#106351)
This patch adds verifier to `tosa.pad` which fixes a crash. `tosa.pad`
expect:
- same input and output tensor rank.
- 'padding' tensor rank equal to 2.
Fix #106168.
Commit: a628bc3c2e7314e4b7c9af0d10cf39a70c731d15
https://github.com/llvm/llvm-project/commit/a628bc3c2e7314e4b7c9af0d10cf39a70c731d15
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
Log Message:
-----------
[AArch64] Fix a warning
This patch fixes:
lib/Target/AArch64/AArch64GenPostLegalizeGILowering.inc:506:14:
error: unused variable 'GIMatchData_matchinfo'
[-Werror,-Wunused-variable]
Commit: 9a17a6016d02afa6e973f141ab1cada68571f2d2
https://github.com/llvm/llvm-project/commit/9a17a6016d02afa6e973f141ab1cada68571f2d2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
Log Message:
-----------
[PowerPC] Use DenseMap::operator[] (NFC) (#107044)
Commit: f15e3e58c59b4d31eee24fa9debc5dfad0c20028
https://github.com/llvm/llvm-project/commit/f15e3e58c59b4d31eee24fa9debc5dfad0c20028
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[CGOpenMPRuntime] Use DenseMap::operator[] (NFC) (#107158)
I'm planning to deprecate DenseMap::FindAndConstruct in favor of
DenseMap::operator[].
Commit: 86627149f6fd5148311b7b0aa1c7195a05a5d6a8
https://github.com/llvm/llvm-project/commit/86627149f6fd5148311b7b0aa1c7195a05a5d6a8
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
A llvm/test/CodeGen/AMDGPU/hazard-recognizer-src-shared-base.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
A llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
Log Message:
-----------
[AMDGPU] Mitigate GFX12 VALU read SGPR hazard (#100067)
Any SGPR read by a VALU can potentially obscure SALU writes to the same
register.
Insert s_wait_alu instructions to mitigate the hazard on affected paths.
Compute a global cache of SGPRs with any VALU reads and use this to
avoid inserting mitigation for SGPRs never accessed by VALUs.
To avoid excessive search when compile time is priority implement
secondary mode where all SALU writes are mitigated.
Co-authored-by: Shilei Tian <shilei.tian at amd.com>
Commit: a5ce66423bfff6f2185e5fe48bc6ffc0ade7df4d
https://github.com/llvm/llvm-project/commit/a5ce66423bfff6f2185e5fe48bc6ffc0ade7df4d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
Log Message:
-----------
[RISCV] Remove RISCVISD::FP_ROUND_BF16.
Use isel patterns on regular FP_ROUND. For double->bf16 we need
to emit two instructions. Note the double->bf16 conversion does
double rounding, but I don't know a good way to fix that.
Commit: 0ad6cee926865d7210eed9e67bfb20dce19c6633
https://github.com/llvm/llvm-project/commit/0ad6cee926865d7210eed9e67bfb20dce19c6633
Author: Elvis Wang <110374989+ElvisWang123 at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/test/Analysis/CostModel/RISCV/cast.ll
Log Message:
-----------
[RISCV] Fix missing `i64` to `double` tests in the cast.ll. (NFC) (#106972)
Commit: 8b28e2ebb36d72cfffe04904e3e1b9fdfa36ef94
https://github.com/llvm/llvm-project/commit/8b28e2ebb36d72cfffe04904e3e1b9fdfa36ef94
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
Log Message:
-----------
[WebAssembly] Rename legacy EH tests (#107166)
Give each test in `cfg-stackify-eh-legacy.ll` a name rather than
something like `test5`, because I plan to copy many of these test into a
new file that tests for the new EH (exnref) and some of the tests here
are not applicable to the new EH so the numbering will be different,
which can make things confusing.
Also this removes `test_` prefixes in the test function names in
`exception-legacy.ll`, because, well, we all know they are tests.
Commit: 9fef09fd2918e7d8c357b98a9a798fe207941f73
https://github.com/llvm/llvm-project/commit/9fef09fd2918e7d8c357b98a9a798fe207941f73
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/X86/x86-atomic-double.c
M clang/test/CodeGen/X86/x86-atomic-long_double.c
Log Message:
-----------
[Clang][CodeGen] Fix type for atomic float incdec operators (#107075)
`llvm::ConstantFP::get(llvm::LLVMContext&, APFloat(float))` always
returns a f32 constant.
Fix https://github.com/llvm/llvm-project/issues/107054.
Commit: 6c607cfb2c2d8acd2b92d7ed8106ab1e4fc0d79d
https://github.com/llvm/llvm-project/commit/6c607cfb2c2d8acd2b92d7ed8106ab1e4fc0d79d
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
Log Message:
-----------
[RISCV] Preserve tail agnostic policy in foldVMV_V_V (#105788)
This patch helps avoid regressions in an upcoming patch by making sure
we don't accidentally lose a tail agnostic policy when folding a vmv.v.v
into its source.
The previous comment about RISCVInsertVSETVLI relaxing the policy didn't
take into account the fact that there's a policy operand on vmv.v.v,
which can be tail agnostic.
If the tail is agnostic (via either the policy operand or the passthru
being undef) and vmv.v.v's VL <= Src's VL, then Src's tail can be made
agnostic.
Commit: c94bd96c277e0b48e198fdc831bb576d9a04aced
https://github.com/llvm/llvm-project/commit/c94bd96c277e0b48e198fdc831bb576d9a04aced
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGStmt.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
Log Message:
-----------
[Clang][CodeGen] Don't emit assumptions if current block is unreachable. (#106936)
Fixes https://github.com/llvm/llvm-project/issues/106898.
When emitting an infinite loop, clang codegen will delete the whole
block and leave builder's current block as nullptr:
https://github.com/llvm/llvm-project/blob/837ee5b46a5f7f898f0de7e46a19600b896a0a1f/clang/lib/CodeGen/CGStmt.cpp#L597-L600
Then clang will create `zext (icmp slt %a, %b)` without parent block for
`a < b`. It will crash here:
https://github.com/llvm/llvm-project/blob/837ee5b46a5f7f898f0de7e46a19600b896a0a1f/clang/lib/CodeGen/CGExprScalar.cpp#L416-L420
Even if we disabled this optimization, it still crashes in
`Builder.CreateAssumption`:
https://github.com/llvm/llvm-project/blob/837ee5b46a5f7f898f0de7e46a19600b896a0a1f/llvm/lib/IR/IRBuilder.cpp#L551-L561
This patch disables assumptions emission if current block is null.
Commit: 3e798476de466e8a051d3e753db379731a8d9705
https://github.com/llvm/llvm-project/commit/3e798476de466e8a051d3e753db379731a8d9705
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
Log Message:
-----------
[LegalizeDAG][RISCV] Don't promote f16 vector ISD::FNEG/FABS/FCOPYSIGN to f32 when we don't have Zvfh. (#106652)
The fp_extend will canonicalize NaNs which is not the semantics of
FNEG/FABS/FCOPYSIGN.
For fixed vectors I'm scalarizing due to test changes on other targets
where the scalarization is expected. I will try to address in a follow
up.
For scalable vectors, we bitcast to integer and use integer logic ops.
Commit: 41402c6a8aa3a4336122bdb4530fb05538efedba
https://github.com/llvm/llvm-project/commit/41402c6a8aa3a4336122bdb4530fb05538efedba
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-half.ll
Log Message:
-----------
[RISCV][GISel] Use CCValAssign::getCustomReg for converting f16/f32<->GPR. (#105700)
This gives us much better control of the generated code for GISel. I've
tried to closely match the current gisel code, but it looks like we had
2 layers of G_ANYEXT in some cases before.
SelectionDAG now checks needsCustom() instead of detecting the special
cases in the Bitcast handler.
Unfortunately, IRTranslator for bitcast still generates copies between
register classes of different sizes. Because of this we can't handle
i16<->f16 bitcasts without crashing. Not sure if I should teach
RISCVInstrInfo::copyPhysReg to allow copies between FPR16 and GPR or if
I should convert the copies to instructions in GISel.
Commit: 4a44898be5d46694b59aa411f2b45a52f2ce8411
https://github.com/llvm/llvm-project/commit/4a44898be5d46694b59aa411f2b45a52f2ce8411
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v.ll
Log Message:
-----------
[RISCV] Add passthru to vmv.v.v intrinsic tests. NFC
This prevents them from being optimized away in an upcoming peephole
Commit: 3449ed8dece600f387357b71ff74ae4bc46828b6
https://github.com/llvm/llvm-project/commit/3449ed8dece600f387357b71ff74ae4bc46828b6
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
Revert "[clang-format] Correctly annotate braces in macro definition (#106662)"
This reverts commit 0fa78b6c7bd43c2498700a98c47a02cf4fd06388 due to
regression.
Fixes #107096.
Commit: 7deda4ed0c712fb830d25f4e3090ff04f7adbcf9
https://github.com/llvm/llvm-project/commit/7deda4ed0c712fb830d25f4e3090ff04f7adbcf9
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-03 (Tue, 03 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Use MCRegister for variables returned from AllocateReg. NFC
Avoids a cast from Register to MCRegister for the CCValAssign
functions.
Commit: 06286832db0c4ee1899f9cee1b8f6234e45f16c7
https://github.com/llvm/llvm-project/commit/06286832db0c4ee1899f9cee1b8f6234e45f16c7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
Log Message:
-----------
Reland "Revert "AtomicExpand: Allow incrementally legalizing atomicrmw"" (#106793)
Reverts llvm/llvm-project#106792
The first commit of PR is pure revert, the rest is a possible fix.
Commit: 427e202a401514cb28bf2ca621baae8e1b2f552f
https://github.com/llvm/llvm-project/commit/427e202a401514cb28bf2ca621baae8e1b2f552f
Author: Princeton Ferro <princetonferro at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Support/APInt.cpp
Log Message:
-----------
[APInt] improve initialization performance (#106945)
The purpose is to save an extra memset in both cases:
1. When `int64_t(val) < 0`, zeroing out is redundant as the subsequent
for-loop will initialize to `val .. 0xFFFFF ....`. Instead we should
only create an uninitialized buffer, and transform the slow for-loop
into a memset to initialize the higher words to `0xFF`.
2. In the other case, first we create an uninitialized array (`new
int64_t[]`) and _then_ we zero it out with `memset`. But this can be
combined in one operation with `new int64_t[]()`, which
default-initializes the array.
On one example where use of APInt was heavy, this improved compile time
by 1%.
Commit: 4bccb01355edcfedacafede3e7878d74e2b0a28f
https://github.com/llvm/llvm-project/commit/4bccb01355edcfedacafede3e7878d74e2b0a28f
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaExpr.cpp
M clang/test/SemaCXX/source_location.cpp
Log Message:
-----------
[Clang] Workaround dependent source location issues (#106925)
In #78436 we made some SourceLocExpr dependent to
deal with the fact that their value should reflect the name of
specialized function - rather than the rtemplate in which they are first
used.
However SourceLocExpr are unusual in two ways
- They don't depend on template arguments
- They morally depend on the context in which they are used (rather than
called from).
It's fair to say that this is quite novels and confuses clang. In
particular, in some cases, we used to create dependent SourceLocExpr and
never subsequently transform them, leaving dependent objects in
instantiated functions types. To work around that we avoid replacing
SourceLocExpr when we think they could remain dependent.
It's certainly not perfect but it fixes a number of reported bugs, and
seem to only affect scenarios in which the value of the SourceLocExpr
does not matter (overload resolution).
Fixes #106428
Fixes #81155
Fixes #80210
Fixes #85373
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: de37da8e37c4c9042563e186068adca98bf59e07
https://github.com/llvm/llvm-project/commit/de37da8e37c4c9042563e186068adca98bf59e07
Author: Simon Tatham <simon.tatham at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/MachineOutliner.cpp
A llvm/test/CodeGen/AArch64/machine-outliner-bundle.mir
Log Message:
-----------
[MachineOutliner] Preserve instruction bundles (#106402)
When the machine outliner copies instructions from a source function
into an outlined function, it was doing it using `CloneMachineInstr`,
which is documented as not preserving the interior of any instruction
bundle. So outlining code that includes an instruction bundle would
fail, because in the outlined version, the bundle would be empty, so
instructions would go missing in the move.
This occurs when any bundled instruction appears in the outlined code,
so there was no need to construct an unusual test case: I've just copied
a function from the existing `stp-opt-with-renaming.mir`, which happens
to contain an SVE instruction bundle. Including two identical copies of
that function makes the outliner merge them, and then we check that it
didn't destroy the interior of the bundle in the process.
Commit: 01e56849001b4ace984e9557abc82bc051e03677
https://github.com/llvm/llvm-project/commit/01e56849001b4ace984e9557abc82bc051e03677
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/SemaOverload.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
Log Message:
-----------
[clang] Respect the lifetimebound in assignment operator. (#106997)
Fixes #106372
Commit: 771b7af1db15e59f370ccadaa98bee8e5270b5f1
https://github.com/llvm/llvm-project/commit/771b7af1db15e59f370ccadaa98bee8e5270b5f1
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDieTest.cpp
Log Message:
-----------
Reapply "[llvm/DWARF] Recursively resolve DW_AT_signature references"… (#99495)
… (#99444)
The previous version introduced a bug (caught by cross-project tests).
Explicit signature resolution is still necessary when one wants to
access the children (not attributes) of a given DIE.
The new version keeps just the findRecursively extension, and reverts
all the DWARFTypePrinter modifications.
Commit: 009184fc3920f8a14dff9971edf68754ba28da5f
https://github.com/llvm/llvm-project/commit/009184fc3920f8a14dff9971edf68754ba28da5f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
Log Message:
-----------
[ThinLTO] Avoid repeated std::map lookups (NFC) (#107156)
This patch avoids repeated std::map lookups with try_emplace.
While I am at it, this patch adds a couple of calls to
std::vector::reserve.
Commit: 8bfd6b953fc119bbc37c1755e701261fcfb31ad2
https://github.com/llvm/llvm-project/commit/8bfd6b953fc119bbc37c1755e701261fcfb31ad2
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
Log Message:
-----------
[SSAUpdater] Use DenseMap::operator[] (NFC) (#107179)
I'm planning to deprecate DenseMap::FindAndConstruct in favor of
DenseMap::operator[]. I thought about renaming the variable to
PredInfo, but the name is taken, so I am leaving the name as is.
Commit: e99eb89d5d97efc709f18f9369f2ec087352baaa
https://github.com/llvm/llvm-project/commit/e99eb89d5d97efc709f18f9369f2ec087352baaa
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
Log Message:
-----------
[SimplifyCFG] Use range-based for loops (NFC) (#107180)
Commit: aacdc657fc255b2547bb37ee9bacde2df0452298
https://github.com/llvm/llvm-project/commit/aacdc657fc255b2547bb37ee9bacde2df0452298
Author: Younan Zhang <zyn7109 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeProperties.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
Log Message:
-----------
[Clang] Preserve the ExpandsToEmpty flag in PackIndexingType (#107181)
Similar to PackIndexingExpr, we should avoid another round of
transformation of the pattern if the pattern has already turned out to
be an empty pack. As an outcome, the empty SubstTemplateTypeParmPackType
won't occur, and we don't need to collect any unexpanded packs.
Fixes https://github.com/llvm/llvm-project/issues/105903
Commit: 331f8225f37b714a4df7ff3176b574b756f4d965
https://github.com/llvm/llvm-project/commit/331f8225f37b714a4df7ff3176b574b756f4d965
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/include/mlir/IR/OpImplementation.h
M mlir/lib/AsmParser/AsmParserImpl.h
Log Message:
-----------
[mlir][AsmParser] Expose `parseMinus()` (#106881)
Found while working on parser for custom expression type for my dialect.
Builtin `AffineExpr` uses low-level parser API which is not available
for external users.
Commit: 8133d47632f35df00933bfd3d3626b003206ede4
https://github.com/llvm/llvm-project/commit/8133d47632f35df00933bfd3d3626b003206ede4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[CGOpenMPRuntime] Use DenseMap::operator[] (NFC) (#107185)
I'm planning to deprecate DenseMap::FindAndConstruct in favor of
DenseMap::operator[].
Commit: 12d678a8eb11821e20eab86445f0cc9b66c24990
https://github.com/llvm/llvm-project/commit/12d678a8eb11821e20eab86445f0cc9b66c24990
Author: David Green <david.green at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
A llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64] Add codegen tests for zext(deinterleave). NFC
Commit: 030e4d0cdf4c43a6ec1ca301b5a358991fa2ac4f
https://github.com/llvm/llvm-project/commit/030e4d0cdf4c43a6ec1ca301b5a358991fa2ac4f
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Parse/ParseTemplate.cpp
M clang/test/SemaCXX/cxx2a-template-lambdas.cpp
Log Message:
-----------
[Clang] Treat default template argument as constant expressions (#107073)
We only check that a default argument is a converted constant expression
when using the default argument.
However, when parsing a default argument, we need to make sure to parse
it as a constant expression such as not ODR-use variables. (otherwise,
we would try to capture default template arguments of generic lambdas)
Fixes #107048
Commit: 50febdeb64fce345b0fb669e9688d34c8ffe7912
https://github.com/llvm/llvm-project/commit/50febdeb64fce345b0fb669e9688d34c8ffe7912
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/test/Dialect/Vector/linearize.mlir
Log Message:
-----------
[mlir][vector] Bugfix of linearize `vector.extract` (#106836)
This patch add check for `vector.extract` with scalar type, which is not
allowed when linearize `vector.extract`. Fix #106162.
Commit: 58f289612f1959256fa2228f013cfe96304b45c4
https://github.com/llvm/llvm-project/commit/58f289612f1959256fa2228f013cfe96304b45c4
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/XRay/Graph.h
Log Message:
-----------
[XRay] Use DenseMap::{operator[],try_emplace} (NFC) (#107178)
I'm planning to deprecate DenseMap::FindAndConstruct in favor of
operator[]. I'm using try_emplace because "Vertices[I.first];" on its
own might look like a nop statement.
Commit: 9e08db796b7fc1aa21ec0a0c16a0213229e02010
https://github.com/llvm/llvm-project/commit/9e08db796b7fc1aa21ec0a0c16a0213229e02010
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
A flang/test/Integration/debug-target-region-vars.f90
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
A mlir/test/Target/LLVMIR/omptarget-debug.mlir
A mlir/test/Target/LLVMIR/omptarget-debug2.mlir
Log Message:
-----------
[OpenMPIRBuilder] Don't drop debug info for target region. (#80692)
When an outlined function is generated for omp target region, a
corresponding DISubprogram was not being generated. This resulted in all
the debug information for the target region being dropped.
This commit adds DISubprogram for the outlined function if there is one
available for the parent function. It also updates the current debug
location so that the right scope is used for the entries in the outlined
function.
There are places in the OpenMPIRBuilder which changes insertion point but
don't update the debug location accordingly. They cause issue when debug info
is enabled. I have fixed a few that I observed to cause issue. But there may be
more and a systematic cleanup may be required.
With this change in place, I can set source line breakpoint in target
region and run to them in debugger.
Commit: 5914566474de29309b0b4815ecd406805793de1f
https://github.com/llvm/llvm-project/commit/5914566474de29309b0b4815ecd406805793de1f
Author: Nathan Gauër <brioche at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
A llvm/test/Other/spirv-sim/branch.spv
A llvm/test/Other/spirv-sim/call.spv
A llvm/test/Other/spirv-sim/constant.spv
A llvm/test/Other/spirv-sim/lit.local.cfg
A llvm/test/Other/spirv-sim/loop.spv
A llvm/test/Other/spirv-sim/simple-bad-result.spv
A llvm/test/Other/spirv-sim/simple.spv
A llvm/test/Other/spirv-sim/simulator-args.spv
A llvm/test/Other/spirv-sim/switch.spv
A llvm/test/Other/spirv-sim/wave-get-lane-index.spv
A llvm/test/Other/spirv-sim/wave-read-lane-first.spv
M llvm/test/lit.cfg.py
A llvm/utils/spirv-sim/instructions.py
A llvm/utils/spirv-sim/spirv-sim.py
Log Message:
-----------
[Utils][SPIR-V] Adding spirv-sim to LLVM (#107094)
### 2nd submission
The buildbots are using python 3.8, and some type annotations I was
using are only available starting 3.9. The last commit on the pile is
the additional changes compared to the original submission
https://github.com/llvm/llvm-project/pull/104020.
### Original text:
Currently, the testing infrastructure for SPIR-V is based on FileCheck.
Those tests are great to check some level of codegen, but when the test
needs check both the CFG layout and the content of each basic-block,
things becomes messy.
Because the CHECK/CHECK-DAG/CHECK-NEXT state is limited, it is sometimes
hard to catch the good block: if 2 basic blocks have similar
instructions, FileCheck can match the wrong one.
Cross-lane interaction can be a bit difficult to understand, and
writting a FileCheck test that is strong enough to catch bad CFG
transforms while not being broken everytime some unrelated codegen part
changes is hard.
And lastly, the spirv-val tooling we have checks that the generated
SPIR-V respects the spec, not that it is correct in regards to the
source IR.
For those reasons, I believe the best way to test the structurizer is
to:
run spirv-val to make sure the CFG respects the spec.
simulate the function to validate result for each lane, making sure the
generated code is correct.
This simulator has no other dependencies than core python. It also only
supports a very limited set of instructions as we can test most features
through control-flow and some basic cross-lane interactions.
As-is, the added tests are just a harness for the simulator itself. If
this gets merged, the structurizer PR will benefit from this as I'll be
able to add extensive testing using this.
---------
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: afb6dafc6b680fb204d40c7fee4b339aa8471010
https://github.com/llvm/llvm-project/commit/afb6dafc6b680fb204d40c7fee4b339aa8471010
Author: Nathan Gauër <brioche at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
A clang/test/CodeGenHLSL/builtins/wave_is_first_lane.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
A llvm/test/CodeGen/DirectX/wave_is_first_lane.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveIsFirstLane.ll
Log Message:
-----------
[clang][HLSL] Add WaveIsFirstLane() intrinsic (#103299)
This commits add the WaveIsFirstLane() hlsl intrinsinc. This intrinsic
uses the convergence intrinsincs for the SPIR-V backend. On the DXIL
side, I'm not sure what the strategy is for convergence, so I
implemented that like in DXC: a normal builtin function.
Signed-off-by: Nathan Gauër <brioche at google.com>
Commit: cc5c526c80a4cacf7ed5b7fbe50072594ec1aeaf
https://github.com/llvm/llvm-project/commit/cc5c526c80a4cacf7ed5b7fbe50072594ec1aeaf
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lldb/source/Target/Process.cpp
M lldb/test/API/functionalities/memory/holes/TestMemoryHoles.py
Log Message:
-----------
[lldb] Fix and speedup the `memory find` command (#104193)
This patch fixes an issue where the `memory find` command would
effectively stop searching after encountering a memory read error (which
could happen due to unreadable memory), without giving any indication
that it has done so (it would just print it could not find the pattern).
To make matters worse, it would not terminate after encountering this
error, but rather proceed to slowly increment the address pointer, which
meant that searching a large region could take a very long time (and
give the appearance that lldb is actually searching for the thing).
The patch fixes this first problem by detecting read errors and
skipping over (using GetMemoryRegionInfo) the unreadable parts of memory
and resuming the search after them. It also reads the memory in bulk
(`max(sizeof(pattern))`), which speeds up the search significantly (up
to 6x for live processes, 18x for core files).
Commit: 0b2550f8ab77a53f560f6a7a1b401c4803a36d48
https://github.com/llvm/llvm-project/commit/0b2550f8ab77a53f560f6a7a1b401c4803a36d48
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lldb/test/API/api/multiple-debuggers/TestMultipleDebuggers.py
Log Message:
-----------
[lldb][test] Disable TestMultipleDebuggers on Linux
This used to timeout (https://github.com/llvm/llvm-project/issues/101162)
now it's aborting (https://github.com/llvm/llvm-project/pull/105765#issuecomment-2327645665)
Commit: 69657eb7f67600ec1c5c449d13eef3670dfb64da
https://github.com/llvm/llvm-project/commit/69657eb7f67600ec1c5c449d13eef3670dfb64da
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/test/CodeGen/AArch64/PHIElimination-crash.mir
M llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
M llvm/test/CodeGen/AArch64/statepoint-twoaddr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
M llvm/test/CodeGen/AMDGPU/split-mbb-lis-subrange.mir
M llvm/test/CodeGen/AMDGPU/stale-livevar-in-twoaddr-pass.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-wmma.mir
M llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
M llvm/test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir
M llvm/test/CodeGen/PowerPC/livevars-crash1.mir
M llvm/test/CodeGen/PowerPC/livevars-crash2.mir
M llvm/test/CodeGen/X86/distancemap.mir
M llvm/test/CodeGen/X86/phielim-undef.mir
M llvm/test/CodeGen/X86/twoaddr-mul2.mir
M llvm/test/tools/llc/new-pm/pipeline.mir
M llvm/test/tools/llc/new-pm/verify.mir
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llc/NewPMDriver.h
M llvm/tools/llc/llc.cpp
Log Message:
-----------
[llc] Provide `opt` like verifier options (#106665)
- Support `verify-each` option.
- Default behavior is verifying output only.
Commit: deeafeab815ddfe7b507e9f79fe8f992265a9f3b
https://github.com/llvm/llvm-project/commit/deeafeab815ddfe7b507e9f79fe8f992265a9f3b
Author: Dmitry Vasilyev <dvassiliev at accesssoftek.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lldb/include/lldb/Host/Socket.h
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/common/TCPSocket.cpp
Log Message:
-----------
[lldb][NFC] Move few static helpers to the class Socket (#106640)
Fixed a typo in Socket::SetOption().
Commit: 59093cae8681fe5d3d951905887b67a99acf76e6
https://github.com/llvm/llvm-project/commit/59093cae8681fe5d3d951905887b67a99acf76e6
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_luti.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_imm_lane.cpp
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/sve2-intrinsics-luti.ll
Log Message:
-----------
[AARCH64][SVE] Add intrinsics for SVE LUTI instructions (#97058)
This patch adds intrinsics for LUTI2 and LUTI4 instructions, which use
SVE registers, as specified in the
https://github.com/ARM-software/acle/pull/324
Commit: 3e948eb3e88d89107406ca0812934bea42101e3a
https://github.com/llvm/llvm-project/commit/3e948eb3e88d89107406ca0812934bea42101e3a
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Basic/arm_neon.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGen/aarch64-neon-luti.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
A llvm/test/CodeGen/AArch64/neon-luti.ll
Log Message:
-----------
[AArch64][NEON] Add intrinsics for LUTI (#96883)
This patch adds intrinsics for NEON LUTI2 and LUTI4 instructions as
specified in the [ACLE
proposal](https://github.com/ARM-software/acle/pull/324)
Commit: 5a658ee933065d0e4ef1a65d9a6ddfba2874ee98
https://github.com/llvm/llvm-project/commit/5a658ee933065d0e4ef1a65d9a6ddfba2874ee98
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lldb/test/API/tools/lldb-server/TestGdbRemoteLaunch.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
M lldb/test/API/tools/lldb-server/TestNonStop.py
Log Message:
-----------
[lldb][test] Skip some lldb-server tests on Windows
These are known to return errors occasionaly on our Windows on Arm
bot.
Commit: d25e24a0eb909b7604572d28d15cbe648ecccd90
https://github.com/llvm/llvm-project/commit/d25e24a0eb909b7604572d28d15cbe648ecccd90
Author: Carlos Galvez <carlosgalvezp at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/CastingThroughVoidCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/casting-through-void.rst
M clang-tools-extra/test/clang-tidy/checkers/bugprone/casting-through-void.cpp
Log Message:
-----------
[clang-tidy] Suggest using reinterpret_cast in bugprone-casting-thro… (#106784)
…ugh-void
reinterpret_cast is the equivalent construct, and more clearly expresses
intent.
Co-authored-by: Carlos Gálvez <carlos.galvez at zenseact.com>
Commit: 519b36925cf2e1a59f76bd509471d2e1830169f0
https://github.com/llvm/llvm-project/commit/519b36925cf2e1a59f76bd509471d2e1830169f0
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
Log Message:
-----------
[LLD][COFF][NFC] Store impSym as DefinedImportData in ImportFile. (#107162)
Commit: 126d6f27102fca0d69dc50cf29a37442d18304cf
https://github.com/llvm/llvm-project/commit/126d6f27102fca0d69dc50cf29a37442d18304cf
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
Log Message:
-----------
[AMDGPU] Improve codegen for GFX10+ DPP reductions and scans (#107108)
Use poison for an unused input to the permlanex16 intrinsic, to improve
register allocation and avoid an unnecessary v_mov instruction.
Commit: 2fef449f30e2f484897cb199e3338a1520803c7d
https://github.com/llvm/llvm-project/commit/2fef449f30e2f484897cb199e3338a1520803c7d
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[LLVM][AArch64] Enable verifyTargetSDNode for scalable vectors and fix the fallout. (#104820)
Fix incorrect use of AArch64ISD::UZP1/UUNPK{HI,LO} in:
AArch64TargetLowering::LowerDIV
AArch64TargetLowering::LowerINSERT_SUBVECTOR
The latter highlighted DAG combines that relied on broken behaviour,
which this patch also fixes.
Commit: 29c076b8598c9627cea493fdfc1a30c83385e820
https://github.com/llvm/llvm-project/commit/29c076b8598c9627cea493fdfc1a30c83385e820
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Analysis/Lint.cpp
A llvm/test/Analysis/Lint/scalable.ll
Log Message:
-----------
[Lint] Fix crash with scalable alloca
Commit: 4f3f09e787bab3caccd9496d93e6453c71d7869f
https://github.com/llvm/llvm-project/commit/4f3f09e787bab3caccd9496d93e6453c71d7869f
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/test/Integration/debug-assumed-shape-array.f90
M flang/test/Transforms/debug-assumed-shape-array.fir
Log Message:
-----------
[flang][debug] Add stride information for assumed shape array. (#106703)
Without this information, debugger could present wrong values for arrays
in certain cases as shown in issue #105646.
Fixes #105646.
Commit: d77ccae4a629ba11b5c28f97222a8834c5e5c183
https://github.com/llvm/llvm-project/commit/d77ccae4a629ba11b5c28f97222a8834c5e5c183
Author: David Spickett <david.spickett at linaro.org>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lldb/source/Target/Process.cpp
Log Message:
-----------
[lldb] Fix 32 bit compile error
https://lab.llvm.org/buildbot/#/builders/18/builds/3247/steps/4/logs/stdio
In code added by https://github.com/llvm/llvm-project/issues/87471.
Commit: 4f130fa943af8bf47f4401deff0d825a91dc7584
https://github.com/llvm/llvm-project/commit/4f130fa943af8bf47f4401deff0d825a91dc7584
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/lib/Frontend/CompilerInvocation.cpp
A flang/test/Driver/fno-openmp.f90
M flang/test/Driver/fopenmp.f90
Log Message:
-----------
[flang][Driver] support -fno-openmp (#107087)
Closes #83148
Commit: 5818337765e4c74918a700a14df5f64a658c47ee
https://github.com/llvm/llvm-project/commit/5818337765e4c74918a700a14df5f64a658c47ee
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/hoist-binop.ll
Log Message:
-----------
LICM: hoist BO assoc when (C1 op LV) op C2 (#106999)
Extend hoistBOAssociation to handle the "(C1 op LV) op C2" case, when op
is a commutative operand.
Commit: 5a6926ce49b6df807bff6083325ca291b0e731e5
https://github.com/llvm/llvm-project/commit/5a6926ce49b6df807bff6083325ca291b0e731e5
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
Log Message:
-----------
[AMDGPU] Fix test update after #107108
Commit: 360f82f3703fa57de42a2f998b172551f294e11a
https://github.com/llvm/llvm-project/commit/360f82f3703fa57de42a2f998b172551f294e11a
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Analysis/Lint.cpp
M llvm/test/Analysis/Lint/scalable.ll
Log Message:
-----------
[Lint] Fix crash for insert/extract on scalable vector
Don't assume the vector is fixed size. For scalable vectors, do
not report an error, as indices outside the minimum range may be
valid.
Commit: 6d3563422ce6f431b837221932d32db4c9681fc5
https://github.com/llvm/llvm-project/commit/6d3563422ce6f431b837221932d32db4c9681fc5
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/test/CodeGen/aarch64-neon-luti.c
Log Message:
-----------
include REQUIRES guard to aarch64-neon-luti.c (#107217)
Commit: cd46829e547d2d0aa3cb0ef7c9de59c507eaaecc
https://github.com/llvm/llvm-project/commit/cd46829e547d2d0aa3cb0ef7c9de59c507eaaecc
Author: Madhur Amilkanthwar <madhura at nvidia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
A llvm/test/Transforms/LoopVectorize/check-no-vectorize.ll
Log Message:
-----------
[LV] Fix emission of debug message in legality check (#101924)
Successful vectorization message is emitted even
after "Result" is false. "Result" = false indicates failure of one of
the legality check and thus
successful message should not be printed.
Commit: 7afdc6bd57d634354597df185fd7037bec9241ff
https://github.com/llvm/llvm-project/commit/7afdc6bd57d634354597df185fd7037bec9241ff
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/abdu-neg.ll
M llvm/test/CodeGen/X86/abdu.ll
Log Message:
-----------
[DAG] Fix typo in i64/i128 abdu/abds tests
I'd incorrectly swapped the operands in some of the "cmp" test patterns when I changed the condition code
Commit: b25b9a7d6c872e42121aa024f362fae0b15dd72c
https://github.com/llvm/llvm-project/commit/b25b9a7d6c872e42121aa024f362fae0b15dd72c
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/test/CodeGen/X86/abdu-neg.ll
M llvm/test/CodeGen/X86/abdu.ll
Log Message:
-----------
[DAG] visitSELECT - add "select usubo(x, y).overflow, (sub y, x), (usubo x, y) -> abdu(x, y)" fold (and neg equivalent)
Handle cases where CGP has merged the CMP+SUB into a USUBO node - improves a few outstanding niggles from #100810
Commit: 8d4235d97e5bd12b8244f9ffc157651a9a288b36
https://github.com/llvm/llvm-project/commit/8d4235d97e5bd12b8244f9ffc157651a9a288b36
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Analysis/Lint.cpp
M llvm/test/Analysis/Lint/scalable.ll
Log Message:
-----------
[Lint] Fix another scalable vector crash
We also need to check that the memory access LocationSize is not
scalable.
Commit: 55a24738302eb9bb5bf458220deb20ddef60ce51
https://github.com/llvm/llvm-project/commit/55a24738302eb9bb5bf458220deb20ddef60ce51
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Transforms/Utils/InlineFunction.cpp
Log Message:
-----------
[CtxProf] Replace include with forward declaration (NFC)
This header is fairly expensive. Forward declare
PGOContextualProfile instead.
Commit: 43b8ae3cea7c0f45dc29479ba8024e0adae9d145
https://github.com/llvm/llvm-project/commit/43b8ae3cea7c0f45dc29479ba8024e0adae9d145
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll
Log Message:
-----------
[AMDGPU][LDS] Pre-Commit tests for 'Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (#107091)
Commit: 9ba41031de105d7babf3ae53facd368f2b4e409f
https://github.com/llvm/llvm-project/commit/9ba41031de105d7babf3ae53facd368f2b4e409f
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
Log Message:
-----------
[OpenMP]Update use_device_clause lowering (#101703)
This patch updates the use_device_ptr and use_device_addr clauses to use
the mapInfoOps for lowering. This allows all the types that are handle
by the map clauses such as derived types to also be supported by the
use_device_clauses.
This is patch 1/2 in a series of patches.
Co-authored-by: Raghu Maddhipatla raghu.maddhipatla at amd.com
Commit: 2cf36f0293daf0fa28d5c7d5d3617660edf237e7
https://github.com/llvm/llvm-project/commit/2cf36f0293daf0fa28d5c7d5d3617660edf237e7
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-target-use-device-nested.mlir
Log Message:
-----------
[OpenMP]Update use_device_clause lowering (#101707)
This patch updates the use_device_ptr and use_device_addr clauses to use
the mapInfoOps for lowering. This allows all the types that are handle
by the map clauses such as derived types to also be supported by the
use_device_clauses.
This is patch 2/2 in a series of patches.
Commit: 7330c9b033f29bd92b99db6282c0f71de64122ab
https://github.com/llvm/llvm-project/commit/7330c9b033f29bd92b99db6282c0f71de64122ab
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Lower/DirectivesCommon.h
Log Message:
-----------
[flang] Fix -Wunneeded-internal-declaration in DirectivesCommon.h (NFC)
/llvm-project/flang/lib/Lower/DirectivesCommon.h:910:1:
error: 'static' function 'peelOuterConvert' declared in header file should be declared 'static inline' [-Werror,-Wunneeded-internal-declaration]
peelOuterConvert(Fortran::semantics::SomeExpr &expr) {
^
1 error generated.
Commit: d94199c8ffba3f3895da7627d3dbbca62937310c
https://github.com/llvm/llvm-project/commit/d94199c8ffba3f3895da7627d3dbbca62937310c
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
Log Message:
-----------
[clang] Make lifetimebound and GSL analysis more coherent (#105884)
This allows clang to detect more use-after-free bugs (shown in the
#100549).
This relands the remaining change (removing the EnableLifetimeWarnings
flag) in https://github.com/llvm/llvm-project/pull/104906, with a proper
fix for the regression.
Fixes #100549
Commit: af1e59aea2ea7d07ece1f34621dda38c995826a3
https://github.com/llvm/llvm-project/commit/af1e59aea2ea7d07ece1f34621dda38c995826a3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/multi-tracked-reduced-value.ll
Log Message:
-----------
[SLP]Fix PR107037: correctly track origonal/modified after vectorizations reduced values
Need to correctly track reduced values with multiple uses in the same
reduction emission attempt. Otherwise, the number of the reuses might be
calculated incorrectly, and may cause compiler crash.
Fixes https://github.com/llvm/llvm-project/issues/107037
Commit: bb1b368e0ad3da98b4c51018bdbcd6a83d8e646d
https://github.com/llvm/llvm-project/commit/bb1b368e0ad3da98b4c51018bdbcd6a83d8e646d
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_faminmax.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve2-intrinsics-faminmax.ll
Log Message:
-----------
[AArch64] Implement intrinsics for SVE FAMIN/FAMAX (#99042)
This patch implements the following intrinsics:
* Floating-point absolute maximum (predicated)
svfloat16_t svamax[_f16]_m(svbool_t, svfloat16_t, svfloat16_t);
svfloat16_t svamax[_f16]_x(svbool_t, svfloat16_t, svfloat16_t);
svfloat16_t svamax[_f16]_z(svbool_t, svfloat16_t, svfloat16_t);
svfloat16_t svamax[_n_f16]_m(svbool_t, svfloat16_t, float16_t);
svfloat16_t svamax[_n_f16]_x(svbool_t, svfloat16_t, float16_t);
svfloat16_t svamax[_n_f16]_z(svbool_t, svfloat16_t, float16_t);
* Floating-point absolute minimum (predicated)
svfloat16_t svmin[_f16]_m(svbool_t, svfloat16_t, svfloat16_t);
svfloat16_t svmin[_f16]_x(svbool_t, svfloat16_t, svfloat16_t);
svfloat16_t svmin[_f16]_z(svbool_t, svfloat16_t, svfloat16_t);
svfloat16_t svmin[_n_f16]_m(svbool_t, svfloat16_t, float16_t);
svfloat16_t svmin[_n_f16]_x(svbool_t, svfloat16_t, float16_t);
svfloat16_t svmin[_n_f16]_z(svbool_t, svfloat16_t, float16_t);
All the intrinsics have also variants for `f32` and `f64`, and have the
`__arm_streaming` attribute.
(cf. https://github.com/ARM-software/acle/pull/324)
Commit: c2b92a4250b3f514685676ba8985ea73450f14d3
https://github.com/llvm/llvm-project/commit/c2b92a4250b3f514685676ba8985ea73450f14d3
Author: Bartłomiej Chmiel <bachm44 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
Log Message:
-----------
[SROA] Use SetVector for PromotableAllocas (#105809)
Use SetVector to make operations more efficient
if there is a very large number of allocas.
Commit: d65ff3e9364536f9e0bd5f1c1bace626c256a2ad
https://github.com/llvm/llvm-project/commit/d65ff3e9364536f9e0bd5f1c1bace626c256a2ad
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/empty-struct.ll
Log Message:
-----------
[SLP]Fix PR107198: add a check for empty complex type
Need to check if the complex type is empty before trying to dig in,
trying to find vectorizable type
Fixes https://github.com/llvm/llvm-project/issues/107198
Commit: 26645ae2eea00456d98b497f348426c375409ce4
https://github.com/llvm/llvm-project/commit/26645ae2eea00456d98b497f348426c375409ce4
Author: Menooker <yijie.mei at intel.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/test/Transforms/buffer-results-to-out-params-elim.mlir
Log Message:
-----------
[mlir][memref] Fix hoist-static-allocs option of buffer-results-to-out-params when function parameters are returned (#102093)
buffer-results-to-out-params pass will have a nullptr-referencing error
when hoist-static-allocs option is on, when the return value of a
function is a parameter of the function. This PR fixes this issue.
Commit: 6238159e886baca5ebf31fd6b15d79db30ced889
https://github.com/llvm/llvm-project/commit/6238159e886baca5ebf31fd6b15d79db30ced889
Author: paperchalice <liujunchang97 at outlook.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
Log Message:
-----------
[CodeGen][NewPM] Fix linker error due to dummy `MachineVerifierPass` (#107237)
Forgot to remove the dummy registry in `MachinePassRegistry.def`.
Commit: df5840f9f09280a33923f119db5a82e0cda3622d
https://github.com/llvm/llvm-project/commit/df5840f9f09280a33923f119db5a82e0cda3622d
Author: Aarni Koskela <akx at iki.fi>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU][Docs] Update product names for some targets (#106973)
Based on
https://rocm.docs.amd.com/projects/install-on-linux/en/latest/reference/system-requirements.html#supported-gpus.
Commit: 205f7ee737f75e666f70ad51bda5f778c02ab124
https://github.com/llvm/llvm-project/commit/205f7ee737f75e666f70ad51bda5f778c02ab124
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Analysis/Lint.cpp
A llvm/test/Analysis/Lint/noalias-null.ll
Log Message:
-----------
[Lint] Skip null args when checking noalias
Do not emit a warning if there are two null noalias arguments,
as they cannot be dereferenced anyway.
This is a common pattern for `@.omp_outlined`, which has some
optional noalias arguments.
Commit: 3d53212f6104c27df5097301587ece69db9c007e
https://github.com/llvm/llvm-project/commit/3d53212f6104c27df5097301587ece69db9c007e
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lld/COFF/InputFiles.cpp
A lld/test/COFF/arm64ec-import.test
Log Message:
-----------
[LLD][COFF] Initial support for ARM64EC importlibs. (#107164)
Use demangled symbol name for __imp_ symbols and define demangled thunk
symbol as AMD64 thunk.
Commit: f11915153761e0c2691945add795c891e63c0c4a
https://github.com/llvm/llvm-project/commit/f11915153761e0c2691945add795c891e63c0c4a
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Analysis/IVDescriptors.cpp
Log Message:
-----------
IVDescriptors: improve readability of a function (NFC) (#106219)
Avoid dereferencing operand to llvm::isa.
Commit: 4552153c37e04def01e99e32c02eab245d92b753
https://github.com/llvm/llvm-project/commit/4552153c37e04def01e99e32c02eab245d92b753
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/MachineCSE.cpp
Log Message:
-----------
[CodeGen][MachineCSE] Remove unused AA results(NFC) (#106604)
Alias Analysis result is never used in this pass
and hence removing it.
Commit: 028174aa2c3a9447aca3333e45b5f89e652b74d1
https://github.com/llvm/llvm-project/commit/028174aa2c3a9447aca3333e45b5f89e652b74d1
Author: Paul T Robinson <paul.robinson at sony.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/test/CodeGenCXX/debug-info-lambda-this.cpp
Log Message:
-----------
[DebugInfo] Make a test more robust (#106463)
This was accidentally matching a metadata record that happend to have
three elements, but wasn't the record of interest. Add CHECKs to make
sure we've found the correct record.
Commit: 6c143a86cddbc6d0431dd643bfc7d4f017042512
https://github.com/llvm/llvm-project/commit/6c143a86cddbc6d0431dd643bfc7d4f017042512
Author: Christudasan Devadasan <christudasan.devadasan at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
A llvm/include/llvm/CodeGen/MachineCSE.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/machine-cse-mid-pipeline.mir
M llvm/test/CodeGen/AArch64/sve-pfalse-machine-cse.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-cse-nonlocal-convergent-instrs.mir
M llvm/test/CodeGen/AMDGPU/copyprop_regsequence_with_undef.mir
M llvm/test/CodeGen/AMDGPU/machine-cse-ssa.mir
M llvm/test/CodeGen/PowerPC/machine-cse-rm-pre.mir
M llvm/test/CodeGen/Thumb/machine-cse-deadreg.mir
M llvm/test/CodeGen/Thumb/machine-cse-physreg.mir
M llvm/test/CodeGen/X86/cse-two-preds.mir
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
Log Message:
-----------
[CodeGen][NewPM] Port MachineCSE pass to new pass manager. (#106605)
Commit: 7732d8e51819416b9d28b1815bdf81d0e0642b04
https://github.com/llvm/llvm-project/commit/7732d8e51819416b9d28b1815bdf81d0e0642b04
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Deprecate DenseMap::FindAndConstruct (#107224)
I've migrated all uses of FindAndConstruct to operator[] and
try_emplace. This patch inlines FindAndConstruct into operator[] and
deprecates FindAndConstruct.
Commit: 1b0a80249399dadfe0c3f682fff77bf9eb666535
https://github.com/llvm/llvm-project/commit/1b0a80249399dadfe0c3f682fff77bf9eb666535
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
Log Message:
-----------
[GDBRemote] Handle 'heap' memory region info type (#105883)
This should cause the memory region info "is stack" field to be set to
"no".
Commit: 30f1cfb4d0784de869ab3a4a9774b696b9769093
https://github.com/llvm/llvm-project/commit/30f1cfb4d0784de869ab3a4a9774b696b9769093
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/DetailedRecordsBackend.cpp
M llvm/lib/TableGen/Record.cpp
Log Message:
-----------
[TableGen] Print memory stats in detailed record emitter (#106990)
Print memory allocation and related statistics when dumping detailed
record information.
Commit: e64ef634bbd940dfaae23d9fb43e6385014ffd10
https://github.com/llvm/llvm-project/commit/e64ef634bbd940dfaae23d9fb43e6385014ffd10
Author: Malek Ben Slimane <85631834+malek203 at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
Log Message:
-----------
Thread Safety Analysis: Differentiate between lock sets at real join points and expected/actual sets at function end (#105526)
This fixes false positives related to returning a scoped lockable
object. At the end of a function, we check managed locks instead of
scoped locks.
At real join points, we skip checking managed locks because we assume
that the scope keeps track of its underlying mutexes and will release
them at its destruction. So, checking for the scopes is sufficient.
However, at the end of a function, we aim at comparing the expected and
the actual lock sets. There, we skip checking scoped locks to prevent to
get duplicate warnings for the same lock.
Commit: 8f77d37f256809766fd83a09c6d144b785e9165a
https://github.com/llvm/llvm-project/commit/8f77d37f256809766fd83a09c6d144b785e9165a
Author: Princeton Ferro <pferro at nvidia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
[DAGCombiner] cache negative result from getMergeStoreCandidates() (#106949)
Cache negative search result from getStoreMergeCandidates() so that
mergeConsecutiveStores() does not iterate quadratically over a
potentially long sequence of unmergeable stores.
Commit: 3bc38fb27a12f785d8e78b8d00cbd277464ace92
https://github.com/llvm/llvm-project/commit/3bc38fb27a12f785d8e78b8d00cbd277464ace92
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/phi-select-constant.ll
Log Message:
-----------
[InstCombine] Generalize and consolidate phi translation check (#106051)
The foldOpIntoPhi() transforms requires all operands to be
phi-translatable. This can be the case either because they are phi nodes
in the same block, or because the operand dominates the block.
Currently, most callers of foldOpIntoPhi() satisfy this pre-condition by
requiring a constant operand, which trivially dominates everything. Only
selects had handling for variable operands.
Move this logic into foldOpIntoPhi(), so things are handled correctly if
other callers are generalized. Also make the implementation a bit more
general by querying the dominator tree.
Commit: 75dc9af1a227e5bfd34eeaf822d2db4520545f14
https://github.com/llvm/llvm-project/commit/75dc9af1a227e5bfd34eeaf822d2db4520545f14
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC]Remove some dead code + reorder calls to avoid extra checks
Commit: f7fa75b20835254c35baeff908b8c3827c13db41
https://github.com/llvm/llvm-project/commit/f7fa75b20835254c35baeff908b8c3827c13db41
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Basic/arm_sve.td
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_faminmax.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
A llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
Log Message:
-----------
[AArch64] Implement intrinsics for SME2 FAMIN/FAMAX (#99063)
This patch implements these intrinsics:
``` c
// Variants are also available for:
// [_f32_x2], [_f64_x2],
// [_f16_x4], [_f32_x4], [_f64_x4]
svfloat16x2_t svamax[_f16_x2](svfloat16x2 zd, svfloat16x2_t zm) __arm_streaming;
svfloat16x2_t svamin[_f16_x2](svfloat16x2 zd, svfloat16x2_t zm) __arm_streaming;
```
(cf. https://github.com/ARM-software/acle/pull/324)
Co-authored-by: Caroline Concatto <caroline.concatto at arm.com>
Commit: 660e34fd38c3fb39fba1871bbf5b2eb3a48bf277
https://github.com/llvm/llvm-project/commit/660e34fd38c3fb39fba1871bbf5b2eb3a48bf277
Author: Alexey Merzlyakov <60094858+AlexeyMerzlyakov at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h
M lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_riscv64.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_riscv64.h
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
R lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_fpr.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_fpr.out
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_only.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_only.out
R lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.out
A lldb/test/API/functionalities/postmortem/elf-core/main_fpr.c
Log Message:
-----------
[lldb][RISCV] Support optionally disabled FPR for riscv64 (#104547)
The PR adds the support optionally enabled/disabled FP-registers to LLDB
`RegisterInfoPOSIX_riscv64`. This situation might take place for RISC-V
builds having no FP-registers, like RV64IMAC or RV64IMACV.
To aim this, patch adds `opt_regsets` flags mechanism. It re-works
RegisterInfo class to work with flexibly allocated (depending on
`opt_regsets` flag) `m_register_sets` and `m_register_infos` vectors
instead of statically defined structures. The registration of regsets is
being arranged by `m_per_regset_regnum_range` map.
The patch flows are spread to `NativeRegisterContextLinux_riscv64` and
`RegisterContextCorePOSIX_riscv64` classes, that were tested on:
- x86_64 host working with coredumps
- RV64GC and RV64IMAC targets working with coredumps and natively in
run-time with binaries
`EmulateInstructionRISCV` is out of scope of this patch, and its
behavior did not change, using maximum set of registers.
According testcase built for RV64IMAC (no-FPR) was added to
`TestLinuxCore.py`.
Commit: 2d7339ad24b41eb06c417f7067b9fbeb4fdb2e6b
https://github.com/llvm/llvm-project/commit/2d7339ad24b41eb06c417f7067b9fbeb4fdb2e6b
Author: Juan Manuel Martinez Caamaño <jmartinezcaamao at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll
Log Message:
-----------
[AMDGPU][LDS] Fix dynamic LDS interaction with "amdgpu-no-lds-kernel-id" (#107092)
Dynamic lds and Table lds both use the amdgpu_lds_kernel_id intrinsic.
Kernels and functons that make an indirect use of this should not have
the
"amdgpu-no-lds-kernel-id" attribute.
For the later, this was done. For the dynamic lds case, this was
missing. This patch fixes it.
Commit: 865edb0436bc55a3df3596eefb9a83050a5c7a96
https://github.com/llvm/llvm-project/commit/865edb0436bc55a3df3596eefb9a83050a5c7a96
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
Log Message:
-----------
[mlir][ArmSME] Fix typo (NFC)
Commit: ba40737e819b4ca77b25c0950c47c305a15a93de
https://github.com/llvm/llvm-project/commit/ba40737e819b4ca77b25c0950c47c305a15a93de
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M libcxx/include/__type_traits/result_of.h
Log Message:
-----------
[libc++][modules] Include __type_traits/invoke.h from __type_traits/result_of.h (#106796)
The result_of trait requires the __invoke_of implementation detail, but
that is defined under __type_traits, not under __functional. Include the
right header directly to remove a dependency from __type_traits to
__functional.
Commit: d9019d478d40b4e8766efccdb3eb1ff77cdbfaec
https://github.com/llvm/llvm-project/commit/d9019d478d40b4e8766efccdb3eb1ff77cdbfaec
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M libcxx/include/__math/hypot.h
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++] Remove unused pair.h include from hypot.h (#106798)
This was added in #100820 by mistake since the final version of that PR
didn't depend on std::pair anymore.
Commit: 7a785d46d6c31937c620f186464fdc59c265b4bf
https://github.com/llvm/llvm-project/commit/7a785d46d6c31937c620f186464fdc59c265b4bf
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M libcxx/include/__fwd/array.h
M libcxx/include/span
Log Message:
-----------
[libc++][modules] Use inline variable instead of true_type (#106797)
This allows breaking up a dependency from __fwd/array.h onto
__type_traits, which is a circular dependency once __type_traits becomes
a module of its own. This is also a small consistency improvement since
we've been using inline variables for traits like this elsewhere in the
library.
Commit: c1a8283fcc735b1567c49bb6cd485f9e71a12cc4
https://github.com/llvm/llvm-project/commit/c1a8283fcc735b1567c49bb6cd485f9e71a12cc4
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
A libcxx/include/__memory/noexcept_move_assign_container.h
R libcxx/include/__type_traits/noexcept_move_assign_container.h
M libcxx/include/module.modulemap
M libcxx/include/string
M libcxx/include/vector
Log Message:
-----------
[libc++][modules] Move __noexcept_move_assign_container out of __type_traits (#107140)
That header depends on allocator traits, which is fundamentally tied to
`<memory>`, not to `<type_traits>`. This breaks a cycle betweeen
__type_traits and __memory.
Commit: 3d9abfc9f841b13825e3d03cfba272f5eeab9a3b
https://github.com/llvm/llvm-project/commit/3d9abfc9f841b13825e3d03cfba272f5eeab9a3b
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
Log Message:
-----------
Consolidate all IR logic for getting the identity value of a reduction [nfc]
This change merges the three different places (at the IR layer) for
finding the identity value of a reduction into a single copy. This
depends on several prior commits which fix ommissions and bugs in
the distinct copies, but this patch itself should be fully
non-functional.
As the new comments and naming try to make clear, the identity value
is a property of the @llvm.vector.reduce.* intrinsic, not of e.g.
the recurrence descriptor. (We still provide an interface for
clients using recurrence descriptors, but the implementation simply
translates to the intrinsic which each corresponds to.)
As a note, the getIntrinsicIdentity API does not support fminnum/fmaxnum
or fminimum/fmaximum which is why we still need manual logic (but at
least only one copy of manual logic) for those cases.
Commit: 3ebd79751f2d5e1c54047409865c051daba0a21b
https://github.com/llvm/llvm-project/commit/3ebd79751f2d5e1c54047409865c051daba0a21b
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
Log Message:
-----------
[MLIR][ROCDL] Remove patterns for ops supported as intrinsics in the AMDGPU backend (#102971)
This patch removes patterns for a few operations which allows mathToLLVM
conversion to convert the operations into LLVM intrinsics instead since
they are supported directly by the AMDGPU backend.
Commit: fe454b2044aba1d808cec486a8ca7a0e202d31bf
https://github.com/llvm/llvm-project/commit/fe454b2044aba1d808cec486a8ca7a0e202d31bf
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port c1a8283fcc73
Commit: c81b43074ab010d01ad794224dd9dd22bbe8a1f7
https://github.com/llvm/llvm-project/commit/c81b43074ab010d01ad794224dd9dd22bbe8a1f7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
Log Message:
-----------
[flang][cuda] Fix lowering of cuf kernel with unstructured nested construct (#107149)
Lowering was crashing when cuf kernels has an unstructured construct.
Blocks created by PFT need to be re-created inside of the operation like
it is done for OpenACC construct.
Commit: 0367305af849da7ee9237fd83c04ed3a01e8d223
https://github.com/llvm/llvm-project/commit/0367305af849da7ee9237fd83c04ed3a01e8d223
Author: mzukovec <113346157+mzukovec at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
A lld/test/wasm/Inputs/allow-multiple-definition.s
A lld/test/wasm/allow-multiple-definition.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SymbolTable.cpp
Log Message:
-----------
[lld][WebAssembly] Add allow-multiple-definition flag (#97699)
Add `allow-multiple-definition` flag to `wasm-ld`. This follows the ELF
linker logic. In case of duplication, the first symbol met is used.
This PR resolves the #97543
Commit: 697bc748f97736b294dd85b8f78530d023557b72
https://github.com/llvm/llvm-project/commit/697bc748f97736b294dd85b8f78530d023557b72
Author: Renaud Kauffmann <rkauffmann at nvidia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Driver/Options.td
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
Allow disabling of types from the command line (#107126)
Adding hidden options to disable types through the
`TargetCharacteristics`. I am seeing issues when I do this
programmatically and would like, for anyone, to have the ability to
reproduce them for development and testing purposes.
I am planning to file a couple of issues following this patch.
Commit: 776495987272294de6aafbe73dab3e9ab445227a
https://github.com/llvm/llvm-project/commit/776495987272294de6aafbe73dab3e9ab445227a
Author: Nico Weber <thakis at chromium.org>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
Log Message:
-----------
[gn/mac] bump HOST_LINK_VERSION to 520
With this, clang will pass -platform_version instead of
-mmacosx_version_min to the linker. Recent versions of the linker
complain that the flag is now spelled mmacos_version_min (without
the x), and this supresses that warning.
520 is over 4 years old by now, so just changing this unconditionally
seems fine.
Commit: c537dd9375156c2aa3cd1bfaee88af7c492359d5
https://github.com/llvm/llvm-project/commit/c537dd9375156c2aa3cd1bfaee88af7c492359d5
Author: Reid Kleckner <rnk at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/test/CodeGenCXX/microsoft-abi-template-static-init.cpp
Log Message:
-----------
[MS] Put dllexported inline global initializers in a comdat (#107154)
Follow-up to c19f4f8069722f6804086d4438a0254104242c46 to handle corner
case of exported inline variables.
Should fix #56485
Commit: 7e03753539baaaa7a5cc29da3c0dc4d2f6df3b58
https://github.com/llvm/llvm-project/commit/7e03753539baaaa7a5cc29da3c0dc4d2f6df3b58
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaType.cpp
A clang/test/Sema/attr-btf_type_tag.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
M clang/test/SemaCXX/type-traits.cpp
Log Message:
-----------
Disallow btf_type_tag in C++ mode (#107238)
This was always intended to be disallowed in C++ (see the definition in
Attr.td), but failed to add the correct checking code in SemaType.cpp to
ensure it was rejected.
Fixes #106864
Commit: accf90e16410468a2fa1ad9d1320f33fcc4cdd79
https://github.com/llvm/llvm-project/commit/accf90e16410468a2fa1ad9d1320f33fcc4cdd79
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/test/CodeGen/X86/pull-conditional-binop-through-shift.ll
Log Message:
-----------
[X86] pull-conditional-binop-through-shift.ll - replace X32 check prefixes with X86
We tend to use X32 only for gnux32 testing
Commit: b2223b4d7efa4ed003a1b3ce7439106ddc63125f
https://github.com/llvm/llvm-project/commit/b2223b4d7efa4ed003a1b3ce7439106ddc63125f
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
A llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
R llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir
A llvm/test/CodeGen/WebAssembly/exception-legacy.mir
R llvm/test/CodeGen/WebAssembly/exception.mir
Log Message:
-----------
[WebAssembly] Rename legacy EH mir tests (#107189)
We added `-legacy` suffix to the legacy EH `ll` tests in #107166 but
forgot to do the same for `mir` tests.
Commit: 32bc670609fe9c938bca5b3c0e70e6b3934b4641
https://github.com/llvm/llvm-project/commit/32bc670609fe9c938bca5b3c0e70e6b3934b4641
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
Log Message:
-----------
[WebAssembly] Misc. fixes in CFGStackify (NFC) (#107182)
This contains misc. small fixes in CFGStackify. Most of them are comment
fixes and variable name changes. Two code changes are removing the cases
that can never occur. Another is extracting a routine as a lambda
function. I will add explanations inline in the code as Github comments.
Commit: 26ba186bd0a22fac7d08ed566b00c03236b6b7a9
https://github.com/llvm/llvm-project/commit/26ba186bd0a22fac7d08ed566b00c03236b6b7a9
Author: RolandF77 <55763885+RolandF77 at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/load-and-splat.ll
M llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
M llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
M llvm/test/CodeGen/PowerPC/test-vector-insert.ll
M llvm/test/CodeGen/PowerPC/v16i8_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v2i64_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v8i16_scalar_to_vector_shuffle.ll
Log Message:
-----------
[PowerPC] Improve pwr7 codegen for v4i8 load (#104507)
There are no partial vector loads on pwr7 so current v4i8 codegen is an
int load then store to vector sized temp and re-load as vector. Try to
use lfiwax to load 32 bits into an FP reg and take advantage of VSX FP
and vector reg sharing to move the result to the right vector position.
Commit: a724f9a7e5d46c9bf49c7b5e207f792fb5214c10
https://github.com/llvm/llvm-project/commit/a724f9a7e5d46c9bf49c7b5e207f792fb5214c10
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
R llvm/test/Transforms/SLPVectorizer/RISCV/reduction-whole-regs-loads.ll
A llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
Log Message:
-----------
[SLP][NFC]Make whole reg non-power-2 test for x86 and aarch64 along with risc-v
Commit: 2092f3527ed743a8fb9e0858c839cd4b26907f2a
https://github.com/llvm/llvm-project/commit/2092f3527ed743a8fb9e0858c839cd4b26907f2a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
Log Message:
-----------
[SLP][NFC]Remove unsupported attribute
Commit: 601645c3b70e2a17d18779a3a51b8bc9ecdc9aa6
https://github.com/llvm/llvm-project/commit/601645c3b70e2a17d18779a3a51b8bc9ecdc9aa6
Author: Reid Kleckner <rnk at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGDeclCXX.cpp
Log Message:
-----------
[clang] Fix FIXME in dynamic initializer emission, NFCI
This potentially affects platforms that support comdats other than ELF,
COFF, or wasm, but that is the intention of the FIXME, and if they don't
want this behavior, they probably shouldn't advertise comdat support.
Commit: 9a2fd97d391caf1060e303f636d7113501788d2f
https://github.com/llvm/llvm-project/commit/9a2fd97d391caf1060e303f636d7113501788d2f
Author: Florian Mayer <fmayer at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll
Log Message:
-----------
Reapply^2 "[HWASan] remove incorrectly inferred attributes" (#106622) (#106816)
This reverts commit 66927fb95abef9327b453d7213c5df7d641269be.
Filter functions this applies to, which I initially wanted to do in a
follow up to make reverts easier, but turns out without that it gets
really slow
Fleetbench proto: no significant movement
Fleetbench hashing: no significant movement
Fleetbench libc: no significant movement
2nd stage LLVM build:
https://lab.llvm.org/buildbot/#/builders/55/builds/1765/steps/9/logs/stdio
after this change: 80833.56user 3303.04system
previous build: 78430.21user 3258.04system
Commit: 4228e28293458e6ec49bd5487210719ff33c319a
https://github.com/llvm/llvm-project/commit/4228e28293458e6ec49bd5487210719ff33c319a
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/generic09.f90
Log Message:
-----------
[flang] Fix crash in semantics (#106158)
Semantics crashes when merging a USE-associated derived type with a
local generic procedure interface of the same name. (The other direction
works.)
Commit: 6facf6981488700c1554dcce36d4ac774a91d568
https://github.com/llvm/llvm-project/commit/6facf6981488700c1554dcce36d4ac774a91d568
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/runtime/random.cpp
Log Message:
-----------
[flang][runtime] Correct RANDOM_INIT seed generation (#106250)
The initial seed was generated from a bitwise AND ("&") of two
clock-generated values, instead of an XOR or (best) a truncated integer
multiplication. Maybe I mistyped a shift-7 instead of a shift-6 or
shift-8 when I wrote that line, but it was most likely just stupidity.
Fixes https://github.com/llvm/llvm-project/issues/106221.
Commit: 9e53e77265769f1916d8c4fd8ed8263798e8e815
https://github.com/llvm/llvm-project/commit/9e53e77265769f1916d8c4fd8ed8263798e8e815
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Runtime/descriptor.h
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/tools.cpp
M flang/unittests/Runtime/Reduction.cpp
M flang/unittests/Runtime/Transformational.cpp
Log Message:
-----------
[flang] Fix warnings from more recent GCCs (#106567)
While experimenting with some more recent C++ features, I ran into
trouble with warnings from GCC 12.3.0 and 14.2.0. These warnings looked
legitimate, so I've tweaked the code to avoid them.
Commit: 500f6cc25cb93607e9ea13732b791297acf8f97f
https://github.com/llvm/llvm-project/commit/500f6cc25cb93607e9ea13732b791297acf8f97f
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/include/flang/Runtime/cpp-type.h
M flang/include/flang/Runtime/numeric.h
M flang/runtime/numeric-templates.h
M flang/runtime/numeric.cpp
M flang/unittests/Runtime/Numeric.cpp
Log Message:
-----------
[flang][runtime] Support SPACING for REAL(2 & 3) (#106575)
Add runtime APIs for the intrinsic function SPACING for REAL kinds 2 & 3
in two ways: Spacing2 (& 3) for build environments with std::float16_t,
and Spacing2By4 (& 3By4) variants (for any build environment) which
compute SPACING for those types but accept and return their values as
32-bit floats.
SPACING for REAL(2) is needed by HDF5.
Commit: 143f3fc40279cbdafce190c5516c9dd74fc22ae5
https://github.com/llvm/llvm-project/commit/143f3fc40279cbdafce190c5516c9dd74fc22ae5
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
A flang/test/Parser/non-breaking-space.f90
Log Message:
-----------
[flang] Accept a non-breaking space character in source (#106611)
Accept non-breaking space characters (Latin-1 '\xa0', UTF-8 '\xc2'
'\xa0') in source code, converting them into regular spaces in the
cooked character stream when not in character literals.
Commit: 840da2e8ba7e0f77938adfc6f6d315137542a1b8
https://github.com/llvm/llvm-project/commit/840da2e8ba7e0f77938adfc6f6d315137542a1b8
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
Log Message:
-----------
[SandboxIR] Implement CmpInst, FCmpInst, and ICmpInst (#106301)
As in the description.
Not sure the macros for "WRAP_XXX" add value or not, but do save some
boiler plate. Maybe there is a better way.
Commit: d1e4a2d300f7c0c6b681ddf719132c81d348aaab
https://github.com/llvm/llvm-project/commit/d1e4a2d300f7c0c6b681ddf719132c81d348aaab
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/semantics.h
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/semantics.cpp
A flang/test/Semantics/smp-proc-ref.f90
Log Message:
-----------
[flang] Fix spurious error with separate module procedures (#106768)
When the implementation of one SMP apparently references another in what
might be a specification expression, semantics may need to resolve it as
a forward reference, and to allow for the replacement of a
SubprogramNameDetails place-holding symbol with the final
SubprogramDetails symbol. Otherwise, as in the bug report below,
confusing error messages may result.
(The reference in question isn't really in the specification part of a
subprogram, but due to the syntactic ambiguity between the array element
assignment statement and a statement function definition, it appears to
be so at the time that the reference is processed.)
I needed to make DumpSymbols() available via SemanticsContext to analyze
this bug, and left that new API in place to make things easier next
time.
Fixes https://github.com/llvm/llvm-project/issues/106705.
Commit: 1324789a65665c27eda9e04bc93db81cc859924c
https://github.com/llvm/llvm-project/commit/1324789a65665c27eda9e04bc93db81cc859924c
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Parser/prescan.cpp
M flang/test/Preprocessing/pp134.F90
Log Message:
-----------
[flang][preprocessor] Extend handling of line continuation replacements (#107010)
Codes using traditional C preprocessors will sometimes put a keyword
macro name in a free form continuation line in order to get macro
replacement of part of an identifier, as in
call subr_&
&N&
&(1.)
where N is a keyword macro. f18 already handles this case, but not when
there is white space between the macro name and the following
continuation marker character '&'. Allow white space to appear.
Fixes https://github.com/llvm/llvm-project/issues/106931.
Commit: 61759513c8166a6420ded480802de72859a45499
https://github.com/llvm/llvm-project/commit/61759513c8166a6420ded480802de72859a45499
Author: Teresa Johnson <tejohnson at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/Analysis/IndirectCallPromotionAnalysis.h
Log Message:
-----------
[Analysis] Update getPromotionCandidatesForInstruction description (NFC) (#107277)
Updates the description for getPromotionCandidatesForInstruction to
reflect the cleanup done in #95624.
Commit: 6e60330af55bfdf5b34aed4c9197cd3afbf00498
https://github.com/llvm/llvm-project/commit/6e60330af55bfdf5b34aed4c9197cd3afbf00498
Author: Lei Wang <wlei at fb.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-stale-profile-toplev-func.prof
A llvm/test/Transforms/SampleProfile/pseudo-probe-stale-profile-toplev-func.ll
Log Message:
-----------
[SampleFDO] Read call-graph matching recovered top-level function profile (#101053)
With extbinary profile format, initial profile loading only reads
profile based on current function names in the module. However, if a
function is renamed, sample loader skips to load its original
profile(which has a different name), we will miss this case. To address
this, we load the top-level profile candidate explicitly for the
matching. If a match is found later, the function profile will be
further preserved for use by the sample loader.
Commit: 2e0ded3371f8d42f376bdfd4d70687537e36818e
https://github.com/llvm/llvm-project/commit/2e0ded3371f8d42f376bdfd4d70687537e36818e
Author: R-Goc <131907007+R-Goc at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
A llvm/test/CodeGen/WinEH/wineh-empty-seh-scope.ll
Log Message:
-----------
[Windows SEH] Fix crash on empty seh block (#107031)
Fixes https://github.com/llvm/llvm-project/issues/105813 and
https://github.com/llvm/llvm-project/issues/106915.
Adds a check for the end of the iterator, which can be a sentinel.
The issue was introduced in
https://github.com/llvm/llvm-project/commit/0efe111365ae176671e01252d24028047d807a84
from what I can see, so along with the introduction of /EHa support.
Commit: 36c210bb340cfdc68d314dd188e18c0bf017b999
https://github.com/llvm/llvm-project/commit/36c210bb340cfdc68d314dd188e18c0bf017b999
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV] Remove pre-assignment of mask vectors during call lowering. NFC (#107192)
The first mask vector operand is supposed to be assigned to V0. No other
vector types will be assigned to V0. We don't need to pre-assign, we can
just try V0 first for any mask vectors in the normal processing.
Commit: b30880e975279c1c8ef4c2645eb03063e4b19f2b
https://github.com/llvm/llvm-project/commit/b30880e975279c1c8ef4c2645eb03063e4b19f2b
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/SandboxIR/Tracker.cpp
Log Message:
-----------
[SandboxIR] Fix linking error caused by 840da2e8ba7e0f77938adfc6f6d315137542a1b8
Commit: a43137c3f85fd87f90c9a8ffaebd71d432018e79
https://github.com/llvm/llvm-project/commit/a43137c3f85fd87f90c9a8ffaebd71d432018e79
Author: Kyle Huey <khuey at kylehuey.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfFile.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfFile.h
A llvm/test/DebugInfo/Generic/debug-ranges-duplication.ll
Log Message:
-----------
[LLVM][DWARF] Make some effort to avoid duplicates in .debug_ranges. (#106614)
Inlining and zero-cost abstractions tend to produce volumes of debug
info with identical ranges. When built with full debugging information
(the equivalent of -g2) librustc_driver.so has 2.1 million entries in
.debug_ranges. But only 1.1 million of those entries are unique. While
in principle all duplicates could be eliminated with a hashtable,
checking to see if the new range is exactly identical to the previous
range and skipping a new addition if it is is sufficient to eliminate
99.99% of the duplicates. This reduces the size of librustc_driver.so's
.debug_ranges section by 35%, or the overall binary size a little more
than 1%.
Commit: c1667f909949d15c593e4a03a4e992cffa72ad3c
https://github.com/llvm/llvm-project/commit/c1667f909949d15c593e4a03a4e992cffa72ad3c
Author: Benoit Jacob <jacob.benoit.1 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
Log Message:
-----------
Fix `transpose->unpack` folding pattern for the partial-tile case of `unpack` (#107271)
Just directly create the empty tensor of appropriate shape instead of
relying on `UnPackOp::createDestinationTensor` which is trying to infer
the destination shape, which isn't possible in general with the set of
paramters that it is taking.
Signed-off-by: Benoit Jacob <jacob.benoit.1 at gmail.com>
Commit: ebf0599314e17c3ab89f303d452811b1db3e6d1e
https://github.com/llvm/llvm-project/commit/ebf0599314e17c3ab89f303d452811b1db3e6d1e
Author: SJW <48454132+sjw36 at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/test/Dialect/SCF/loop-pipelining.mlir
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
Log Message:
-----------
[MLIR][SCF] Add support for loop pipeline peeling for dynamic loops. (#106436)
Allow speculative execution and predicate results per stage.
Commit: 0fffdeb5f46078ddcc61e112cd38856b1165f050
https://github.com/llvm/llvm-project/commit/0fffdeb5f46078ddcc61e112cd38856b1165f050
Author: Ziqing Luo <ziqing at udel.edu>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions-inline-namespace.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-test-unreachable.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Warning Libc functions (#101583)
[-Wunsafe-buffer-usage] Add warn on unsafe calls to libc functions
Warning about calls to libc functions involving buffer access. Warned
functions are hardcoded by names.
(rdar://117182250)
Commit: f574b9c9297538a8d471658564619be3ad6e87dd
https://github.com/llvm/llvm-project/commit/f574b9c9297538a8d471658564619be3ad6e87dd
Author: Edd Dawson <edd.dawson at sony.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-sdk-root.c
Log Message:
-----------
[PS4,PS5][Driver] Check for absent SDK when -nostdlib/-nodefaultlibs (#107112)
The PlayStation drivers emit warnings if it looks like SDK libraries are
missing. Until this point, the check was skipped when either `-nostdlib`
or `-nodefaultlibs` was supplied. I believe the idea is that if you
aren't linking default libraries, you won't be in need of the SDK.
However, in a situation where these switches are supplied, users may
still want to pass `-lSomeSDKLib` to the driver/linker with the
expectation that libSomeSDKLib.a will be sourced from the SDK. That is,
`-nodefaultlibs` and `-nostdlib` affect the libraries passed to the
linker, but not the library search paths.
So this change removes `-nostdlib`/`-nodefaultlibs` from consideration
when deciding whether or not to probe for the SDK's existence.
N.B. complete behaviour for `-nostdlib` and `-nodefaultlibs` is yet to
be added to the PlayStation compiler drivers. Coming soon.
SIE tracker: TOOLCHAIN-16704
Commit: c50fecaaaabcf1598dc25fbde24c8352745b4ac9
https://github.com/llvm/llvm-project/commit/c50fecaaaabcf1598dc25fbde24c8352745b4ac9
Author: Ben Howe <141149032+bmhowe23 at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M mlir/lib/Transforms/Utils/RegionUtils.cpp
M mlir/test/Transforms/canonicalize-block-merge.mlir
Log Message:
-----------
[mlir] Fix region simplification bug when later blocks use prior block argument values (#97960)
This fixes #94520 by ensuring that any if any block arguments are being
used outside of the original block that the block is not considered a
candidate for merging.
More details: the root cause of the issue described in #94520 was that
`^bb2` and `^bb5` were being merged despite `%4` (an argument to `^bb2`)
was being used later in `^bb7`. When the block merge occurred, that
unintentionally changed the value of `%4` for all downstream code. This
change prevents that from happening.
Commit: 34f2c9a9ce73a61b27d75dab7e1eed256491afcc
https://github.com/llvm/llvm-project/commit/34f2c9a9ce73a61b27d75dab7e1eed256491afcc
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
A llvm/test/Analysis/CostModel/AArch64/vec3-fp-conversions.ll
Log Message:
-----------
[AArch64] Add tests for FP conversion with 3 element vectors.
Add tests showing a number of cases where costs for floating point
conversions are overestimated for vectors with 3 elements.
Commit: 3fe6a064f15cd854fd497594cc20e8b680cd2133
https://github.com/llvm/llvm-project/commit/3fe6a064f15cd854fd497594cc20e8b680cd2133
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
[LV] Check if compare is truncated directly in getInstructionCost.
The current check for truncated compares in getInstructionCost misses
cases where either the first or both operands are constants.
Check directly if the compare is marked for truncation. In that case,
the minimum bitwidth is that of the operands.
The patch also adds asserts to ensure that.
This fixes a divergence between legacy and VPlan-based cost model, where
the legacy cost model incorrectly estimated the cost of compares with
truncated operands.
Fixes https://github.com/llvm/llvm-project/issues/107171.
Commit: 42b4092db99633ec53d136d5da7abfcfb236c14e
https://github.com/llvm/llvm-project/commit/42b4092db99633ec53d136d5da7abfcfb236c14e
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
Log Message:
-----------
[RISCV] Precommit vmv.v.v with undef passthru tests
Commit: d21e731c42d6b967e29dbe2edc16c1b86885df0d
https://github.com/llvm/llvm-project/commit/d21e731c42d6b967e29dbe2edc16c1b86885df0d
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Fix typos in comment. NFC
Commit: 23f6c3370b8bc0bf773e69a41bf90454c0a10120
https://github.com/llvm/llvm-project/commit/23f6c3370b8bc0bf773e69a41bf90454c0a10120
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M libcxx/include/__math/hypot.h
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
Log Message:
-----------
[libc++][modules] Remove dependency on __algorithm/max from hypot.h (#107150)
That dependency was added recently when we made improvements to
std::hypot, but that resulted in `__math` depending on `__algorithm`,
which is a very heavyweight module. This patch uses `__math::fmax`
instead.
Commit: 5e19fd172063c8957a35c7fa3596620f79ebba97
https://github.com/llvm/llvm-project/commit/5e19fd172063c8957a35c7fa3596620f79ebba97
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M libcxx/include/__filesystem/directory_entry.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/module.modulemap
M libcxx/test/std/containers/views/mdspan/CustomTestLayouts.h
M libcxx/test/std/containers/views/mdspan/extents/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/conversion.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/ctad.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/dextents.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/dims.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/index_type.verify.cpp
M libcxx/test/std/containers/views/mdspan/extents/obs_static.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/types.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.layout_right.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.layout_stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.layout_left.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.layout_stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.extents_array.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.extents_span.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.strided_mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/deduction.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/is_exhaustive_corner_case.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/assign.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/conversion.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.copy.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_array.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_integers.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_map.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_map_acc.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_span.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.move.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/move.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/swap.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/types.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/test_offset_time_zone.h
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_local_time_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_zoned_time_duration2_time_zone_ptr2.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_zoned_time_duration2_time_zone_ptr2_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_local_time_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_time_zone.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/operator_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/operator_sys_time.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.from.chars/integral.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.from.chars/integral.roundtrip.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/from_chars_result.operator_bool.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/from_chars_result.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/to_chars_result.operator_bool.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/to_chars_result.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.to.chars/integral.pass.cpp
Log Message:
-----------
[libc++][modules] Consolidate leaf modules into their own top-level modules (#107147)
Some modules are leaf modules in the sense that they are not used by any
other part of the headers. These leaf modules are easy to consolidate
since there is no risk to create a cycle. As a result of regrouping
these modules, several missing includes were found and fixed in this
patch.
Commit: 63da545ccdd41d9eb2392a8d0e848a65eb24f5fa
https://github.com/llvm/llvm-project/commit/63da545ccdd41d9eb2392a8d0e848a65eb24f5fa
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/test/CodeGen/AArch64/atomicrmw-fadd.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmax.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fmin.ll
M llvm/test/CodeGen/AArch64/atomicrmw-fsub.ll
Log Message:
-----------
Revert "Reland "AtomicExpand: Allow incrementally legalizing atomicrmw"" (#107307)
Reverts llvm/llvm-project#106793
`Next == E` is not enough:
https://lab.llvm.org/buildbot/#/builders/169/builds/2834
`Next` is deleted by `processAtomicInstr`
Commit: 52dc4918ca8b874ddd4e4fcad873a66ecc5b6953
https://github.com/llvm/llvm-project/commit/52dc4918ca8b874ddd4e4fcad873a66ecc5b6953
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M libcxx/test/libcxx/clang_modules_include.gen.py
M libcxx/test/libcxx/clang_tidy.gen.py
M libcxx/test/libcxx/double_include.gen.py
M libcxx/test/libcxx/header_inclusions.gen.py
M libcxx/test/libcxx/libcpp_version.gen.py
M libcxx/test/libcxx/no_assert_include.gen.py
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/libcxx/transitive_includes.gen.py
M libcxx/utils/adb_run.py
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/apple-install-libcxx.sh
M libcxx/utils/ci/build-picolibc.sh
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/ci/vendor/android/Dockerfile.emulator
M libcxx/utils/ci/vendor/android/build-emulator-images.sh
M libcxx/utils/ci/vendor/android/container-setup.sh
M libcxx/utils/ci/vendor/android/emulator-entrypoint.sh
M libcxx/utils/ci/vendor/android/emulator-functions.sh
M libcxx/utils/ci/vendor/android/emulator-wait-for-ready.sh
M libcxx/utils/ci/vendor/android/setup-env-for-emulator.sh
M libcxx/utils/ci/vendor/android/start-emulator.sh
M libcxx/utils/ci/vendor/android/stop-emulator.sh
M libcxx/utils/libcxx/test/android.py
Log Message:
-----------
[libc++][NFC] Use consistent layout for license in Python files
Most Python files were using `# === [...]` instead of `#=== [...]`
so I went with what was the most common in the codebase.
Commit: 16900d3b98e6c8fbdad4411a054e3566bbbf9235
https://github.com/llvm/llvm-project/commit/16900d3b98e6c8fbdad4411a054e3566bbbf9235
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/hoist-binop.ll
Log Message:
-----------
LICM: hoist BO assoc when BinOp is in RHS (#107072)
Extend hoistBOAssociation smoothly to handle the case when the inner
BinaryOperator is in the RHS of the outer BinaryOperator. This completes
the generalization of hoistBOAssociation, and the only limitation after
this patch is the fact that only Add and Mul are hoisted.
Commit: 1ff8657b26870e9db4527b621fab0d21b6cbdc3c
https://github.com/llvm/llvm-project/commit/1ff8657b26870e9db4527b621fab0d21b6cbdc3c
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
Log Message:
-----------
[scudo] Use variable instead of recomputing. (#106647)
In the get fragmentation functions, there is already a variable that
computes the
in use bytes, so use that instead of recomputing it.
Commit: dd754cd262222bcb489038ac791e4278d90697f0
https://github.com/llvm/llvm-project/commit/dd754cd262222bcb489038ac791e4278d90697f0
Author: Alexander Shaposhnikov <ashaposhnikov at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M compiler-rt/lib/nsan/nsan.cpp
Log Message:
-----------
[compiler-rt][nsan] Update UnwindImpl (#107313)
Implement __sanitizer::BufferedStackTrace::UnwindImpl following msan.
Commit: dcf0160bd61d150e7b94067fcd991b466a361b08
https://github.com/llvm/llvm-project/commit/dcf0160bd61d150e7b94067fcd991b466a361b08
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/GetIntrinsicInfoTableEntriesBM.cpp
M llvm/lib/IR/Function.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
Log Message:
-----------
[TableGen] Optimize intrinsic info type signature encoding (#106809)
Change the "fixed encoding" table used for encoding intrinsic
type signature to use 16-bit encoding as opposed to 32-bit.
This results in both space and time improvements. For space,
the total static storage size (in bytes) of this info reduces by 50%:
- Current = 14193*4 (Fixed table) + 16058 + 3 (Long Table) = 72833
- New size = 14193*2 (Fixed table) + 19879 + 3 (Long Table) = 48268.
- Reduction = 50.9%
For time, with the added benchmark, we see a 7.3% speedup in
`GetIntrinsicInfoTableEntries` benchmark. Actual output of the
benchmark in included in the GitHub MR.
Commit: 660cc98647677815a3f5d97d00220071d8cf7a4f
https://github.com/llvm/llvm-project/commit/660cc98647677815a3f5d97d00220071d8cf7a4f
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/GlobalISel/PatternParser.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
Log Message:
-----------
[TableGen] Add `CodeGenIntrinsicsMap` for on-demand intrinsic creation (#107100)
- Add class `CodeGenIntrinsicMap` for on-demand creation of
`CodeGenIntrinsic`.
- Add class `CodeGenIntrinsicContext` to capture global information
required to build `CodeGenIntrinsic` objects.
- Adopt GlobalISel PatternParser and SearchableTableEmitter to use it.
Commit: 98c6bbfe1f3a348633e5e4c192a0134891fe3849
https://github.com/llvm/llvm-project/commit/98c6bbfe1f3a348633e5e4c192a0134891fe3849
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.td
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/test/TableGen/intrinsic-long-name.td
M llvm/test/TableGen/intrinsic-struct.td
M llvm/test/TableGen/searchabletables-intrinsic.td
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
Log Message:
-----------
[TableGen] Refactor Intrinsics record (#106986)
Eliminate unused `isTarget` field in Intrinsic record.
Eliminate `isOverloaded`, `Types` and `TypeSig` fields from the record,
as they are already available through the `TypeInfo` field. Change
intrinsic emitter code to look for this info using fields of the
`TypeInfo` record attached to the `Intrinsic` record.
Fix several intrinsic related unit tests to source the `Intrinsic` class
def from Intrinsics.td as opposed to defining a skeleton in the test.
This eliminates some duplication of information in the Intrinsic class,
as well as reduces the memory allocated for record fields, resulting in
~2% reduction (though that's not the main goal).
Commit: df50751d24da4f5fdf8f46119c09a7e941f7174b
https://github.com/llvm/llvm-project/commit/df50751d24da4f5fdf8f46119c09a7e941f7174b
Author: vporpo <vporpodas at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Type.h
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Type.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
Log Message:
-----------
[SandboxIR] Implement ConstantAggregateZero (#107172)
This patch implements sandboxir::ConstantAggregateZero mirroring
llvm::ConstantAggregateZero.
Commit: 9171881d64e4834de7ad7c9807607ce6bc5167a9
https://github.com/llvm/llvm-project/commit/9171881d64e4834de7ad7c9807607ce6bc5167a9
Author: Scott Linder <Scott.Linder at amd.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUUsage.rst
Log Message:
-----------
[AMDGPU][Docs] DWARF aspace-aware base types (post-review fixes)
Commit: 7c4eb60c9509c3a750961eac2dbcaad369d911f2
https://github.com/llvm/llvm-project/commit/7c4eb60c9509c3a750961eac2dbcaad369d911f2
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/Driver/ToolChain.cpp
Log Message:
-----------
[Clang] Fix CLANG_TOOLCHAIN_PROGRAM_TIMEOUT logic
PR #102521, which landed as 1ea0865dd6fa, implemented
`CLANG_TOOLCHAIN_PROGRAM_TIMEOUT`, but the logic is obviously wrong.
If the user-specified value is negative, it should become zero to mean
infinite. Otherwise, it should be left as is. Thus, use `std::max`
not `std::min`. This obvious fixup doesn't seem worth another pull
request.
Commit: 950bb68516eb564c29815997450bdb6516ffdcec
https://github.com/llvm/llvm-project/commit/950bb68516eb564c29815997450bdb6516ffdcec
Author: vporpo <vporpodas at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Implement ConstantPointerNull (#107320)
This patch implements sandboxir::ConstantPointerNull mirroring
llvm::ConstantPointerNull.
Commit: 9efe377307694be0c92f7cb3b02fd1d090fdbeb8
https://github.com/llvm/llvm-project/commit/9efe377307694be0c92f7cb3b02fd1d090fdbeb8
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/AST/CXXRecordDeclDefinitionBits.def
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Type.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/SemaHLSL/Types/Traits/IsIntangibleType.hlsl
A clang/test/SemaHLSL/Types/Traits/IsIntangibleTypeErrors.hlsl
Log Message:
-----------
[HLSL] Implement '__builtin_hlsl_is_intangible' type trait (#104544)
Implements `__builtin_hlsl_is_intangible` type trait.
HLSL intangible types are special implementation-defined types such as
resource handles or samplers. Any class that is an array of intangible
type or contains base class or members of intangible types is also an
intangible type.
Fixes #[102954](https://github.com/llvm/llvm-project/issues/102954)
Commit: aecbc924102ee57ea639cd76ed32b37eb2d257fc
https://github.com/llvm/llvm-project/commit/aecbc924102ee57ea639cd76ed32b37eb2d257fc
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
M llvm/test/CodeGen/WebAssembly/function-info.mir
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
Log Message:
-----------
[WebAssembly] Rename CATCH/CATCH_ALL to *_LEGACY (#107187)
This renames MIR instruction `CATCH` and `CATCH_ALL` to `CATCH_LEGACY`
and `CATCH_ALL_LEGACY` respectively.
Follow-up PRs for the new EH (exnref) implementation will use `CATCH`,
`CATCH_REF`, `CATCH_ALL`, and `CATCH_ALL_REF` as pseudo-instructions
that return extracted values or `exnref` or both, because we don't
currently support block return values in LLVM. So to give the old (real)
`CATCH`es and the new (pseudo) `CATCH`es different names, this attaches
`_LEGACY` prefix to the old names.
This also rearranges `WebAssemblyInstrControl.td` so that the old legacy
instructions are listed all together at the end.
Commit: 23457964392d00fc872fa6021763859024fb38da
https://github.com/llvm/llvm-project/commit/23457964392d00fc872fa6021763859024fb38da
Author: ziqingluo-90 <ziqing_luo at apple.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
R clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions-inline-namespace.cpp
R clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-test-unreachable.cpp
Log Message:
-----------
Revert "[-Wunsafe-buffer-usage] Warning Libc functions (#101583)"
This reverts commit 0fffdeb5f46078ddcc61e112cd38856b1165f050.
Will re-land this commit soon with a way to opt-out
Commit: 1254259e325428c5912843aa94f6fc663a40ea1b
https://github.com/llvm/llvm-project/commit/1254259e325428c5912843aa94f6fc663a40ea1b
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M compiler-rt/test/sanitizer_common/TestCases/Posix/fork_threaded.c
Log Message:
-----------
[hwasan] Disable test with hwasan-aliasing
It's likely flaky because we tag the stack, which
is unsupported in this mode.
Commit: ef1ef03d4c1014d41713feb0c7edc4d0e36982f4
https://github.com/llvm/llvm-project/commit/ef1ef03d4c1014d41713feb0c7edc4d0e36982f4
Author: yonghong-song <yhs at fb.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/BPF/BPFInstrInfo.td
Log Message:
-----------
[BPF] Fix dst/val mismatch in class ATOMIC_NOFETCH (#107288)
All ATOMIC_NOFETCH insns have "$dst = $val" constraints. So let us
enforce "$dst = $val" having the same register type in ATOMIC_NOFETCH as
well.
Currently, things work since ATOMIC_NOFETCH does not have source code
pattern matching. I am experimenting to introduce memory ordering to
BPFInstrInfo.td file and pattern matching will be needed. Eventually,
for atomic_fetch_*() insns locked insns could be generated if memory
ordering is memory_order_relaxed.
[1] https://lore.kernel.org/bpf/7b941f53-2a05-48ec-9032-8f106face3a3@linux.dev/
Commit: c82a5496c80747981efb8d25ad8bc4d8c6785b2e
https://github.com/llvm/llvm-project/commit/c82a5496c80747981efb8d25ad8bc4d8c6785b2e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
Log Message:
-----------
[RISCV] Support fixed vector VP_LOAD/STORE for bf16 and f16 without Zvfh. (#107297)
This allows odd sized vector load/store to be legalized to a
VP_LOAD/STORE using EVL.
I changed the bf16 tests in fixed-vectors-load.ll and
fixed-vectors-store.ll to use an illegal type to be consistent with the
intent of these files. A legal type is already tested in
fixed-vectors-load-store.ll
Commit: b2048de55ea934b70902864767b0cc8dfada8be0
https://github.com/llvm/llvm-project/commit/b2048de55ea934b70902864767b0cc8dfada8be0
Author: Max Winkler <max.enrico.winkler at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/clang_f_opts.c
Log Message:
-----------
[Clang] [Driver] Support `-fjmc` for `*-windows-msvc` target in non cl driver modes (#107177)
Allow `-fjmc` to be used if the target triple is targeting msvc,
`*-windows-msvc`, irrelevant of the driver mode used.
In general the driver mode shouldn't control the target triple.
Also in our custom build system I am trying to just treat clang as
clang. This is because while the `cl` driver mode emulates msvc
interface quite well there are still a lot of operations that are just
clang specific.
The optimization modes do not map directly from msvc to clang.
Warnings do not map from msvc to clang.
Instead of wrapping options with `/clang:` when targeting `clang-cl.exe`
it is just easier to target the clang driver always irrelevant of the
target triple.
Commit: eb2929d323c0c44f2037cf8a345ca6984ec228eb
https://github.com/llvm/llvm-project/commit/eb2929d323c0c44f2037cf8a345ca6984ec228eb
Author: Xiang Li <python3kgae at outlook.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
A llvm/test/CodeGen/DirectX/ContainerData/RuntimeInfoCS.ll
Log Message:
-----------
[DirectX] use DXILMetadataAnalysis to build PSVRuntimeInfo (#107101)
Replace the hardcoded values for compute shader in
DXContainer::addPipelineStateValidationInfo.
Still missing wave size.
Add preserved for previous passes so the information is not lost.
Fix https://github.com/llvm/wg-hlsl/issues/51
Commit: c28b1a19aadff97b369889aee084073a181cfda8
https://github.com/llvm/llvm-project/commit/c28b1a19aadff97b369889aee084073a181cfda8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
Log Message:
-----------
[LegalizeTypes][RISCV] Use SPLAT_VECTOR_PARTS to legalize splat BUILD_VECTOR (#107290)
If the element type needs to be expanded, we can use SPLAT_VECTOR_PARTS
if the target supports it.
There's already a DAGCombine to turn BUILD_VECTOR into SPLAT_VECTOR if
the target makes SPLAT_VECTOR legal, but it doesn't fire for vectors
that need to be split.
Commit: c2fc33204caca8c52b27425255bbc78c9e4d99e4
https://github.com/llvm/llvm-project/commit/c2fc33204caca8c52b27425255bbc78c9e4d99e4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Semantics/check-io.cpp
M flang/module/__fortran_builtins.f90
A flang/test/Lower/CUDA/cuda-devptr.cuf
Log Message:
-----------
[flang][cuda] Add c_devptr and bypass output semantic check (#107318)
Add a builtin type for c_devptr since it will need some special handling
for some function like c_f_pointer.
`c_ptr` is defined as a builtin type and was raising a semantic error if
you try to use it in a I/O statement. This patch add a check for c_ptr
and c_devptr to bypass the semantic check and allow the variables of
these types to be used in I/O.
Commit: aad699776496a80af5e062b446fe26a4313ff3e3
https://github.com/llvm/llvm-project/commit/aad699776496a80af5e062b446fe26a4313ff3e3
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
Log Message:
-----------
[RISCV] Fold PseudoVMV_V_V with undef passthru, handling policy (#106943)
If a vmv.v.v has an undef passthru then we can just replace it with its
input operand, since the tail is completely undefined.
This is a reattempt of #106840, but also checks to see if the input was
a pseudo where we can relax its tail policy to undef.
This also means we don't need to check for undef passthrus in
foldVMV_V_V anymore because they will be handled by
foldUndefPassthruVMV_V_V.
Commit: ad89e617c703239518187912540b8ea811dc2eda
https://github.com/llvm/llvm-project/commit/ad89e617c703239518187912540b8ea811dc2eda
Author: Matt Hofmann <mrh259 at cornell.edu>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M mlir/python/mlir/dialects/scf.py
M mlir/test/python/dialects/scf.py
Log Message:
-----------
[MLIR][Python] Fix detached operation coming from `IfOp` constructor (#107286)
Without this fix, `scf.if` operations would be created without a parent.
Since `scf.if` operations often have no results, this caused silent bugs
where the generated code was straight-up missing the operation.
Commit: 41c11ea2af743051013dfcc0fced5a450e2dc9b8
https://github.com/llvm/llvm-project/commit/41c11ea2af743051013dfcc0fced5a450e2dc9b8
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
Log Message:
-----------
[HLSL] Remove variables that are used only in assert (#107299)
Changes the assert to test the same condition without using the
variables.
This change is done in response to a comment
[here](https://github.com/llvm/llvm-project/pull/106657#issuecomment-2327493439).
Commit: abbcfff706b33a8965afa9f2c520f60ad46f3b9e
https://github.com/llvm/llvm-project/commit/abbcfff706b33a8965afa9f2c520f60ad46f3b9e
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M flang/lib/Semantics/check-io.cpp
M flang/module/__fortran_builtins.f90
R flang/test/Lower/CUDA/cuda-devptr.cuf
Log Message:
-----------
Revert "[flang][cuda] Add c_devptr and bypass output semantic check" (#107349)
Reverts llvm/llvm-project#107318
It breaks a test
https://lab.llvm.org/buildbot/#/builders/143/builds/1933
Commit: 1465e23985904d55a014f3377c287ded45c0fa0c
https://github.com/llvm/llvm-project/commit/1465e23985904d55a014f3377c287ded45c0fa0c
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
Log Message:
-----------
[RISCV][llvm] Handle `ptr` element type in `lowerDeinterleaveIntrinsicToLoad` and `lowerInterleaveIntrinsicToStore` (#107079)
Resolve https://github.com/llvm/llvm-project/issues/106970
currently it returns 0 fixed size for `ptr` element type. The `ptr`
element size should depend on `XLen` which is 64 in riscv64 and 32 in
riscv32 respectively.
Commit: da8fb7f4dddf48b2395f80dc09efffe38efa3d2f
https://github.com/llvm/llvm-project/commit/da8fb7f4dddf48b2395f80dc09efffe38efa3d2f
Author: Brandon Wu <brandon.wu at sifive.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaRISCV.cpp
Log Message:
-----------
[clang][RISCV] Fix typo of vector crypto in SemaRISCV.cpp. NFC (#106485)
Commit: 845d8d909c37c61298d49c0e91949c669ca15215
https://github.com/llvm/llvm-project/commit/845d8d909c37c61298d49c0e91949c669ca15215
Author: Elvis Wang <110374989+ElvisWang123 at users.noreply.github.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/cast.ll
Log Message:
-----------
[RISCV][TTI] Add cost of typebased cast VPIntrinsics with functionalOPC. (#97797)
This patch make the instruction cost of type-based cast VP intrinsics
will be same as their non-VP counterpart.
This is the following patch of
[#93435](https://github.com/llvm/llvm-project/pull/93435)
Commit: 76be3a0024fe0027bcba9a597fee32a8b2d962ae
https://github.com/llvm/llvm-project/commit/76be3a0024fe0027bcba9a597fee32a8b2d962ae
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
A llvm/test/CodeGen/DirectX/sin_vector_error.ll
Log Message:
-----------
[DirectX] Fix crash in DXILOpBuilder for vector types (#107334)
This function needs to return the "undefined" sigil for unknown types so
that the actual error handling triggers instead of a crash.
Commit: 787fc81437dfc924e4a7d6106248e335e32aeeeb
https://github.com/llvm/llvm-project/commit/787fc81437dfc924e4a7d6106248e335e32aeeeb
Author: Justin Bogner <mail at justinbogner.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
Log Message:
-----------
[DirectX] Clean up trailing whitespace. NFC (#107335)
Commit: d18ca271f1add262b4ee0318a980f78a402f5e9c
https://github.com/llvm/llvm-project/commit/d18ca271f1add262b4ee0318a980f78a402f5e9c
Author: Harini0924 <harinidonthula at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
A llvm/utils/lit/tests/Inputs/shtest-glob/example_file1.input
A llvm/utils/lit/tests/Inputs/shtest-glob/example_file2.input
A llvm/utils/lit/tests/Inputs/shtest-glob/glob-echo.txt
A llvm/utils/lit/tests/Inputs/shtest-glob/glob-mkdir.txt
A llvm/utils/lit/tests/Inputs/shtest-glob/lit.cfg
A llvm/utils/lit/tests/shtest-glob.py
Log Message:
-----------
Reapply "[llvm-lit] Add precommit test to verify current behavior of glob expansion in lit's internal shell" (#106763) (#107169)
This reverts commit 5af4ba2684b9b59de3bf8135f62e05ab68cfc489.
The previous patch was missing the closing parenthesis `)` in the
`CHECK` statement in the `llvm/utils/lit/tests/shtest-glob.py` file:
`# CHECK: FAIL: shtest-glob :: glob-mkdir.txt ({{[^)]*}}`
This issue broke some build bots. This patch corrects the `CHECK`
statement by adding the closing parenthesis:
`# CHECK: FAIL: shtest-glob :: glob-mkdir.txt ({{[^)]*}})`
Commit: 16cda01d22c0ac1713f667d501bdca91594a4e13
https://github.com/llvm/llvm-project/commit/16cda01d22c0ac1713f667d501bdca91594a4e13
Author: Carl Ritson <carl.ritson at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/wqm.mir
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
Log Message:
-----------
[AMDGPU] V_SET_INACTIVE optimizations (#98864)
Optimize V_SET_INACTIVE by allow it to run in WWM.
Hence WWM sections are not broken up for inactive lane setting.
WWM V_SET_INACTIVE can typically be lower to V_CNDMASK.
Some cases require use of exec manipulation V_MOV as previous code.
GFX9 sees slight instruction count increase in edge cases due to
smaller constant bus.
Additionally avoid introducing exec manipulation and V_MOVs where
a source of V_SET_INACTIVE is the destination.
This is a common pattern as WWM register pre-allocation often
assigns the same register.
Commit: 96a5aabbd6adada4525d5e0107e96e6f57dbdfbf
https://github.com/llvm/llvm-project/commit/96a5aabbd6adada4525d5e0107e96e6f57dbdfbf
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
Log Message:
-----------
[NFC][sanitizer] Thread safety annotation for Symbolizer
Commit: aafaa6943463b56db2928081dc72b116e246c249
https://github.com/llvm/llvm-project/commit/aafaa6943463b56db2928081dc72b116e246c249
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
M llvm/lib/Target/M68k/M68kCallingConv.td
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/PowerPC/PPCCallingConv.td
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/X86/X86CallingConv.td
Log Message:
-----------
[Target] Use templated MachineFunction::getSubtarget in *CallingConv.td. NFC (#107311)
This hides away the static_cast needed to get the target specific Subtarget
object.
Commit: 0c1500ef05e0a5b25cae79d2bd361dbc6e14e726
https://github.com/llvm/llvm-project/commit/0c1500ef05e0a5b25cae79d2bd361dbc6e14e726
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-04 (Wed, 04 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
Log Message:
-----------
[RISCV] Fix another RV32 Zdinx load/store addressing corner case.
RISCVExpandPseudoInsts makes sure the offset is divisible by 8
so we need to enforce that during isel.
Commit: 77f04882251b1e44239d6d7545cd62301e903a4a
https://github.com/llvm/llvm-project/commit/77f04882251b1e44239d6d7545cd62301e903a4a
Author: David Green <david.green at arm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64] Combine zext of deinterleaving shuffle. (#107201)
This is part 1 of a few patches that are intended to take deinterleaving
shuffles with masks like `[0,4,8,12]`, where the shuffle is
zero-extended to a larger size, and optimize away the deinterleave. In
this case it converts them to `and(uzp1, mask)`, where the `uzp1` act
upon the elements in the larger type size to get the lanes into the
correct possitions, and the `and` performs the zext. It performs the
combine fairly late, on the legalized type so that uitofp that are
converted to uitofp(zext(..)) will also be handled.
Commit: a7697c86559e9d57c9c0e2b5f2daaa5cec4e5119
https://github.com/llvm/llvm-project/commit/a7697c86559e9d57c9c0e2b5f2daaa5cec4e5119
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/test/CodeGen/ARM/arm-vld1.ll
M llvm/test/CodeGen/ARM/arm-vst1.ll
M llvm/test/CodeGen/ARM/bf16-intrinsics-ld-st.ll
M llvm/test/Transforms/InstCombine/ARM/neon-intrinsics.ll
Log Message:
-----------
[ARM] Do not assume alignment in vld1xN and vst1xN intrinsics (#106984)
These intrinsics currently assume natural alignment. Instead, respect
the alignment attribute on the intrinsic. Teach InstCombine to improve
that alignment.
If desired I could also adjust the clang frontend to add alignment
annotations equivalent to the previous behavior, but I don't see any
indication that such an assumption is correct in the ARM intrinsics
docs.
Fixes https://github.com/llvm/llvm-project/issues/59081.
Commit: 3d729571fdc86a40218e5743d4386d7d8edc36ae
https://github.com/llvm/llvm-project/commit/3d729571fdc86a40218e5743d4386d7d8edc36ae
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
Log Message:
-----------
[RISCV] Model dest EEW and fix peepholes not checking EEW (#105945)
Previously for vector peepholes that fold based on VL, we checked if the
VLMAX is the same as a proxy to check that the EEWs were the same. This
only worked at LMUL >= 1 because the EMULs of the Src output and user's
input had to be the same because the register classes needed to match.
At fractional LMULs we would have incorrectly folded something like
this:
%x:vr = PseudoVADD_VV_MF4 $noreg, $noreg, $noreg, 4, 4 /* e16 */, 0
%y:vr = PseudoVMV_V_V_MF8 $noreg, %x, 4, 3 /* e8 */, 0
This models the EEW of the destination operands of vector instructions
with a TSFlag, which is enough to fix the incorrect folding.
There's some overlap with the TargetOverlapConstraintType and
IsRVVWideningReduction. If we model the source operands as well we may
be able to subsume them.
Commit: f006246299c96486a8e37005a94e07c0bf334ee0
https://github.com/llvm/llvm-project/commit/f006246299c96486a8e37005a94e07c0bf334ee0
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/Target/Target.td
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
Log Message:
-----------
[CodeGen] Add generic INIT_UNDEF pseudo (#106744)
The InitUndef pass currently uses target-specific pseudo instructions,
with one pseudo per register class.
Instead, add a generic pseudo instruction, which can be used by all
targets and register classes.
Commit: f1ac334b13c22222ed5c71bad04ed8345b2be135
https://github.com/llvm/llvm-project/commit/f1ac334b13c22222ed5c71bad04ed8345b2be135
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
Log Message:
-----------
[Clang][SemaCXX] Preserve qualifiers in derived-to-base cast in defaulted comparison operators (#102619)
Fixes #102588
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: cf1ad28169be5d026ec95f351b56b0c090b3e682
https://github.com/llvm/llvm-project/commit/cf1ad28169be5d026ec95f351b56b0c090b3e682
Author: Daniel Grumberg <dgrumberg at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/ExtractAPI/DeclarationFragments.cpp
A clang/test/ExtractAPI/attributed-typedef.m
Log Message:
-----------
[clang][ExtractAPI] Handle AttributedType fragments transparently (#107262)
rdar://131958623
Commit: 41373098421f2aa551a0879537864c87d797a102
https://github.com/llvm/llvm-project/commit/41373098421f2aa551a0879537864c87d797a102
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/Lexer.cpp
M clang/test/Sema/pre-c2x-compat.c
Log Message:
-----------
[Clang] Warn with -Wpre-c23-compat instead of -Wpre-c++17-compat for u8 character literals in C23 (#97210)
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: 3e4788377bb29ed389b46521fcba0d06aa985bcf
https://github.com/llvm/llvm-project/commit/3e4788377bb29ed389b46521fcba0d06aa985bcf
Author: Giulio Eulisse <10544+ktf at users.noreply.github.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/include/clang/Basic/SourceManager.h
M llvm/include/llvm/ADT/PagedVector.h
Log Message:
-----------
Recover performance loss after PagedVector introduction (#67972)
Commit: b206bf0952796cb93f1aca9e47d5764e474e1998
https://github.com/llvm/llvm-project/commit/b206bf0952796cb93f1aca9e47d5764e474e1998
Author: Konrad Kleine <kkleine at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/cmake/caches/Release.cmake
Log Message:
-----------
Fix CLANG_BOOTSTRAP_TARGETS in Release.cmake (#106407)
# Problem
Before this patch you could not build the `stage2-LLVM` for example
because you first had to manually add it to `CLANG_BOOTSTRAP_TARGETS` in
the `Release.cmake` and also add it to
`LLVM_RELEASE_FINAL_STAGE_TARGETS` in the cmake configure run. Now you
can just use `-DLLVM_RELEASE_FINAL_STAGE_TARGETS="LLVM;clang"` on the
cmake CLI and be able to build the targets `stage2-LLVM` and
`stage2-clang` without further changes to the cache file.
# Solution
Take all `LLVM_RELEASE_FINAL_STAGE_TARGETS` elements and append them
prefixed with `stage2-` to `CLANG_BOOTSTRAP_TARGETS`. Afterwards all
duplicates are removed.
Commit: 3413f957243e4a152726e572986eb730699b8486
https://github.com/llvm/llvm-project/commit/3413f957243e4a152726e572986eb730699b8486
Author: David Green <david.green at arm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64] Add a few extra two-step zext shuffle tests. NFC
Commit: a95b212e9957b8f5b7d452b4713a7b6f9ee19e71
https://github.com/llvm/llvm-project/commit/a95b212e9957b8f5b7d452b4713a7b6f9ee19e71
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
Log Message:
-----------
[DWARF] Don't search scope chain to find DISubprogram for prologues (#107261)
Seemingly this goes back to fd07a2a in 2015 -- I anticipate that back
then the metadata layout was radically different. But nowadays at least, we
can just directly look up the subprogram.
Commit: 03d5b7ca3d83eee3514318ef8934ba26bc3d7fa9
https://github.com/llvm/llvm-project/commit/03d5b7ca3d83eee3514318ef8934ba26bc3d7fa9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
Log Message:
-----------
[MemorySanitizer] Don't create types pointers (NFC)
Everything in this pass uses a single addrspace 0 pointer type.
Don't try to create it using the typed pointer ctor.
This allows removing the type argument from
getShadowPtrForVAArgument().
Commit: 071606ab282bb622a87759569b7044ec19a9c641
https://github.com/llvm/llvm-project/commit/071606ab282bb622a87759569b7044ec19a9c641
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
Log Message:
-----------
[RISCV] Remove RV32 FIXMEs completed in #107290. NFC
Commit: 5ee73953f03fe0cf53190c8dc9a257c752ab4171
https://github.com/llvm/llvm-project/commit/5ee73953f03fe0cf53190c8dc9a257c752ab4171
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s
Log Message:
-----------
[AMDGPU] Add image_atomic_fmin/fmax as aliases for GFX12 (#107242)
This just follows SP3.
Commit: d0278cf395e09bfb8dbef9cb92e6103be91e1eb3
https://github.com/llvm/llvm-project/commit/d0278cf395e09bfb8dbef9cb92e6103be91e1eb3
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
Log Message:
-----------
[RISCV] Remove some more completed FIXMEs from tests. NFC
Commit: 3299bc863fd74613fdfad2a2fde3f75de79bd645
https://github.com/llvm/llvm-project/commit/3299bc863fd74613fdfad2a2fde3f75de79bd645
Author: Jeremy Morse <jeremy.morse at sony.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
Log Message:
-----------
[DWARF] Identify prologue_end by instruction rather than DILocation (#107264)
Currently, we identify the end of the prologue as being "the instruction
that first has *this* DebugLoc". It works well enough, but I feel
identifying a position in a function is best communicated by a
MachineInstr. Plus, I've got some patches coming that depend upon this.
Commit: 95684afbcd59f34be580f75ee32f766874b5d0f5
https://github.com/llvm/llvm-project/commit/95684afbcd59f34be580f75ee32f766874b5d0f5
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/Mangler.h
M llvm/lib/IR/Mangler.cpp
Log Message:
-----------
[IR][ARM64EC][NFC] Clean up and document ARM64EC mangling helpers. (#107230)
Commit: 87b4b648585f69a2ea148e86543aa31474e59acd
https://github.com/llvm/llvm-project/commit/87b4b648585f69a2ea148e86543aa31474e59acd
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
Fix a typo in CheckExprLifetime.cpp, NFC
Commit: 3e070906eff720dc44aee86e533e12aafc8bb14b
https://github.com/llvm/llvm-project/commit/3e070906eff720dc44aee86e533e12aafc8bb14b
Author: Haojian Wu <hokein.wu at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/Sema/CheckExprLifetime.cpp
Log Message:
-----------
Fix llvm-else-after-return clang-tidy warning in CheckExprLifetime.cpp, NFC
Commit: 07bef02831836748f46ddd285520f351fe18cfe9
https://github.com/llvm/llvm-project/commit/07bef02831836748f46ddd285520f351fe18cfe9
Author: Sergio Afonso <safonsof at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
Log Message:
-----------
[OpenMPOpt] Initialize OpenMPIRBuilderConfig::IsGPU flag (#104456)
This patch ensures the `IsGPU` flag is set by the OpenMPOpt pass, so
that it can be relied upon by `OpenMPIRBuilder` methods when called by
that pass as well.
Since currently there are very limited callers for the
`OpenMPIRBuilder::isGPU()` method, no assertions are being triggered by
the lack of initialization of this flag. However, when more
offloading-related features are implemented, it will eventually start
happening.
Commit: 142433684a6e3a2936f814268396dea4190905dc
https://github.com/llvm/llvm-project/commit/142433684a6e3a2936f814268396dea4190905dc
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/target.f90
A offload/test/offloading/fortran/target-map-dynamic.f90
Log Message:
-----------
[OpenMP][Flang] Fix dynamic-extent array mapping (#107247)
This patch fixes the mapping and lowering of arrays with dynamic extents
and adds a new test for the same. The fix discards the incomplete the
dynamic extent information and replacing it with just the base type.
When lowering to llvm later, the bounds information is used instead.
Commit: b44d9e5d3605d7ddd64992e3c77b6669f0f7701b
https://github.com/llvm/llvm-project/commit/b44d9e5d3605d7ddd64992e3c77b6669f0f7701b
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
VPlanTransforms: fix style after cursory reading (NFC) (#105827)
Commit: fa385274baae77a0ea7e78c4c6feca6b0ab4f1dc
https://github.com/llvm/llvm-project/commit/fa385274baae77a0ea7e78c4c6feca6b0ab4f1dc
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
A libcxx/test/libcxx/containers/associative/unord.map/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/associative/unord.set/abi.compile.pass.cpp
M libcxx/utils/libcxx/test/features.py
Log Message:
-----------
[libc++] Add ABI tests for unordered_{map,set} (#107200)
These are used to ensure #76756 is correct.
Commit: 11040560ba30381ed47c3089a2562a41b00dbb4b
https://github.com/llvm/llvm-project/commit/11040560ba30381ed47c3089a2562a41b00dbb4b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
Log Message:
-----------
[X86] preferABDSToABSWithNSW - use ABDS for i32/i64 if we have CMOV
Now that we have better ABDS lowering, prefer cmov(sub(x,y),sub(y,x)) to cmov(abs(sub(x,y)),sub(x,y)) to improve ILP
Commit: 84cf3a573e89b18ce79ff32a7646c0a99729029c
https://github.com/llvm/llvm-project/commit/84cf3a573e89b18ce79ff32a7646c0a99729029c
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/CXX/drs/cwg27xx.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/www/cxx_dr_status.html
Log Message:
-----------
[Clang] CWG2749: relational operators involving pointers to void (#93046)
https://cplusplus.github.io/CWG/issues/2749.html
This DR's effects are backported to C++98.
Does not affect C where integral constant expressions cannot involve
pointers.
---------
Co-authored-by: Vlad Serebrennikov <serebrennikov.vladislav at gmail.com>
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: d6832a611a7c4ec36f08b1cfe9af850dad32da2e
https://github.com/llvm/llvm-project/commit/d6832a611a7c4ec36f08b1cfe9af850dad32da2e
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/ranges_minmax.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__charconv/to_chars_integral.h
A libcxx/include/__cstddef/byte.h
A libcxx/include/__cstddef/max_align_t.h
A libcxx/include/__cstddef/nullptr_t.h
A libcxx/include/__cstddef/ptrdiff_t.h
A libcxx/include/__cstddef/size_t.h
M libcxx/include/__exception/nested_exception.h
M libcxx/include/__fwd/array.h
M libcxx/include/__fwd/complex.h
M libcxx/include/__fwd/pair.h
M libcxx/include/__fwd/span.h
M libcxx/include/__fwd/subrange.h
M libcxx/include/__fwd/tuple.h
M libcxx/include/__iterator/concepts.h
M libcxx/include/__iterator/iterator_traits.h
M libcxx/include/__iterator/wrap_iter.h
M libcxx/include/__mdspan/layout_stride.h
M libcxx/include/__memory/pointer_traits.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__memory/uses_allocator.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/__random/seed_seq.h
M libcxx/include/__random/subtract_with_carry_engine.h
M libcxx/include/__ranges/subrange.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__tuple/tuple_size.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/is_allocator.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_swappable.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/type_list.h
M libcxx/include/__utility/in_place.h
M libcxx/include/__utility/pair.h
M libcxx/include/__utility/swap.h
M libcxx/include/any
M libcxx/include/cstddef
M libcxx/include/cstdio
M libcxx/include/cstdlib
M libcxx/include/cstring
M libcxx/include/ctime
M libcxx/include/cuchar
M libcxx/include/cwchar
M libcxx/include/experimental/__simd/reference.h
M libcxx/include/experimental/__simd/scalar.h
M libcxx/include/experimental/__simd/simd.h
M libcxx/include/experimental/__simd/simd_mask.h
M libcxx/include/experimental/__simd/vec_ext.h
M libcxx/include/module.modulemap
M libcxx/include/typeinfo
M libcxx/include/unordered_map
M libcxx/include/unordered_set
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/std/numerics/bit/bit.pow.two/bit_ceil.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_floor.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_width.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/has_single_bit.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/popcount.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotl.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotr.pass.cpp
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/utils/libcxx/test/modules.py
Log Message:
-----------
[libc++][modules] Modularize <cstddef> (#107254)
Many headers include `<cstddef>` just for size_t, and pulling in
additional content (e.g. the traits used for std::byte) is unnecessary.
To solve this problem, this patch splits up `<cstddef>` into
subcomponents so that headers can include only the parts that they
actually require.
This has the added benefit of making the modules build a lot stricter
with respect to IWYU, and also providing a canonical location where we
define `std::size_t` and friends (which were previously defined in
multiple headers like `<cstddef>` and `<ctime>`).
After this patch, there's still many places in the codebase where we
include `<cstddef>` when `<__cstddef/size_t.h>` would be sufficient.
This patch focuses on removing `<cstddef>` includes from __type_traits
to make these headers non-circular with `<cstddef>`. Additional
refactorings can be tackled separately.
Commit: 485d191f0ca5e31a60fe2489ac99270ed5c7a594
https://github.com/llvm/llvm-project/commit/485d191f0ca5e31a60fe2489ac99270ed5c7a594
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port d6832a611a7c
Commit: 2a07509c8d3c8b5b2c88e4f73dde0071bf506870
https://github.com/llvm/llvm-project/commit/2a07509c8d3c8b5b2c88e4f73dde0071bf506870
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
A clang/test/SemaCXX/builtin-is-within-lifetime.cpp
A clang/test/SemaCXX/consteval-builtin.cpp
Log Message:
-----------
[Clang] Add __builtin_is_within_lifetime to implement P2641R4's std::is_within_lifetime (#91895)
[P2641R4](https://wg21.link/P2641R4)
This new builtin function is declared `consteval`. Support for
`-fexperimental-new-constant-interpreter` will be added in a later
patch.
---------
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: e4fdbcc28f19b59fef065f2a6f939f91f286b9a8
https://github.com/llvm/llvm-project/commit/e4fdbcc28f19b59fef065f2a6f939f91f286b9a8
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/forward_list
M libcxx/include/list
M libcxx/include/string
Log Message:
-----------
[libc++] Add miscellaneous missing includes
Commit: 2c3da172d1869a2e261af38c45582027a9ff6af7
https://github.com/llvm/llvm-project/commit/2c3da172d1869a2e261af38c45582027a9ff6af7
Author: Ramkumar Ramachandra <ramkumar.ramachandra at codasip.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
Log Message:
-----------
LIR: strip unused LAA header dependency (NFC) (#107382)
LoopIdiomRecognize does not use LoopAccessAnalysis. Make this clear.
Commit: 3d01f0a33b9a14545217938fbd2475226ade2719
https://github.com/llvm/llvm-project/commit/3d01f0a33b9a14545217938fbd2475226ade2719
Author: Andrea Faulds <andrea.faulds at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp
M mlir/test/Dialect/GPU/canonicalize.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/subgroup-reduce-lowering.mlir
Log Message:
-----------
[mlir][gpu] Add 'cluster_stride' attribute to gpu.subgroup_reduce (#107142)
Follow-up to 7aa22f013e24d20291aad745368ff907baa9dfa4, adding an
additional attribute needed in some applications.
Commit: 7d1a68178ef4332c9bf19a5c959a3ec4cef0285d
https://github.com/llvm/llvm-project/commit/7d1a68178ef4332c9bf19a5c959a3ec4cef0285d
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
Log Message:
-----------
[SystemZ] Use APInt::getAllOnes()
This was using -1 without setting the signed flag.
Split off from https://github.com/llvm/llvm-project/pull/80309.
Commit: 67e19e5bb11d8ed2f1b5a0b8145331c8bf4522e9
https://github.com/llvm/llvm-project/commit/67e19e5bb11d8ed2f1b5a0b8145331c8bf4522e9
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
Log Message:
-----------
[flang] Set isSigned=true for negative constant (NFC)
We're providing this as a negative signed value, so set the flag.
Currently doesn't make a difference, but will assert in the future.
Split out of https://github.com/llvm/llvm-project/pull/80309.
Commit: 9e9971b100e121b83f1de9e9206cddb52cda4815
https://github.com/llvm/llvm-project/commit/9e9971b100e121b83f1de9e9206cddb52cda4815
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatchTest] Use APInt::getAllOnes() (NFC)
Split out from https://github.com/llvm/llvm-project/pull/80309 to
avoid assertion failures in the future.
Commit: eae1d6152fd77511f943fd7f300a971c53453e70
https://github.com/llvm/llvm-project/commit/eae1d6152fd77511f943fd7f300a971c53453e70
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
Log Message:
-----------
[X86] Add test coverage for #107289
Commit: 1a1264726db275d4b207c5bc640e2779dd484478
https://github.com/llvm/llvm-project/commit/1a1264726db275d4b207c5bc640e2779dd484478
Author: Robin Caloudis <robin.caloudis at gmx.de>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M libcxx/include/__math/traits.h
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
A libcxx/test/std/numerics/c.math/signbit.pass.cpp
Log Message:
-----------
[libc++][math] Add `constexpr` for `std::signbit()` (#105946)
## Why
Since 18th of August, the floating point comparison builtin
``__builtin_signbit`` is available in Clang as constant expression
(https://github.com/llvm/llvm-project/pull/94118).
## What
* Implement `constexpr` for `std::signbit()` as defined by
[P0533R9](https://www.open-std.org/jtc1/sc22/wg21/docs/papers/2021/p0533r9.pdf)
(new C++23 feature)
* Restrict execution of tests to tip-of-trunk Clang as builtin is not
yet available (note that builtin is available in GCC)
Commit: 7f0c5b0502b462d2afad32d3681b37cfc15ba844
https://github.com/llvm/llvm-project/commit/7f0c5b0502b462d2afad32d3681b37cfc15ba844
Author: Lukacma <Marian.Lukac at arm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
Log Message:
-----------
[AArch64]Fix invalid use of ld1/st1 in stack alloc (#105518)
This patch fixes incorrect usage of scalar+immediate variant of ld1/st1
instructions during stack allocation caused by
[c4bac7f](https://github.com/llvm/llvm-project/commit/c4bac7f7dcd931a5e561604e95656a24c3d1c9d9).
This commit used ld1/st1 even when stack offset was outside of immediate
range for this instruction, producing invalid assembly. This commit was also using incorrect offsets when using ld1/st1.
Commit: 80cd2141eb7f6e7be738a01348bc2ccd08b41cd6
https://github.com/llvm/llvm-project/commit/80cd2141eb7f6e7be738a01348bc2ccd08b41cd6
Author: Mogball <jeff at modular.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[mlir][llvm] Add `externally_initialized` support to GlobalOp
This maps the `externally_initialized` flag in `llvm::GlobalVariable` to
`GlobalOp` and adds exported support.
Commit: 0ba78182b975d8ccd8ca42b33fbf038a85a44747
https://github.com/llvm/llvm-project/commit/0ba78182b975d8ccd8ca42b33fbf038a85a44747
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] LowerSelect - generalize "select icmp(x,0), lhs, rhs" folding patterns [NFC] (#107374)
This patch proposes we add a LowerSELECTWithCmpZero helper, which allows us to fold the compare-with-zero from different condition nodes with minimal duplication.
So far I've only handled the simple no-cmov case for or/xor nodes, but the intention is to convert more folds in future PRs.
NFC preliminary patch for #107272
Commit: 233ed51cf53d590d3f52d5becff95317dbf73657
https://github.com/llvm/llvm-project/commit/233ed51cf53d590d3f52d5becff95317dbf73657
Author: Jacek Caban <jacek at codeweavers.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
Log Message:
-----------
[LLD][COFF][NFC] Use is64Bit in Baserel::getDefaultType. (#107378)
In preparation for ARM64EC support. Also make it static.
Commit: 9707b98e572adf34ef3e71bcf159dae08e654fd8
https://github.com/llvm/llvm-project/commit/9707b98e572adf34ef3e71bcf159dae08e654fd8
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/ConstantRange.cpp
Log Message:
-----------
[ConstantRange] Perform increment on APInt (NFC)
This handles the edge case where BitWidth is 1 and doing the
increment gets a value that's not valid in that width, while we
just want wrap-around.
Split out of https://github.com/llvm/llvm-project/pull/80309.
Commit: 9e85efb0dec8e78ca69925a05c0bbba211dee507
https://github.com/llvm/llvm-project/commit/9e85efb0dec8e78ca69925a05c0bbba211dee507
Author: Nikita Popov <npopov at redhat.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[ConstantRangeTest] Set APInt signed flags where needed (NFC)
Split out from https://github.com/llvm/llvm-project/pull/80309 to
avoid assertion failures in the future.
Commit: 5024dff6eee5a95a741b063c953422c5b6d02fdc
https://github.com/llvm/llvm-project/commit/5024dff6eee5a95a741b063c953422c5b6d02fdc
Author: Martin Storsjö <martin at martin.st>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++][ci] Add a test configuration with an incomplete sysroot (#107089)
When bringing up a new cross compiler from scratch, we build
libunwind/libcxx in a setup where the toolchain is incomplete and unable
to perform the normal linker checks; this requires a few special cases
in the CMake files.
We simulate that scenario by removing the libc++ headers, libunwind and
libc++ libraries from the installed toolchain.
We need to set CMAKE_CXX_COMPILER_WORKS since CMake fails to probe the
compiler. We need to set CMAKE_CXX_COMPILER_TARGET, since LLVM's
heuristics fail when CMake hasn't been able to probe the environment
properly. (This is normal; one has to set those options when setting up
such a toolchain from scratch.)
This adds CI coverage for these build scenarios, which otherwise seldom
are tested by some build flow (but are essential when setting up a cross
compiler from scratch).
Commit: 16dc65bdc0f0a23bc2696afce2abecd9f2faa097
https://github.com/llvm/llvm-project/commit/16dc65bdc0f0a23bc2696afce2abecd9f2faa097
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/dev-mode-extra-features-logging.ll
Log Message:
-----------
[mlgo] Fix test post - #106744
Trivial fix, some instruction opcodes changed.
Commit: bded3b3ea9f78c5b3edc3d4a6076665af0ea746b
https://github.com/llvm/llvm-project/commit/bded3b3ea9f78c5b3edc3d4a6076665af0ea746b
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/div.ll
Log Message:
-----------
[llvm][AArch64] Improve the cost model for i128 div's (#107306)
Commit: 63e8a1b16f344eaef17c4015497326479e69d1e7
https://github.com/llvm/llvm-project/commit/63e8a1b16f344eaef17c4015497326479e69d1e7
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
Log Message:
-----------
[SLP] Enable reordering for non-power-of-two vectors (#106638)
This change tries to enable vector reordering during vectorization for
non-power-of-two vectors. Specifically, my goal is to be able to
vectorize reductions whose operands appear in other than identity order.
(i.e. a[1] + a[0] + a[2]). Our standard pass pipeline, Reassociation
effectively canonicalizes towards this form. So for reduction
vectorization to be wildly applicable, we need this feature.
This change enables the use of a non-empty ReorderIndices structure -
which is effectively required for out of order loads or gathers - while
leaving the ReuseShuffleIndices mechanism unused and disabled. If I've
understood the code structure, the former is used when describing
implicit shuffles required by the vectorization strategy (i.e. loading
elements 0,1,3,2 in the order 0,1,2,3 and then shuffling later), while
the later is used when trying to optimize explode/buildvectors (called
gathers in this code).
I audited all the code enabled by this change, but can't claim to
deeply understand most of it. I added a couple of bailouts in places
which appeared to be difficult to audit and optional optimizations. I've
tried to do so in the least risky way I can, but am not completely
confident in this change. Careful review appreciated.
Commit: 3b19e480c056a35a60e3c65de476b6097329ceac
https://github.com/llvm/llvm-project/commit/3b19e480c056a35a60e3c65de476b6097329ceac
Author: Tom Eccles <tom.eccles at arm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M flang/include/flang/Tools/TargetSetup.h
M flang/module/ieee_arithmetic.f90
M flang/test/CMakeLists.txt
M flang/test/Evaluate/fold-out_of_range.f90
M flang/test/Evaluate/folding07.f90
M flang/test/Lower/Intrinsics/ieee_class_queries.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/common-block.f90
M flang/test/Semantics/kinds03.f90
M flang/test/Semantics/modfile26.f90
M flang/test/Semantics/realkinds-aarch64-01.f90
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
M flang/tools/f18/CMakeLists.txt
Log Message:
-----------
[flang] Warn when F128 is unsupported (#102147) (#106957)
This generates `warning: REAL(KIND=16) is not an enabled type for this
target` if that type is used in a build not correctly configured to
support this type. Uses of `selected_real_kind(30)` return -1.
Relanding #102147 because the test errors turned out to be specific to a
downstream configuration.
Commit: e80f48986c7ba6cc41378b8d8e12d804cf26895d
https://github.com/llvm/llvm-project/commit/e80f48986c7ba6cc41378b8d8e12d804cf26895d
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/udiv-of-x-xsmaxone-fold.ll
Log Message:
-----------
[SCEV] BECount to zero if `((-C + (C smax %x)) /u %x), C > 0` holds
The SCEV expression `((-C + (C smax %x)) /u %x)` can be folded
to zero for any positive constant C.
Proof: https://alive2.llvm.org/ce/z/_dLm8C.
Commit: 7eca38ce76d5d1915f4ab7e665964062c0b37697
https://github.com/llvm/llvm-project/commit/7eca38ce76d5d1915f4ab7e665964062c0b37697
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGBuilder.h
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGen/2005-01-02-ConstantInits.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
M clang/test/CodeGen/catch-pointer-overflow-volatile.c
M clang/test/CodeGen/catch-pointer-overflow.c
M clang/test/CodeGen/ext-int.c
M clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c
M clang/test/CodeGen/integer-overflow.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGen/ubsan-pointer-overflow.m
M clang/test/CodeGen/vla.c
M clang/test/CodeGenCXX/attr-likelihood-iteration-stmt.cpp
M clang/test/CodeGenCXX/for-range.cpp
M clang/test/CodeGenCXX/pr45964-decomp-transform.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenHLSL/buffer-array-operator.hlsl
M clang/test/CodeGenSYCL/address-space-deduction.cpp
M clang/test/Headers/__clang_hip_math.hip
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/declare_mapper_codegen.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/for_linear_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/for_reduction_task_codegen.cpp
M clang/test/OpenMP/for_scan_codegen.cpp
M clang/test/OpenMP/for_simd_scan_codegen.cpp
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/irbuilder_for_unsigned.c
M clang/test/OpenMP/irbuilder_for_unsigned_auto.c
M clang/test/OpenMP/irbuilder_for_unsigned_down.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic_chunked.c
M clang/test/OpenMP/irbuilder_for_unsigned_runtime.c
M clang/test/OpenMP/irbuilder_for_unsigned_static_chunked.c
M clang/test/OpenMP/map_struct_ordering.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/ordered_codegen.cpp
M clang/test/OpenMP/parallel_for_codegen.cpp
M clang/test/OpenMP/parallel_for_linear_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_for_scan_codegen.cpp
M clang/test/OpenMP/parallel_for_simd_scan_codegen.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_data_use_device_addr_codegen.cpp
M clang/test/OpenMP/target_data_use_device_ptr_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_is_device_ptr_codegen.cpp
M clang/test/OpenMP/target_map_both_pointer_pointee_codegen.cpp
M clang/test/OpenMP/target_map_codegen_01.cpp
M clang/test/OpenMP/target_map_codegen_21.cpp
M clang/test/OpenMP/target_map_codegen_27.cpp
M clang/test/OpenMP/target_map_codegen_28.cpp
M clang/test/OpenMP/target_map_codegen_29.cpp
M clang/test/OpenMP/target_map_deref_array_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_array_section_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_map_nest_defalut_mapper_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_task_affinity_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_update_codegen.cpp
M clang/test/OpenMP/task_codegen.c
M clang/test/OpenMP/task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
Log Message:
-----------
Reland "[clang] Add nuw attribute to GEPs (#105496)" (#107257)
Add nuw attribute to inbounds GEPs where the expression used to form the
GEP is an addition of unsigned indices.
Relands #105496, which was reverted because it exposed a miscompilation
arising from #98608. This is now fixed by #106512.
Commit: 122874c955e06defb619b1afd4e26db482dbbf19
https://github.com/llvm/llvm-project/commit/122874c955e06defb619b1afd4e26db482dbbf19
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/buildvec-insertvec.ll
M llvm/test/CodeGen/X86/known-signbits-vector.ll
M llvm/test/CodeGen/X86/load-scalar-as-vector.ll
M llvm/test/CodeGen/X86/pr44915.ll
M llvm/test/CodeGen/X86/vec_insert-5.ll
M llvm/test/CodeGen/X86/vec_shift5.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
Log Message:
-----------
[X86] Fold scalar_to_vector(shift(x,imm)) -> vshift(scalar_to_vector(x),imm)
Noticed while working on #107289
Commit: 0c8d6df362fe5b4bce54776e2199623d0382293b
https://github.com/llvm/llvm-project/commit/0c8d6df362fe5b4bce54776e2199623d0382293b
Author: erichkeane <ekeane at nvidia.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Sema/builtin-unary-fp.c
Log Message:
-----------
Fix handling of FP-classify where the last arg fails to convert
The last argument of an FP-classify function was checked for vailidity
as an expression, but we never ensured that the usual unary
conversions/etc properly resulted in a valid value. Thus, when we got
the value, it was null, so we had a null dereference.
This patch instead fails out/marks the function call as invalid if the
argument is incorrect. I DID consider just allowing it to continue, but
the result was an extraneous error about how the last argument wasn't a
float (in this case, it was an overload set).
Fixes: #107411
Commit: aea3b0f6838bd8268fc3653e1b662d771c87ab15
https://github.com/llvm/llvm-project/commit/aea3b0f6838bd8268fc3653e1b662d771c87ab15
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
Log Message:
-----------
[ARM] Avoid repeated hash lookups (NFC) (#107356)
Commit: abfb340b779f2b20009fe42ebc522417adf79c44
https://github.com/llvm/llvm-project/commit/abfb340b779f2b20009fe42ebc522417adf79c44
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/Analysis/ThreadSafety.cpp
Log Message:
-----------
[Analysis] Avoid repeated hash lookups (NFC) (#107357)
Commit: 0593b95ff4c459ccf71f9472c148967d40f6d865
https://github.com/llvm/llvm-project/commit/0593b95ff4c459ccf71f9472c148967d40f6d865
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
Log Message:
-----------
[CGOpenMPRuntime] Avoid repeated hash lookups (NFC) (#107358)
Commit: be427dfb9ea6689947253d737708dc3645e179dc
https://github.com/llvm/llvm-project/commit/be427dfb9ea6689947253d737708dc3645e179dc
Author: Mital Ashok <mital at mitalashok.co.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/docs/LanguageExtensions.rst
M clang/docs/ReleaseNotes.rst
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/test/CXX/drs/cwg27xx.cpp
M clang/test/Lexer/cxx-features.cpp
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/Sema/static-assert.c
A clang/test/SemaCXX/static-assert-ext.cpp
Log Message:
-----------
[Clang][Parser] Accept P2741R3 (static_assert with user-generated message) in C++11 as an extension (#102044)
Added a new `-Wpre-c++26-compat` warning for when this feature is used
in C++26 and a `-Wc++26-extensions` warning for when this is used in
C++11 through C++23.
---------
Co-authored-by: cor3ntin <corentinjabot at gmail.com>
Commit: 13013bdc6a5e4def05204fb69d7a31ef17ccd1c7
https://github.com/llvm/llvm-project/commit/13013bdc6a5e4def05204fb69d7a31ef17ccd1c7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-imm.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
Log Message:
-----------
[RISCV] Don't cost Fmv for Zfinx in isFPImmLegal. (#107361)
There is no Fmv with Zfinx.
Commit: 56b2be4a7608770bae5db9d467f50c232c3cf19a
https://github.com/llvm/llvm-project/commit/56b2be4a7608770bae5db9d467f50c232c3cf19a
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
Log Message:
-----------
[X86] Fold scalar_to_vector(funnel(x,y,imm)) -> funnel(scalar_to_vector(x),scalar_to_vector(y),imm)
Limit this to cases where x, y are known to be extracted from a vector.
Addresses poor x86 codegen on #107289
Commit: 2f6e4ed389a6589f340d7efab2b0c7ee22c3d086
https://github.com/llvm/llvm-project/commit/2f6e4ed389a6589f340d7efab2b0c7ee22c3d086
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/Type.cpp
A llvm/test/Assembler/target-type-param-errors.ll
Log Message:
-----------
[IR] Check parameters of target extension types on construction (#107268)
Since IR Types are immutable it makes sense to check them on
construction instead of in the IR Verifier pass.
This patch checks that some TargetExtTypes are well-formed in the sense
that they have the expected number of type parameters and integer
parameters. When called from LLParser it gives a diagnostic message.
When called from anywhere else it just asserts that they are
well-formed.
Commit: fc3e6a81868a0c84e405622a64756e57f020ca37
https://github.com/llvm/llvm-project/commit/fc3e6a81868a0c84e405622a64756e57f020ca37
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/CodeGen/CodeGenCommonISel.h
M llvm/lib/CodeGen/CodeGenCommonISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AArch64/isinf.ll
M llvm/test/CodeGen/PowerPC/fp-classify.ll
Log Message:
-----------
DAG: Handle lowering unordered compare with inf (#100378)
Try to take advantage of the nan check behavior of fcmp.
x86_64 looks better, x86_32 looks worse.
Commit: c2018fa40fd081a10af4f3294362db9634d9a282
https://github.com/llvm/llvm-project/commit/c2018fa40fd081a10af4f3294362db9634d9a282
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/Support/FormatCommon.h
M llvm/include/llvm/Support/FormatVariadic.h
M llvm/lib/Support/FormatVariadic.cpp
M llvm/unittests/Support/FormatVariadicTest.cpp
Log Message:
-----------
[NFC][Support] Refactor FormatVariadic code. (#106610)
- Rename `Align` field in ReplacementItem/FmtAlign to `Width` to
accurately reflect its use.
- Change both `Width` and `Index` in ReplacementItem to 32-bit int
instead of size_t (as 64-bits seems excessive in this context).
- Eliminate the use of `Empty` ReplacementType, and use the
existing std::optional<> instead to indicate that.
- Eliminate some boilerplate type code in formatv().
- Eliminate the loop in `splitLiteralAndReplacement`. The existing
code will never loop back.
- Directly use constructor instead of std::make_pair.
Commit: be1958fd487dd58532a45b40be4a7152b80ec31a
https://github.com/llvm/llvm-project/commit/be1958fd487dd58532a45b40be4a7152b80ec31a
Author: Paul Walker <paul.walker at arm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
A llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
Log Message:
-----------
[LLVM][CodeGen][SVE] Implement nxvbf16 fpextend to nxvf32/nxvf64. (#107253)
NOTE: There are no dedicated SVE instructions but bf16->f32 is just a
left shift because they share the same exponent range and from there
other convert instructions can be used.
Commit: 62e6c1ead7aedfbf973fb667537ff5cee4988da1
https://github.com/llvm/llvm-project/commit/62e6c1ead7aedfbf973fb667537ff5cee4988da1
Author: Nico Weber <thakis at chromium.org>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lld/MachO/Driver.cpp
M lld/MachO/OutputSegment.cpp
M lld/test/MachO/segprot.s
Log Message:
-----------
[lld/mac] Allow -segprot having stricter initprot than maxprot on mac (#107269)
...including for catalyst.
The usecase for this is to put certain security-critical variables into
a special segment/section that's mapped as read-only most of the time,
and that temporary gets remapped as writeable when these variables are
written to be the program. This protects against them being written to
by heap spraying attacks. This special section should be mapped as
read-only at program start, so using
`-segprot MY_PROTECTED_MEMORY_THINGER rw r`
to mark that segment as rw maxprot and r initprot is exactly what we
want.
lld has so far rejected mismatching initprot and maxprot.
ld64 doesn't reject this, but silently writes initprot into both fields
(!) It looks like this might not be fully intentional, see
https://crbug.com/41495919#comment5 and
http://crbug.com/41495919#comment8.
In any case, when postprocessing ld64's output to have different values
for initprot and maxprot, the dynamic loader seems to do the right thing
(see also the previous two links).
The same technique also works on Windows, using both link.exe and
lld-link.exe using `/SECTION:myprotsect,R`.
So, since this is useful, allow it when targeting macOS, and make it do
what you'd expect.
Since loader support for this on iOS is less clear, keep disallowing it
there for now.
See the PR for the program I used to check that this seems to work. (I
only checked on arm64 macOS 14.5 so far; will run this on many more
systems on bots once this is merged and rolled in.)
Commit: ce3648094d44e8c098396a353b215acecb363cda
https://github.com/llvm/llvm-project/commit/ce3648094d44e8c098396a353b215acecb363cda
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
Log Message:
-----------
[RISCV] Update V0Defs after moving Src in peepholes (#107359)
If we move a pseudo in tryReduceVL or foldVMV_V_V via ensureDominates,
its V0 definition may have changed so we need to update V0Defs.
This shouldn't have any functional change today since any pseudo which
uses V0 won't be able to move past a new definition.
However this will matter if we add a peephole to convert unmasked
pseudos to masked pseudos and add a use of V0.
Commit: 8e28f0471b20ed1148951bc7ffe5c503c43692ae
https://github.com/llvm/llvm-project/commit/8e28f0471b20ed1148951bc7ffe5c503c43692ae
Author: Michael Jones <michaelrj at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M libc/config/darwin/arm/entrypoints.txt
Log Message:
-----------
[libc] Correct the entrypoints list for ARM/darwin (#107331)
These entrypoints were added to every target without testing. They don't
work on ARM macs.
Commit: 2ed510dc9789ca0b9172f0593527bee9d53496c4
https://github.com/llvm/llvm-project/commit/2ed510dc9789ca0b9172f0593527bee9d53496c4
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_x86_64.cpp
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_x86_64.h
M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
Log Message:
-----------
[LLDB][Minidump] Extend the minidump x86_64 registers to include fs_base and gs_base (#106767)
A follow up to #106473 Minidump wasn't collecting fs or gs_base. This
patch extends the x86_64 register context and gated reading it behind an
lldb specific flag. Additionally these registers are explicitly checked
in the tests.
Commit: 953af0e7f1bcb42136be1a0ea9cdd5aa1fb74852
https://github.com/llvm/llvm-project/commit/953af0e7f1bcb42136be1a0ea9cdd5aa1fb74852
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M libcxx/include/__mdspan/extents.h
M libcxx/src/filesystem/error.h
M libcxx/src/filesystem/file_descriptor.h
M libcxx/src/filesystem/format_string.h
M libcxx/src/filesystem/operations.cpp
M libcxx/src/filesystem/posix_compat.h
M libcxx/src/filesystem/time_utils.h
M libcxx/src/include/atomic_support.h
M libcxx/src/memory_resource.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/VariantBenchmarks.h
M libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.last_write_time/last_write_time.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_swappable.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/apply.pass.cpp
M libcxx/test/support/archetypes.h
M libcxx/test/support/container_test_types.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/make_test_thread.h
M libcxx/test/support/parse_integer.h
M libcxx/test/support/uses_alloc_types.h
M libcxxabi/src/cxa_guard_impl.h
M libcxxabi/src/cxa_personality.cpp
Log Message:
-----------
[libc++][NFC] Increase consistency for namespace closing comments
Commit: eee2f02e4e28e54e5a38a1dbbd62ea6780909e16
https://github.com/llvm/llvm-project/commit/eee2f02e4e28e54e5a38a1dbbd62ea6780909e16
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M libcxx/include/__type_traits/datasizeof.h
Log Message:
-----------
[libc++][modules] Get rid of <cstddef> dependency in __datasizeof (#107394)
All the compilers we support also provide __builtin_offsetof, so avoid
using this macro and use the builtin directly instead. This allows
removing a dependency on `<cstddef>`, which is heavier than we need.
Commit: 5edede2db09d38cbf9397edb9bfd43b92265f660
https://github.com/llvm/llvm-project/commit/5edede2db09d38cbf9397edb9bfd43b92265f660
Author: Tim Gymnich <tgymnich at icloud.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
A llvm/test/CodeGen/DirectX/sign.ll
Log Message:
-----------
[DXIL] Add sign intrinsic part 2 (#101988)
makes progress on #70078
### Changes
- Added `int_dx_sign` intrinsic in `IntrinsicsDirectX.td`
- Added expansion for `int_dx_sign in `DXILIntrinsicExpansion.cpp`
- Added DXIL backend test case
### Related PRs
- https://github.com/llvm/llvm-project/pull/101987
- https://github.com/llvm/llvm-project/pull/101989
Commit: 0818c2801ecc5cb07b680bb77e24df90f35c74b9
https://github.com/llvm/llvm-project/commit/0818c2801ecc5cb07b680bb77e24df90f35c74b9
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
Log Message:
-----------
[WebAssembly] Simplify a switch-case in CFGStackify (NFC) (#107360)
This merges some `case`s using `[[fallthrough]]`, and make `DELEGATE` as
a separate `case`. (Previously the reason we didn't do that was not to
duplicate the code in `RewriteOperands`. But now that we've extracted it
into a lambda function in #107182 we can do it.
Commit: 18ad98e7947502da0c8f6dcbbf485bb34fe8d204
https://github.com/llvm/llvm-project/commit/18ad98e7947502da0c8f6dcbbf485bb34fe8d204
Author: Alex Langford <alangford at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
Log Message:
-----------
[lldb] Fix a format string in ClangASTSource (#107325)
Without this, LLDB asserts when enabling the expression logs.
Commit: 91a3c6f3d66b866bcda8a0f7d4815bc8f2dbd86c
https://github.com/llvm/llvm-project/commit/91a3c6f3d66b866bcda8a0f7d4815bc8f2dbd86c
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/spillfill-sve.mir
Log Message:
-----------
[AArch64] Remove redundant COPY from loadRegFromStackSlot (#107396)
This removes a redundant 'COPY' instruction that #81716 probably forgot
to remove.
This redundant COPY led to an issue because because code in
LiveRangeSplitting expects that the instruction emitted by
`loadRegFromStackSlot` is an instruction that accesses memory, which
isn't the case for the COPY instruction.
Commit: 54194e1506bdd6dc37988678a8047ad4d48168fa
https://github.com/llvm/llvm-project/commit/54194e1506bdd6dc37988678a8047ad4d48168fa
Author: Michal Terepeta <michalt at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
Log Message:
-----------
[RISCV][SiFive7] Change `Latency` of VCIX to the default (#106497)
Currently we multiply the default (`SiFive7GetCyclesDefault`) by 10, but
this turns out to be both surprising to our users and leads to worse
codegen in most cases. I think it's more natural to just keep the
default.
In the end the right solution is probably to have a separate scheduling
model for a particular VCIX coprocessor.
Commit: cf2ecc7c1c24dee6e3b70a836474a5ac553829b3
https://github.com/llvm/llvm-project/commit/cf2ecc7c1c24dee6e3b70a836474a5ac553829b3
Author: Florian Hahn <flo at fhahn.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
Log Message:
-----------
[LV] Remove over-aggressive assert from 3fe6a064f15c.
There are some cases where only the first operand is marked for
truncation. In that case, the compare won't be truncated which would
incorrectly trigger the assertion.
It also shows that the check pre 3fe6a064f15c also considered compares
truncated that cannot be truncated.
Commit: 311ac6381649fa0f7cc495db8fa697d6a9b43988
https://github.com/llvm/llvm-project/commit/311ac6381649fa0f7cc495db8fa697d6a9b43988
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/tools/c-arcmt-test/c-arcmt-test.c
M clang/tools/c-index-test/c-index-test.c
M llvm/include/llvm/Support/AutoConvert.h
M llvm/lib/Support/AutoConvert.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Program.inc
M llvm/lib/Support/raw_ostream.cpp
M llvm/utils/count/count.c
Log Message:
-----------
[NFC][SystemZ][z/OS] Rename autoconversion-related functions to be less generic (#107399)
This patch renames the functions in AutoConvert.h/cpp to have a less
generic name because they are z/OS specific.
Commit: 5e25291b3c50873dbd0e2b3939b113bcff691460
https://github.com/llvm/llvm-project/commit/5e25291b3c50873dbd0e2b3939b113bcff691460
Author: vporpo <vporpodas at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/SandboxIRBench.cpp
Log Message:
-----------
[SandboxIR][Bench] Initial patch for performance tracking (#107296)
This patch adds a new benchmark suite for SandboxIR. It measures the
performance of some of the most commonly used API functions and compares
it against LLVM IR.
Commit: 3815f478bb4f1c724d36044a4e0bbd3352313322
https://github.com/llvm/llvm-project/commit/3815f478bb4f1c724d36044a4e0bbd3352313322
Author: Matthias Springer <me at m-sp.org>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
M mlir/test/Transforms/test-legalize-type-conversion.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
Log Message:
-----------
[mlir][Transforms] Dialect conversion: Make materializations optional (#107109)
This commit makes source/target/argument materializations (via the
`TypeConverter` API) optional.
By default (`ConversionConfig::buildMaterializations = true`), the
dialect conversion infrastructure tries to legalize all unresolved
materializations right after the main transformation process has
succeeded. If at least one unresolved materialization fails to resolve,
the dialect conversion fails. (With an error message such as `failed to
legalize unresolved materialization ...`.) Automatic materializations
through the `TypeConverter` API can now be deactivated. In that case,
every unresolved materialization will show up as a
`builtin.unrealized_conversion_cast` op in the output IR.
There used to be a complex and error-prone analysis in the dialect
conversion that predicted the future uses of unresolved
materializations. Based on that logic, some casts (that were deemed to
unnecessary) were folded. This analysis was needed because folding
happened at a point of time when some IR changes (e.g., op replacements)
had not materialized yet.
This commit removes that analysis. Any folding of cast ops now happens
after all other IR changes have been materialized and the uses can
directly be queried from the IR. This simplifies the analysis
significantly. And certain helper data structures such as
`inverseMapping` are no longer needed for the analysis. The folding
itself is done by `reconcileUnrealizedCasts` (which also exists as a
standalone pass).
After casts have been folded, the remaining casts are materialized
through the `TypeConverter`, as usual. This last step can be deactivated
in the `ConversionConfig`.
`ConversionConfig::buildMaterializations = false` can be used to debug
error messages such as `failed to legalize unresolved materialization
...`. (It is also useful in case automatic materializations are not
needed.) The materializations that failed to resolve can then be seen as
`builtin.unrealized_conversion_cast` ops in the resulting IR. (This is
better than running with `-debug`, because `-debug` shows IR where some
IR changes have not been materialized yet.)
Note: This is a reupload of #104668, but with correct handling of cyclic
unrealized_conversion_casts that may be generated by the dialect
conversion.
Commit: ebc7f5578033248ce7de52a7f374332a2fc201aa
https://github.com/llvm/llvm-project/commit/ebc7f5578033248ce7de52a7f374332a2fc201aa
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/test/MC/SystemZ/regs-bad.s
M llvm/test/MC/SystemZ/regs-good.s
Log Message:
-----------
[llvm][SystemZ] Fix parsing of `.cfi_undefined` with percent-less registers. (#107032)
This is just e3d658b applied to SystemZ.
An example of this being used in the wild:
https://sourceware.org/git/?p=glibc.git;a=blob;f=sysdeps/s390/s390-64/start.S;h=59eeb7e998227bdf32029cd074f0876c450404ea;hb=HEAD#l63
Commit: bedac64d36dce88ea25bd444c60eaac7d420550e
https://github.com/llvm/llvm-project/commit/bedac64d36dce88ea25bd444c60eaac7d420550e
Author: Alex Rønne Petersen <alex at alexrp.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/MC/MCExpr.h
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/test/MC/SystemZ/fixups.s
Log Message:
-----------
[llvm][SystemZ] Recognize `@GOTENT` modifier in assembler. (#107038)
Closes #105918.
I'm unsure if there are other places that need to be updated for this.
Commit: 797f01198e8b41982916ba02d703bd6a96b5347e
https://github.com/llvm/llvm-project/commit/797f01198e8b41982916ba02d703bd6a96b5347e
Author: Leandro Lupori <leandro.lupori at linaro.org>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/runtime/assign.cpp
M flang/test/Lower/OpenMP/DelayedPrivatization/equivalence.f90
M flang/test/Lower/OpenMP/copyin-order.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/delayed-privatization-allocatable-array.f90
M flang/test/Lower/OpenMP/delayed-privatization-allocatable-firstprivate.f90
M flang/test/Lower/OpenMP/delayed-privatization-array.f90
M flang/test/Lower/OpenMP/delayed-privatization-firstprivate.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/sections.f90
M flang/test/Lower/OpenMP/single.f90
M flang/test/Lower/OpenMP/statement-function.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/OpenMP/task2.f90
Log Message:
-----------
[flang][OpenMP] Make lastprivate work with reallocated variables (#106559)
Fixes https://github.com/llvm/llvm-project/issues/100951
Commit: 4d819daab91f54b90365927ba4b40e5a2eff26a9
https://github.com/llvm/llvm-project/commit/4d819daab91f54b90365927ba4b40e5a2eff26a9
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
Log Message:
-----------
[compiler-rt] Simplify definition of uptr
We can rely on the compiler-provided macro __UINTPTR_TYPE__ for all
non-MSVC compilers. I verified via https://godbolt.org/z/MW9KMjv5f that
this works for MSVC as well as GCC 4.5 Clang 3.0, so that should cover
all supported compilers.
This means we no longer need to explicitly handle new architectures
and as an added bonus also adds support for architectures where
`unsigned long long` cannot be used to hold pointers (e.g. CHERI).
Reviewed By: mstorsjo, vitalybuka
Pull Request: https://github.com/llvm/llvm-project/pull/106155
Commit: b2dbcf4dc1078fd62ef2295ff9696173a9991116
https://github.com/llvm/llvm-project/commit/b2dbcf4dc1078fd62ef2295ff9696173a9991116
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
Log Message:
-----------
[Presburger] Avoid repeated hash lookups (NFC) (#107426)
Commit: 7cf18ff22b626efb0dad6eb9daebea821faff438
https://github.com/llvm/llvm-project/commit/7cf18ff22b626efb0dad6eb9daebea821faff438
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
Log Message:
-----------
[LLVMIR] Avoid repeated hash lookups (NFC) (#107428)
Commit: 92e75c095bb380039f32218534f78c4580bf76e4
https://github.com/llvm/llvm-project/commit/92e75c095bb380039f32218534f78c4580bf76e4
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M flang/include/flang/Common/Fortran-features.h
M flang/lib/Semantics/check-io.cpp
M flang/module/__fortran_builtins.f90
A flang/test/Lower/CUDA/cuda-devptr.cuf
Log Message:
-----------
Reland [flang][cuda] Add c_devptr and bypass output semantic check (#107353)
Add a builtin type for c_devptr since it will need some special handling
for some function like c_f_pointer.
`c_ptr` is defined as a builtin type and was raising a semantic error if
you try to use it in a I/O statement. This patch add a check for c_ptr
and c_devptr to bypass the semantic check and allow the variables of
these types to be used in I/O.
This version of the patch keeps the semantic error when -pedantic is
enabled to align with gfortran.
Commit: d219c63b16851ba264b6495e3f63016d1c8b2aac
https://github.com/llvm/llvm-project/commit/d219c63b16851ba264b6495e3f63016d1c8b2aac
Author: cor3ntin <corentinjabot at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/docs/ReleaseNotes.rst
M clang/lib/AST/Expr.cpp
M clang/test/SemaCXX/source_location.cpp
Log Message:
-----------
[Clang] Fix crash with `source_location` in lambda declarators. (#107411)
Parsing lambdas require pushing a declaration context for the lambda, so
that parameters can be attached to it, before its trailing type is
parsed. DAt that point, partially-parsed lambda don't have a name that
can be computed for then.
This would cause source_location::current() to crash when use in the
decltype of a lambda().
We work around this by producing a source_location for an enclosing
scope in that scenario.
Fixes #67134
Commit: 18926666f509104c3f478444b282291ce19fab6a
https://github.com/llvm/llvm-project/commit/18926666f509104c3f478444b282291ce19fab6a
Author: SJW <48454132+sjw36 at users.noreply.github.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
Log Message:
-----------
[MLIR][SCF] Loop pipelining fails on failed predication (no assert) (#107442)
The SCFLoopPipelining allows predication on peeled or loop ops. When the
predicationFn returns a nullptr this signifies the op type is
unsupported and the pipeliner fails except in `emitPrologue` where it
asserts.
This patch fixes handling in the prologue to gracefully fail.
Commit: 3f1d0e1b1dfef0af0ca5f3315317246d0026fb70
https://github.com/llvm/llvm-project/commit/3f1d0e1b1dfef0af0ca5f3315317246d0026fb70
Author: Peter Klausler <35819229+klausler at users.noreply.github.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M flang/lib/Semantics/expression.cpp
Log Message:
-----------
[flang] Silence warning in module file (#107421)
Most warnings should be silenced when processing the content of a module
file, since the warning should have also appeared when the module file
was generated. The case of an intrinsic type kind not being supported
for a target wasn't being suppressed; fix.
Fixes https://github.com/llvm/llvm-project/issues/107337.
Commit: 5e1e6a689c82aaf2b7af72e074c95889a11d3a78
https://github.com/llvm/llvm-project/commit/5e1e6a689c82aaf2b7af72e074c95889a11d3a78
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M mlir/lib/TableGen/Pattern.cpp
Log Message:
-----------
[TableGen] Avoid repeated hash lookups (NFC) (#107429)
Commit: a0dd90eb7dc318c9b3fccb9ba02e1e22fb073094
https://github.com/llvm/llvm-project/commit/a0dd90eb7dc318c9b3fccb9ba02e1e22fb073094
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/include/lldb/Utility/Status.h
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectMemoryTag.cpp
M lldb/source/Commands/CommandObjectStats.cpp
M lldb/source/Commands/CommandObjectTrace.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Core/ThreadedCommunication.cpp
M lldb/source/Core/ValueObjectVTable.cpp
M lldb/source/Core/ValueObjectVariable.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Host/common/FileCache.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Host/common/TCPSocket.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Interpreter/OptionValueRegex.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.mm
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp
M lldb/source/Target/ModuleCache.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Thread.cpp
M lldb/source/Utility/Scalar.cpp
M lldb/source/Utility/Status.cpp
M lldb/source/Utility/StructuredData.cpp
M lldb/unittests/TestingSupport/Host/NativeProcessTestUtils.h
M lldb/unittests/Utility/StatusTest.cpp
Log Message:
-----------
[lldb] Make conversions from llvm::Error explicit with Status::FromEr… (#107163)
…ror() [NFC]
Commit: 9df592fb806b77d5fb0c7a9d5c9057d1626587e3
https://github.com/llvm/llvm-project/commit/9df592fb806b77d5fb0c7a9d5c9057d1626587e3
Author: David Green <david.green at arm.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64] Fold away zext of extract of uzp. (#107367)
Similar to #107201, this comes up from the lowering of zext of
deinterleaving shuffles. Patterns such as ext(extract_subvector(uzp(a,
b))) can be converted to a simple and to perform the extract/zext from a
uzp1. Uzp2 can be handled with an extra shift, and due to the existing
legalization we could have and / shift between which can be combined in.
Mostly this reduces instruction count or increases the amount of
parallelism in the sequence.
Commit: 362da640dd18e2ef960e0d2198fe8378104c4119
https://github.com/llvm/llvm-project/commit/362da640dd18e2ef960e0d2198fe8378104c4119
Author: vporpo <vporpodas at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/benchmarks/SandboxIRBench.cpp
Log Message:
-----------
[SandboxIR][Bench] Test RAUW (#107440)
Commit: f32e5bdcefcff80f4296f8f4abedc37dcda36d53
https://github.com/llvm/llvm-project/commit/f32e5bdcefcff80f4296f8f4abedc37dcda36d53
Author: Mircea Trofin <mtrofin at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M llvm/include/llvm/Analysis/MLModelRunner.h
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/MLInlineAdvisor.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
Log Message:
-----------
[NFC] Rename the `Nr` abbreviation to `Num` (#107151)
It's more clear. (This isn't exhaustive).
Commit: 9de972e3e1ecea506a3884bd2fc47570ce83e4df
https://github.com/llvm/llvm-project/commit/9de972e3e1ecea506a3884bd2fc47570ce83e4df
Author: Ming-Yi Lai <ming-yi.lai at mediatek.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/CodeGen/CGCall.h
Log Message:
-----------
[clang] Fix FnInfoOpts::operator&= and FnInfoOpts::operator|= not updating assigned operands (#107050)
This affects CodeGenTypes::arrangeCall. No test because the only current in-tree use of that function isn't affected.
Commit: 5515b086f35c2c1402234b9b94338f10fc9d16f7
https://github.com/llvm/llvm-project/commit/5515b086f35c2c1402234b9b94338f10fc9d16f7
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Status.h
M lldb/source/Expression/FunctionCaller.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Utility/Status.cpp
Log Message:
-----------
Factor Process::ExecutionResultAsCString() into a global function (NFC)
Commit: 53d5ffea6be7216589599b6415c021f8bd13cd37
https://github.com/llvm/llvm-project/commit/53d5ffea6be7216589599b6415c021f8bd13cd37
Author: Fabian Parzefall <parzefall at meta.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGenCXX/vtable-available-externally.cpp
Log Message:
-----------
[clang] Check inline defs when emitting speculative vtable (#100785)
Clang should only emit an available_externally vtable when there are no
unused virtual inline functions. Currently, if such such a function is
declared without inline inside the class, but is defined inline outside
the class, Clang might emit the vtable as available_externally. This
happens because Clang only considers the declarations of vtable entries,
but not the definitions. This patch addresses this by inspecting the
definitions in addition to the declarations.
Commit: b798f4bd50bbf0f5eb46804afad10629797c73aa
https://github.com/llvm/llvm-project/commit/b798f4bd50bbf0f5eb46804afad10629797c73aa
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/bindings/python/python-swigsafecast.swig
M lldb/include/lldb/API/SBError.h
M lldb/include/lldb/API/SBValueList.h
M lldb/include/lldb/Core/ValueObjectConstResult.h
M lldb/include/lldb/Utility/Status.h
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/API/SBBreakpointLocation.cpp
M lldb/source/API/SBBreakpointName.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBError.cpp
M lldb/source/API/SBFile.cpp
M lldb/source/API/SBFormat.cpp
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBPlatform.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/API/SBStructuredData.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SBValueList.cpp
M lldb/source/API/SBWatchpoint.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/ValueObject.cpp
M lldb/source/Core/ValueObjectCast.cpp
M lldb/source/Core/ValueObjectConstResult.cpp
M lldb/source/Core/ValueObjectDynamicValue.cpp
M lldb/source/Core/ValueObjectSyntheticFilter.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Host/common/LockFileBase.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/Platform/Android/AdbClient.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.h
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.mm
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Target/ModuleCache.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/Status.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M lldb/unittests/Target/RemoteAwarePlatformTest.cpp
Log Message:
-----------
[lldb] Make deep copies of Status explicit (NFC) (#107170)
Commit: 7b760894f247f4fa1b27c01c767c8599c169f996
https://github.com/llvm/llvm-project/commit/7b760894f247f4fa1b27c01c767c8599c169f996
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
Log Message:
-----------
[lldb] Convert NativeProcessLinux to new Status API (NFC)
Commit: 54b10555c32e9677ce15c408296f92b35cd3d29c
https://github.com/llvm/llvm-project/commit/54b10555c32e9677ce15c408296f92b35cd3d29c
Author: Joel E. Denny <jdenny.ornl at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M openmp/docs/SupportAndFAQ.rst
Log Message:
-----------
[OpenMP] LIBOMPTARGET_DEVICE_ARCHITECTURES requires semicolons (#107454)
If I use commas to delimit architectures in
`LIBOMPTARGET_DEVICE_ARCHITECTURES`, cmake for the runtimes complains:
```
Unknown GPU architecture 'sm_70,sm_80,sm_90'
```
Semicolons are required instead.
Commit: 3b426a8951caa543b65f20ff265353fd79f436e5
https://github.com/llvm/llvm-project/commit/3b426a8951caa543b65f20ff265353fd79f436e5
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
Log Message:
-----------
[lldb] Convert NativeProcessLinux to new Status API (NFC)
Commit: 3726f9c57537aff05bd6ecf309133ce05bebaf43
https://github.com/llvm/llvm-project/commit/3726f9c57537aff05bd6ecf309133ce05bebaf43
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll
M llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll
M llvm/test/Transforms/Attributor/IPConstantProp/return-constants.ll
M llvm/test/Transforms/Attributor/assumes_info.ll
M llvm/test/Transforms/Attributor/cb_liveness_disabled.ll
M llvm/test/Transforms/Attributor/cb_liveness_enabled.ll
M llvm/test/Transforms/Attributor/phi_bug_pointer_info.ll
M llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
Log Message:
-----------
[Attributor][NFC] Pre-commits for #107439 (#107457)
Commit: 4ce8808dd96dd6f1380c4e27c04ff0a0a0fed12b
https://github.com/llvm/llvm-project/commit/4ce8808dd96dd6f1380c4e27c04ff0a0a0fed12b
Author: Jay Foad <jay.foad at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
Log Message:
-----------
[AMDGPU] Common up default value of -amdgpu-nsa-threshold. NFC.
The default value of 3 was specified in two places. Use the actual value
of the cl::init to avoid repeating it.
Commit: e6dece9f6947a50c36f714d3fc0d86c6ad9acc9b
https://github.com/llvm/llvm-project/commit/e6dece9f6947a50c36f714d3fc0d86c6ad9acc9b
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
Log Message:
-----------
[Attributor][FIX] Mark "may" accesses through call sites as such (#107439)
Before, we kept the call site access kind (may/must) when we translated
the access. However, the pointer we access it through (by passing it to
the callee) might not be the underlying object. We have similar logic
when we add store and load accesses.
Commit: 08533a3ee8f3a09a59cf6ac3be59198b26b7f739
https://github.com/llvm/llvm-project/commit/08533a3ee8f3a09a59cf6ac3be59198b26b7f739
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/include/Allocator.h
M offload/DeviceRTL/include/Configuration.h
A offload/DeviceRTL/include/DeviceTypes.h
A offload/DeviceRTL/include/DeviceUtils.h
M offload/DeviceRTL/include/Interface.h
M offload/DeviceRTL/include/LibC.h
M offload/DeviceRTL/include/Mapping.h
M offload/DeviceRTL/include/State.h
M offload/DeviceRTL/include/Synchronization.h
R offload/DeviceRTL/include/Types.h
R offload/DeviceRTL/include/Utils.h
M offload/DeviceRTL/src/Allocator.cpp
M offload/DeviceRTL/src/Configuration.cpp
M offload/DeviceRTL/src/Debug.cpp
A offload/DeviceRTL/src/DeviceUtils.cpp
M offload/DeviceRTL/src/Kernel.cpp
M offload/DeviceRTL/src/Mapping.cpp
M offload/DeviceRTL/src/Misc.cpp
M offload/DeviceRTL/src/Parallelism.cpp
M offload/DeviceRTL/src/Reduction.cpp
M offload/DeviceRTL/src/State.cpp
M offload/DeviceRTL/src/Synchronization.cpp
M offload/DeviceRTL/src/Tasking.cpp
R offload/DeviceRTL/src/Utils.cpp
M offload/DeviceRTL/src/Workshare.cpp
A offload/include/Shared/RefCnt.h
A offload/include/Shared/Types.h
M offload/include/Shared/Utils.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/amdgpu/utils/UtilitiesRTL.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/JIT.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/src/DeviceImage.cpp
M offload/src/omptarget.cpp
Log Message:
-----------
[Offload][NFC] Reorganize `utils::` and make Device/Host/Shared clearer (#100280)
We had three `utils::` namespaces, all with different "meaning" (host,
device, hsa_utils). We should, when we can, keep "include/Shared"
accessible from host and device, thus RefCountTy has been moved to a
separate header. `hsa_utils` was introduced to make `utils::` less
overloaded. And common functionality was de-duplicated, e.g.,
`utils::advance` and `utils::advanceVoidPtr` -> `utils:advancePtr`. Type
punning now checks for the size of the result to make sure it matches
the source type.
No functional change was intended.
Commit: 84bf0da34dd020090e05816fcbda305d1f422c27
https://github.com/llvm/llvm-project/commit/84bf0da34dd020090e05816fcbda305d1f422c27
Author: Johannes Doerfert <johannes at jdoerfert.de>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
M llvm/test/Transforms/Attributor/align.ll
M llvm/test/Transforms/Attributor/memory_locations.ll
M llvm/test/Transforms/Attributor/range.ll
M llvm/test/Transforms/Attributor/read_write_returned_arguments_scc.ll
M llvm/test/Transforms/Attributor/returned.ll
M llvm/test/Transforms/OpenMP/replace_globalization.ll
Log Message:
-----------
[Attributor][FIX] Ensure to always translate call site arguments (#107323)
When we propagate call site arguments we always need to translate them,
this is important as we ended up picking the function argument for a
recurisve call not the call site argument. `@recBad` and `@recGood` in
`returned.ll` show the problem as they used to transform them the same
way. The restructuring cleans the code up and helps derive more
"returned" arguments and better information in the presence of recursive
calls. The "dropped" attributes are simply dropped because we do not
query them anymore, not because we cannot derive them.
Commit: 52dca6ffae08fcd86cff32ab469870016a6aceb5
https://github.com/llvm/llvm-project/commit/52dca6ffae08fcd86cff32ab469870016a6aceb5
Author: vporpo <vporpodas at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
A llvm/test/Transforms/SandboxVectorizer/boilerplate.ll
Log Message:
-----------
[SandboxVec] Boilerplate (#107431)
This patch implements the new pass and registers it with the pass
manager. For context, this is a vectorizer that operates on Sandbox IR,
which is a transactional IR on top of LLVM IR.
Commit: 4634a480e0e5aa3116b397369fe3877a8dfe4dc0
https://github.com/llvm/llvm-project/commit/4634a480e0e5aa3116b397369fe3877a8dfe4dc0
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/common.cpp
M compiler-rt/lib/scudo/standalone/common.h
M compiler-rt/lib/scudo/standalone/linux.cpp
M compiler-rt/lib/scudo/standalone/platform.h
M compiler-rt/lib/scudo/standalone/release.h
Log Message:
-----------
[scudo] Add a method to use a hard-coded page size (#106646)
Currently, only Android supports using a hard-code page size. Make this
a bit more generic so any platform that wants to can use this.
In addition, add a getPageSizeLogCached() function since this value is
used in release.h and can avoid keeping this value around in objects.
Finally, change some of the release.h page size multiplies to shifts
using the new page size log value.
Commit: 247d3ea843cb20d8d75ec781cd603c8ececf8934
https://github.com/llvm/llvm-project/commit/247d3ea843cb20d8d75ec781cd603c8ececf8934
Author: Philip Reames <preames at rivosinc.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
Log Message:
-----------
[SLP] Expand non-power-of-two bailout in TryToFindDuplicates
This fixes a crash noticed when doing a downstream merge. The
test case has been reduced, and is included in this commit.
The existing bailout for non-power-of-two vectors in TryToFindDuplicates
did not consider the case where the list being vectorized had no
root node. This allowed reshuffled scalars to slip through to code
which does not yet expect to handle it.
This was an existing bug (likely introduced by my ed03070e), but
made easier to hit by 63e8a1b1
Commit: 24684bb4a9791145a36a97477eb1fd525a122d8e
https://github.com/llvm/llvm-project/commit/24684bb4a9791145a36a97477eb1fd525a122d8e
Author: Evgenii Stepanov <eugeni.stepanov at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/test/Driver/fsanitize.c
M clang/test/Driver/fuchsia.c
Log Message:
-----------
[sanitizer] Delay sanitizer args parsing (#107280)
Delay sanitizer arg parsing until after -Xclang flags are forwarded to
the clang command line. This allows the check in hasTargetFeatureMTE to
pick up manually specified target feature, and enables the following:
-march=armv8-a -Xclang -target-feature -Xclang +mte
-fsanitize=memtag-stack
Commit: 3836d4acccbe87216133d08d75df509e95c291f0
https://github.com/llvm/llvm-project/commit/3836d4acccbe87216133d08d75df509e95c291f0
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
Log Message:
-----------
[lldb] Convert ConnectionGenericFileWindows.cpp to new Status API (NFC)
Commit: f00c946c2da0caf6da4a49e87ac905a8b1d2e8b6
https://github.com/llvm/llvm-project/commit/f00c946c2da0caf6da4a49e87ac905a8b1d2e8b6
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Host/windows/MainLoopWindows.cpp
Log Message:
-----------
[lldb] Convert MainLoopWindows.cpp to new Status API (NFC)
Commit: 64498c54831bed9cf069e0923b9b73678c6451d8
https://github.com/llvm/llvm-project/commit/64498c54831bed9cf069e0923b9b73678c6451d8
Author: Mingming Liu <mingmingl at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lld/ELF/InputFiles.cpp
M lld/include/lld/Common/CommonLinkerContext.h
Log Message:
-----------
[LTO][ELF][lld] Use unique string saver in ELF bitcode symbol parsing (#106670)
lld ELF
[BitcodeFile](https://github.com/llvm/llvm-project/blob/a527248a3c2d638b0c92a06992f3f1c1f80842ad/lld/ELF/InputFiles.h#L328)
uses [string
saver](https://github.com/llvm/llvm-project/blob/a527248a3c2d638b0c92a06992f3f1c1f80842ad/lld/include/lld/Common/CommonLinkerContext.h#L57)
to keep copies of bitcode symbols. Symbol duplication is very common
when compiling application binaries.
This change proposes to introduce a UniqueStringSaver in lld context and
use it for bitcode symbol parsing. The implementation covers ELF only.
Similar opportunities should exist on other (COFF, MachO, wasm) formats.
For an internal production binary where lto indexing takes ~10GiB
originally, this changes optimizes away ~800MiB (~7.8%), measured by
https://github.com/google/pprof. Flame graph breaks down memory by usage
call stacks and agrees with this measurement.
Commit: 50be455ab88b17872cd620698156b4058dc92f58
https://github.com/llvm/llvm-project/commit/50be455ab88b17872cd620698156b4058dc92f58
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/test/TableGen/intrinsic-struct.td
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
Log Message:
-----------
[TableGen] Add check for number of intrinsic return values (#107326)
Fail if we see an intrinsic that returns more than the supported number
of return values.
Intrinsics can return only upto a certain nyumber of values, as defined
by the `IIT_RetNumbers` list in `Intrinsics.td`. Currently, if we define
an intrinsic that exceeds the limit, llvm-tblgen crashes. Instead, read
this limit and fail if it's exceeded with a proper error message.
Commit: 3380dae2f0d6b8035744da573c4508b98c80045c
https://github.com/llvm/llvm-project/commit/3380dae2f0d6b8035744da573c4508b98c80045c
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lld/MachO/BPSectionOrderer.cpp
Log Message:
-----------
[lld][InstrProf] Refactor BPSectionOrderer.cpp (#107347)
Refactor some code in `BPSectionOrderer.cpp` in preparation for
https://github.com/llvm/llvm-project/pull/107348.
* Rename `constructNodesForCompression()` -> `getUnsForCompression()`
and return a `SmallVector` directly rather than populating a vector
alias
* Pass `duplicateSectionIdxs` as a pointer to make it possible to skip
finding (nearly) duplicate sections
* Combine `duplicate{Function,Data}SectionIdxs` into one variable
* Compute all `BPFunctionNode` vectors at the end (like
`nodesForStartup`)
There should be no functional change.
Commit: 7ea9f0d85fc3dc80b45e6ba7087c41c6f2481f07
https://github.com/llvm/llvm-project/commit/7ea9f0d85fc3dc80b45e6ba7087c41c6f2481f07
Author: Vasileios Porpodas <vporpodas at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
Log Message:
-----------
[SandboxVec][NFC] Remove unused header files
Commit: 73514f6831cfcea49f33fb9e31db0141b05532f2
https://github.com/llvm/llvm-project/commit/73514f6831cfcea49f33fb9e31db0141b05532f2
Author: wldfngrs <wldfngrs at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/sighandler_t.h
M libc/src/signal/linux/signal.cpp
M libc/src/signal/signal.h
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/signal_test.cpp
Log Message:
-----------
[libc] Add proxy header for __sighandler_t type (#107354)
Added proxy headers for __sighandler_t type, modified the corresponding
CMakeLists.txt files and test files
Commit: e44a67543c0b6a3a2307362f5bbcf54cd6de6a8e
https://github.com/llvm/llvm-project/commit/e44a67543c0b6a3a2307362f5bbcf54cd6de6a8e
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll
Log Message:
-----------
AMDGPU: Add a few unsupported checks for llvm.fptrunc.round intrinsic (#107330)
A check here can be removed when we implement support for the
corresponding types/mode.
Commit: 1e98aa4730b1b3b93205af74be26e04d5f876d10
https://github.com/llvm/llvm-project/commit/1e98aa4730b1b3b93205af74be26e04d5f876d10
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
Log Message:
-----------
[lldb] Convert ConnectionGenericFileWindows.cpp to new Status API (NFC)
Commit: bd840a40042c2c67f56079493d0bcdbfc70325ba
https://github.com/llvm/llvm-project/commit/bd840a40042c2c67f56079493d0bcdbfc70325ba
Author: Stanislav Mekhanoshin <rampitec at users.noreply.github.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
Log Message:
-----------
[AMDGPU] Add target intrinsic for s_prefetch_data (#107133)
Commit: c1c42518c1356e78a10bf252a4a5a643b2bb9efd
https://github.com/llvm/llvm-project/commit/c1c42518c1356e78a10bf252a4a5a643b2bb9efd
Author: vporpo <vporpodas at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
A llvm/test/Transforms/SandboxVectorizer/X86/no_implicit_float.ll
Log Message:
-----------
[SandboxVec] Early return checks (#107465)
This patch implements a couple of early return checks.
Commit: 169d453429ca9015046b42719ff5d13cda5d2c6f
https://github.com/llvm/llvm-project/commit/169d453429ca9015046b42719ff5d13cda5d2c6f
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/include/llvm/ADT/SmallVector.h
M llvm/lib/Support/SmallVector.cpp
Log Message:
-----------
[ADT] Declare replaceAllocation in SmallVector.cpp (NFC) (#107469)
This patch changes replaceAllocation to a static function while moving
the declaration to SmallVector.cpp. Note that:
- replaceAllocation is used only within SmallVector.cpp.
- replaceAllocation doesn't access any class members.
Commit: 6d3725924fe6adf0d490697327938de9c3516cbe
https://github.com/llvm/llvm-project/commit/6d3725924fe6adf0d490697327938de9c3516cbe
Author: Congcong Cai <congcongcai0907 at 163.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unconventional-assign-operator.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-nested-conditional-operator.rst
Log Message:
-----------
[clang-tidy][NFC] remove autosar link in documents (#107412)
As discussion in
https://discourse.llvm.org/t/clang-tidy-rfc-add-autosar-c-14-clang-tidy-module/59223/12.
We should not link clang-tidy check with AUTOSAR rules.
Commit: c8834527b729c8c89f453d215e667047fd948aa1
https://github.com/llvm/llvm-project/commit/c8834527b729c8c89f453d215e667047fd948aa1
Author: Tai Ly <tai.ly at arm.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
Log Message:
-----------
[TOSA] Move CreateOpAndInfer into ConversionUtils.h (#106122)
This moves CreateOpAndInfer from TF legalize_util.h into
ConversionUtils.h
also removed duplicate createOpAndInfer function from
TosaDecomposeTransposeConv.cpp
Renamed to CreateOpAndInferShape so we can upstream this independently
of tensorflow (otherwise a redefinition error would break TF compile if
not upstreamed together with removal of CreateOpAndInfer in TF)
---------
Signed-off-by: Tai Ly <tai.ly at arm.com>
Commit: 67fb8d15c993f5695cf944b16022a9ee49b9252d
https://github.com/llvm/llvm-project/commit/67fb8d15c993f5695cf944b16022a9ee49b9252d
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
Log Message:
-----------
[lldb] Convert ProcessDebugger.cpp to new Status API (NFC)
Commit: e0a93d3505bf6b4c87e819db7a871e0ce4d4100c
https://github.com/llvm/llvm-project/commit/e0a93d3505bf6b4c87e819db7a871e0ce4d4100c
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
Log Message:
-----------
[lldb] Convert ProcessWindows.cpp to new Status API (NFC)
Commit: 1be9a80768a03ea9bd2bfbb03762b2bc3c350007
https://github.com/llvm/llvm-project/commit/1be9a80768a03ea9bd2bfbb03762b2bc3c350007
Author: Kai Sasaki <lewuathe at gmail.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/test/Dialect/Affine/scalrep.mlir
Log Message:
-----------
[mlir][affine] Fix the crash due to the simultaneous replacement store (#90829)
`AffineScalarReplacement` should forward the memref store op to load op
only if the store op reaches the load. But it now checks the
reachability only if these ops are in the same block, which causes the
crash reported in https://github.com/llvm/llvm-project/issues/76309.
We need to check the reachability even if they are both in the same
block, which rescues the case where consecutive store operations are
written before the load op.
Commit: d1756165a9066f907b88d51dd8e3ffee15a8cc1e
https://github.com/llvm/llvm-project/commit/d1756165a9066f907b88d51dd8e3ffee15a8cc1e
Author: alx32 <103613512+alx32 at users.noreply.github.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/ICF.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/InputSection.h
M lld/MachO/MapFile.cpp
M lld/MachO/Symbols.cpp
M lld/MachO/Symbols.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/Target.h
A lld/test/MachO/icf-safe-thunks.ll
Log Message:
-----------
[lld-macho][arm64] Enhance safe ICF with thunk-based deduplication (#106573)
Currently, our `safe` ICF mode only merges non-address-significant code,
leaving duplicate address-significant functions in the output. This
patch introduces `safe_thunks` ICF mode, which keeps a single master
copy of each function and replaces address-significant duplicates with
thunks that branch to the master copy.
Currently `--icf=safe_thunks` is only supported for `arm64`
architectures.
**Perf stats for a large binary:**
| ICF Option | Total Size | __text Size | __unwind_info | % total |
|-------------------|------------|-------------|---------------------|---------------------------|
| `--icf=none` | 91.738 MB | 55.220 MB | 1.424 MB | 0% |
| `--icf=safe` | 85.042 MB | 49.572 MB | 1.168 MB | 7.30% |
| `--icf=safe_thunks` | 84.650 MB | 49.219 MB | 1.143 MB | 7.72% |
| `--icf=all` | 82.060 MB | 48.726 MB | 1.111 MB | 10.55% |
So overall we can expect a `~0.45%` binary size reduction for a typical
large binary compared to the `--icf=safe` option.
**Runtime:**
Linking the above binary took ~10 seconds. Comparing the link
performance of --icf=safe_thunks vs --icf=safe, a ~2% slowdown was
observed.
Commit: b525ead65c224cd2e73298c7a735f8136a926c35
https://github.com/llvm/llvm-project/commit/b525ead65c224cd2e73298c7a735f8136a926c35
Author: Sterling-Augustine <56981066+Sterling-Augustine at users.noreply.github.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[SandboxIR] Add bazel support (#107486)
Commit: d7dd2c468fecae871ba67e891a3519c758c94b63
https://github.com/llvm/llvm-project/commit/d7dd2c468fecae871ba67e891a3519c758c94b63
Author: ziqingluo-90 <ziqing_luo at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions-inline-namespace.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-test-unreachable.cpp
Log Message:
-----------
Re-land "[-Wunsafe-buffer-usage] Warning Libc functions (#101583)"
Revert commit 23457964392d00fc872fa6021763859024fb38da, and re-land
with a new flag "-Wunsafe-buffer-usage-in-libc-call" for the new
warning.
(rdar://117182250)
Commit: a84baef74892dc294eb65bb2a1ea2339be13e8b2
https://github.com/llvm/llvm-project/commit/a84baef74892dc294eb65bb2a1ea2339be13e8b2
Author: Nico Weber <thakis at chromium.org>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
Log Message:
-----------
[gn build] Port 52dca6ffae08
Commit: 2949720c2e55d2695682d6412d5afe45b167cb1e
https://github.com/llvm/llvm-project/commit/2949720c2e55d2695682d6412d5afe45b167cb1e
Author: Luke Lau <luke at igalia.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
Log Message:
-----------
[RISCV] Move vmerge same mask peephole to RISCVVectorPeephole (#106108)
We currently fold a vmerge.vvm into its true operand if the true operand
is a masked pseudo with the same mask.
We can move this over to RISCVVectorPeephole by instead splitting it up
into a smaller peephole which converts it to a vmv.v.v first. The
existing foldVMV_V_V peephole will then take care of folding it if
needed.
This is very similar to the existing all-ones mask peephole and we could
potentially do it inside of it. I opted to put it in a separate peephole
to make it easier to reason about, given that the duplication is small,
but I could be persuaded either way.
Commit: 11084c5c49f8bb7825f81adc5b7140b3506fe253
https://github.com/llvm/llvm-project/commit/11084c5c49f8bb7825f81adc5b7140b3506fe253
Author: Adrian Prantl <aprantl at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
Log Message:
-----------
[lldb] Convert DebuggerThread.cpp to new Status API (NFC)
Commit: 16df489fdae23e77eb5180e4d4dc99b07421bf77
https://github.com/llvm/llvm-project/commit/16df489fdae23e77eb5180e4d4dc99b07421bf77
Author: Rahul Joshi <rjoshi at nvidia.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/include/llvm/TableGen/Record.h
M llvm/lib/TableGen/Record.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.cpp
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.h
M llvm/utils/TableGen/ExegesisEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/TableGen/TableGen.cpp
M mlir/include/mlir/TableGen/GenInfo.h
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/tools/mlir-tblgen/OmpOpGen.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
M mlir/tools/mlir-tblgen/RewriterGen.cpp
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
Log Message:
-----------
[TableGen] Add const variants of accessors for backend (#106658)
Split RecordKeeper `getAllDerivedDefinitions` family of functions into
two variants:
(a) non-const ones that return vectors of `Record *` and
(b) const ones, that return vector/ArrayRef of `const Record *`.
This will help gradual migration of TableGen backends to use
`const RecordKeeper` and by implication change code to work
with const pointers and better const correctness.
Existing backends are not yet compatible with the const family of
functions, so change them to use a non-constant `RecordKeeper`
reference, till they are migrated.
Commit: 616a8ce6203d8c7569266bfaf163e74df1f440ad
https://github.com/llvm/llvm-project/commit/616a8ce6203d8c7569266bfaf163e74df1f440ad
Author: Owen Pan <owenpiano at gmail.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/unittests/Format/TokenAnnotatorTest.cpp
Log Message:
-----------
[clang-format] Correctly annotate braces in macro definition (#107352)
Also add a test case for #107096.
Fixes #106418.
Commit: c02fd17c1e20615c9e6174a3f8ad4ef0ec5ebbec
https://github.com/llvm/llvm-project/commit/c02fd17c1e20615c9e6174a3f8ad4ef0ec5ebbec
Author: donald chen <chenxunyu1993 at gmail.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
Log Message:
-----------
[mlir] [scf] fix crash when conversion from scf to control flow (#107221)
This patch fixed a crash when scf.parallel's region donesn't terminate
with reduce op. This can happend in dialect conversion.
Commit: 33ceb2dd7596a05277fd246865862df6b03cf976
https://github.com/llvm/llvm-project/commit/33ceb2dd7596a05277fd246865862df6b03cf976
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.cpp
Log Message:
-----------
[clang-tidy] Avoid repeated hash lookups (NFC) (#107490)
Commit: 144314eaa5ca7f44817cf0ac162dbd17a5d88391
https://github.com/llvm/llvm-project/commit/144314eaa5ca7f44817cf0ac162dbd17a5d88391
Author: Kazu Hirata <kazu at google.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLPVectorizer] Avoid repeated hash lookups (NFC) (#107491)
Commit: 5acd9d11373ca67f0d4baf17a78ebb56193a7df0
https://github.com/llvm/llvm-project/commit/5acd9d11373ca67f0d4baf17a78ebb56193a7df0
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
Log Message:
-----------
[clang][scan] Report module dependencies in topological order (#107474)
Commit: ede40da1f8c1e91601b985cd32ad785aa8806880
https://github.com/llvm/llvm-project/commit/ede40da1f8c1e91601b985cd32ad785aa8806880
Author: Longsheng Mou <longshengmou at gmail.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][tensor] Add check for indices of `tensor.gather` (#106894)
This patch add a check for indices of `tensor.gather` and
`tensor.scatter`. For that the length of gather_dims/scatter_dims should
match the size of last dimension of the indices. Fix #94901.
Commit: 8e35c86977ce5529a9387657321ac9fefcdae5b5
https://github.com/llvm/llvm-project/commit/8e35c86977ce5529a9387657321ac9fefcdae5b5
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/TypePrinter.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/ParserHLSL/hlsl_is_rov_attr.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_resource.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
Log Message:
-----------
[HLSL] Apply resource attributes to the resource type rather than the handle member (#107160)
Converts existing resource attributes `[[hlsl::resource_class(..)]]` and
`[[is_rov]]` from declaration attributes to type attributes.
During type attribute processing all HLSL resource type attributes are
validated and collected by `SemaHLSL`
(`SemaHLSL::handleResourceTypeAttr`). At the end of the declaration they
are be combined into a single `HLSLAttributedResourceType` instance
(`SemaHLSL::ProcessResourceTypeAttributes`) that wraps the original type
and stores all of the necessary information about the resource.
`SemaHLSL` will also need to short-term-store the `TypeLoc` information
for the newly created type that will be grabbed by `TypeSpecLocFiller`
soon after it is created.
Updates all places that expected resource attributes on declarations
like resource binding diagnostic, builtin types in
HLSLExternalSemaSource, or codegen.
Also includes implementation of
`TreeTransform<Derived>::TransformHLSLAttributedResourceType` that
enables the use of attributed resource types inside templates.
Fixes #104861
Part 2/2
Commit: 77f1b481b884621c12cde5f2ce6f080f11dbbbcc
https://github.com/llvm/llvm-project/commit/77f1b481b884621c12cde5f2ce6f080f11dbbbcc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M llvm/lib/CodeGen/CodeGenCommonISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/X86/is_fpclass.ll
Log Message:
-----------
DAG: Lower single infinity is.fpclass tests to fcmp (#100380)
InstCombine also should have taken care of this, but this
should be helpful when the fcmp based lowering strategy tries
to combine multiple tests.
Commit: 093b8bfe6b64c916647ae64af8066df22bb6ea65
https://github.com/llvm/llvm-project/commit/093b8bfe6b64c916647ae64af8066df22bb6ea65
Author: Craig Topper <craig.topper at sifive.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
A llvm/lib/Target/RISCV/RISCVCallingConv.cpp
A llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
Log Message:
-----------
[RISCV] Separate the calling convention handlers into their own file. NFC (#107484)
These are used by both SelectionDAG and GlobalISel and are separate from
RISCVTargetLowering.
Having a separate file is how other targets are structured. Though other
targets generate most of their calling convention code through tablegen.
I moved the `CC_RISV` functions from the `llvm::RISCV` namespace to
`llvm::`. That's what the tablegen code on other targets does and the
functions already have RISCV in their name. `RISCVCCAssignFn` is moved
from `RISCVTargetLowering` to the `llvm` namespace.
Commit: dcfa147c9d9569ea44cb0f0b6981f69a62b87f71
https://github.com/llvm/llvm-project/commit/dcfa147c9d9569ea44cb0f0b6981f69a62b87f71
Author: LLVM GN Syncbot <llvmgnsyncbot at gmail.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
Log Message:
-----------
[gn build] Port 093b8bfe6b64
Commit: 24267a7e14b35f41ab55e15ba12bb80c82881941
https://github.com/llvm/llvm-project/commit/24267a7e14b35f41ab55e15ba12bb80c82881941
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2024-09-05 (Thu, 05 Sep 2024)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
Log Message:
-----------
AMDGPU: Add f64 to f32 support for llvm.fptrunc.round (#107481)
Commit: ddf40e0132cdfb9443e8dce9ca18d4f5595fb73c
https://github.com/llvm/llvm-project/commit/ddf40e0132cdfb9443e8dce9ca18d4f5595fb73c
Author: Pavel Labath <pavel at labath.sk>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/test/Shell/SymbolFile/DWARF/x86/type-definition-search.cpp
Log Message:
-----------
[lldb] Correctly reconstruct simplified names for type units (#107240)
We need to resolve the type signature to get a hold of the template
argument dies.
The associated test case passes even without this patch, but it only
does it by accident (because the subsequent code considers the types to
be in an anonymous namespace and this not subject to uniqueing). This
will change once my other patch starts resolving names correctly.
Commit: 9c72a308d839a27ffcbb0c67104baceb1871c50e
https://github.com/llvm/llvm-project/commit/9c72a308d839a27ffcbb0c67104baceb1871c50e
Author: Balázs Kéri <balazs.keri at ericsson.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/unittests/AST/ASTImporterTest.cpp
Log Message:
-----------
[clang][ASTImporter] New fix for default template parameter values. (#101836)
Commit e4440b8 added a change that introduced new crash in an
incorrectly handled case. This is fixed here. Default argument
definition or inheritance is preserved in the "To" AST compared to
the "From". If the default argument is defined already in the "To"
AST it can be duplicated at the import.
Commit: 6fb39e496411a64af8fa5484385ef3ff42d2a5f4
https://github.com/llvm/llvm-project/commit/6fb39e496411a64af8fa5484385ef3ff42d2a5f4
Author: Patryk Wychowaniec <pwychowaniec at pm.me>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M llvm/test/MC/AVR/hex-immediates.s
M llvm/test/MC/AVR/inst-adc.s
M llvm/test/MC/AVR/inst-add.s
M llvm/test/MC/AVR/inst-adiw.s
M llvm/test/MC/AVR/inst-and.s
M llvm/test/MC/AVR/inst-andi.s
M llvm/test/MC/AVR/inst-asr.s
M llvm/test/MC/AVR/inst-bld.s
M llvm/test/MC/AVR/inst-brbc.s
M llvm/test/MC/AVR/inst-brbs.s
M llvm/test/MC/AVR/inst-brcc.s
M llvm/test/MC/AVR/inst-brcs.s
M llvm/test/MC/AVR/inst-break.s
M llvm/test/MC/AVR/inst-breq.s
M llvm/test/MC/AVR/inst-brge.s
M llvm/test/MC/AVR/inst-brhc.s
M llvm/test/MC/AVR/inst-brhs.s
M llvm/test/MC/AVR/inst-brid.s
M llvm/test/MC/AVR/inst-brie.s
M llvm/test/MC/AVR/inst-brlo.s
M llvm/test/MC/AVR/inst-brlt.s
M llvm/test/MC/AVR/inst-brmi.s
M llvm/test/MC/AVR/inst-brne.s
M llvm/test/MC/AVR/inst-brpl.s
M llvm/test/MC/AVR/inst-brsh.s
M llvm/test/MC/AVR/inst-brtc.s
M llvm/test/MC/AVR/inst-brts.s
M llvm/test/MC/AVR/inst-brvc.s
M llvm/test/MC/AVR/inst-brvs.s
M llvm/test/MC/AVR/inst-bst.s
M llvm/test/MC/AVR/inst-call.s
M llvm/test/MC/AVR/inst-cbi.s
M llvm/test/MC/AVR/inst-cbr.s
M llvm/test/MC/AVR/inst-clr.s
M llvm/test/MC/AVR/inst-com.s
M llvm/test/MC/AVR/inst-cp.s
M llvm/test/MC/AVR/inst-cpc.s
M llvm/test/MC/AVR/inst-cpi.s
M llvm/test/MC/AVR/inst-cpse.s
M llvm/test/MC/AVR/inst-dec.s
M llvm/test/MC/AVR/inst-des.s
M llvm/test/MC/AVR/inst-eicall.s
M llvm/test/MC/AVR/inst-eijmp.s
M llvm/test/MC/AVR/inst-elpm.s
M llvm/test/MC/AVR/inst-eor.s
M llvm/test/MC/AVR/inst-family-set-clr-flag.s
M llvm/test/MC/AVR/inst-fmul.s
M llvm/test/MC/AVR/inst-fmuls.s
M llvm/test/MC/AVR/inst-fmulsu.s
M llvm/test/MC/AVR/inst-icall.s
M llvm/test/MC/AVR/inst-ijmp.s
M llvm/test/MC/AVR/inst-in.s
M llvm/test/MC/AVR/inst-inc.s
M llvm/test/MC/AVR/inst-jmp.s
M llvm/test/MC/AVR/inst-lac.s
M llvm/test/MC/AVR/inst-las.s
M llvm/test/MC/AVR/inst-lat.s
M llvm/test/MC/AVR/inst-ld.s
M llvm/test/MC/AVR/inst-ldd.s
M llvm/test/MC/AVR/inst-ldi.s
M llvm/test/MC/AVR/inst-lds.s
M llvm/test/MC/AVR/inst-lpm.s
M llvm/test/MC/AVR/inst-lsl.s
M llvm/test/MC/AVR/inst-lsr.s
M llvm/test/MC/AVR/inst-mov.s
M llvm/test/MC/AVR/inst-movw.s
M llvm/test/MC/AVR/inst-mul.s
M llvm/test/MC/AVR/inst-muls.s
M llvm/test/MC/AVR/inst-mulsu.s
M llvm/test/MC/AVR/inst-neg.s
M llvm/test/MC/AVR/inst-nop.s
M llvm/test/MC/AVR/inst-or.s
M llvm/test/MC/AVR/inst-ori.s
M llvm/test/MC/AVR/inst-out.s
M llvm/test/MC/AVR/inst-pop.s
M llvm/test/MC/AVR/inst-push.s
M llvm/test/MC/AVR/inst-rcall.s
M llvm/test/MC/AVR/inst-ret.s
M llvm/test/MC/AVR/inst-reti.s
M llvm/test/MC/AVR/inst-rjmp.s
M llvm/test/MC/AVR/inst-rol.s
M llvm/test/MC/AVR/inst-ror.s
M llvm/test/MC/AVR/inst-sbc.s
M llvm/test/MC/AVR/inst-sbci.s
M llvm/test/MC/AVR/inst-sbi.s
M llvm/test/MC/AVR/inst-sbic.s
M llvm/test/MC/AVR/inst-sbis.s
M llvm/test/MC/AVR/inst-sbiw.s
M llvm/test/MC/AVR/inst-sbr.s
M llvm/test/MC/AVR/inst-sbrc.s
M llvm/test/MC/AVR/inst-sbrs.s
M llvm/test/MC/AVR/inst-ser.s
M llvm/test/MC/AVR/inst-sleep.s
M llvm/test/MC/AVR/inst-spm.s
M llvm/test/MC/AVR/inst-st.s
M llvm/test/MC/AVR/inst-std.s
M llvm/test/MC/AVR/inst-sts.s
M llvm/test/MC/AVR/inst-sub.s
M llvm/test/MC/AVR/inst-subi.s
M llvm/test/MC/AVR/inst-swap.s
M llvm/test/MC/AVR/inst-tst.s
M llvm/test/MC/AVR/inst-wdr.s
M llvm/test/MC/AVR/inst-xch.s
M llvm/test/MC/AVR/modifiers.s
M llvm/test/MC/AVR/registers.s
M llvm/test/MC/AVR/relocations-abs.s
M llvm/test/MC/AVR/relocations.s
M llvm/test/MC/AVR/separator.s
M llvm/test/MC/AVR/syntax-reg-int-literal.s
M llvm/test/MC/AVR/syntax-reg-pair.s
Log Message:
-----------
[AVR][NFC] Reformat MC tests (#107068)
Commit: 30a9cace807d4b5c98f2d0e2bd5bdea49061c8b8
https://github.com/llvm/llvm-project/commit/30a9cace807d4b5c98f2d0e2bd5bdea49061c8b8
Author: Jie Fu <jiefu at tencent.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
Log Message:
-----------
[clang][ASTImporter] Fix -Wpessimizing-move in ASTImporter.cpp (NFC)
/llvm-project/clang/lib/AST/ASTImporter.cpp:371:20: error: moving a local object in a return statement prevents copy elision [-Werror,-Wpessimizing-move]
return std::move(Err);
^
/llvm-project/clang/lib/AST/ASTImporter.cpp:371:20: note: remove std::move call here
return std::move(Err);
^~~~~~~~~~ ~
/llvm-project/clang/lib/AST/ASTImporter.cpp:380:22: error: moving a local object in a return statement prevents copy elision [-Werror,-Wpessimizing-move]
return std::move(Err);
^
/llvm-project/clang/lib/AST/ASTImporter.cpp:380:22: note: remove std::move call here
return std::move(Err);
^~~~~~~~~~ ~
2 errors generated.
Commit: 62fec3d23d2325869e6eba0263b0b9f834c2067f
https://github.com/llvm/llvm-project/commit/62fec3d23d2325869e6eba0263b0b9f834c2067f
Author: Chuanqi Xu <yedeng.yd at linux.alibaba.com>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
Log Message:
-----------
[NFCI] [ClangScanDeps] [P1689] Use PreprocessorOnly Action for P1689
It is fine enough to use PreprocessorOnly action for P1689 format. We
don't need to read any PCH or module files.
Commit: 4b2c950de5611a94defb00cbd66226eb02350938
https://github.com/llvm/llvm-project/commit/4b2c950de5611a94defb00cbd66226eb02350938
Author: wanglei <wanglei at loongson.cn>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
A llvm/test/CodeGen/LoongArch/ctpop-with-lsx.ll
Log Message:
-----------
[test][LoongArch] Pre-commit test for optimize CTPOP. NFC
Reviewed By: SixWeining
Pull Request: https://github.com/llvm/llvm-project/pull/106940
Commit: bd234760f001e7aae1d41bf6ba5561d924f84c6e
https://github.com/llvm/llvm-project/commit/bd234760f001e7aae1d41bf6ba5561d924f84c6e
Author: wanglei <wanglei at loongson.cn>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M bolt/lib/Profile/YAMLProfileReader.cpp
A bolt/test/X86/yaml-unknown-keys.test
M bolt/tools/merge-fdata/merge-fdata.cpp
M clang-tools-extra/clang-tidy/bugprone/CastingThroughVoidCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.cpp
M clang-tools-extra/clangd/TidyFastChecks.inc
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/casting-through-void.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unconventional-assign-operator.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-nested-conditional-operator.rst
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/casting-through-void.cpp
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Release.cmake
M clang/docs/LanguageExtensions.rst
M clang/docs/Multilib.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/CXXRecordDeclDefinitionBits.def
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/SourceManager.h
M clang/include/clang/Basic/TargetCXXABI.def
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Driver/Multilib.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/CGBuilder.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/avx10_2_512bf16intrin.h
A clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/constexpr-frame-describe.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/ms.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/Analysis/mmap-writeexec.c
M clang/test/Analysis/stack-addr-ps.cpp
M clang/test/CXX/drs/cwg14xx.cpp
A clang/test/CXX/drs/cwg1818.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg24xx.cpp
M clang/test/CXX/drs/cwg27xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
A clang/test/CXX/drs/cwg563.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/CodeGen/2005-01-02-ConstantInits.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
A clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
A clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/x86-atomic-double.c
M clang/test/CodeGen/X86/x86-atomic-long_double.c
A clang/test/CodeGen/aarch64-neon-luti.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_faminmax.c
A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_faminmax.c
A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_luti.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
M clang/test/CodeGen/catch-pointer-overflow-volatile.c
M clang/test/CodeGen/catch-pointer-overflow.c
M clang/test/CodeGen/ext-int.c
M clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c
M clang/test/CodeGen/integer-overflow.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGen/pgo-force-function-attrs.ll
M clang/test/CodeGen/ubsan-pointer-overflow.m
M clang/test/CodeGen/vla.c
M clang/test/CodeGenCXX/attr-likelihood-iteration-stmt.cpp
M clang/test/CodeGenCXX/debug-info-lambda-this.cpp
M clang/test/CodeGenCXX/for-range.cpp
M clang/test/CodeGenCXX/microsoft-abi-template-static-init.cpp
M clang/test/CodeGenCXX/pr45964-decomp-transform.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenCXX/vtable-available-externally.cpp
M clang/test/CodeGenHLSL/buffer-array-operator.hlsl
A clang/test/CodeGenHLSL/builtins/wave_is_first_lane.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenSYCL/address-space-deduction.cpp
A clang/test/Driver/baremetal-multilib-custom-error.yaml
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/debug-options-as.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/fuchsia.c
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-sdk-root.c
A clang/test/ExtractAPI/attributed-typedef.m
M clang/test/FixIt/fixit-availability-maccatalyst.m
M clang/test/FixIt/fixit-availability.mm
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Lexer/cxx-features.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Modules/no-local-decl-in-reduced-bmi.cppm
M clang/test/Modules/reduced-bmi-empty-module-purview-std.cppm
M clang/test/Modules/reduced-bmi-empty-module-purview.cppm
M clang/test/Modules/unreached-static-entities.cppm
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/declare_mapper_codegen.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/for_linear_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/for_reduction_task_codegen.cpp
M clang/test/OpenMP/for_scan_codegen.cpp
M clang/test/OpenMP/for_simd_scan_codegen.cpp
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/irbuilder_for_unsigned.c
M clang/test/OpenMP/irbuilder_for_unsigned_auto.c
M clang/test/OpenMP/irbuilder_for_unsigned_down.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic_chunked.c
M clang/test/OpenMP/irbuilder_for_unsigned_runtime.c
M clang/test/OpenMP/irbuilder_for_unsigned_static_chunked.c
M clang/test/OpenMP/map_struct_ordering.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/ordered_codegen.cpp
M clang/test/OpenMP/parallel_for_codegen.cpp
M clang/test/OpenMP/parallel_for_linear_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_for_scan_codegen.cpp
M clang/test/OpenMP/parallel_for_simd_scan_codegen.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_data_use_device_addr_codegen.cpp
M clang/test/OpenMP/target_data_use_device_ptr_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_is_device_ptr_codegen.cpp
M clang/test/OpenMP/target_map_both_pointer_pointee_codegen.cpp
M clang/test/OpenMP/target_map_codegen_01.cpp
M clang/test/OpenMP/target_map_codegen_21.cpp
M clang/test/OpenMP/target_map_codegen_27.cpp
M clang/test/OpenMP/target_map_codegen_28.cpp
M clang/test/OpenMP/target_map_codegen_29.cpp
M clang/test/OpenMP/target_map_deref_array_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_array_section_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_map_nest_defalut_mapper_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_task_affinity_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_update_codegen.cpp
M clang/test/OpenMP/task_codegen.c
M clang/test/OpenMP/task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/ParserHLSL/hlsl_is_rov_attr.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/Preprocessor/bpf-predefined-macros.c
M clang/test/Preprocessor/init-ppc.c
M clang/test/Preprocessor/init-ppc64.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_imm_lane.cpp
A clang/test/Sema/attr-btf_type_tag.cpp
M clang/test/Sema/builtin-unary-fp.c
M clang/test/Sema/pre-c2x-compat.c
M clang/test/Sema/static-assert.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
A clang/test/SemaCXX/builtin-is-within-lifetime.cpp
M clang/test/SemaCXX/builtins.cpp
A clang/test/SemaCXX/consteval-builtin.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
M clang/test/SemaCXX/cxx2a-template-lambdas.cpp
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
M clang/test/SemaCXX/cxx2c-placeholder-vars.cpp
M clang/test/SemaCXX/extern-c.cpp
M clang/test/SemaCXX/source_location.cpp
A clang/test/SemaCXX/static-assert-ext.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions-inline-namespace.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-test-unreachable.cpp
A clang/test/SemaHLSL/Types/Traits/IsIntangibleType.hlsl
A clang/test/SemaHLSL/Types/Traits/IsIntangibleTypeErrors.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_resource.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
M clang/test/SemaObjC/non-trivial-c-union.m
M clang/tools/c-arcmt-test/c-arcmt-test.c
M clang/tools/c-index-test/c-index-test.c
M clang/tools/clang-format/git-clang-format.bat
M clang/tools/driver/CMakeLists.txt
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/Driver/MultilibBuilderTest.cpp
M clang/unittests/Driver/MultilibTest.cpp
M clang/unittests/Driver/SimpleDiagnosticConsumer.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M cmake/Modules/HandleCompilerRT.cmake
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
M compiler-rt/lib/nsan/nsan.cpp
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformFuchsia.c
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_context.cpp
M compiler-rt/lib/rtsan/rtsan_context.h
M compiler-rt/lib/rtsan/rtsan_stack.cpp
M compiler-rt/lib/rtsan/rtsan_stack.h
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
M compiler-rt/lib/rtsan/tests/rtsan_test_context.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_mac.cpp
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/common.cpp
M compiler-rt/lib/scudo/standalone/common.h
M compiler-rt/lib/scudo/standalone/linux.cpp
M compiler-rt/lib/scudo/standalone/platform.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/release.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/test/profile/ContinuousSyncMode/runtime-counter-relocation.c
M compiler-rt/test/profile/ContinuousSyncMode/set-file-object.c
M compiler-rt/test/rtsan/basic.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/fork_threaded.c
M compiler-rt/www/index.html
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Runtime/cpp-type.h
M flang/include/flang/Runtime/descriptor.h
M flang/include/flang/Runtime/numeric.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/Mangler.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
M flang/module/__fortran_builtins.f90
M flang/module/ieee_arithmetic.f90
M flang/runtime/assign.cpp
M flang/runtime/numeric-templates.h
M flang/runtime/numeric.cpp
M flang/runtime/random.cpp
M flang/test/CMakeLists.txt
A flang/test/Driver/fno-openmp.f90
M flang/test/Driver/fopenmp.f90
M flang/test/Evaluate/fold-out_of_range.f90
M flang/test/Evaluate/folding07.f90
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Integration/debug-assumed-shape-array.f90
A flang/test/Integration/debug-target-region-vars.f90
A flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
M flang/test/Lower/Intrinsics/ieee_class_queries.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/equivalence.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/copyin-order.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/delayed-privatization-allocatable-array.f90
M flang/test/Lower/OpenMP/delayed-privatization-allocatable-firstprivate.f90
M flang/test/Lower/OpenMP/delayed-privatization-array.f90
M flang/test/Lower/OpenMP/delayed-privatization-firstprivate.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/sections.f90
M flang/test/Lower/OpenMP/single.f90
M flang/test/Lower/OpenMP/statement-function.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/OpenMP/task2.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M flang/test/Lower/common-block.f90
A flang/test/Lower/module-generic-with-specific-mangling.f90
A flang/test/Parser/non-breaking-space.f90
M flang/test/Preprocessing/pp134.F90
A flang/test/Semantics/OpenMP/clause-order.f90
A flang/test/Semantics/generic09.f90
M flang/test/Semantics/kinds03.f90
M flang/test/Semantics/modfile26.f90
M flang/test/Semantics/realkinds-aarch64-01.f90
A flang/test/Semantics/smp-proc-ref.f90
M flang/test/Transforms/debug-assumed-shape-array.fir
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
M flang/tools/bbc/bbc.cpp
M flang/tools/f18/CMakeLists.txt
M flang/unittests/Runtime/Numeric.cpp
M flang/unittests/Runtime/Reduction.cpp
M flang/unittests/Runtime/Transformational.cpp
M libc/config/darwin/arm/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/sighandler_t.h
M libc/src/signal/linux/signal.cpp
M libc/src/signal/signal.h
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/signal_test.cpp
M libclc/CMakeLists.txt
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/ranges_minmax.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__config
A libcxx/include/__cstddef/byte.h
A libcxx/include/__cstddef/max_align_t.h
A libcxx/include/__cstddef/nullptr_t.h
A libcxx/include/__cstddef/ptrdiff_t.h
A libcxx/include/__cstddef/size_t.h
M libcxx/include/__exception/nested_exception.h
M libcxx/include/__filesystem/directory_entry.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__fwd/array.h
M libcxx/include/__fwd/complex.h
M libcxx/include/__fwd/pair.h
M libcxx/include/__fwd/span.h
M libcxx/include/__fwd/subrange.h
M libcxx/include/__fwd/tuple.h
M libcxx/include/__iterator/concepts.h
M libcxx/include/__iterator/iterator_traits.h
M libcxx/include/__iterator/wrap_iter.h
M libcxx/include/__math/hypot.h
M libcxx/include/__math/traits.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
A libcxx/include/__memory/noexcept_move_assign_container.h
M libcxx/include/__memory/pointer_traits.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__memory/uses_allocator.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/__random/seed_seq.h
M libcxx/include/__random/subtract_with_carry_engine.h
M libcxx/include/__ranges/subrange.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__tuple/tuple_size.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/is_allocator.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_swappable.h
R libcxx/include/__type_traits/noexcept_move_assign_container.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/result_of.h
M libcxx/include/__type_traits/type_list.h
M libcxx/include/__utility/in_place.h
M libcxx/include/__utility/pair.h
M libcxx/include/__utility/swap.h
M libcxx/include/any
M libcxx/include/cstddef
M libcxx/include/cstdio
M libcxx/include/cstdlib
M libcxx/include/cstring
M libcxx/include/ctime
M libcxx/include/cuchar
M libcxx/include/cwchar
M libcxx/include/experimental/__simd/reference.h
M libcxx/include/experimental/__simd/scalar.h
M libcxx/include/experimental/__simd/simd.h
M libcxx/include/experimental/__simd/simd_mask.h
M libcxx/include/experimental/__simd/vec_ext.h
M libcxx/include/forward_list
M libcxx/include/list
M libcxx/include/module.modulemap
M libcxx/include/span
M libcxx/include/string
M libcxx/include/typeinfo
M libcxx/include/unordered_map
M libcxx/include/unordered_set
M libcxx/include/vector
M libcxx/modules/std/type_traits.inc
M libcxx/src/filesystem/error.h
M libcxx/src/filesystem/file_descriptor.h
M libcxx/src/filesystem/format_string.h
M libcxx/src/filesystem/operations.cpp
M libcxx/src/filesystem/posix_compat.h
M libcxx/src/filesystem/time_utils.h
M libcxx/src/include/atomic_support.h
M libcxx/src/memory_resource.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/VariantBenchmarks.h
M libcxx/test/benchmarks/format.bench.cpp
M libcxx/test/benchmarks/format_to.bench.cpp
M libcxx/test/benchmarks/format_to_n.bench.cpp
M libcxx/test/benchmarks/formatted_size.bench.cpp
M libcxx/test/benchmarks/formatter_int.bench.cpp
M libcxx/test/benchmarks/lexicographical_compare_three_way.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/benchmarks/to_chars.bench.cpp
M libcxx/test/benchmarks/variant_visit_1.bench.cpp
M libcxx/test/benchmarks/variant_visit_2.bench.cpp
M libcxx/test/benchmarks/variant_visit_3.bench.cpp
M libcxx/test/libcxx/clang_modules_include.gen.py
M libcxx/test/libcxx/clang_tidy.gen.py
A libcxx/test/libcxx/containers/associative/unord.map/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/associative/unord.set/abi.compile.pass.cpp
M libcxx/test/libcxx/double_include.gen.py
M libcxx/test/libcxx/header_inclusions.gen.py
M libcxx/test/libcxx/libcpp_version.gen.py
M libcxx/test/libcxx/no_assert_include.gen.py
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/libcxx/transitive_includes.gen.py
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/libcxx/type_traits/datasizeof.compile.pass.cpp
M libcxx/test/std/containers/views/mdspan/CustomTestLayouts.h
M libcxx/test/std/containers/views/mdspan/extents/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/conversion.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/ctad.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/dextents.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/dims.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/index_type.verify.cpp
M libcxx/test/std/containers/views/mdspan/extents/obs_static.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/types.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.layout_right.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.layout_stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.layout_left.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.layout_stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.extents_array.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.extents_span.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.strided_mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/deduction.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/is_exhaustive_corner_case.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/assign.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/conversion.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.copy.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_array.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_integers.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_map.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_map_acc.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_span.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.move.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/move.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/swap.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/types.pass.cpp
M libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.last_write_time/last_write_time.pass.cpp
M libcxx/test/std/language.support/cmp/cmp.alg/strong_order.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_ceil.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_floor.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_width.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/has_single_bit.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/popcount.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotl.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotr.pass.cpp
A libcxx/test/std/numerics/c.math/signbit.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/test_offset_time_zone.h
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_local_time_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_zoned_time_duration2_time_zone_ptr2.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_zoned_time_duration2_time_zone_ptr2_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_local_time_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_time_zone.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/operator_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/operator_sys_time.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.from.chars/integral.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.from.chars/integral.roundtrip.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/from_chars_result.operator_bool.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/from_chars_result.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/to_chars_result.operator_bool.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/to_chars_result.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.to.chars/integral.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_swappable.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/apply.pass.cpp
M libcxx/test/support/archetypes.h
M libcxx/test/support/container_test_types.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/make_test_thread.h
M libcxx/test/support/parse_integer.h
M libcxx/test/support/uses_alloc_types.h
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/utils/adb_run.py
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/apple-install-libcxx.sh
M libcxx/utils/ci/build-picolibc.sh
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/ci/vendor/android/Dockerfile.emulator
M libcxx/utils/ci/vendor/android/build-emulator-images.sh
M libcxx/utils/ci/vendor/android/container-setup.sh
M libcxx/utils/ci/vendor/android/emulator-entrypoint.sh
M libcxx/utils/ci/vendor/android/emulator-functions.sh
M libcxx/utils/ci/vendor/android/emulator-wait-for-ready.sh
M libcxx/utils/ci/vendor/android/setup-env-for-emulator.sh
M libcxx/utils/ci/vendor/android/start-emulator.sh
M libcxx/utils/ci/vendor/android/stop-emulator.sh
M libcxx/utils/libcxx/test/android.py
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/libcxx/test/modules.py
M libcxxabi/src/cxa_guard_impl.h
M libcxxabi/src/cxa_personality.cpp
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/ELF/InputFiles.cpp
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/ICF.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/InputSection.h
M lld/MachO/MapFile.cpp
M lld/MachO/OutputSegment.cpp
M lld/MachO/Symbols.cpp
M lld/MachO/Symbols.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/Target.h
M lld/include/lld/Common/CommonLinkerContext.h
A lld/test/COFF/arm64ec-import.test
A lld/test/COFF/arm64ec-lib.test
A lld/test/MachO/icf-safe-thunks.ll
M lld/test/MachO/segprot.s
A lld/test/wasm/Inputs/allow-multiple-definition.s
A lld/test/wasm/allow-multiple-definition.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SymbolTable.cpp
M lldb/bindings/python/python-swigsafecast.swig
M lldb/docs/conf.py
M lldb/include/lldb/API/SBError.h
M lldb/include/lldb/API/SBValueList.h
M lldb/include/lldb/Core/ValueObjectConstResult.h
M lldb/include/lldb/Host/Socket.h
M lldb/include/lldb/Host/common/TCPSocket.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Status.h
M lldb/include/lldb/Utility/SupportFile.h
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/API/SBBreakpointLocation.cpp
M lldb/source/API/SBBreakpointName.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBError.cpp
M lldb/source/API/SBFile.cpp
M lldb/source/API/SBFormat.cpp
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBPlatform.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/API/SBStructuredData.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SBValueList.cpp
M lldb/source/API/SBWatchpoint.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectMemoryTag.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectStats.cpp
M lldb/source/Commands/CommandObjectTrace.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/Core/ThreadedCommunication.cpp
M lldb/source/Core/ValueObject.cpp
M lldb/source/Core/ValueObjectCast.cpp
M lldb/source/Core/ValueObjectConstResult.cpp
M lldb/source/Core/ValueObjectDynamicValue.cpp
M lldb/source/Core/ValueObjectSyntheticFilter.cpp
M lldb/source/Core/ValueObjectVTable.cpp
M lldb/source/Core/ValueObjectVariable.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/FunctionCaller.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Host/common/FileCache.cpp
M lldb/source/Host/common/LockFileBase.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/common/TCPSocket.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Interpreter/OptionValueRegex.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericOptional.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABI/ItaniumABILanguageRuntime.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Plugins/Platform/Android/AdbClient.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.h
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.mm
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h
M lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_riscv64.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_riscv64.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_x86_64.cpp
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_x86_64.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Symbol/LineTable.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Target/ModuleCache.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/Utility/Scalar.cpp
M lldb/source/Utility/Status.cpp
M lldb/source/Utility/StructuredData.cpp
M lldb/test/API/api/multiple-debuggers/TestMultipleDebuggers.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/TestDataFormatterGenericOptional.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/main.cpp
M lldb/test/API/functionalities/memory/big-read/TestMemoryReadMaximumSize.py
A lldb/test/API/functionalities/memory/holes/Makefile
A lldb/test/API/functionalities/memory/holes/TestMemoryHoles.py
A lldb/test/API/functionalities/memory/holes/main.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
R lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_fpr.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_fpr.out
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_only.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_only.out
R lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.out
A lldb/test/API/functionalities/postmortem/elf-core/main_fpr.c
M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
M lldb/test/API/lang/cpp/dynamic-value/Makefile
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
A lldb/test/API/lang/cpp/dynamic-value/a.h
A lldb/test/API/lang/cpp/dynamic-value/anonymous-b.cpp
M lldb/test/API/lang/cpp/dynamic-value/pass-to-base.cpp
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
M lldb/test/API/tools/lldb-server/TestGdbRemoteLaunch.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
M lldb/test/API/tools/lldb-server/TestNonStop.py
M lldb/test/Shell/SymbolFile/DWARF/x86/type-definition-search.cpp
M lldb/tools/lldb-dap/package.json
M lldb/unittests/Host/MainLoopTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M lldb/unittests/Symbol/TestType.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M lldb/unittests/Target/RemoteAwarePlatformTest.cpp
M lldb/unittests/TestingSupport/Host/NativeProcessTestUtils.h
M lldb/unittests/Utility/StatusTest.cpp
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/GetIntrinsicInfoTableEntriesBM.cpp
A llvm/benchmarks/SandboxIRBench.cpp
M llvm/cmake/config-ix.cmake
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AssignmentTracking.md
M llvm/docs/conf.py
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/PagedVector.h
M llvm/include/llvm/ADT/SmallVector.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/DominanceFrontierImpl.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/IndirectCallPromotionAnalysis.h
M llvm/include/llvm/Analysis/MLModelRunner.h
M llvm/include/llvm/Analysis/MemorySSA.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/CodeGenCommonISel.h
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
A llvm/include/llvm/CodeGen/MachineCSE.h
M llvm/include/llvm/CodeGen/MachineDominanceFrontier.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Config/config.h.cmake
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/Mangler.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/include/llvm/IR/OperandTraits.h
M llvm/include/llvm/IR/Operator.h
M llvm/include/llvm/IR/User.h
M llvm/include/llvm/IR/VectorBuilder.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/Support/AutoConvert.h
M llvm/include/llvm/Support/FormatCommon.h
M llvm/include/llvm/Support/FormatVariadic.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/include/llvm/Transforms/InstCombine/InstCombine.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/include/llvm/Transforms/Utils/SCCPSolver.h
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/XRay/Graph.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/MLInlineAdvisor.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/CodeGen/AsmPrinter/DwarfFile.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfFile.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenCommonISel.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Mangler.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/TypeFinder.cpp
M llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/SandboxIR/Type.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/AutoConvert.cpp
M llvm/lib/Support/FormatVariadic.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/SmallVector.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Program.inc
M llvm/lib/Support/Unix/Threading.inc
M llvm/lib/Support/raw_ostream.cpp
M llvm/lib/TableGen/DetailedRecordsBackend.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
A llvm/lib/Target/AMDGPU/SIShrinkInstructions.h
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/M68k/M68kCallingConv.td
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCCallingConv.td
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
A llvm/lib/Target/RISCV/RISCVCallingConv.cpp
A llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/SCCP.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/SCCP.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/BasicAA/gep-nuw-alias.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
A llvm/test/Analysis/CostModel/AArch64/vec3-fp-conversions.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
A llvm/test/Analysis/CtxProfAnalysis/inline.ll
A llvm/test/Analysis/CtxProfAnalysis/json_equals.py
M llvm/test/Analysis/CtxProfAnalysis/load.ll
A llvm/test/Analysis/Lint/noalias-null.ll
A llvm/test/Analysis/Lint/scalable.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
A llvm/test/Analysis/ScalarEvolution/predicated-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/predicated-symbolic-max-backedge-taken-count.ll
A llvm/test/Analysis/ScalarEvolution/udiv-of-x-xsmaxone-fold.ll
A llvm/test/Assembler/target-type-param-errors.ll
A llvm/test/Bitcode/intrinsics-struct-upgrade-attributes.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector-widen-crash.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/machine-cse-mid-pipeline.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-build-vector-to-dup.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-splat.mir
M llvm/test/CodeGen/AArch64/PHIElimination-crash.mir
M llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
M llvm/test/CodeGen/AArch64/aarch64-bif-gen.ll
M llvm/test/CodeGen/AArch64/aarch64-bit-gen.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AArch64/abs.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-dup.ll
M llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll
M llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-tbl.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
A llvm/test/CodeGen/AArch64/fabs-fp128.ll
M llvm/test/CodeGen/AArch64/fabs.ll
M llvm/test/CodeGen/AArch64/faddsub.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/fcopysign.ll
M llvm/test/CodeGen/AArch64/fcvt.ll
M llvm/test/CodeGen/AArch64/fdiv.ll
M llvm/test/CodeGen/AArch64/fexplog.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fminimummaximum.ll
M llvm/test/CodeGen/AArch64/fminmax.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/fmul.ll
M llvm/test/CodeGen/AArch64/fneg.ll
M llvm/test/CodeGen/AArch64/fpow.ll
M llvm/test/CodeGen/AArch64/fpowi.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/frem.ll
M llvm/test/CodeGen/AArch64/fsincos.ll
M llvm/test/CodeGen/AArch64/fsqrt.ll
M llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/AArch64/insertextract.ll
M llvm/test/CodeGen/AArch64/isinf.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/llvm.exp10.ll
M llvm/test/CodeGen/AArch64/load.ll
A llvm/test/CodeGen/AArch64/machine-outliner-bundle.mir
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/neon-extadd.ll
M llvm/test/CodeGen/AArch64/neon-extmul.ll
A llvm/test/CodeGen/AArch64/neon-luti.ll
M llvm/test/CodeGen/AArch64/neon-perm.ll
A llvm/test/CodeGen/AArch64/partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/ptradd.ll
M llvm/test/CodeGen/AArch64/rem.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
A llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/spillfill-sve.mir
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/statepoint-twoaddr.mir
M llvm/test/CodeGen/AArch64/sub.ll
A llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sve-pfalse-machine-cse.mir
A llvm/test/CodeGen/AArch64/sve2-intrinsics-faminmax.ll
A llvm/test/CodeGen/AArch64/sve2-intrinsics-luti.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AArch64/xtn.ll
A llvm/test/CodeGen/AArch64/zext-shuffle.ll
M llvm/test/CodeGen/AArch64/zext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-cse-nonlocal-convergent-instrs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/copyprop_regsequence_with_undef.mir
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
M llvm/test/CodeGen/AMDGPU/fold-multiple.mir
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
A llvm/test/CodeGen/AMDGPU/hazard-recognizer-src-shared-base.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/machine-cse-ssa.mir
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shrink-i32-kimm.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-flags.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
M llvm/test/CodeGen/AMDGPU/shrink-insts-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
M llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
M llvm/test/CodeGen/AMDGPU/split-mbb-lis-subrange.mir
M llvm/test/CodeGen/AMDGPU/stale-livevar-in-twoaddr-pass.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-wmma.mir
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
A llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/wqm.mir
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/ARM/arm-vld1.ll
M llvm/test/CodeGen/ARM/arm-vst1.ll
A llvm/test/CodeGen/ARM/atomic-64bit-fast-regalloc.ll
M llvm/test/CodeGen/ARM/atomic-load-store.ll
M llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
M llvm/test/CodeGen/ARM/bf16-intrinsics-ld-st.ll
M llvm/test/CodeGen/ARM/cmpxchg-O0.ll
M llvm/test/CodeGen/ARM/cmpxchg.mir
M llvm/test/CodeGen/BPF/32-bit-subreg-cond-select.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-rshift-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
M llvm/test/CodeGen/BPF/CORE/no-narrow-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp1.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp2.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp3.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp4.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp5.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp6.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative1.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative2.ll
M llvm/test/CodeGen/BPF/alu8.ll
M llvm/test/CodeGen/BPF/atomics.ll
M llvm/test/CodeGen/BPF/basictest.ll
M llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
M llvm/test/CodeGen/BPF/cc_args.ll
M llvm/test/CodeGen/BPF/cc_args_be.ll
M llvm/test/CodeGen/BPF/cc_ret.ll
M llvm/test/CodeGen/BPF/cmp.ll
M llvm/test/CodeGen/BPF/cttz-ctlz.ll
M llvm/test/CodeGen/BPF/ex1.ll
M llvm/test/CodeGen/BPF/fi_ri.ll
M llvm/test/CodeGen/BPF/i128.ll
M llvm/test/CodeGen/BPF/intrinsics.ll
M llvm/test/CodeGen/BPF/load.ll
M llvm/test/CodeGen/BPF/loops.ll
M llvm/test/CodeGen/BPF/many_args1.ll
M llvm/test/CodeGen/BPF/objdump_atomics.ll
M llvm/test/CodeGen/BPF/objdump_cond_op.ll
M llvm/test/CodeGen/BPF/objdump_cond_op_2.ll
M llvm/test/CodeGen/BPF/objdump_imm_hex.ll
M llvm/test/CodeGen/BPF/objdump_intrinsics.ll
M llvm/test/CodeGen/BPF/objdump_nop.ll
M llvm/test/CodeGen/BPF/objdump_static_var.ll
M llvm/test/CodeGen/BPF/objdump_trivial.ll
M llvm/test/CodeGen/BPF/pr57872.ll
M llvm/test/CodeGen/BPF/reloc-2.ll
M llvm/test/CodeGen/BPF/remove_truncate_1.ll
M llvm/test/CodeGen/BPF/remove_truncate_2.ll
M llvm/test/CodeGen/BPF/remove_truncate_3.ll
M llvm/test/CodeGen/BPF/remove_truncate_6.ll
M llvm/test/CodeGen/BPF/remove_truncate_8.ll
M llvm/test/CodeGen/BPF/rodata_1.ll
M llvm/test/CodeGen/BPF/rodata_2.ll
M llvm/test/CodeGen/BPF/rodata_3.ll
M llvm/test/CodeGen/BPF/rodata_4.ll
M llvm/test/CodeGen/BPF/rodata_6.ll
M llvm/test/CodeGen/BPF/rodata_7.ll
M llvm/test/CodeGen/BPF/sanity.ll
M llvm/test/CodeGen/BPF/setcc.ll
M llvm/test/CodeGen/BPF/shifts.ll
M llvm/test/CodeGen/BPF/sockex2.ll
M llvm/test/CodeGen/BPF/undef.ll
M llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/BPF/xadd_legal.ll
A llvm/test/CodeGen/DirectX/ContainerData/RuntimeInfoCS.ll
A llvm/test/CodeGen/DirectX/sign.ll
A llvm/test/CodeGen/DirectX/sin_vector_error.ll
A llvm/test/CodeGen/DirectX/wave_is_first_lane.ll
M llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
M llvm/test/CodeGen/M68k/Arith/add.ll
R llvm/test/CodeGen/M68k/Arith/sext-i1.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
A llvm/test/CodeGen/M68k/Data/link-unlnk.ll
A llvm/test/CodeGen/M68k/Data/load-extend.ll
A llvm/test/CodeGen/M68k/Data/load-imm.ll
A llvm/test/CodeGen/M68k/Data/sext-i1.ll
R llvm/test/CodeGen/M68k/link-unlnk.ll
R llvm/test/CodeGen/M68k/load-extend.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/MLRegAlloc/dev-mode-extra-features-logging.ll
M llvm/test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir
M llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/fp-classify.ll
M llvm/test/CodeGen/PowerPC/livevars-crash1.mir
M llvm/test/CodeGen/PowerPC/livevars-crash2.mir
M llvm/test/CodeGen/PowerPC/load-and-splat.ll
M llvm/test/CodeGen/PowerPC/machine-cse-rm-pre.mir
M llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
M llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
A llvm/test/CodeGen/PowerPC/sms-recmii.ll
M llvm/test/CodeGen/PowerPC/test-vector-insert.ll
M llvm/test/CodeGen/PowerPC/v16i8_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v2i64_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v8i16_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-select-icmp.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-imm.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/half-select-fcmp.ll
M llvm/test/CodeGen/RISCV/half-select-icmp.ll
M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert.ll
M llvm/test/CodeGen/RISCV/rvv/copyprop.mir
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptoi-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
R llvm/test/CodeGen/RISCV/zfbfmin.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchEmpty.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchUnreachable.ll
M llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll
A llvm/test/CodeGen/SPIRV/debug-info/no-misplaced-opextinst.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveIsFirstLane.ll
M llvm/test/CodeGen/SPIRV/transcoding/GlobalFunAnnotate.ll
M llvm/test/CodeGen/Thumb/machine-cse-deadreg.mir
M llvm/test/CodeGen/Thumb/machine-cse-physreg.mir
M llvm/test/CodeGen/Thumb2/cmpxchg.mir
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
A llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
R llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
A llvm/test/CodeGen/WebAssembly/exception-legacy.mir
R llvm/test/CodeGen/WebAssembly/exception.mir
M llvm/test/CodeGen/WebAssembly/function-info.mir
A llvm/test/CodeGen/WinEH/wineh-empty-seh-scope.ll
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/abdu-neg.ll
M llvm/test/CodeGen/X86/abdu.ll
A llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
A llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
A llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
A llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/CodeGen/X86/buildvec-insertvec.ll
M llvm/test/CodeGen/X86/clobber_frame_ptr.ll
M llvm/test/CodeGen/X86/cse-two-preds.mir
M llvm/test/CodeGen/X86/distancemap.mir
M llvm/test/CodeGen/X86/is_fpclass.ll
M llvm/test/CodeGen/X86/known-signbits-vector.ll
M llvm/test/CodeGen/X86/load-scalar-as-vector.ll
M llvm/test/CodeGen/X86/movmsk-cmp.ll
M llvm/test/CodeGen/X86/phielim-undef.mir
M llvm/test/CodeGen/X86/pr44915.ll
M llvm/test/CodeGen/X86/pull-conditional-binop-through-shift.ll
M llvm/test/CodeGen/X86/scmp.ll
M llvm/test/CodeGen/X86/twoaddr-mul2.mir
M llvm/test/CodeGen/X86/ucmp.ll
M llvm/test/CodeGen/X86/vec_insert-5.ll
M llvm/test/CodeGen/X86/vec_shift5.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
A llvm/test/DebugInfo/Generic/debug-ranges-duplication.ll
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
A llvm/test/DebugInfo/type-finder-w-dbg-records.ll
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll
M llvm/test/Instrumentation/PGOForceFunctionAttrs/basic.ll
A llvm/test/MC/AArch64/SVE/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE/directive-cpu-negative.s
M llvm/test/MC/AArch64/directive-arch-negative.s
M llvm/test/MC/AArch64/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/directive-cpu-err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s
M llvm/test/MC/AVR/hex-immediates.s
M llvm/test/MC/AVR/inst-adc.s
M llvm/test/MC/AVR/inst-add.s
M llvm/test/MC/AVR/inst-adiw.s
M llvm/test/MC/AVR/inst-and.s
M llvm/test/MC/AVR/inst-andi.s
M llvm/test/MC/AVR/inst-asr.s
M llvm/test/MC/AVR/inst-bld.s
M llvm/test/MC/AVR/inst-brbc.s
M llvm/test/MC/AVR/inst-brbs.s
M llvm/test/MC/AVR/inst-brcc.s
M llvm/test/MC/AVR/inst-brcs.s
M llvm/test/MC/AVR/inst-break.s
M llvm/test/MC/AVR/inst-breq.s
M llvm/test/MC/AVR/inst-brge.s
M llvm/test/MC/AVR/inst-brhc.s
M llvm/test/MC/AVR/inst-brhs.s
M llvm/test/MC/AVR/inst-brid.s
M llvm/test/MC/AVR/inst-brie.s
M llvm/test/MC/AVR/inst-brlo.s
M llvm/test/MC/AVR/inst-brlt.s
M llvm/test/MC/AVR/inst-brmi.s
M llvm/test/MC/AVR/inst-brne.s
M llvm/test/MC/AVR/inst-brpl.s
M llvm/test/MC/AVR/inst-brsh.s
M llvm/test/MC/AVR/inst-brtc.s
M llvm/test/MC/AVR/inst-brts.s
M llvm/test/MC/AVR/inst-brvc.s
M llvm/test/MC/AVR/inst-brvs.s
M llvm/test/MC/AVR/inst-bst.s
M llvm/test/MC/AVR/inst-call.s
M llvm/test/MC/AVR/inst-cbi.s
M llvm/test/MC/AVR/inst-cbr.s
M llvm/test/MC/AVR/inst-clr.s
M llvm/test/MC/AVR/inst-com.s
M llvm/test/MC/AVR/inst-cp.s
M llvm/test/MC/AVR/inst-cpc.s
M llvm/test/MC/AVR/inst-cpi.s
M llvm/test/MC/AVR/inst-cpse.s
M llvm/test/MC/AVR/inst-dec.s
M llvm/test/MC/AVR/inst-des.s
M llvm/test/MC/AVR/inst-eicall.s
M llvm/test/MC/AVR/inst-eijmp.s
M llvm/test/MC/AVR/inst-elpm.s
M llvm/test/MC/AVR/inst-eor.s
M llvm/test/MC/AVR/inst-family-set-clr-flag.s
M llvm/test/MC/AVR/inst-fmul.s
M llvm/test/MC/AVR/inst-fmuls.s
M llvm/test/MC/AVR/inst-fmulsu.s
M llvm/test/MC/AVR/inst-icall.s
M llvm/test/MC/AVR/inst-ijmp.s
M llvm/test/MC/AVR/inst-in.s
M llvm/test/MC/AVR/inst-inc.s
M llvm/test/MC/AVR/inst-jmp.s
M llvm/test/MC/AVR/inst-lac.s
M llvm/test/MC/AVR/inst-las.s
M llvm/test/MC/AVR/inst-lat.s
M llvm/test/MC/AVR/inst-ld.s
M llvm/test/MC/AVR/inst-ldd.s
M llvm/test/MC/AVR/inst-ldi.s
M llvm/test/MC/AVR/inst-lds.s
M llvm/test/MC/AVR/inst-lpm.s
M llvm/test/MC/AVR/inst-lsl.s
M llvm/test/MC/AVR/inst-lsr.s
M llvm/test/MC/AVR/inst-mov.s
M llvm/test/MC/AVR/inst-movw.s
M llvm/test/MC/AVR/inst-mul.s
M llvm/test/MC/AVR/inst-muls.s
M llvm/test/MC/AVR/inst-mulsu.s
M llvm/test/MC/AVR/inst-neg.s
M llvm/test/MC/AVR/inst-nop.s
M llvm/test/MC/AVR/inst-or.s
M llvm/test/MC/AVR/inst-ori.s
M llvm/test/MC/AVR/inst-out.s
M llvm/test/MC/AVR/inst-pop.s
M llvm/test/MC/AVR/inst-push.s
M llvm/test/MC/AVR/inst-rcall.s
M llvm/test/MC/AVR/inst-ret.s
M llvm/test/MC/AVR/inst-reti.s
M llvm/test/MC/AVR/inst-rjmp.s
M llvm/test/MC/AVR/inst-rol.s
M llvm/test/MC/AVR/inst-ror.s
M llvm/test/MC/AVR/inst-sbc.s
M llvm/test/MC/AVR/inst-sbci.s
M llvm/test/MC/AVR/inst-sbi.s
M llvm/test/MC/AVR/inst-sbic.s
M llvm/test/MC/AVR/inst-sbis.s
M llvm/test/MC/AVR/inst-sbiw.s
M llvm/test/MC/AVR/inst-sbr.s
M llvm/test/MC/AVR/inst-sbrc.s
M llvm/test/MC/AVR/inst-sbrs.s
M llvm/test/MC/AVR/inst-ser.s
M llvm/test/MC/AVR/inst-sleep.s
M llvm/test/MC/AVR/inst-spm.s
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M llvm/test/MC/AVR/inst-std.s
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M llvm/test/MC/AVR/inst-wdr.s
M llvm/test/MC/AVR/inst-xch.s
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M llvm/test/MC/AVR/registers.s
M llvm/test/MC/AVR/relocations-abs.s
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M llvm/test/MC/AVR/separator.s
M llvm/test/MC/AVR/syntax-reg-int-literal.s
M llvm/test/MC/AVR/syntax-reg-pair.s
A llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
A llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/Mips/cnmips/invalid-wrong-error.s
M llvm/test/MC/Mips/eva/invalid-noeva-wrong-error.s
M llvm/test/MC/Mips/eva/invalid_R6.s
M llvm/test/MC/Mips/micromips32r6/invalid-wrong-error.s
M llvm/test/MC/Mips/mips1/invalid-mips2-wrong-error.s
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M llvm/test/MC/Mips/mips1/invalid-mips4-wrong-error.s
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M llvm/test/MC/Mips/mips1/invalid-mips5.s
M llvm/test/MC/Mips/mips2/invalid-mips3-wrong-error.s
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M llvm/test/MC/Mips/mips2/invalid-mips4-wrong-error.s
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M llvm/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s
M llvm/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s
M llvm/test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s
M llvm/test/MC/Mips/target-soft-float.s
M llvm/test/MC/RISCV/fp-default-rounding-mode.s
M llvm/test/MC/RISCV/rv32zfbfmin-valid.s
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M llvm/test/MC/SystemZ/regs-bad.s
M llvm/test/MC/SystemZ/regs-good.s
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A llvm/test/MC/X86/avx10.2-bf16-32-intel.s
A llvm/test/MC/X86/avx10.2-bf16-64-att.s
A llvm/test/MC/X86/avx10.2-bf16-64-intel.s
A llvm/test/MachineVerifier/AMDGPU/lit.local.cfg
A llvm/test/MachineVerifier/AMDGPU/register-killed-inside-loop.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_bitcast.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic_w_side_effects.mir
A llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir
A llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-entry-block.mir
A llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-nonentry-block.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-pseudo-terminators.mir
A llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir
A llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir
A llvm/test/MachineVerifier/AMDGPU/writelane_m0.mir
R llvm/test/MachineVerifier/register-killed-inside-loop.mir
R llvm/test/MachineVerifier/test_g_bitcast.mir
R llvm/test/MachineVerifier/test_g_intrinsic.mir
R llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
R llvm/test/MachineVerifier/undef-should-only-be-set-on-subreg-defs.mir
R llvm/test/MachineVerifier/undef-virt-reg-entry-block.mir
R llvm/test/MachineVerifier/undef-virt-reg-nonentry-block.mir
R llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir
R llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
R llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
R llvm/test/MachineVerifier/verify-implicit-def.mir
R llvm/test/MachineVerifier/verify-reg-sequence.mir
R llvm/test/MachineVerifier/writelane_m0.mir
M llvm/test/Other/new-pm-print-pipeline.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
A llvm/test/Other/spirv-sim/branch.spv
A llvm/test/Other/spirv-sim/call.spv
A llvm/test/Other/spirv-sim/constant.spv
A llvm/test/Other/spirv-sim/lit.local.cfg
A llvm/test/Other/spirv-sim/loop.spv
A llvm/test/Other/spirv-sim/simple-bad-result.spv
A llvm/test/Other/spirv-sim/simple.spv
A llvm/test/Other/spirv-sim/simulator-args.spv
A llvm/test/Other/spirv-sim/switch.spv
A llvm/test/Other/spirv-sim/wave-get-lane-index.spv
A llvm/test/Other/spirv-sim/wave-read-lane-first.spv
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/test/TableGen/intrinsic-long-name.td
M llvm/test/TableGen/intrinsic-struct.td
M llvm/test/TableGen/searchabletables-intrinsic.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll
M llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll
M llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
M llvm/test/Transforms/Attributor/IPConstantProp/return-constants.ll
M llvm/test/Transforms/Attributor/align.ll
M llvm/test/Transforms/Attributor/assumes_info.ll
M llvm/test/Transforms/Attributor/cb_liveness_disabled.ll
M llvm/test/Transforms/Attributor/cb_liveness_enabled.ll
M llvm/test/Transforms/Attributor/memory_locations.ll
M llvm/test/Transforms/Attributor/phi_bug_pointer_info.ll
M llvm/test/Transforms/Attributor/range.ll
M llvm/test/Transforms/Attributor/read_write_returned_arguments_scc.ll
M llvm/test/Transforms/Attributor/returned.ll
M llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
A llvm/test/Transforms/CodeGenPrepare/revert-constant-ptr-propagation-on-calls.ll
M llvm/test/Transforms/InstCombine/ARM/neon-intrinsics.ll
M llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
M llvm/test/Transforms/InstCombine/phi-select-constant.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/JumpThreading/pr22086.ll
M llvm/test/Transforms/LICM/hoist-binop.ll
M llvm/test/Transforms/LICM/sink-foldable.ll
M llvm/test/Transforms/LICM/update-scev-after-hoist.ll
M llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
A llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
A llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
A llvm/test/Transforms/LoopVectorize/check-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/OpenMP/replace_globalization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/PhaseOrdering/icmp-ashr-breaking-select-idiom.ll
M llvm/test/Transforms/SCCP/exact-flags.ll
M llvm/test/Transforms/SCCP/loadtest2.ll
M llvm/test/Transforms/SCCP/phis.ll
M llvm/test/Transforms/SCCP/pointer-nonnull.ll
M llvm/test/Transforms/SCCP/select.ll
M llvm/test/Transforms/SCCP/widening.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
R llvm/test/Transforms/SLPVectorizer/RISCV/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
A llvm/test/Transforms/SLPVectorizer/X86/arith-scmp.ll
A llvm/test/Transforms/SLPVectorizer/X86/arith-ucmp.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
A llvm/test/Transforms/SLPVectorizer/X86/minbw-user-non-sizable.ll
A llvm/test/Transforms/SLPVectorizer/X86/multi-tracked-reduced-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/reverse_extract_elements.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
A llvm/test/Transforms/SLPVectorizer/empty-struct.ll
A llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-stale-profile-toplev-func.prof
A llvm/test/Transforms/SampleProfile/pseudo-probe-stale-profile-toplev-func.ll
A llvm/test/Transforms/SandboxVectorizer/X86/no_implicit_float.ll
A llvm/test/Transforms/SandboxVectorizer/boilerplate.ll
M llvm/test/lit.cfg.py
M llvm/test/tools/llc/new-pm/pipeline.mir
M llvm/test/tools/llc/new-pm/verify.mir
M llvm/test/tools/llvm-objdump/BPF/interleaved-source-test.ll
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llc/NewPMDriver.h
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-as/CMakeLists.txt
M llvm/tools/llvm-link/CMakeLists.txt
M llvm/tools/opt/CMakeLists.txt
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/ADT/APIntTest.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDieTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/ConstantRangeTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
M llvm/unittests/Support/FormatVariadicTest.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
M llvm/unittests/Transforms/Utils/CallPromotionUtilsTest.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/GlobalISel/PatternParser.cpp
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.cpp
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.h
M llvm/utils/TableGen/ExegesisEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/TableGen/TableGen.cpp
M llvm/utils/TableGen/VTEmitter.cpp
M llvm/utils/count/count.c
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lld/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
A llvm/utils/lit/tests/Inputs/shtest-glob/example_file1.input
A llvm/utils/lit/tests/Inputs/shtest-glob/example_file2.input
A llvm/utils/lit/tests/Inputs/shtest-glob/glob-echo.txt
A llvm/utils/lit/tests/Inputs/shtest-glob/glob-mkdir.txt
A llvm/utils/lit/tests/Inputs/shtest-glob/lit.cfg
A llvm/utils/lit/tests/shtest-glob.py
M llvm/utils/release/build_llvm_release.bat
A llvm/utils/spirv-sim/instructions.py
A llvm/utils/spirv-sim/spirv-sim.py
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/IR/OpImplementation.h
M mlir/include/mlir/TableGen/GenInfo.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToArmSME/ArithToArmSME.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/TensorToSPIRV/TensorToSPIRV.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/TableGen/Pattern.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/SROA.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/lib/Transforms/Utils/RegionUtils.cpp
M mlir/python/mlir/dialects/scf.py
M mlir/test/CAPI/llvm.c
A mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Conversion/ArithToArmSME/arith-to-arm-sme.mlir
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Conversion/TensorToSPIRV/tensor-ops-to-spirv.mlir
M mlir/test/Conversion/VectorToArmSME/vector-to-arm-sme.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Affine/scalrep.mlir
M mlir/test/Dialect/ArmSME/invalid.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
M mlir/test/Dialect/ArmSME/tile-allocation-copies.mlir
M mlir/test/Dialect/ArmSME/tile-allocation-liveness.mlir
M mlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
M mlir/test/Dialect/GPU/canonicalize.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/subgroup-reduce-lowering.mlir
M mlir/test/Dialect/SCF/loop-pipelining.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Target/Cpp/common-cpp.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
A mlir/test/Target/LLVMIR/omptarget-debug.mlir
A mlir/test/Target/LLVMIR/omptarget-debug2.mlir
M mlir/test/Target/LLVMIR/omptarget-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-target-use-device-nested.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Transforms/buffer-results-to-out-params-elim.mlir
M mlir/test/Transforms/canonicalize-block-merge.mlir
M mlir/test/Transforms/test-legalize-type-conversion.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/python/dialects/scf.py
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/tools/mlir-tblgen/OmpOpGen.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
M mlir/tools/mlir-tblgen/RewriterGen.cpp
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
M offload/CMakeLists.txt
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/include/Allocator.h
M offload/DeviceRTL/include/Configuration.h
A offload/DeviceRTL/include/DeviceTypes.h
A offload/DeviceRTL/include/DeviceUtils.h
M offload/DeviceRTL/include/Interface.h
M offload/DeviceRTL/include/LibC.h
M offload/DeviceRTL/include/Mapping.h
M offload/DeviceRTL/include/State.h
M offload/DeviceRTL/include/Synchronization.h
R offload/DeviceRTL/include/Types.h
R offload/DeviceRTL/include/Utils.h
M offload/DeviceRTL/src/Allocator.cpp
M offload/DeviceRTL/src/Configuration.cpp
M offload/DeviceRTL/src/Debug.cpp
A offload/DeviceRTL/src/DeviceUtils.cpp
M offload/DeviceRTL/src/Kernel.cpp
M offload/DeviceRTL/src/Mapping.cpp
M offload/DeviceRTL/src/Misc.cpp
M offload/DeviceRTL/src/Parallelism.cpp
M offload/DeviceRTL/src/Reduction.cpp
M offload/DeviceRTL/src/State.cpp
M offload/DeviceRTL/src/Synchronization.cpp
M offload/DeviceRTL/src/Tasking.cpp
R offload/DeviceRTL/src/Utils.cpp
M offload/DeviceRTL/src/Workshare.cpp
A offload/include/Shared/RefCnt.h
A offload/include/Shared/Types.h
M offload/include/Shared/Utils.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/amdgpu/utils/UtilitiesRTL.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/JIT.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/CMakeLists.txt
M offload/src/DeviceImage.cpp
M offload/src/omptarget.cpp
M offload/test/api/is_initial_device.c
M offload/test/lit.cfg
M offload/test/mapping/declare_mapper_nested_default_mappers_array.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_array_subscript.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_complex_structure.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_ptr_subscript.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_var.cpp
M offload/test/mapping/map_both_pointer_pointee.c
M offload/test/mapping/target_pointers_members_map.cpp
M offload/test/offloading/CUDA/basic_launch.cu
M offload/test/offloading/CUDA/basic_launch_blocks_and_threads.cu
M offload/test/offloading/CUDA/basic_launch_multi_arg.cu
M offload/test/offloading/CUDA/launch_tu.cu
M offload/test/offloading/dynamic-schedule-non-spmd.cpp
M offload/test/offloading/dynamic-schedule.cpp
M offload/test/offloading/fortran/dtype-array-constant-index-map.f90
M offload/test/offloading/fortran/dump_map_tables.f90
M offload/test/offloading/fortran/target-depend.f90
M offload/test/offloading/fortran/target-map-all-common-block-members.f90
M offload/test/offloading/fortran/target-map-common-block.f90
M offload/test/offloading/fortran/target-map-declare-target-link-common-block.f90
A offload/test/offloading/fortran/target-map-dynamic.f90
M offload/test/offloading/fortran/target-map-first-common-block-member.f90
M offload/test/offloading/fortran/target-map-mix-imp-exp-common-block-members.f90
M offload/test/offloading/fortran/target-map-second-common-block-member.f90
M offload/test/offloading/high_trip_count_block_limit.cpp
M offload/test/offloading/schedule.c
M offload/test/sanitizer/double_free.c
M offload/test/sanitizer/double_free_racy.c
M offload/test/sanitizer/free_host_ptr.c
M offload/test/sanitizer/free_wrong_ptr_kind.c
M offload/test/sanitizer/free_wrong_ptr_kind.cpp
M offload/test/sanitizer/kernel_crash.c
M offload/test/sanitizer/kernel_crash_async.c
M offload/test/sanitizer/kernel_crash_many.c
M offload/test/sanitizer/kernel_crash_single.c
M offload/test/sanitizer/kernel_trap.c
M offload/test/sanitizer/kernel_trap.cpp
M offload/test/sanitizer/kernel_trap_async.c
M offload/test/sanitizer/kernel_trap_many.c
M offload/test/sanitizer/ptr_outside_alloc_1.c
M offload/test/sanitizer/ptr_outside_alloc_2.c
M offload/test/sanitizer/use_after_free_1.c
M offload/test/sanitizer/use_after_free_2.c
M openmp/docs/SupportAndFAQ.rst
M utils/bazel/.bazelrc
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.5-bogner
[skip ci]
Commit: 6f379121efae0ab61d3bb143155920d752d5ee74
https://github.com/llvm/llvm-project/commit/6f379121efae0ab61d3bb143155920d752d5ee74
Author: wanglei <wanglei at loongson.cn>
Date: 2024-09-06 (Fri, 06 Sep 2024)
Changed paths:
M .github/workflows/libcxx-build-and-test.yaml
M bolt/lib/Profile/YAMLProfileReader.cpp
A bolt/test/X86/yaml-unknown-keys.test
M bolt/tools/merge-fdata/merge-fdata.cpp
M clang-tools-extra/clang-tidy/bugprone/CastingThroughVoidCheck.cpp
M clang-tools-extra/clang-tidy/cppcoreguidelines/PreferMemberInitializerCheck.cpp
M clang-tools-extra/clangd/TidyFastChecks.inc
M clang-tools-extra/docs/ReleaseNotes.rst
M clang-tools-extra/docs/clang-tidy/checks/bugprone/casting-through-void.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/misc/unconventional-assign-operator.rst
M clang-tools-extra/docs/clang-tidy/checks/readability/avoid-nested-conditional-operator.rst
M clang-tools-extra/include-cleaner/lib/WalkAST.cpp
M clang-tools-extra/include-cleaner/unittests/WalkASTTest.cpp
M clang-tools-extra/test/clang-tidy/checkers/bugprone/casting-through-void.cpp
M clang/cmake/caches/Fuchsia-stage2.cmake
M clang/cmake/caches/Release.cmake
M clang/docs/LanguageExtensions.rst
M clang/docs/Multilib.rst
M clang/docs/ReleaseNotes.rst
M clang/docs/analyzer/checkers.rst
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/CXXRecordDeclDefinitionBits.def
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Type.h
M clang/include/clang/AST/TypeLoc.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsage.h
M clang/include/clang/Analysis/Analyses/UnsafeBufferUsageGadgets.def
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.def
M clang/include/clang/Basic/BuiltinsX86.def
M clang/include/clang/Basic/DiagnosticASTKinds.td
M clang/include/clang/Basic/DiagnosticDriverKinds.td
M clang/include/clang/Basic/DiagnosticGroups.td
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticParseKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/SourceManager.h
M clang/include/clang/Basic/TargetCXXABI.def
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Basic/arm_neon.td
M clang/include/clang/Basic/arm_sve.td
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Driver/Multilib.h
M clang/include/clang/Driver/Options.td
M clang/include/clang/Frontend/FrontendActions.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ModuleFile.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Function.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpFrame.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/State.h
M clang/lib/AST/DeclCXX.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypePrinter.cpp
M clang/lib/Analysis/ThreadSafety.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/OpenMPKinds.cpp
M clang/lib/Basic/Targets/BPF.cpp
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/CodeGen/CGBuilder.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.h
M clang/lib/CodeGen/CGDeclCXX.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/Multilib.cpp
M clang/lib/Driver/ToolChain.cpp
M clang/lib/Driver/ToolChains/BareMetal.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/Fuchsia.cpp
M clang/lib/Driver/ToolChains/Gnu.cpp
M clang/lib/Driver/ToolChains/OHOS.cpp
M clang/lib/Driver/ToolChains/PS4CPU.cpp
M clang/lib/ExtractAPI/DeclarationFragments.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/TokenAnnotator.h
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Frontend/InitPreprocessor.cpp
M clang/lib/Headers/CMakeLists.txt
A clang/lib/Headers/avx10_2_512bf16intrin.h
A clang/lib/Headers/avx10_2bf16intrin.h
M clang/lib/Headers/hlsl/hlsl_intrinsics.h
M clang/lib/Headers/immintrin.h
M clang/lib/Lex/Lexer.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseTemplate.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/CheckExprLifetime.cpp
M clang/lib/Sema/CheckExprLifetime.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaDeclAttr.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaLambda.cpp
M clang/lib/Sema/SemaLookup.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/StackAddrEscapeChecker.cpp
M clang/lib/Tooling/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Tooling/DependencyScanning/ModuleDepCollector.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/constexpr-frame-describe.cpp
M clang/test/AST/ByteCode/literals.cpp
M clang/test/AST/ByteCode/ms.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/AST/HLSL/RWBuffer-AST.hlsl
M clang/test/Analysis/mmap-writeexec.c
M clang/test/Analysis/stack-addr-ps.cpp
M clang/test/CXX/drs/cwg14xx.cpp
A clang/test/CXX/drs/cwg1818.cpp
M clang/test/CXX/drs/cwg18xx.cpp
M clang/test/CXX/drs/cwg19xx.cpp
M clang/test/CXX/drs/cwg1xx.cpp
M clang/test/CXX/drs/cwg24xx.cpp
M clang/test/CXX/drs/cwg27xx.cpp
M clang/test/CXX/drs/cwg3xx.cpp
A clang/test/CXX/drs/cwg563.cpp
M clang/test/CXX/drs/cwg5xx.cpp
M clang/test/CXX/expr/expr.const/p2-0x.cpp
M clang/test/CodeGen/2005-01-02-ConstantInits.c
M clang/test/CodeGen/AMDGPU/amdgpu-atomic-float.c
M clang/test/CodeGen/PowerPC/ppc-emmintrin.c
M clang/test/CodeGen/PowerPC/ppc-xmmintrin.c
A clang/test/CodeGen/X86/avx10_2_512bf16-builtins.c
A clang/test/CodeGen/X86/avx10_2bf16-builtins.c
M clang/test/CodeGen/X86/x86-atomic-double.c
M clang/test/CodeGen/X86/x86-atomic-long_double.c
A clang/test/CodeGen/aarch64-neon-luti.c
A clang/test/CodeGen/aarch64-sme2-intrinsics/acle_sme2_faminmax.c
A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_faminmax.c
A clang/test/CodeGen/aarch64-sve2-intrinsics/acle_sve2_luti.c
M clang/test/CodeGen/attr-counted-by.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset-when-nullptr-is-defined.c
M clang/test/CodeGen/catch-nullptr-and-nonzero-offset.c
M clang/test/CodeGen/catch-pointer-overflow-volatile.c
M clang/test/CodeGen/catch-pointer-overflow.c
M clang/test/CodeGen/ext-int.c
M clang/test/CodeGen/hexagon-brev-ld-ptr-incdec.c
M clang/test/CodeGen/integer-overflow.c
M clang/test/CodeGen/ms-intrinsics.c
M clang/test/CodeGen/pgo-force-function-attrs.ll
M clang/test/CodeGen/ubsan-pointer-overflow.m
M clang/test/CodeGen/vla.c
M clang/test/CodeGenCXX/attr-likelihood-iteration-stmt.cpp
M clang/test/CodeGenCXX/debug-info-lambda-this.cpp
M clang/test/CodeGenCXX/for-range.cpp
M clang/test/CodeGenCXX/microsoft-abi-template-static-init.cpp
M clang/test/CodeGenCXX/pr45964-decomp-transform.cpp
M clang/test/CodeGenCXX/vla.cpp
M clang/test/CodeGenCXX/vtable-available-externally.cpp
M clang/test/CodeGenHLSL/buffer-array-operator.hlsl
A clang/test/CodeGenHLSL/builtins/wave_is_first_lane.hlsl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12.cl
M clang/test/CodeGenSYCL/address-space-deduction.cpp
A clang/test/Driver/baremetal-multilib-custom-error.yaml
M clang/test/Driver/clang_f_opts.c
M clang/test/Driver/debug-options-as.c
M clang/test/Driver/fsanitize.c
M clang/test/Driver/fuchsia.c
M clang/test/Driver/ps4-sdk-root.c
M clang/test/Driver/ps5-sdk-root.c
A clang/test/ExtractAPI/attributed-typedef.m
M clang/test/FixIt/fixit-availability-maccatalyst.m
M clang/test/FixIt/fixit-availability.mm
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Lexer/cxx-features.cpp
M clang/test/Misc/pragma-attribute-supported-attributes-list.test
M clang/test/Modules/no-local-decl-in-reduced-bmi.cppm
M clang/test/Modules/reduced-bmi-empty-module-purview-std.cppm
M clang/test/Modules/reduced-bmi-empty-module-purview.cppm
M clang/test/Modules/unreached-static-entities.cppm
M clang/test/OpenMP/bug60602.cpp
M clang/test/OpenMP/declare_mapper_codegen.cpp
M clang/test/OpenMP/distribute_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/distribute_simd_codegen.cpp
M clang/test/OpenMP/for_linear_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
M clang/test/OpenMP/for_reduction_task_codegen.cpp
M clang/test/OpenMP/for_scan_codegen.cpp
M clang/test/OpenMP/for_simd_scan_codegen.cpp
M clang/test/OpenMP/irbuilder_for_iterator.cpp
M clang/test/OpenMP/irbuilder_for_rangefor.cpp
M clang/test/OpenMP/irbuilder_for_unsigned.c
M clang/test/OpenMP/irbuilder_for_unsigned_auto.c
M clang/test/OpenMP/irbuilder_for_unsigned_down.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic.c
M clang/test/OpenMP/irbuilder_for_unsigned_dynamic_chunked.c
M clang/test/OpenMP/irbuilder_for_unsigned_runtime.c
M clang/test/OpenMP/irbuilder_for_unsigned_static_chunked.c
M clang/test/OpenMP/map_struct_ordering.cpp
M clang/test/OpenMP/master_taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/ordered_codegen.cpp
M clang/test/OpenMP/parallel_for_codegen.cpp
M clang/test/OpenMP/parallel_for_linear_codegen.cpp
M clang/test/OpenMP/parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_for_scan_codegen.cpp
M clang/test/OpenMP/parallel_for_simd_scan_codegen.cpp
M clang/test/OpenMP/parallel_master_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_reduction_codegen.cpp
M clang/test/OpenMP/parallel_master_taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_codegen.cpp
M clang/test/OpenMP/parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/parallel_sections_reduction_task_codegen.cpp
M clang/test/OpenMP/reduction_implicit_map.cpp
M clang/test/OpenMP/sections_reduction_task_codegen.cpp
M clang/test/OpenMP/target_data_use_device_addr_codegen.cpp
M clang/test/OpenMP/target_data_use_device_ptr_codegen.cpp
M clang/test/OpenMP/target_has_device_addr_codegen.cpp
M clang/test/OpenMP/target_in_reduction_codegen.cpp
M clang/test/OpenMP/target_is_device_ptr_codegen.cpp
M clang/test/OpenMP/target_map_both_pointer_pointee_codegen.cpp
M clang/test/OpenMP/target_map_codegen_01.cpp
M clang/test/OpenMP/target_map_codegen_21.cpp
M clang/test/OpenMP/target_map_codegen_27.cpp
M clang/test/OpenMP/target_map_codegen_28.cpp
M clang/test/OpenMP/target_map_codegen_29.cpp
M clang/test/OpenMP/target_map_deref_array_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_array_section_codegen.cpp
M clang/test/OpenMP/target_map_member_expr_codegen.cpp
M clang/test/OpenMP/target_map_nest_defalut_mapper_codegen.cpp
M clang/test/OpenMP/target_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_parallel_reduction_task_codegen.cpp
M clang/test/OpenMP/target_task_affinity_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/OpenMP/target_update_codegen.cpp
M clang/test/OpenMP/task_codegen.c
M clang/test/OpenMP/task_codegen.cpp
M clang/test/OpenMP/task_in_reduction_codegen.cpp
M clang/test/OpenMP/taskgroup_task_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_in_reduction_codegen.cpp
M clang/test/OpenMP/taskloop_simd_reduction_codegen.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_reduction_task_codegen.cpp
M clang/test/Parser/cxx11-user-defined-literals.cpp
M clang/test/ParserHLSL/hlsl_is_rov_attr.hlsl
M clang/test/ParserHLSL/hlsl_is_rov_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr.hlsl
M clang/test/ParserHLSL/hlsl_resource_class_attr_error.hlsl
M clang/test/ParserHLSL/hlsl_resource_handle_attrs.hlsl
M clang/test/Preprocessor/bpf-predefined-macros.c
M clang/test/Preprocessor/init-ppc.c
M clang/test/Preprocessor/init-ppc64.c
M clang/test/Sema/aarch64-sve2-intrinsics/acle_sve2_imm_lane.cpp
A clang/test/Sema/attr-btf_type_tag.cpp
M clang/test/Sema/builtin-unary-fp.c
M clang/test/Sema/pre-c2x-compat.c
M clang/test/Sema/static-assert.c
M clang/test/Sema/warn-lifetime-analysis-nocfg.cpp
M clang/test/SemaCXX/attr-lifetimebound.cpp
A clang/test/SemaCXX/builtin-is-within-lifetime.cpp
M clang/test/SemaCXX/builtins.cpp
A clang/test/SemaCXX/consteval-builtin.cpp
M clang/test/SemaCXX/cxx20-default-compare.cpp
M clang/test/SemaCXX/cxx23-assume.cpp
M clang/test/SemaCXX/cxx2a-template-lambdas.cpp
M clang/test/SemaCXX/cxx2c-pack-indexing.cpp
M clang/test/SemaCXX/cxx2c-placeholder-vars.cpp
M clang/test/SemaCXX/extern-c.cpp
M clang/test/SemaCXX/source_location.cpp
A clang/test/SemaCXX/static-assert-ext.cpp
M clang/test/SemaCXX/sugar-common-types.cpp
M clang/test/SemaCXX/type-traits.cpp
M clang/test/SemaCXX/warn-thread-safety-analysis.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions-inline-namespace.cpp
A clang/test/SemaCXX/warn-unsafe-buffer-usage-libc-functions.cpp
M clang/test/SemaCXX/warn-unsafe-buffer-usage-test-unreachable.cpp
A clang/test/SemaHLSL/Types/Traits/IsIntangibleType.hlsl
A clang/test/SemaHLSL/Types/Traits/IsIntangibleTypeErrors.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_resource.hlsl
M clang/test/SemaHLSL/resource_binding_attr_error_udt.hlsl
M clang/test/SemaObjC/non-trivial-c-union.m
M clang/tools/c-arcmt-test/c-arcmt-test.c
M clang/tools/c-index-test/c-index-test.c
M clang/tools/clang-format/git-clang-format.bat
M clang/tools/driver/CMakeLists.txt
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/Driver/MultilibBuilderTest.cpp
M clang/unittests/Driver/MultilibTest.cpp
M clang/unittests/Driver/SimpleDiagnosticConsumer.h
M clang/unittests/Format/TokenAnnotatorTest.cpp
M clang/utils/TableGen/ClangAttrEmitter.cpp
M clang/utils/TableGen/ClangSyntaxEmitter.cpp
M clang/www/c_status.html
M clang/www/cxx_dr_status.html
M cmake/Modules/HandleCompilerRT.cmake
M compiler-rt/CMakeLists.txt
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/ctx_profile/CtxInstrContextNode.h
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.cpp
M compiler-rt/lib/ctx_profile/CtxInstrProfiling.h
M compiler-rt/lib/fuzzer/FuzzerUtilWindows.cpp
M compiler-rt/lib/nsan/nsan.cpp
M compiler-rt/lib/profile/InstrProfilingFile.c
M compiler-rt/lib/profile/InstrProfilingPlatformFuchsia.c
M compiler-rt/lib/rtsan/rtsan.cpp
M compiler-rt/lib/rtsan/rtsan_context.cpp
M compiler-rt/lib/rtsan/rtsan_context.h
M compiler-rt/lib/rtsan/rtsan_stack.cpp
M compiler-rt/lib/rtsan/rtsan_stack.h
M compiler-rt/lib/rtsan/tests/CMakeLists.txt
M compiler-rt/lib/rtsan/tests/rtsan_test_context.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_internal_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_mac.cpp
M compiler-rt/lib/scudo/standalone/combined.h
M compiler-rt/lib/scudo/standalone/common.cpp
M compiler-rt/lib/scudo/standalone/common.h
M compiler-rt/lib/scudo/standalone/linux.cpp
M compiler-rt/lib/scudo/standalone/platform.h
M compiler-rt/lib/scudo/standalone/primary32.h
M compiler-rt/lib/scudo/standalone/primary64.h
M compiler-rt/lib/scudo/standalone/release.h
M compiler-rt/lib/scudo/standalone/secondary.h
M compiler-rt/test/profile/ContinuousSyncMode/runtime-counter-relocation.c
M compiler-rt/test/profile/ContinuousSyncMode/set-file-object.c
M compiler-rt/test/rtsan/basic.cpp
M compiler-rt/test/sanitizer_common/TestCases/Posix/fork_threaded.c
M compiler-rt/www/index.html
M flang/include/flang/Common/Fortran-features.h
M flang/include/flang/Evaluate/integer.h
M flang/include/flang/Frontend/TargetOptions.h
M flang/include/flang/Optimizer/Builder/Runtime/RTBuilder.h
M flang/include/flang/Runtime/cpp-type.h
M flang/include/flang/Runtime/descriptor.h
M flang/include/flang/Runtime/numeric.h
M flang/include/flang/Semantics/expression.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Tools/TargetSetup.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertExpr.cpp
M flang/lib/Lower/DirectivesCommon.h
M flang/lib/Lower/Mangler.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/ClauseProcessor.h
M flang/lib/Lower/OpenMP/DataSharingProcessor.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Transforms/AddAliasTags.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CufOpConversion.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Semantics/check-io.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
M flang/module/__fortran_builtins.f90
M flang/module/ieee_arithmetic.f90
M flang/runtime/assign.cpp
M flang/runtime/numeric-templates.h
M flang/runtime/numeric.cpp
M flang/runtime/random.cpp
M flang/test/CMakeLists.txt
A flang/test/Driver/fno-openmp.f90
M flang/test/Driver/fopenmp.f90
M flang/test/Evaluate/fold-out_of_range.f90
M flang/test/Evaluate/folding07.f90
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Integration/debug-assumed-shape-array.f90
A flang/test/Integration/debug-target-region-vars.f90
A flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/CUDA/cuda-kernel-loop-directive.cuf
M flang/test/Lower/Intrinsics/ieee_class_queries.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/equivalence.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/copyin-order.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/delayed-privatization-allocatable-array.f90
M flang/test/Lower/OpenMP/delayed-privatization-allocatable-firstprivate.f90
M flang/test/Lower/OpenMP/delayed-privatization-array.f90
M flang/test/Lower/OpenMP/delayed-privatization-firstprivate.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/sections.f90
M flang/test/Lower/OpenMP/single.f90
M flang/test/Lower/OpenMP/statement-function.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/OpenMP/task2.f90
M flang/test/Lower/OpenMP/use-device-ptr-to-use-device-addr.f90
M flang/test/Lower/common-block.f90
A flang/test/Lower/module-generic-with-specific-mangling.f90
A flang/test/Parser/non-breaking-space.f90
M flang/test/Preprocessing/pp134.F90
A flang/test/Semantics/OpenMP/clause-order.f90
A flang/test/Semantics/generic09.f90
M flang/test/Semantics/kinds03.f90
M flang/test/Semantics/modfile26.f90
M flang/test/Semantics/realkinds-aarch64-01.f90
A flang/test/Semantics/smp-proc-ref.f90
M flang/test/Transforms/debug-assumed-shape-array.fir
M flang/test/lit.cfg.py
M flang/test/lit.site.cfg.py.in
M flang/tools/bbc/bbc.cpp
M flang/tools/f18/CMakeLists.txt
M flang/unittests/Runtime/Numeric.cpp
M flang/unittests/Runtime/Reduction.cpp
M flang/unittests/Runtime/Transformational.cpp
M libc/config/darwin/arm/entrypoints.txt
M libc/hdr/types/CMakeLists.txt
A libc/hdr/types/sighandler_t.h
M libc/src/signal/linux/signal.cpp
M libc/src/signal/signal.h
M libc/test/src/signal/CMakeLists.txt
M libc/test/src/signal/signal_test.cpp
M libclc/CMakeLists.txt
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/ranges_minmax.h
M libcxx/include/__atomic/atomic.h
M libcxx/include/__charconv/to_chars_integral.h
M libcxx/include/__config
A libcxx/include/__cstddef/byte.h
A libcxx/include/__cstddef/max_align_t.h
A libcxx/include/__cstddef/nullptr_t.h
A libcxx/include/__cstddef/ptrdiff_t.h
A libcxx/include/__cstddef/size_t.h
M libcxx/include/__exception/nested_exception.h
M libcxx/include/__filesystem/directory_entry.h
M libcxx/include/__filesystem/path.h
M libcxx/include/__fwd/array.h
M libcxx/include/__fwd/complex.h
M libcxx/include/__fwd/pair.h
M libcxx/include/__fwd/span.h
M libcxx/include/__fwd/subrange.h
M libcxx/include/__fwd/tuple.h
M libcxx/include/__iterator/concepts.h
M libcxx/include/__iterator/iterator_traits.h
M libcxx/include/__iterator/wrap_iter.h
M libcxx/include/__math/hypot.h
M libcxx/include/__math/traits.h
M libcxx/include/__mdspan/extents.h
M libcxx/include/__mdspan/layout_left.h
M libcxx/include/__mdspan/layout_right.h
M libcxx/include/__mdspan/layout_stride.h
A libcxx/include/__memory/noexcept_move_assign_container.h
M libcxx/include/__memory/pointer_traits.h
M libcxx/include/__memory/shared_ptr.h
M libcxx/include/__memory/uninitialized_algorithms.h
M libcxx/include/__memory/unique_ptr.h
M libcxx/include/__memory/uses_allocator.h
M libcxx/include/__random/mersenne_twister_engine.h
M libcxx/include/__random/seed_seq.h
M libcxx/include/__random/subtract_with_carry_engine.h
M libcxx/include/__ranges/subrange.h
M libcxx/include/__string/constexpr_c_functions.h
M libcxx/include/__tuple/tuple_size.h
M libcxx/include/__type_traits/aligned_storage.h
M libcxx/include/__type_traits/aligned_union.h
M libcxx/include/__type_traits/alignment_of.h
M libcxx/include/__type_traits/datasizeof.h
M libcxx/include/__type_traits/extent.h
M libcxx/include/__type_traits/is_allocator.h
M libcxx/include/__type_traits/is_array.h
M libcxx/include/__type_traits/is_bounded_array.h
M libcxx/include/__type_traits/is_nothrow_destructible.h
M libcxx/include/__type_traits/is_null_pointer.h
M libcxx/include/__type_traits/is_swappable.h
R libcxx/include/__type_traits/noexcept_move_assign_container.h
M libcxx/include/__type_traits/rank.h
M libcxx/include/__type_traits/remove_all_extents.h
M libcxx/include/__type_traits/remove_extent.h
M libcxx/include/__type_traits/result_of.h
M libcxx/include/__type_traits/type_list.h
M libcxx/include/__utility/in_place.h
M libcxx/include/__utility/pair.h
M libcxx/include/__utility/swap.h
M libcxx/include/any
M libcxx/include/cstddef
M libcxx/include/cstdio
M libcxx/include/cstdlib
M libcxx/include/cstring
M libcxx/include/ctime
M libcxx/include/cuchar
M libcxx/include/cwchar
M libcxx/include/experimental/__simd/reference.h
M libcxx/include/experimental/__simd/scalar.h
M libcxx/include/experimental/__simd/simd.h
M libcxx/include/experimental/__simd/simd_mask.h
M libcxx/include/experimental/__simd/vec_ext.h
M libcxx/include/forward_list
M libcxx/include/list
M libcxx/include/module.modulemap
M libcxx/include/span
M libcxx/include/string
M libcxx/include/typeinfo
M libcxx/include/unordered_map
M libcxx/include/unordered_set
M libcxx/include/vector
M libcxx/modules/std/type_traits.inc
M libcxx/src/filesystem/error.h
M libcxx/src/filesystem/file_descriptor.h
M libcxx/src/filesystem/format_string.h
M libcxx/src/filesystem/operations.cpp
M libcxx/src/filesystem/posix_compat.h
M libcxx/src/filesystem/time_utils.h
M libcxx/src/include/atomic_support.h
M libcxx/src/memory_resource.cpp
M libcxx/src/system_error.cpp
M libcxx/test/benchmarks/ContainerBenchmarks.h
M libcxx/test/benchmarks/VariantBenchmarks.h
M libcxx/test/benchmarks/format.bench.cpp
M libcxx/test/benchmarks/format_to.bench.cpp
M libcxx/test/benchmarks/format_to_n.bench.cpp
M libcxx/test/benchmarks/formatted_size.bench.cpp
M libcxx/test/benchmarks/formatter_int.bench.cpp
M libcxx/test/benchmarks/lexicographical_compare_three_way.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode.bench.cpp
M libcxx/test/benchmarks/std_format_spec_string_unicode_escape.bench.cpp
M libcxx/test/benchmarks/to_chars.bench.cpp
M libcxx/test/benchmarks/variant_visit_1.bench.cpp
M libcxx/test/benchmarks/variant_visit_2.bench.cpp
M libcxx/test/benchmarks/variant_visit_3.bench.cpp
M libcxx/test/libcxx/clang_modules_include.gen.py
M libcxx/test/libcxx/clang_tidy.gen.py
A libcxx/test/libcxx/containers/associative/unord.map/abi.compile.pass.cpp
A libcxx/test/libcxx/containers/associative/unord.set/abi.compile.pass.cpp
M libcxx/test/libcxx/double_include.gen.py
M libcxx/test/libcxx/header_inclusions.gen.py
M libcxx/test/libcxx/libcpp_version.gen.py
M libcxx/test/libcxx/no_assert_include.gen.py
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-clang.pass.cpp
M libcxx/test/libcxx/numerics/c.math/constexpr-cxx23-gcc.pass.cpp
M libcxx/test/libcxx/system_reserved_names.gen.py
M libcxx/test/libcxx/transitive_includes.gen.py
M libcxx/test/libcxx/transitive_includes/cxx03.csv
M libcxx/test/libcxx/transitive_includes/cxx11.csv
M libcxx/test/libcxx/transitive_includes/cxx14.csv
M libcxx/test/libcxx/transitive_includes/cxx17.csv
M libcxx/test/libcxx/transitive_includes/cxx20.csv
M libcxx/test/libcxx/transitive_includes/cxx23.csv
M libcxx/test/libcxx/transitive_includes/cxx26.csv
M libcxx/test/libcxx/type_traits/datasizeof.compile.pass.cpp
M libcxx/test/std/containers/views/mdspan/CustomTestLayouts.h
M libcxx/test/std/containers/views/mdspan/extents/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/conversion.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/ctad.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/dextents.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/dims.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/index_type.verify.cpp
M libcxx/test/std/containers/views/mdspan/extents/obs_static.pass.cpp
M libcxx/test/std/containers/views/mdspan/extents/types.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.layout_right.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.layout_stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/ctor.mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_left/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.layout_left.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.layout_stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/ctor.mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_right/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/comparison.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.extents_array.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.extents_span.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/ctor.strided_mapping.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/deduction.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/is_exhaustive_corner_case.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/required_span_size.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/static_requirements.pass.cpp
M libcxx/test/std/containers/views/mdspan/layout_stride/stride.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/assign.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/conversion.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.copy.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.default.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_array.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_extents.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_integers.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_map.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_map_acc.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.dh_span.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/ctor.move.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/deduction.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/index_operator.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/move.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/properties.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/swap.pass.cpp
M libcxx/test/std/containers/views/mdspan/mdspan/types.pass.cpp
M libcxx/test/std/input.output/filesystems/fs.op.funcs/fs.op.last_write_time/last_write_time.pass.cpp
M libcxx/test/std/language.support/cmp/cmp.alg/strong_order.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_ceil.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_floor.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/bit_width.pass.cpp
M libcxx/test/std/numerics/bit/bit.pow.two/has_single_bit.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countl_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_one.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/countr_zero.pass.cpp
M libcxx/test/std/numerics/bit/bitops.count/popcount.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotl.pass.cpp
M libcxx/test/std/numerics/bit/bitops.rot/rotr.pass.cpp
A libcxx/test/std/numerics/c.math/signbit.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/test_offset_time_zone.h
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_local_time_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_zoned_time_duration2_time_zone_ptr2.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/string_view_zoned_time_duration2_time_zone_ptr2_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_local_time_choose.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.ctor/time_zone_pointer_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_sys_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/get_time_zone.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/operator_local_time.pass.cpp
M libcxx/test/std/time/time.zone/time.zone.zonedtime/time.zone.zonedtime.members/operator_sys_time.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.from.chars/integral.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.from.chars/integral.roundtrip.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/from_chars_result.operator_bool.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/from_chars_result.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/to_chars_result.operator_bool.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.syn/to_chars_result.pass.cpp
M libcxx/test/std/utilities/charconv/charconv.to.chars/integral.pass.cpp
M libcxx/test/std/utilities/meta/meta.unary/meta.unary.prop/is_swappable.pass.cpp
M libcxx/test/std/utilities/tuple/tuple.tuple/tuple.apply/apply.pass.cpp
M libcxx/test/support/archetypes.h
M libcxx/test/support/container_test_types.h
M libcxx/test/support/filesystem_test_helper.h
M libcxx/test/support/make_test_thread.h
M libcxx/test/support/parse_integer.h
M libcxx/test/support/uses_alloc_types.h
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/utils/adb_run.py
M libcxx/utils/ci/Dockerfile
M libcxx/utils/ci/apple-install-libcxx.sh
M libcxx/utils/ci/build-picolibc.sh
M libcxx/utils/ci/buildkite-pipeline.yml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/ci/vendor/android/Dockerfile.emulator
M libcxx/utils/ci/vendor/android/build-emulator-images.sh
M libcxx/utils/ci/vendor/android/container-setup.sh
M libcxx/utils/ci/vendor/android/emulator-entrypoint.sh
M libcxx/utils/ci/vendor/android/emulator-functions.sh
M libcxx/utils/ci/vendor/android/emulator-wait-for-ready.sh
M libcxx/utils/ci/vendor/android/setup-env-for-emulator.sh
M libcxx/utils/ci/vendor/android/start-emulator.sh
M libcxx/utils/ci/vendor/android/stop-emulator.sh
M libcxx/utils/libcxx/test/android.py
M libcxx/utils/libcxx/test/features.py
M libcxx/utils/libcxx/test/modules.py
M libcxxabi/src/cxa_guard_impl.h
M libcxxabi/src/cxa_personality.cpp
M lld/COFF/Chunks.cpp
M lld/COFF/Chunks.h
M lld/COFF/InputFiles.cpp
M lld/COFF/InputFiles.h
M lld/COFF/SymbolTable.cpp
M lld/COFF/SymbolTable.h
M lld/ELF/InputFiles.cpp
M lld/MachO/Arch/ARM64.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/Config.h
M lld/MachO/Driver.cpp
M lld/MachO/ICF.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/InputSection.h
M lld/MachO/MapFile.cpp
M lld/MachO/OutputSegment.cpp
M lld/MachO/Symbols.cpp
M lld/MachO/Symbols.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/Target.h
M lld/include/lld/Common/CommonLinkerContext.h
A lld/test/COFF/arm64ec-import.test
A lld/test/COFF/arm64ec-lib.test
A lld/test/MachO/icf-safe-thunks.ll
M lld/test/MachO/segprot.s
A lld/test/wasm/Inputs/allow-multiple-definition.s
A lld/test/wasm/allow-multiple-definition.s
M lld/wasm/Config.h
M lld/wasm/Driver.cpp
M lld/wasm/Options.td
M lld/wasm/SymbolTable.cpp
M lldb/bindings/python/python-swigsafecast.swig
M lldb/docs/conf.py
M lldb/include/lldb/API/SBError.h
M lldb/include/lldb/API/SBValueList.h
M lldb/include/lldb/Core/ValueObjectConstResult.h
M lldb/include/lldb/Host/Socket.h
M lldb/include/lldb/Host/common/TCPSocket.h
M lldb/include/lldb/Symbol/Type.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Utility/Status.h
M lldb/include/lldb/Utility/SupportFile.h
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/API/SBBreakpointLocation.cpp
M lldb/source/API/SBBreakpointName.cpp
M lldb/source/API/SBDebugger.cpp
M lldb/source/API/SBError.cpp
M lldb/source/API/SBFile.cpp
M lldb/source/API/SBFormat.cpp
M lldb/source/API/SBFrame.cpp
M lldb/source/API/SBPlatform.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBSaveCoreOptions.cpp
M lldb/source/API/SBStructuredData.cpp
M lldb/source/API/SBTarget.cpp
M lldb/source/API/SBThread.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/API/SBValueList.cpp
M lldb/source/API/SBWatchpoint.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectCommands.cpp
M lldb/source/Commands/CommandObjectMemoryTag.cpp
M lldb/source/Commands/CommandObjectSource.cpp
M lldb/source/Commands/CommandObjectStats.cpp
M lldb/source/Commands/CommandObjectTrace.cpp
M lldb/source/Core/Debugger.cpp
M lldb/source/Core/ModuleList.cpp
M lldb/source/Core/PluginManager.cpp
M lldb/source/Core/SourceManager.cpp
M lldb/source/Core/ThreadedCommunication.cpp
M lldb/source/Core/ValueObject.cpp
M lldb/source/Core/ValueObjectCast.cpp
M lldb/source/Core/ValueObjectConstResult.cpp
M lldb/source/Core/ValueObjectDynamicValue.cpp
M lldb/source/Core/ValueObjectSyntheticFilter.cpp
M lldb/source/Core/ValueObjectVTable.cpp
M lldb/source/Core/ValueObjectVariable.cpp
M lldb/source/DataFormatters/VectorType.cpp
M lldb/source/Expression/FunctionCaller.cpp
M lldb/source/Expression/LLVMUserExpression.cpp
M lldb/source/Expression/Materializer.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Host/common/FileCache.cpp
M lldb/source/Host/common/LockFileBase.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Host/common/Socket.cpp
M lldb/source/Host/common/TCPSocket.cpp
M lldb/source/Host/macosx/objcxx/Host.mm
M lldb/source/Host/posix/ConnectionFileDescriptorPosix.cpp
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
M lldb/source/Host/windows/MainLoopWindows.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/CommandObject.cpp
M lldb/source/Interpreter/OptionValueRegex.cpp
M lldb/source/Interpreter/ScriptInterpreter.cpp
M lldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.cpp
M lldb/source/Plugins/Instruction/RISCV/EmulateInstructionRISCV.cpp
M lldb/source/Plugins/Language/CPlusPlus/BlockPointer.cpp
M lldb/source/Plugins/Language/CPlusPlus/GenericOptional.cpp
M lldb/source/Plugins/LanguageRuntime/CPlusPlus/ItaniumABI/ItaniumABILanguageRuntime.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/ObjectFile/Minidump/ObjectFileMinidump.cpp
M lldb/source/Plugins/Platform/Android/AdbClient.cpp
M lldb/source/Plugins/Platform/Android/PlatformAndroidRemoteGDBServer.cpp
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.h
M lldb/source/Plugins/Platform/MacOSX/objcxx/PlatformiOSSimulatorCoreSimulatorSupport.mm
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.cpp
M lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp
M lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h
M lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_riscv64.cpp
M lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_riscv64.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunication.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServer.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerPlatform.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_x86_64.cpp
M lldb/source/Plugins/Process/minidump/RegisterContextMinidump_x86_64.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h
M lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp
M lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParser.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
M lldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.h
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
M lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFDebugMap.cpp
M lldb/source/Symbol/LineTable.cpp
M lldb/source/Symbol/Type.cpp
M lldb/source/Target/ModuleCache.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/source/Target/Thread.cpp
M lldb/source/Utility/Scalar.cpp
M lldb/source/Utility/Status.cpp
M lldb/source/Utility/StructuredData.cpp
M lldb/test/API/api/multiple-debuggers/TestMultipleDebuggers.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/TestDataFormatterGenericOptional.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/optional/main.cpp
M lldb/test/API/functionalities/memory/big-read/TestMemoryReadMaximumSize.py
A lldb/test/API/functionalities/memory/holes/Makefile
A lldb/test/API/functionalities/memory/holes/TestMemoryHoles.py
A lldb/test/API/functionalities/memory/holes/main.cpp
M lldb/test/API/functionalities/postmortem/elf-core/TestLinuxCore.py
R lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_fpr.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_fpr.out
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_only.core
A lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.gpr_only.out
R lldb/test/API/functionalities/postmortem/elf-core/linux-riscv64.out
A lldb/test/API/functionalities/postmortem/elf-core/main_fpr.c
M lldb/test/API/functionalities/process_save_core_minidump/TestProcessSaveCoreMinidump.py
M lldb/test/API/lang/cpp/dynamic-value/Makefile
M lldb/test/API/lang/cpp/dynamic-value/TestDynamicValue.py
A lldb/test/API/lang/cpp/dynamic-value/a.h
A lldb/test/API/lang/cpp/dynamic-value/anonymous-b.cpp
M lldb/test/API/lang/cpp/dynamic-value/pass-to-base.cpp
M lldb/test/API/lang/cpp/namespace/TestNamespace.py
M lldb/test/API/tools/lldb-dap/instruction-breakpoint/TestDAP_instruction_breakpoint.py
M lldb/test/API/tools/lldb-server/TestGdbRemoteLaunch.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
M lldb/test/API/tools/lldb-server/TestNonStop.py
M lldb/test/Shell/SymbolFile/DWARF/x86/type-definition-search.cpp
M lldb/tools/lldb-dap/package.json
M lldb/unittests/Host/MainLoopTest.cpp
M lldb/unittests/Host/SocketTest.cpp
M lldb/unittests/Process/gdb-remote/GDBRemoteCommunicationClientTest.cpp
M lldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp
M lldb/unittests/Symbol/TestType.cpp
M lldb/unittests/SymbolFile/DWARF/DWARFDIETest.cpp
M lldb/unittests/Target/RemoteAwarePlatformTest.cpp
M lldb/unittests/TestingSupport/Host/NativeProcessTestUtils.h
M lldb/unittests/Utility/StatusTest.cpp
M llvm/benchmarks/CMakeLists.txt
A llvm/benchmarks/GetIntrinsicInfoTableEntriesBM.cpp
A llvm/benchmarks/SandboxIRBench.cpp
M llvm/cmake/config-ix.cmake
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AssignmentTracking.md
M llvm/docs/conf.py
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/PagedVector.h
M llvm/include/llvm/ADT/SmallVector.h
M llvm/include/llvm/Analysis/CtxProfAnalysis.h
M llvm/include/llvm/Analysis/DominanceFrontier.h
M llvm/include/llvm/Analysis/DominanceFrontierImpl.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/IndirectCallPromotionAnalysis.h
M llvm/include/llvm/Analysis/MLModelRunner.h
M llvm/include/llvm/Analysis/MemorySSA.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/CodeGenCommonISel.h
M llvm/include/llvm/CodeGen/DebugHandlerBase.h
M llvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
A llvm/include/llvm/CodeGen/MachineCSE.h
M llvm/include/llvm/CodeGen/MachineDominanceFrontier.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Config/config.h.cmake
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/DerivedTypes.h
M llvm/include/llvm/IR/Function.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/IntrinsicInst.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/Mangler.h
M llvm/include/llvm/IR/ModuleSummaryIndexYAML.h
M llvm/include/llvm/IR/OperandTraits.h
M llvm/include/llvm/IR/Operator.h
M llvm/include/llvm/IR/User.h
M llvm/include/llvm/IR/VectorBuilder.h
M llvm/include/llvm/InitializePasses.h
M llvm/include/llvm/MC/MCExpr.h
M llvm/include/llvm/Passes/CodeGenPassBuilder.h
M llvm/include/llvm/Passes/MachinePassRegistry.def
M llvm/include/llvm/ProfileData/CtxInstrContextNode.h
M llvm/include/llvm/ProfileData/PGOCtxProfReader.h
M llvm/include/llvm/ProfileData/SampleProfReader.h
M llvm/include/llvm/SandboxIR/SandboxIR.h
M llvm/include/llvm/SandboxIR/SandboxIRValues.def
M llvm/include/llvm/SandboxIR/Tracker.h
M llvm/include/llvm/SandboxIR/Type.h
M llvm/include/llvm/Support/AutoConvert.h
M llvm/include/llvm/Support/FormatCommon.h
M llvm/include/llvm/Support/FormatVariadic.h
M llvm/include/llvm/Support/TargetOpcodes.def
M llvm/include/llvm/TableGen/DirectiveEmitter.h
M llvm/include/llvm/TableGen/Record.h
M llvm/include/llvm/Target/Target.td
M llvm/include/llvm/Transforms/IPO/FunctionImport.h
M llvm/include/llvm/Transforms/IPO/SampleProfileMatcher.h
M llvm/include/llvm/Transforms/InstCombine/InstCombine.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/include/llvm/Transforms/Utils/SCCPSolver.h
M llvm/include/llvm/Transforms/Utils/SSAUpdaterImpl.h
A llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.h
M llvm/include/llvm/XRay/Graph.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/CtxProfAnalysis.cpp
M llvm/lib/Analysis/FunctionPropertiesAnalysis.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/Lint.cpp
M llvm/lib/Analysis/MLInlineAdvisor.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.h
M llvm/lib/CodeGen/AsmPrinter/DwarfFile.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfFile.h
M llvm/lib/CodeGen/CodeGen.cpp
M llvm/lib/CodeGen/CodeGenCommonISel.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandVectorPredication.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/InitUndef.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugVariables.cpp
M llvm/lib/CodeGen/LocalStackSlotAllocation.cpp
M llvm/lib/CodeGen/MLRegAllocEvictAdvisor.cpp
M llvm/lib/CodeGen/MachineCSE.cpp
M llvm/lib/CodeGen/MachineInstr.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypesGeneric.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyld.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.cpp
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldCOFF.h
M llvm/lib/ExecutionEngine/RuntimeDyld/RuntimeDyldImpl.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/ConstantsContext.h
M llvm/lib/IR/DebugProgramInstruction.cpp
M llvm/lib/IR/Function.cpp
M llvm/lib/IR/Mangler.cpp
M llvm/lib/IR/Type.cpp
M llvm/lib/IR/TypeFinder.cpp
M llvm/lib/IR/VectorBuilder.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/MC/MCExpr.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/SandboxIR/SandboxIR.cpp
M llvm/lib/SandboxIR/Tracker.cpp
M llvm/lib/SandboxIR/Type.cpp
M llvm/lib/Support/APInt.cpp
M llvm/lib/Support/AutoConvert.cpp
M llvm/lib/Support/FormatVariadic.cpp
M llvm/lib/Support/InitLLVM.cpp
M llvm/lib/Support/MemoryBuffer.cpp
M llvm/lib/Support/SmallVector.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/Unix/Program.inc
M llvm/lib/Support/Unix/Threading.inc
M llvm/lib/Support/raw_ostream.cpp
M llvm/lib/TableGen/DetailedRecordsBackend.cpp
M llvm/lib/TableGen/Record.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallingConv.td
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
M llvm/lib/Target/AMDGPU/SIModeRegister.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
A llvm/lib/Target/AMDGPU/SIShrinkInstructions.h
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrInfo.td
M llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/BPF/BPFInstrInfo.td
M llvm/lib/Target/BPF/BPFSubtarget.cpp
M llvm/lib/Target/DirectX/DXContainerGlobals.cpp
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILIntrinsicExpansion.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILPrepare.cpp
M llvm/lib/Target/DirectX/DXILPrettyPrinter.cpp
M llvm/lib/Target/DirectX/DXILTranslateMetadata.cpp
M llvm/lib/Target/M68k/M68kCallingConv.td
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MipsCallingConv.td
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/PowerPC/PPCCallingConv.td
M llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/RISCV/CMakeLists.txt
M llvm/lib/Target/RISCV/GISel/RISCVCallLowering.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
A llvm/lib/Target/RISCV/RISCVCallingConv.cpp
A llvm/lib/Target/RISCV/RISCVCallingConv.h
M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.h
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
M llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXSf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfbfmin.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZfh.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvfbf.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.td
M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVVectorPeephole.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVISelLowering.cpp
M llvm/lib/Target/SPIRV/SPIRVInstrInfo.td
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVStripConvergentIntrinsics.cpp
M llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
M llvm/lib/Target/SystemZ/MCTargetDesc/SystemZELFObjectWriter.cpp
M llvm/lib/Target/SystemZ/SystemZCallingConv.td
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/WebAssembly/AsmParser/WebAssemblyAsmParser.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.cpp
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyInstPrinter.h
M llvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyMCTargetDesc.h
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyDebugFixup.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelDAGToDAG.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
M llvm/lib/Target/WebAssembly/WebAssemblyLateEHPrepare.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
M llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86InstPrinterCommon.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86IntelInstPrinter.cpp
M llvm/lib/Target/X86/X86CallingConv.td
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrAVX10.td
M llvm/lib/Target/X86/X86InstrAVX512.td
M llvm/lib/Target/X86/X86InstrFMA3Info.cpp
M llvm/lib/Target/X86/X86InstrFragmentsSIMD.td
M llvm/lib/Target/X86/X86InstrUtils.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/ModuleInliner.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/SCCP.cpp
M llvm/lib/Transforms/IPO/SampleProfileMatcher.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/PGOCtxProfLowering.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/SCCP.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Utils/InlineFunction.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/CMakeLists.txt
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/lib/Transforms/Vectorize/SandboxVectorizer/SandboxVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Analysis/BasicAA/gep-nuw-alias.ll
M llvm/test/Analysis/CostModel/AArch64/div.ll
A llvm/test/Analysis/CostModel/AArch64/vec3-fp-conversions.ll
M llvm/test/Analysis/CostModel/RISCV/cast.ll
M llvm/test/Analysis/CtxProfAnalysis/full-cycle.ll
A llvm/test/Analysis/CtxProfAnalysis/inline.ll
A llvm/test/Analysis/CtxProfAnalysis/json_equals.py
M llvm/test/Analysis/CtxProfAnalysis/load.ll
A llvm/test/Analysis/Lint/noalias-null.ll
A llvm/test/Analysis/Lint/scalable.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-non-strict.ll
A llvm/test/Analysis/ScalarEvolution/predicated-exit-count.ll
M llvm/test/Analysis/ScalarEvolution/predicated-symbolic-max-backedge-taken-count.ll
A llvm/test/Analysis/ScalarEvolution/udiv-of-x-xsmaxone-fold.ll
A llvm/test/Assembler/target-type-param-errors.ll
A llvm/test/Bitcode/intrinsics-struct-upgrade-attributes.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-shuffle-vector-widen-crash.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
M llvm/test/CodeGen/AArch64/GlobalISel/machine-cse-mid-pipeline.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-build-vector-to-dup.mir
M llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-lowering-shuffle-splat.mir
M llvm/test/CodeGen/AArch64/PHIElimination-crash.mir
M llvm/test/CodeGen/AArch64/PHIElimination-debugloc.mir
M llvm/test/CodeGen/AArch64/aarch64-bif-gen.ll
M llvm/test/CodeGen/AArch64/aarch64-bit-gen.ll
M llvm/test/CodeGen/AArch64/aarch64-smull.ll
M llvm/test/CodeGen/AArch64/abds-neg.ll
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/test/CodeGen/AArch64/abdu-neg.ll
M llvm/test/CodeGen/AArch64/abdu.ll
M llvm/test/CodeGen/AArch64/abs.ll
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-dup.ll
M llvm/test/CodeGen/AArch64/arm64-extract-insert-varidx.ll
M llvm/test/CodeGen/AArch64/arm64-indexed-vector-ldst.ll
M llvm/test/CodeGen/AArch64/arm64-neon-copy.ll
M llvm/test/CodeGen/AArch64/arm64-subvector-extend.ll
M llvm/test/CodeGen/AArch64/arm64-tbl.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/bswap.ll
M llvm/test/CodeGen/AArch64/concat-vector.ll
A llvm/test/CodeGen/AArch64/fabs-fp128.ll
M llvm/test/CodeGen/AArch64/fabs.ll
M llvm/test/CodeGen/AArch64/faddsub.ll
M llvm/test/CodeGen/AArch64/fcmp.ll
M llvm/test/CodeGen/AArch64/fcopysign.ll
M llvm/test/CodeGen/AArch64/fcvt.ll
M llvm/test/CodeGen/AArch64/fdiv.ll
M llvm/test/CodeGen/AArch64/fexplog.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fminimummaximum.ll
M llvm/test/CodeGen/AArch64/fminmax.ll
M llvm/test/CodeGen/AArch64/fmla.ll
M llvm/test/CodeGen/AArch64/fmul.ll
M llvm/test/CodeGen/AArch64/fneg.ll
M llvm/test/CodeGen/AArch64/fpow.ll
M llvm/test/CodeGen/AArch64/fpowi.ll
M llvm/test/CodeGen/AArch64/fptoi.ll
M llvm/test/CodeGen/AArch64/fptrunc.ll
M llvm/test/CodeGen/AArch64/frem.ll
M llvm/test/CodeGen/AArch64/fsincos.ll
M llvm/test/CodeGen/AArch64/fsqrt.ll
M llvm/test/CodeGen/AArch64/icmp.ll
M llvm/test/CodeGen/AArch64/insertextract.ll
M llvm/test/CodeGen/AArch64/isinf.ll
M llvm/test/CodeGen/AArch64/itofp.ll
M llvm/test/CodeGen/AArch64/llvm.exp10.ll
M llvm/test/CodeGen/AArch64/load.ll
A llvm/test/CodeGen/AArch64/machine-outliner-bundle.mir
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-bitwise-instructions.ll
M llvm/test/CodeGen/AArch64/neon-compare-instructions.ll
M llvm/test/CodeGen/AArch64/neon-extadd.ll
M llvm/test/CodeGen/AArch64/neon-extmul.ll
A llvm/test/CodeGen/AArch64/neon-luti.ll
M llvm/test/CodeGen/AArch64/neon-perm.ll
A llvm/test/CodeGen/AArch64/partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/ptradd.ll
M llvm/test/CodeGen/AArch64/rem.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/sext.ll
M llvm/test/CodeGen/AArch64/shift.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/sme-vg-to-stack.ll
A llvm/test/CodeGen/AArch64/sme2-intrinsics-faminmax.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ld1.ll
M llvm/test/CodeGen/AArch64/sme2-intrinsics-ldnt1.ll
M llvm/test/CodeGen/AArch64/spillfill-sve.mir
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/statepoint-twoaddr.mir
M llvm/test/CodeGen/AArch64/sub.ll
A llvm/test/CodeGen/AArch64/sve-bf16-converts.ll
M llvm/test/CodeGen/AArch64/sve-callee-save-restore-pairs.ll
M llvm/test/CodeGen/AArch64/sve-pfalse-machine-cse.mir
A llvm/test/CodeGen/AArch64/sve2-intrinsics-faminmax.ll
A llvm/test/CodeGen/AArch64/sve2-intrinsics-luti.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vecreduce-add.ll
M llvm/test/CodeGen/AArch64/xtn.ll
A llvm/test/CodeGen/AArch64/zext-shuffle.ll
M llvm/test/CodeGen/AArch64/zext.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw_fmin.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/no-cse-nonlocal-convergent-instrs.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-cs-chain-preserve-cc.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointer-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/cmp_shrink.mir
M llvm/test/CodeGen/AMDGPU/copyprop_regsequence_with_undef.mir
M llvm/test/CodeGen/AMDGPU/cse-convergent.ll
M llvm/test/CodeGen/AMDGPU/early-lis-two-address-partial-def.mir
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat-scratch.ll
M llvm/test/CodeGen/AMDGPU/fmaximum.ll
M llvm/test/CodeGen/AMDGPU/fmaximum3.ll
M llvm/test/CodeGen/AMDGPU/fminimum.ll
M llvm/test/CodeGen/AMDGPU/fminimum3.ll
M llvm/test/CodeGen/AMDGPU/fold-imm-f16-f32.mir
M llvm/test/CodeGen/AMDGPU/fold-multiple.mir
M llvm/test/CodeGen/AMDGPU/gfx10-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/gfx11-twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
A llvm/test/CodeGen/AMDGPU/hazard-recognizer-src-shared-base.ll
M llvm/test/CodeGen/AMDGPU/indirect-call-known-callees.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.cond.sub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.barrier.wait.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.prefetch.data.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.chain.arg.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.id.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.err.ll
M llvm/test/CodeGen/AMDGPU/llvm.fptrunc.round.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f32.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-zero-size-arr.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-hsa.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
M llvm/test/CodeGen/AMDGPU/machine-cse-ssa.mir
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.gfx10.ll
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-invalid-syncscope.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-agent.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-singlethread.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-system.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-volatile.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-wavefront.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-local-workgroup.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-lastuse.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll
M llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll
M llvm/test/CodeGen/AMDGPU/phi-elimination-end-cf.mir
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/s-getpc-b64-remat.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/should-not-hoist-set-inactive.ll
M llvm/test/CodeGen/AMDGPU/shrink-i32-kimm.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-flags.mir
M llvm/test/CodeGen/AMDGPU/shrink-instructions-illegal-fold.mir
M llvm/test/CodeGen/AMDGPU/shrink-insts-scalar-bit-ops.mir
M llvm/test/CodeGen/AMDGPU/shrink-true16.mir
M llvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
M llvm/test/CodeGen/AMDGPU/split-mbb-lis-subrange.mir
M llvm/test/CodeGen/AMDGPU/stale-livevar-in-twoaddr-pass.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma-f64.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-fma.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
M llvm/test/CodeGen/AMDGPU/twoaddr-wmma.mir
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b32.mir
M llvm/test/CodeGen/AMDGPU/valu-mask-write-hazard.mir
A llvm/test/CodeGen/AMDGPU/valu-read-sgpr-hazard.mir
M llvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
M llvm/test/CodeGen/AMDGPU/vop-shrink-non-ssa.mir
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/wqm.mir
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
M llvm/test/CodeGen/ARM/arm-vld1.ll
M llvm/test/CodeGen/ARM/arm-vst1.ll
A llvm/test/CodeGen/ARM/atomic-64bit-fast-regalloc.ll
M llvm/test/CodeGen/ARM/atomic-load-store.ll
M llvm/test/CodeGen/ARM/atomicrmw_exclusive_monitor_ints.ll
M llvm/test/CodeGen/ARM/bf16-intrinsics-ld-st.ll
M llvm/test/CodeGen/ARM/cmpxchg-O0.ll
M llvm/test/CodeGen/ARM/cmpxchg.mir
M llvm/test/CodeGen/BPF/32-bit-subreg-cond-select.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-1.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/field-reloc-bitfield-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-byte-size-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-existence-3.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-lshift-1.ll
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M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-1.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-2.ll
M llvm/test/CodeGen/BPF/CORE/intrinsic-fieldinfo-signedness-3.ll
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M llvm/test/CodeGen/BPF/CORE/offset-reloc-end-load.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-1.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2-bpfeb.ll
M llvm/test/CodeGen/BPF/CORE/offset-reloc-fieldinfo-2.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp1.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp2.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp3.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp4.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp5.ll
M llvm/test/CodeGen/BPF/adjust-opt-icmp6.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative1.ll
M llvm/test/CodeGen/BPF/adjust-opt-speculative2.ll
M llvm/test/CodeGen/BPF/alu8.ll
M llvm/test/CodeGen/BPF/atomics.ll
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M llvm/test/CodeGen/BPF/bpf-fastcall-2.ll
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M llvm/test/CodeGen/BPF/cc_args_be.ll
M llvm/test/CodeGen/BPF/cc_ret.ll
M llvm/test/CodeGen/BPF/cmp.ll
M llvm/test/CodeGen/BPF/cttz-ctlz.ll
M llvm/test/CodeGen/BPF/ex1.ll
M llvm/test/CodeGen/BPF/fi_ri.ll
M llvm/test/CodeGen/BPF/i128.ll
M llvm/test/CodeGen/BPF/intrinsics.ll
M llvm/test/CodeGen/BPF/load.ll
M llvm/test/CodeGen/BPF/loops.ll
M llvm/test/CodeGen/BPF/many_args1.ll
M llvm/test/CodeGen/BPF/objdump_atomics.ll
M llvm/test/CodeGen/BPF/objdump_cond_op.ll
M llvm/test/CodeGen/BPF/objdump_cond_op_2.ll
M llvm/test/CodeGen/BPF/objdump_imm_hex.ll
M llvm/test/CodeGen/BPF/objdump_intrinsics.ll
M llvm/test/CodeGen/BPF/objdump_nop.ll
M llvm/test/CodeGen/BPF/objdump_static_var.ll
M llvm/test/CodeGen/BPF/objdump_trivial.ll
M llvm/test/CodeGen/BPF/pr57872.ll
M llvm/test/CodeGen/BPF/reloc-2.ll
M llvm/test/CodeGen/BPF/remove_truncate_1.ll
M llvm/test/CodeGen/BPF/remove_truncate_2.ll
M llvm/test/CodeGen/BPF/remove_truncate_3.ll
M llvm/test/CodeGen/BPF/remove_truncate_6.ll
M llvm/test/CodeGen/BPF/remove_truncate_8.ll
M llvm/test/CodeGen/BPF/rodata_1.ll
M llvm/test/CodeGen/BPF/rodata_2.ll
M llvm/test/CodeGen/BPF/rodata_3.ll
M llvm/test/CodeGen/BPF/rodata_4.ll
M llvm/test/CodeGen/BPF/rodata_6.ll
M llvm/test/CodeGen/BPF/rodata_7.ll
M llvm/test/CodeGen/BPF/sanity.ll
M llvm/test/CodeGen/BPF/setcc.ll
M llvm/test/CodeGen/BPF/shifts.ll
M llvm/test/CodeGen/BPF/sockex2.ll
M llvm/test/CodeGen/BPF/undef.ll
M llvm/test/CodeGen/BPF/xadd.ll
M llvm/test/CodeGen/BPF/xadd_legal.ll
A llvm/test/CodeGen/DirectX/ContainerData/RuntimeInfoCS.ll
A llvm/test/CodeGen/DirectX/sign.ll
A llvm/test/CodeGen/DirectX/sin_vector_error.ll
A llvm/test/CodeGen/DirectX/wave_is_first_lane.ll
M llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
M llvm/test/CodeGen/M68k/Arith/add.ll
R llvm/test/CodeGen/M68k/Arith/sext-i1.ll
M llvm/test/CodeGen/M68k/CConv/fastcc-call.ll
A llvm/test/CodeGen/M68k/Data/link-unlnk.ll
A llvm/test/CodeGen/M68k/Data/load-extend.ll
A llvm/test/CodeGen/M68k/Data/load-imm.ll
A llvm/test/CodeGen/M68k/Data/sext-i1.ll
R llvm/test/CodeGen/M68k/link-unlnk.ll
R llvm/test/CodeGen/M68k/load-extend.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
M llvm/test/CodeGen/MLRegAlloc/dev-mode-extra-features-logging.ll
M llvm/test/CodeGen/PowerPC/2013-07-01-PHIElimBug.mir
M llvm/test/CodeGen/PowerPC/build-vector-from-load-and-zeros.ll
M llvm/test/CodeGen/PowerPC/canonical-merge-shuffles.ll
M llvm/test/CodeGen/PowerPC/fp-classify.ll
M llvm/test/CodeGen/PowerPC/livevars-crash1.mir
M llvm/test/CodeGen/PowerPC/livevars-crash2.mir
M llvm/test/CodeGen/PowerPC/load-and-splat.ll
M llvm/test/CodeGen/PowerPC/machine-cse-rm-pre.mir
M llvm/test/CodeGen/PowerPC/pre-inc-disable.ll
M llvm/test/CodeGen/PowerPC/scalar_vector_test_4.ll
A llvm/test/CodeGen/PowerPC/sms-recmii.ll
M llvm/test/CodeGen/PowerPC/test-vector-insert.ll
M llvm/test/CodeGen/PowerPC/v16i8_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v2i64_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v4i32_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/PowerPC/v8i16_scalar_to_vector_shuffle.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/abds-neg.ll
M llvm/test/CodeGen/RISCV/abds.ll
M llvm/test/CodeGen/RISCV/abdu-neg.ll
M llvm/test/CodeGen/RISCV/abdu.ll
M llvm/test/CodeGen/RISCV/bfloat-arith.ll
M llvm/test/CodeGen/RISCV/bfloat-convert.ll
M llvm/test/CodeGen/RISCV/bfloat-select-fcmp.ll
M llvm/test/CodeGen/RISCV/bfloat-select-icmp.ll
M llvm/test/CodeGen/RISCV/copysign-casts.ll
M llvm/test/CodeGen/RISCV/double-convert.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/double-intrinsics.ll
M llvm/test/CodeGen/RISCV/double-round-conv.ll
M llvm/test/CodeGen/RISCV/float-convert.ll
M llvm/test/CodeGen/RISCV/float-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-arith.ll
M llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
M llvm/test/CodeGen/RISCV/half-convert-strict.ll
M llvm/test/CodeGen/RISCV/half-convert.ll
M llvm/test/CodeGen/RISCV/half-imm.ll
M llvm/test/CodeGen/RISCV/half-intrinsics.ll
M llvm/test/CodeGen/RISCV/half-round-conv-sat.ll
M llvm/test/CodeGen/RISCV/half-round-conv.ll
M llvm/test/CodeGen/RISCV/half-select-fcmp.ll
M llvm/test/CodeGen/RISCV/half-select-icmp.ll
M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert-strict.ll
M llvm/test/CodeGen/RISCV/rv64zfhmin-half-convert.ll
M llvm/test/CodeGen/RISCV/rvv/copyprop.mir
A llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-buildvec.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-setcc.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-splat.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-llrint.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-load.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-load-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-store-int.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-setcc-fp-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-store.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-strided-load-store-asm.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vand-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfdiv-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfma-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmax.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmin.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfmul-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfptoi-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfsub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge-bf16.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vpmerge.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vsaddu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssub-vp.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vssubu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/handle-noreg-with-implicit-def.mir
M llvm/test/CodeGen/RISCV/rvv/rvv-peephole-vmerge-to-vmv.mir
M llvm/test/CodeGen/RISCV/rvv/subregister-undef-early-clobber.mir
M llvm/test/CodeGen/RISCV/rvv/undef-earlyclobber-chain.mir
M llvm/test/CodeGen/RISCV/rvv/vadd-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vector-deinterleave-load.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll
M llvm/test/CodeGen/RISCV/rvv/vfabs-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfcopysign-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfneg-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmadd-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfnmsub-constrained-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vmax-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmaxu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmin-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vminu-vp.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.ll
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v-peephole.mir
M llvm/test/CodeGen/RISCV/rvv/vmv.v.v.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd-sdnode.ll
M llvm/test/CodeGen/RISCV/srem-seteq-illegal-types.ll
M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll
R llvm/test/CodeGen/RISCV/zfbfmin.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchBranches.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchEmpty.ll
M llvm/test/CodeGen/SPIRV/branching/OpSwitchUnreachable.ll
M llvm/test/CodeGen/SPIRV/branching/Two_OpSwitch_same_register.ll
A llvm/test/CodeGen/SPIRV/debug-info/no-misplaced-opextinst.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveIsFirstLane.ll
M llvm/test/CodeGen/SPIRV/transcoding/GlobalFunAnnotate.ll
M llvm/test/CodeGen/Thumb/machine-cse-deadreg.mir
M llvm/test/CodeGen/Thumb/machine-cse-physreg.mir
M llvm/test/CodeGen/Thumb2/cmpxchg.mir
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
M llvm/test/CodeGen/Thumb2/pipeliner-preserve-ties.mir
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.ll
A llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
R llvm/test/CodeGen/WebAssembly/cfg-stackify-eh.mir
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
A llvm/test/CodeGen/WebAssembly/exception-legacy.mir
R llvm/test/CodeGen/WebAssembly/exception.mir
M llvm/test/CodeGen/WebAssembly/function-info.mir
A llvm/test/CodeGen/WinEH/wineh-empty-seh-scope.ll
M llvm/test/CodeGen/X86/abds-neg.ll
M llvm/test/CodeGen/X86/abds.ll
M llvm/test/CodeGen/X86/abdu-neg.ll
M llvm/test/CodeGen/X86/abdu.ll
A llvm/test/CodeGen/X86/avx10.2-fma-commute.ll
A llvm/test/CodeGen/X86/avx10_2_512bf16-arith.ll
A llvm/test/CodeGen/X86/avx10_2_512bf16-intrinsics.ll
A llvm/test/CodeGen/X86/avx10_2bf16-arith.ll
A llvm/test/CodeGen/X86/avx10_2bf16-intrinsics.ll
M llvm/test/CodeGen/X86/buildvec-insertvec.ll
M llvm/test/CodeGen/X86/clobber_frame_ptr.ll
M llvm/test/CodeGen/X86/cse-two-preds.mir
M llvm/test/CodeGen/X86/distancemap.mir
M llvm/test/CodeGen/X86/is_fpclass.ll
M llvm/test/CodeGen/X86/known-signbits-vector.ll
M llvm/test/CodeGen/X86/load-scalar-as-vector.ll
M llvm/test/CodeGen/X86/movmsk-cmp.ll
M llvm/test/CodeGen/X86/phielim-undef.mir
M llvm/test/CodeGen/X86/pr44915.ll
M llvm/test/CodeGen/X86/pull-conditional-binop-through-shift.ll
M llvm/test/CodeGen/X86/scmp.ll
M llvm/test/CodeGen/X86/twoaddr-mul2.mir
M llvm/test/CodeGen/X86/ucmp.ll
M llvm/test/CodeGen/X86/vec_insert-5.ll
M llvm/test/CodeGen/X86/vec_shift5.ll
M llvm/test/CodeGen/X86/vector-sext.ll
M llvm/test/CodeGen/X86/vector-shuffle-combining.ll
A llvm/test/DebugInfo/Generic/debug-ranges-duplication.ll
M llvm/test/DebugInfo/MIR/X86/machine-cse.mir
A llvm/test/DebugInfo/type-finder-w-dbg-records.ll
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/RISCV/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/alloca.ll
M llvm/test/Instrumentation/HWAddressSanitizer/basic.ll
M llvm/test/Instrumentation/HWAddressSanitizer/mem-attr.ll
M llvm/test/Instrumentation/PGOForceFunctionAttrs/basic.ll
A llvm/test/MC/AArch64/SVE/directive-arch-negative.s
M llvm/test/MC/AArch64/SVE/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/SVE/directive-cpu-negative.s
M llvm/test/MC/AArch64/directive-arch-negative.s
M llvm/test/MC/AArch64/directive-arch_extension-negative.s
M llvm/test/MC/AArch64/directive-cpu-err.s
M llvm/test/MC/AMDGPU/gfx12_asm_vimage_alias.s
M llvm/test/MC/AVR/hex-immediates.s
M llvm/test/MC/AVR/inst-adc.s
M llvm/test/MC/AVR/inst-add.s
M llvm/test/MC/AVR/inst-adiw.s
M llvm/test/MC/AVR/inst-and.s
M llvm/test/MC/AVR/inst-andi.s
M llvm/test/MC/AVR/inst-asr.s
M llvm/test/MC/AVR/inst-bld.s
M llvm/test/MC/AVR/inst-brbc.s
M llvm/test/MC/AVR/inst-brbs.s
M llvm/test/MC/AVR/inst-brcc.s
M llvm/test/MC/AVR/inst-brcs.s
M llvm/test/MC/AVR/inst-break.s
M llvm/test/MC/AVR/inst-breq.s
M llvm/test/MC/AVR/inst-brge.s
M llvm/test/MC/AVR/inst-brhc.s
M llvm/test/MC/AVR/inst-brhs.s
M llvm/test/MC/AVR/inst-brid.s
M llvm/test/MC/AVR/inst-brie.s
M llvm/test/MC/AVR/inst-brlo.s
M llvm/test/MC/AVR/inst-brlt.s
M llvm/test/MC/AVR/inst-brmi.s
M llvm/test/MC/AVR/inst-brne.s
M llvm/test/MC/AVR/inst-brpl.s
M llvm/test/MC/AVR/inst-brsh.s
M llvm/test/MC/AVR/inst-brtc.s
M llvm/test/MC/AVR/inst-brts.s
M llvm/test/MC/AVR/inst-brvc.s
M llvm/test/MC/AVR/inst-brvs.s
M llvm/test/MC/AVR/inst-bst.s
M llvm/test/MC/AVR/inst-call.s
M llvm/test/MC/AVR/inst-cbi.s
M llvm/test/MC/AVR/inst-cbr.s
M llvm/test/MC/AVR/inst-clr.s
M llvm/test/MC/AVR/inst-com.s
M llvm/test/MC/AVR/inst-cp.s
M llvm/test/MC/AVR/inst-cpc.s
M llvm/test/MC/AVR/inst-cpi.s
M llvm/test/MC/AVR/inst-cpse.s
M llvm/test/MC/AVR/inst-dec.s
M llvm/test/MC/AVR/inst-des.s
M llvm/test/MC/AVR/inst-eicall.s
M llvm/test/MC/AVR/inst-eijmp.s
M llvm/test/MC/AVR/inst-elpm.s
M llvm/test/MC/AVR/inst-eor.s
M llvm/test/MC/AVR/inst-family-set-clr-flag.s
M llvm/test/MC/AVR/inst-fmul.s
M llvm/test/MC/AVR/inst-fmuls.s
M llvm/test/MC/AVR/inst-fmulsu.s
M llvm/test/MC/AVR/inst-icall.s
M llvm/test/MC/AVR/inst-ijmp.s
M llvm/test/MC/AVR/inst-in.s
M llvm/test/MC/AVR/inst-inc.s
M llvm/test/MC/AVR/inst-jmp.s
M llvm/test/MC/AVR/inst-lac.s
M llvm/test/MC/AVR/inst-las.s
M llvm/test/MC/AVR/inst-lat.s
M llvm/test/MC/AVR/inst-ld.s
M llvm/test/MC/AVR/inst-ldd.s
M llvm/test/MC/AVR/inst-ldi.s
M llvm/test/MC/AVR/inst-lds.s
M llvm/test/MC/AVR/inst-lpm.s
M llvm/test/MC/AVR/inst-lsl.s
M llvm/test/MC/AVR/inst-lsr.s
M llvm/test/MC/AVR/inst-mov.s
M llvm/test/MC/AVR/inst-movw.s
M llvm/test/MC/AVR/inst-mul.s
M llvm/test/MC/AVR/inst-muls.s
M llvm/test/MC/AVR/inst-mulsu.s
M llvm/test/MC/AVR/inst-neg.s
M llvm/test/MC/AVR/inst-nop.s
M llvm/test/MC/AVR/inst-or.s
M llvm/test/MC/AVR/inst-ori.s
M llvm/test/MC/AVR/inst-out.s
M llvm/test/MC/AVR/inst-pop.s
M llvm/test/MC/AVR/inst-push.s
M llvm/test/MC/AVR/inst-rcall.s
M llvm/test/MC/AVR/inst-ret.s
M llvm/test/MC/AVR/inst-reti.s
M llvm/test/MC/AVR/inst-rjmp.s
M llvm/test/MC/AVR/inst-rol.s
M llvm/test/MC/AVR/inst-ror.s
M llvm/test/MC/AVR/inst-sbc.s
M llvm/test/MC/AVR/inst-sbci.s
M llvm/test/MC/AVR/inst-sbi.s
M llvm/test/MC/AVR/inst-sbic.s
M llvm/test/MC/AVR/inst-sbis.s
M llvm/test/MC/AVR/inst-sbiw.s
M llvm/test/MC/AVR/inst-sbr.s
M llvm/test/MC/AVR/inst-sbrc.s
M llvm/test/MC/AVR/inst-sbrs.s
M llvm/test/MC/AVR/inst-ser.s
M llvm/test/MC/AVR/inst-sleep.s
M llvm/test/MC/AVR/inst-spm.s
M llvm/test/MC/AVR/inst-st.s
M llvm/test/MC/AVR/inst-std.s
M llvm/test/MC/AVR/inst-sts.s
M llvm/test/MC/AVR/inst-sub.s
M llvm/test/MC/AVR/inst-subi.s
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M llvm/test/MC/AVR/inst-tst.s
M llvm/test/MC/AVR/inst-wdr.s
M llvm/test/MC/AVR/inst-xch.s
M llvm/test/MC/AVR/modifiers.s
M llvm/test/MC/AVR/registers.s
M llvm/test/MC/AVR/relocations-abs.s
M llvm/test/MC/AVR/relocations.s
M llvm/test/MC/AVR/separator.s
M llvm/test/MC/AVR/syntax-reg-int-literal.s
M llvm/test/MC/AVR/syntax-reg-pair.s
A llvm/test/MC/Disassembler/X86/avx10.2-bf16-32.txt
A llvm/test/MC/Disassembler/X86/avx10.2-bf16-64.txt
M llvm/test/MC/Mips/cnmips/invalid-wrong-error.s
M llvm/test/MC/Mips/eva/invalid-noeva-wrong-error.s
M llvm/test/MC/Mips/eva/invalid_R6.s
M llvm/test/MC/Mips/micromips32r6/invalid-wrong-error.s
M llvm/test/MC/Mips/mips1/invalid-mips2-wrong-error.s
M llvm/test/MC/Mips/mips1/invalid-mips3-wrong-error.s
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M llvm/test/MC/Mips/mips1/invalid-mips4-wrong-error.s
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M llvm/test/MC/Mips/mips1/invalid-mips5.s
M llvm/test/MC/Mips/mips2/invalid-mips3-wrong-error.s
M llvm/test/MC/Mips/mips2/invalid-mips3.s
M llvm/test/MC/Mips/mips2/invalid-mips4-wrong-error.s
M llvm/test/MC/Mips/mips2/invalid-mips4.s
M llvm/test/MC/Mips/mips32r6/invalid-mips1-wrong-error.s
M llvm/test/MC/Mips/mips64r6/invalid-mips1-wrong-error.s
M llvm/test/MC/Mips/mips64r6/invalid-mips3-wrong-error.s
M llvm/test/MC/Mips/target-soft-float.s
M llvm/test/MC/RISCV/fp-default-rounding-mode.s
M llvm/test/MC/RISCV/rv32zfbfmin-valid.s
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M llvm/test/MC/SystemZ/regs-bad.s
M llvm/test/MC/SystemZ/regs-good.s
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A llvm/test/MC/X86/avx10.2-bf16-32-intel.s
A llvm/test/MC/X86/avx10.2-bf16-64-att.s
A llvm/test/MC/X86/avx10.2-bf16-64-intel.s
A llvm/test/MachineVerifier/AMDGPU/lit.local.cfg
A llvm/test/MachineVerifier/AMDGPU/register-killed-inside-loop.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_bitcast.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic.mir
A llvm/test/MachineVerifier/AMDGPU/test_g_intrinsic_w_side_effects.mir
A llvm/test/MachineVerifier/AMDGPU/undef-should-only-be-set-on-subreg-defs.mir
A llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-entry-block.mir
A llvm/test/MachineVerifier/AMDGPU/undef-virt-reg-nonentry-block.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-ec-subreg-liveness.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-implicit-virtreg-invalid-physreg-liveness.mir
A llvm/test/MachineVerifier/AMDGPU/verifier-pseudo-terminators.mir
A llvm/test/MachineVerifier/AMDGPU/verify-implicit-def.mir
A llvm/test/MachineVerifier/AMDGPU/verify-reg-sequence.mir
A llvm/test/MachineVerifier/AMDGPU/writelane_m0.mir
R llvm/test/MachineVerifier/register-killed-inside-loop.mir
R llvm/test/MachineVerifier/test_g_bitcast.mir
R llvm/test/MachineVerifier/test_g_intrinsic.mir
R llvm/test/MachineVerifier/test_g_intrinsic_w_side_effects.mir
R llvm/test/MachineVerifier/undef-should-only-be-set-on-subreg-defs.mir
R llvm/test/MachineVerifier/undef-virt-reg-entry-block.mir
R llvm/test/MachineVerifier/undef-virt-reg-nonentry-block.mir
R llvm/test/MachineVerifier/verifier-ec-subreg-liveness.mir
R llvm/test/MachineVerifier/verifier-implicit-virtreg-invalid-physreg-liveness.mir
R llvm/test/MachineVerifier/verifier-pseudo-terminators.mir
R llvm/test/MachineVerifier/verify-implicit-def.mir
R llvm/test/MachineVerifier/verify-reg-sequence.mir
R llvm/test/MachineVerifier/writelane_m0.mir
M llvm/test/Other/new-pm-print-pipeline.ll
M llvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
M llvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
A llvm/test/Other/spirv-sim/branch.spv
A llvm/test/Other/spirv-sim/call.spv
A llvm/test/Other/spirv-sim/constant.spv
A llvm/test/Other/spirv-sim/lit.local.cfg
A llvm/test/Other/spirv-sim/loop.spv
A llvm/test/Other/spirv-sim/simple-bad-result.spv
A llvm/test/Other/spirv-sim/simple.spv
A llvm/test/Other/spirv-sim/simulator-args.spv
A llvm/test/Other/spirv-sim/switch.spv
A llvm/test/Other/spirv-sim/wave-get-lane-index.spv
A llvm/test/Other/spirv-sim/wave-read-lane-first.spv
M llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td
M llvm/test/TableGen/intrinsic-attrs.td
M llvm/test/TableGen/intrinsic-long-name.td
M llvm/test/TableGen/intrinsic-struct.td
M llvm/test/TableGen/searchabletables-intrinsic.td
M llvm/test/TableGen/x86-fold-tables.inc
M llvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll
M llvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll
M llvm/test/Transforms/Attributor/IPConstantProp/PR26044.ll
M llvm/test/Transforms/Attributor/IPConstantProp/return-constants.ll
M llvm/test/Transforms/Attributor/align.ll
M llvm/test/Transforms/Attributor/assumes_info.ll
M llvm/test/Transforms/Attributor/cb_liveness_disabled.ll
M llvm/test/Transforms/Attributor/cb_liveness_enabled.ll
M llvm/test/Transforms/Attributor/memory_locations.ll
M llvm/test/Transforms/Attributor/phi_bug_pointer_info.ll
M llvm/test/Transforms/Attributor/range.ll
M llvm/test/Transforms/Attributor/read_write_returned_arguments_scc.ll
M llvm/test/Transforms/Attributor/returned.ll
M llvm/test/Transforms/Attributor/value-simplify-local-remote.ll
M llvm/test/Transforms/Attributor/value-simplify-pointer-info.ll
A llvm/test/Transforms/CodeGenPrepare/revert-constant-ptr-propagation-on-calls.ll
M llvm/test/Transforms/InstCombine/ARM/neon-intrinsics.ll
M llvm/test/Transforms/InstCombine/gep-combine-loop-invariant.ll
M llvm/test/Transforms/InstCombine/phi-select-constant.ll
M llvm/test/Transforms/InstCombine/phi.ll
M llvm/test/Transforms/JumpThreading/pr22086.ll
M llvm/test/Transforms/LICM/hoist-binop.ll
M llvm/test/Transforms/LICM/sink-foldable.ll
M llvm/test/Transforms/LICM/update-scev-after-hoist.ll
M llvm/test/Transforms/LoopUnroll/unroll-cleanup.ll
A llvm/test/Transforms/LoopVectorize/AArch64/call-costs.ll
A llvm/test/Transforms/LoopVectorize/AArch64/mul-simplification.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
M llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vectorize-force-tail-with-evl-inloop-reduction.ll
M llvm/test/Transforms/LoopVectorize/X86/amdlibm-calls.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
A llvm/test/Transforms/LoopVectorize/check-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
M llvm/test/Transforms/LoopVectorize/reduction.ll
M llvm/test/Transforms/OpenMP/replace_globalization.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/PhaseOrdering/icmp-ashr-breaking-select-idiom.ll
M llvm/test/Transforms/SCCP/exact-flags.ll
M llvm/test/Transforms/SCCP/loadtest2.ll
M llvm/test/Transforms/SCCP/phis.ll
M llvm/test/Transforms/SCCP/pointer-nonnull.ll
M llvm/test/Transforms/SCCP/select.ll
M llvm/test/Transforms/SCCP/widening.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/accelerate-vector-functions.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
R llvm/test/Transforms/SLPVectorizer/RISCV/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
A llvm/test/Transforms/SLPVectorizer/X86/arith-scmp.ll
A llvm/test/Transforms/SLPVectorizer/X86/arith-ucmp.ll
M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
A llvm/test/Transforms/SLPVectorizer/X86/minbw-user-non-sizable.ll
A llvm/test/Transforms/SLPVectorizer/X86/multi-tracked-reduced-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
M llvm/test/Transforms/SLPVectorizer/X86/reverse_extract_elements.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll
M llvm/test/Transforms/SLPVectorizer/X86/vec3-reorder-reshuffle.ll
A llvm/test/Transforms/SLPVectorizer/empty-struct.ll
A llvm/test/Transforms/SLPVectorizer/reduction-whole-regs-loads.ll
M llvm/test/Transforms/SLPVectorizer/revec-shufflevector.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
A llvm/test/Transforms/SampleProfile/Inputs/pseudo-probe-stale-profile-toplev-func.prof
A llvm/test/Transforms/SampleProfile/pseudo-probe-stale-profile-toplev-func.ll
A llvm/test/Transforms/SandboxVectorizer/X86/no_implicit_float.ll
A llvm/test/Transforms/SandboxVectorizer/boilerplate.ll
M llvm/test/lit.cfg.py
M llvm/test/tools/llc/new-pm/pipeline.mir
M llvm/test/tools/llc/new-pm/verify.mir
M llvm/test/tools/llvm-objdump/BPF/interleaved-source-test.ll
M llvm/tools/llc/NewPMDriver.cpp
M llvm/tools/llc/NewPMDriver.h
M llvm/tools/llc/llc.cpp
M llvm/tools/llvm-as/CMakeLists.txt
M llvm/tools/llvm-link/CMakeLists.txt
M llvm/tools/opt/CMakeLists.txt
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/ADT/APIntTest.cpp
M llvm/unittests/Analysis/IVDescriptorsTest.cpp
M llvm/unittests/DebugInfo/DWARF/DWARFDieTest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/ConstantRangeTest.cpp
M llvm/unittests/IR/PatternMatch.cpp
M llvm/unittests/ProfileData/PGOCtxProfReaderWriterTest.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/SandboxIR/TrackerTest.cpp
M llvm/unittests/SandboxIR/TypesTest.cpp
M llvm/unittests/Support/FormatVariadicTest.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
M llvm/unittests/Transforms/Utils/CallPromotionUtilsTest.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.h
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
M llvm/utils/TableGen/Common/GlobalISel/PatternParser.cpp
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.cpp
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.h
M llvm/utils/TableGen/ExegesisEmitter.cpp
M llvm/utils/TableGen/GlobalISelEmitter.cpp
M llvm/utils/TableGen/IntrinsicEmitter.cpp
M llvm/utils/TableGen/SearchableTableEmitter.cpp
M llvm/utils/TableGen/SubtargetEmitter.cpp
M llvm/utils/TableGen/TableGen.cpp
M llvm/utils/TableGen/VTEmitter.cpp
M llvm/utils/count/count.c
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
M llvm/utils/gn/secondary/lld/test/BUILD.gn
M llvm/utils/gn/secondary/llvm/include/llvm/Config/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Transforms/Vectorize/BUILD.gn
A llvm/utils/lit/tests/Inputs/shtest-glob/example_file1.input
A llvm/utils/lit/tests/Inputs/shtest-glob/example_file2.input
A llvm/utils/lit/tests/Inputs/shtest-glob/glob-echo.txt
A llvm/utils/lit/tests/Inputs/shtest-glob/glob-mkdir.txt
A llvm/utils/lit/tests/Inputs/shtest-glob/lit.cfg
A llvm/utils/lit/tests/shtest-glob.py
M llvm/utils/release/build_llvm_release.bat
A llvm/utils/spirv-sim/instructions.py
A llvm/utils/spirv-sim/spirv-sim.py
M mlir/include/mlir-c/Dialect/LLVM.h
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPU.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSMEOps.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitC.td
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMAttrDefs.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMInterfaces.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/Utils/ConversionUtils.h
M mlir/include/mlir/IR/OpImplementation.h
M mlir/include/mlir/TableGen/GenInfo.h
M mlir/include/mlir/Transforms/DialectConversion.h
M mlir/lib/Analysis/Presburger/IntegerRelation.cpp
M mlir/lib/AsmParser/AsmParserImpl.h
M mlir/lib/CAPI/Dialect/LLVM.cpp
M mlir/lib/Conversion/AMDGPUToROCDL/AMDGPUToROCDL.cpp
M mlir/lib/Conversion/ArithToArmSME/ArithToArmSME.cpp
M mlir/lib/Conversion/ArmSMEToLLVM/ArmSMEToLLVM.cpp
M mlir/lib/Conversion/ArmSMEToSCF/ArmSMEToSCF.cpp
M mlir/lib/Conversion/MathToROCDL/MathToROCDL.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/TensorToSPIRV/TensorToSPIRV.cpp
M mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
M mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
M mlir/lib/Dialect/Affine/Utils/Utils.cpp
M mlir/lib/Dialect/Bufferization/Transforms/BufferResultsToOutParams.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Transforms/SubgroupReduceLowering.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMAttrs.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/Transforms/DIScopeForLLVMFuncOp.cpp
M mlir/lib/Dialect/SCF/Transforms/LoopPipelining.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorTilingInterfaceImpl.cpp
M mlir/lib/Dialect/Tensor/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDecomposeTransposeConv.cpp
M mlir/lib/Dialect/Tosa/Utils/ConversionUtils.cpp
M mlir/lib/Dialect/Vector/Transforms/VectorLinearize.cpp
M mlir/lib/TableGen/Pattern.cpp
M mlir/lib/Target/LLVMIR/DebugImporter.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.cpp
M mlir/lib/Target/LLVMIR/DebugTranslation.h
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/lib/Transforms/SROA.cpp
M mlir/lib/Transforms/Utils/DialectConversion.cpp
M mlir/lib/Transforms/Utils/RegionUtils.cpp
M mlir/python/mlir/dialects/scf.py
M mlir/test/CAPI/llvm.c
A mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir
M mlir/test/Conversion/ArithToArmSME/arith-to-arm-sme.mlir
M mlir/test/Conversion/ArmSMEToLLVM/arm-sme-to-llvm.mlir
M mlir/test/Conversion/ArmSMEToSCF/arm-sme-to-scf.mlir
M mlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
M mlir/test/Conversion/MathToROCDL/math-to-rocdl.mlir
M mlir/test/Conversion/NVGPUToNVVM/nvgpu-to-nvvm.mlir
M mlir/test/Conversion/TensorToSPIRV/tensor-ops-to-spirv.mlir
M mlir/test/Conversion/VectorToArmSME/vector-to-arm-sme.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
M mlir/test/Dialect/Affine/scalrep.mlir
M mlir/test/Dialect/ArmSME/invalid.mlir
M mlir/test/Dialect/ArmSME/roundtrip.mlir
M mlir/test/Dialect/ArmSME/tile-allocation-copies.mlir
M mlir/test/Dialect/ArmSME/tile-allocation-liveness.mlir
M mlir/test/Dialect/Bufferization/Transforms/finalizing-bufferize.mlir
M mlir/test/Dialect/GPU/canonicalize.mlir
M mlir/test/Dialect/GPU/invalid.mlir
M mlir/test/Dialect/GPU/subgroup-reduce-lowering.mlir
M mlir/test/Dialect/SCF/loop-pipelining.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
M mlir/test/Dialect/Tensor/fold-into-pack-and-unpack.mlir
M mlir/test/Dialect/Tensor/invalid.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Vector/linearize.mlir
M mlir/test/Dialect/Vector/vector-transfer-to-vector-load-store.mlir
M mlir/test/Interfaces/TilingInterface/tile-and-fuse-consumer.mlir
M mlir/test/Target/Cpp/common-cpp.mlir
M mlir/test/Target/LLVMIR/Import/debug-info.ll
M mlir/test/Target/LLVMIR/llvmir-debug.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
A mlir/test/Target/LLVMIR/omptarget-debug.mlir
A mlir/test/Target/LLVMIR/omptarget-debug2.mlir
M mlir/test/Target/LLVMIR/omptarget-llvm.mlir
A mlir/test/Target/LLVMIR/openmp-target-use-device-nested.mlir
M mlir/test/Target/LLVMIR/rocdl.mlir
M mlir/test/Transforms/buffer-results-to-out-params-elim.mlir
M mlir/test/Transforms/canonicalize-block-merge.mlir
M mlir/test/Transforms/test-legalize-type-conversion.mlir
M mlir/test/Transforms/test-legalizer.mlir
M mlir/test/lib/Dialect/SCF/TestSCFUtils.cpp
M mlir/test/lib/Dialect/Test/TestPatterns.cpp
M mlir/test/python/dialects/scf.py
M mlir/tools/mlir-tblgen/AttrOrTypeDefGen.cpp
M mlir/tools/mlir-tblgen/OmpOpGen.cpp
M mlir/tools/mlir-tblgen/OpDocGen.cpp
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
M mlir/tools/mlir-tblgen/RewriterGen.cpp
M mlir/tools/tblgen-to-irdl/OpDefinitionsGen.cpp
M offload/CMakeLists.txt
M offload/DeviceRTL/CMakeLists.txt
M offload/DeviceRTL/include/Allocator.h
M offload/DeviceRTL/include/Configuration.h
A offload/DeviceRTL/include/DeviceTypes.h
A offload/DeviceRTL/include/DeviceUtils.h
M offload/DeviceRTL/include/Interface.h
M offload/DeviceRTL/include/LibC.h
M offload/DeviceRTL/include/Mapping.h
M offload/DeviceRTL/include/State.h
M offload/DeviceRTL/include/Synchronization.h
R offload/DeviceRTL/include/Types.h
R offload/DeviceRTL/include/Utils.h
M offload/DeviceRTL/src/Allocator.cpp
M offload/DeviceRTL/src/Configuration.cpp
M offload/DeviceRTL/src/Debug.cpp
A offload/DeviceRTL/src/DeviceUtils.cpp
M offload/DeviceRTL/src/Kernel.cpp
M offload/DeviceRTL/src/Mapping.cpp
M offload/DeviceRTL/src/Misc.cpp
M offload/DeviceRTL/src/Parallelism.cpp
M offload/DeviceRTL/src/Reduction.cpp
M offload/DeviceRTL/src/State.cpp
M offload/DeviceRTL/src/Synchronization.cpp
M offload/DeviceRTL/src/Tasking.cpp
R offload/DeviceRTL/src/Utils.cpp
M offload/DeviceRTL/src/Workshare.cpp
A offload/include/Shared/RefCnt.h
A offload/include/Shared/Types.h
M offload/include/Shared/Utils.h
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/amdgpu/utils/UtilitiesRTL.h
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/GlobalHandler.cpp
M offload/plugins-nextgen/common/src/JIT.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/CMakeLists.txt
M offload/src/DeviceImage.cpp
M offload/src/omptarget.cpp
M offload/test/api/is_initial_device.c
M offload/test/lit.cfg
M offload/test/mapping/declare_mapper_nested_default_mappers_array.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_array_subscript.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_complex_structure.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_ptr_subscript.cpp
M offload/test/mapping/declare_mapper_nested_default_mappers_var.cpp
M offload/test/mapping/map_both_pointer_pointee.c
M offload/test/mapping/target_pointers_members_map.cpp
M offload/test/offloading/CUDA/basic_launch.cu
M offload/test/offloading/CUDA/basic_launch_blocks_and_threads.cu
M offload/test/offloading/CUDA/basic_launch_multi_arg.cu
M offload/test/offloading/CUDA/launch_tu.cu
M offload/test/offloading/dynamic-schedule-non-spmd.cpp
M offload/test/offloading/dynamic-schedule.cpp
M offload/test/offloading/fortran/dtype-array-constant-index-map.f90
M offload/test/offloading/fortran/dump_map_tables.f90
M offload/test/offloading/fortran/target-depend.f90
M offload/test/offloading/fortran/target-map-all-common-block-members.f90
M offload/test/offloading/fortran/target-map-common-block.f90
M offload/test/offloading/fortran/target-map-declare-target-link-common-block.f90
A offload/test/offloading/fortran/target-map-dynamic.f90
M offload/test/offloading/fortran/target-map-first-common-block-member.f90
M offload/test/offloading/fortran/target-map-mix-imp-exp-common-block-members.f90
M offload/test/offloading/fortran/target-map-second-common-block-member.f90
M offload/test/offloading/high_trip_count_block_limit.cpp
M offload/test/offloading/schedule.c
M offload/test/sanitizer/double_free.c
M offload/test/sanitizer/double_free_racy.c
M offload/test/sanitizer/free_host_ptr.c
M offload/test/sanitizer/free_wrong_ptr_kind.c
M offload/test/sanitizer/free_wrong_ptr_kind.cpp
M offload/test/sanitizer/kernel_crash.c
M offload/test/sanitizer/kernel_crash_async.c
M offload/test/sanitizer/kernel_crash_many.c
M offload/test/sanitizer/kernel_crash_single.c
M offload/test/sanitizer/kernel_trap.c
M offload/test/sanitizer/kernel_trap.cpp
M offload/test/sanitizer/kernel_trap_async.c
M offload/test/sanitizer/kernel_trap_many.c
M offload/test/sanitizer/ptr_outside_alloc_1.c
M offload/test/sanitizer/ptr_outside_alloc_2.c
M offload/test/sanitizer/use_after_free_1.c
M offload/test/sanitizer/use_after_free_2.c
M openmp/docs/SupportAndFAQ.rst
M utils/bazel/.bazelrc
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm_configs/config.h.cmake
Log Message:
-----------
rebase
Created using spr 1.3.5-bogner
Compare: https://github.com/llvm/llvm-project/compare/172ee69296c7...6f379121efae
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