[all-commits] [llvm/llvm-project] 54194e: [RISCV][SiFive7] Change `Latency` of VCIX to the d...

[Michal Terepeta via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 54194e1506bdd6dc37988678a8047ad4d48168fa
      https://github.com/llvm/llvm-project/commit/54194e1506bdd6dc37988678a8047ad4d48168fa
  Author: Michal Terepeta <michalt at google.com>
  Date:   2024-09-05 (Thu, 05 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVSchedSiFive7.td

  Log Message:
  -----------
  [RISCV][SiFive7] Change `Latency` of VCIX to the default (#106497)

Currently we multiply the default (`SiFive7GetCyclesDefault`) by 10, but
this turns out to be both surprising to our users and leads to worse
codegen in most cases. I think it's more natural to just keep the
default.

In the end the right solution is probably to have a separate scheduling
model for a particular VCIX coprocessor.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications