[all-commits] [llvm/llvm-project] 0c1500: [RISCV] Fix another RV32 Zdinx load/store addressi...

[Craig Topper via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 0c1500ef05e0a5b25cae79d2bd361dbc6e14e726
      https://github.com/llvm/llvm-project/commit/0c1500ef05e0a5b25cae79d2bd361dbc6e14e726
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2024-09-04 (Wed, 04 Sep 2024)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
    M llvm/test/CodeGen/RISCV/zdinx-boundary-check.ll

  Log Message:
  -----------
  [RISCV] Fix another RV32 Zdinx load/store addressing corner case.

RISCVExpandPseudoInsts makes sure the offset is divisible by 8
so we need to enforce that during isel.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications