[all-commits] [llvm/llvm-project] 2fef44: [LLVM][AArch64] Enable verifyTargetSDNode for scal...

[Paul Walker via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2fef449f30e2f484897cb199e3338a1520803c7d
      https://github.com/llvm/llvm-project/commit/2fef449f30e2f484897cb199e3338a1520803c7d
  Author: Paul Walker <paul.walker at arm.com>
  Date:   2024-09-04 (Wed, 04 Sep 2024)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

  Log Message:
  -----------
  [LLVM][AArch64] Enable verifyTargetSDNode for scalable vectors and fix the fallout. (#104820)

Fix incorrect use of AArch64ISD::UZP1/UUNPK{HI,LO} in:
  AArch64TargetLowering::LowerDIV
  AArch64TargetLowering::LowerINSERT_SUBVECTOR
    
The latter highlighted DAG combines that relied on broken behaviour,
which this patch also fixes.



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