[all-commits] [llvm/llvm-project] 2c7786: Prefer use of 0.0 over -0.0 for fadd reductions w/...

[Philip Reames via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 2c7786e94a1058bd4f96794a1d4f70dcb86e5cc5
      https://github.com/llvm/llvm-project/commit/2c7786e94a1058bd4f96794a1d4f70dcb86e5cc5
  Author: Philip Reames <preames at rivosinc.com>
  Date:   2024-09-03 (Tue, 03 Sep 2024)

  Changed paths:
    M llvm/lib/CodeGen/ExpandVectorPredication.cpp
    M llvm/lib/Transforms/Utils/LoopUtils.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-reductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-option.ll
    M llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-reduction-types.ll
    M llvm/test/Transforms/LoopVectorize/ARM/mve-selectandorcost.ll
    M llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
    M llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/scalable-reductions.ll
    M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
    M llvm/test/Transforms/LoopVectorize/X86/imprecise-through-phis.ll
    M llvm/test/Transforms/LoopVectorize/X86/reduction-fastmath.ll
    M llvm/test/Transforms/LoopVectorize/epilog-vectorization-reductions.ll
    M llvm/test/Transforms/LoopVectorize/induction.ll
    M llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-cond.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop-pred.ll
    M llvm/test/Transforms/LoopVectorize/reduction-inloop.ll
    M llvm/test/Transforms/LoopVectorize/reduction-predselect.ll
    M llvm/test/Transforms/LoopVectorize/reduction.ll
    M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/vec3-base.ll
    M llvm/test/Transforms/SLPVectorizer/X86/dot-product.ll
    M llvm/test/Transforms/SLPVectorizer/X86/extractelements-vector-ops-shuffle.ll
    M llvm/test/Transforms/SLPVectorizer/X86/horizontal-list.ll
    M llvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
    M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-buildvector.ll
    M llvm/test/Transforms/SLPVectorizer/X86/redux-feed-insertelement.ll
    M llvm/test/Transforms/SLPVectorizer/X86/reverse_extract_elements.ll
    M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss.ll

  Log Message:
  -----------
  Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (#106770)

This is a follow up to 924907bc6, and is mostly motivated by consistency
but does include one additional optimization. In general, we prefer 0.0
over -0.0 as the identity value for an fadd. We use that value in
several places, but don't in others. So, let's be consistent and use the
same identity (when nsz allows) everywhere.

This creates a bunch of test churn, but due to 924907bc6, most of that
churn doesn't actually indicate a change in codegen. The exception is
that this change enables the use of 0.0 for nsz, but *not* reasoc, fadd
reductions. Or said differently, it allows the neutral value of an
ordered fadd reduction to be 0.0.



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